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Pos' Cos': Co1 (K6) Co2 (K4) Co3 (K3) Co4 (K3)

This document outlines the objectives, outcomes, and mapping for a digital systems design and integrated circuits lab course. The course objectives are for students to understand Xilinx tools for digital design and simulate both combinational and sequential logic circuits. The outcomes are for students to synthesize digital integrated circuit designs, analyze simulation results, and develop VHDL code for combinational and sequential integrated circuits. The mapping shows how the course outcomes are linked to program outcomes and program specific outcomes.

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venkata satish
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0% found this document useful (0 votes)
53 views2 pages

Pos' Cos': Co1 (K6) Co2 (K4) Co3 (K3) Co4 (K3)

This document outlines the objectives, outcomes, and mapping for a digital systems design and integrated circuits lab course. The course objectives are for students to understand Xilinx tools for digital design and simulate both combinational and sequential logic circuits. The outcomes are for students to synthesize digital integrated circuit designs, analyze simulation results, and develop VHDL code for combinational and sequential integrated circuits. The mapping shows how the course outcomes are linked to program outcomes and program specific outcomes.

Uploaded by

venkata satish
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Class Semester Title of The Paper Paper Code W.E.

F
ECE III-I DSD DICA LAB R1631048 18-06-2018
Course Objectives:
Student able to
 Understand the work flow of Xilinx tools for digital design.
 Simulate combinational logic circuits.
 Simulate Sequential logic circuits.
 Synthesize combinational logic circuits.
 Synthesize Sequential logic circuits.
 Implementation of memory elements and ALU.

Course Outcomes:
Student able to:
CO1: Synthesize: Design:-Design and draw the internal structure of the following Digital
Integrated Circuits.(K6)
CO2: Analyze :Analyze :- Perform simulation using relevant simulator and analyze the
obtained simulation results using necessary synthesizer. (K4)
CO3: Application: Develop:-Develop VHDL source code for Combinational ICs. (K3)
CO4: Application: Develop:-Develop VHDL source code for Sequential ICs. (K3)

POs’ PSO1

PSO2

PSO3

PSO4
PO10

PO11

PO12
[K5]

[K3]

[K3]

[K3]

[K3]

[K6]

[K2]

[K6]

[K1]

[K3]

[K3]

[K3]

[K2]
PO2

PO3

PO4

PO5

PO6

PO7

PO8

PO9
PO1
[k3]

[k4]

[k5]

COs’
CO1 3 3 3 3 3 3 - - 2 - 2 3 3 3 - -
[K6]
CO2 3 2 1 1 3 3 - - 1 - 1 1 3 3 - -
[K4]
CO3 2 1 1 1 2 2 - - 1 - 1 3 2 2 - -
[K3]
CO4 2 1 1 1 2 2 - - 1 - 1 3 2 2 - -
[K3]

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