A Novel Open-Circuit Fault Detection and Location For Open-End Winding PMSM Based On Differential-Mode Components
A Novel Open-Circuit Fault Detection and Location For Open-End Winding PMSM Based On Differential-Mode Components
8, AUGUST 2022
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JIANG et al.: NOVEL OPEN-CIRCUIT FAULT DETECTION AND LOCATION FOR OPEN-END WINDING PMSM 7777
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7778 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 8, AUGUST 2022
Fig. 5. Relation between the output of the zero-sequence controller B. Current Analysis in a Faulty Condition
and i0.
For the open-end winding PMSM, the two bridges connected
to each phase can be analyzed independently, which is different
of the system are
from the conventional PMSM. In this article, phase A is used as
1 an example. In Fig. 6(a), S11 and S22 are in the ON state. S12 and
i0 = (ia + ib + ic ) (2)
3 S21 are in the OFF state. The passive phase current flows through
1 S11 and S22 , as the red arrow shows. The voltage of phase A
u0 = (ua + ub + uc ). (3) is +Udc . Assuming that an OC fault occurs in S11 during this
3
period, the current of S11 will be zero and the current path would
For the convenience of analysis, the symbols of i0 and u0
change. It will flow through S21 and the antiparallel diode of
can contain the fundamental component and the third-harmonic
S12 . The voltage of phase A is zero. So, the current of phase A
component in this article.
will decrease to zero. However, if the OC fault occurs in S22 in
In the applications of a voltage-source inverter, the dead time
this period, as shown in Fig. 6(b), the current of phase A will
is used to avoid the shoot through of one leg at the same time.
pass through the antiparallel diode of S21 . The voltage of phase
However, in dual-inverter systems, the dead time can generate
A will also change from +Udc to zero. So, the waveforms of
the ZSC due to the conduction of the antiparallel diodes. In the
phase current are the same since the voltages after the fault are
open-end winding PMSM driving systems, device voltage drop,
the same. In Fig. 6(c), if S11 and S22 have the fault at the same
dead time, and electromotive force (EMF) could cause the ZSC.
time, the current will decrease to zero faster.
Compared with the ZSC generated by device voltage drop, the
If the fault occurs in S21 or S12 during this period, the stator
dead time and EMF are the main reasons of the ZSC in healthy
current will not be affected, because these two devices are in
condition, and they would be analyzed next.
the OFF state and there are no currents flowing through these
The principle and current conducting paths in healthy condi-
two switches. The current will be affected in the next half cycle,
tion are expressed in [27]. Besides, the ZSC direction is only
where S21 and S12 are in the ON state.
related to the directions of the stator currents. In order to elimi-
From the analysis, the faulty currents of S11 and S22 (S12 and
nate the ZSC, closed-loop control is introduced in [2]. As shown
S21 ) are the same. According to the currents after the OC faults,
in Fig. 4, the durations of zero-voltage vectors are redistributed
the OC faults can be classified into three categories in one phase:
according to the output of the zero-sequence controller. The
Case I: the OC fault occurs in S11 or S22 (or together); Case II:
output of the zero-sequence controller can compensate the ZSC
the OC fault occurs in S12 or S21 (or together); and Case III:
generated by the dead time, so the ZSC is controlled to zero.
Cases I and II happen together, such as S11 and S12 ; the current
In early studies, a proportional—integral (PI) controller is
will lose both the positive and negative half cycles.
used. In order to improve the performance in variable-speed sys-
tems, the PR controller is used to eliminate the ZSC. According
to [28], the output of the PR controller contains information of III. DETECTION OF THE FAULT CASE
the ZSV. As shown in Fig. 5, assuming that i0 is controlled to In this article, the detection method is divided into two main
zero, which means the output of the PR controller can keep up steps. The first step is to detect which fault case happens. The
with the change of i0 , the waveforms of i0 and u0 are similar, second step is to locate the device under the OC fault. In the
and the direction of u0 is opposite to the direction of i0 so actual systems, the asymmetric phase current, dead time, and the
that ZSV can be compensated. So, in [28], the output of the EMF can generate the ZSC. The zero-sequence controller would
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JIANG et al.: NOVEL OPEN-CIRCUIT FAULT DETECTION AND LOCATION FOR OPEN-END WINDING PMSM 7779
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7780 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 8, AUGUST 2022
Fig. 10. Current paths during the dead time for V13’ , V24’ , and V77’ under (a) ib < 0, ic > 0 and (b) ib > 0, ic > 0.
TABLE I voltage of the dual inverter. For the convenience of analysis, the
VOLTAGES GENERATED BY THE DEAD TIME
average value of the ZSV is shown in Fig. 11.
From the analysis of i0 generated by stator current and dead
time, it can be seen that the frequency of i0 , which is three times
the fundamental waveform, will be fundamental when ia is zero
in the faulty condition. Therefore, this feature of i0 can be used
to detect if an OC fault occurs in the system.
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JIANG et al.: NOVEL OPEN-CIRCUIT FAULT DETECTION AND LOCATION FOR OPEN-END WINDING PMSM 7781
TABLE II
PROPOSED FAULT CASE DETECTION APPROACH
In Section III, the method of detecting the fault case and the
fault phase is expressed. The next step is to locate the IGBT(s) or S22 or both) is still unknown. Assuming that the fault switch
under the OC fault. is S11 , according to (10), the voltage of phase can be obtained.
Supposing that S11 of phase A has an OC fault, the voltage Assuming the eaf is in forward direction as assuming eaf in
equation of phase A in the normal condition does not exist in the forward direction as shown in Fig. 13, because S11 is faulty
positive half cycle. Therefore, under the faulty condition, the and S22 is healthy, no current is detected when S11 is given a
voltage equations of phases B and C of the motor are expressed pulsewidth modulation (PWM) gate signal. This can prove that
as S22 is healthy. In order to further confirm whether S22 is healthy,
ub = Rs ib + M didta + L di the controller turns OFF S11 and generates a PWM gate signal
dt + M dt + dt
b dic dϕb
(9) to S22 . The waveforms of phase A current and gate signals of
uc = Rs ic + M didta + M didt + L dt + dt
b dic dϕc
S22 are shown in Fig. 12. Since S11 is under the OC fault, the
where ia , ib , and ic are the stator currents, Rs is the equivalent current in forward direction will not be detected. Two working
resistance, L is the stator self-inductance, ϕa , ϕb , and ϕc are modes are expressed as follows.
the flux of permanent magnets, and M is the mutual inductance. Stage 1 (t0 –t1 ): S22 turns ON at t0 ; a forward direction current
However, the voltage of stator winding of phase A still exists, generated by eaf flows through S22 and the antiparallel diode of
and it can be expressed as S12 . This current increases during the period when S22 is ON.
Therefore, the current sensor of phase A will sample a positive
dib dic dϕa T
eaf = M +M + 0≤t≤ . (10) value of this current, as shown in Fig. 13(a).
dt dt dt 2 Stage 2 (t1 –t2 ): S22 turns OFF at t1 ; the phase current flows
From (10), it can be seen that a voltage of stator winding through the antiparallel diodes of S12 and S21 . The voltage of
still exists. This voltage is generated by the mutual inductance stator winding changes to Udc . So, this current decreases during
between phases B and C and the fundamental magnet flux. This this period in Fig. 13(b).
voltage can be used to locate the position of the IGBT(s) with Similarly, if S22 has an OC fault, the controller first generates
the OC fault. the PWM signal to S11 ; there is a forward current detected. Then,
After the fault case is detected, taking S11 of phase A as an the controller turns OFF S11 and generates the PWM signal to
example, the gate signals of the four devices (S11 , S12 , S21 , S22 ; no phase current in the forward direction can be generated,
and S22 ) connected to phase A should be turn OFF. So, phase A as shown in Fig. 14. Besides, if both S11 and S22 have OC faults,
is isolated. Fault-tolerant control strategies can be used for the phase A current will remain zero; even the controller generates
other two healthy phases. Since the rotor keeps running in this PWM signals in the two IGBTs.
period, eaf can be generated. It is an almost sinusoidal waveform. The same method of locating the position of devices under
Assume that case I fault of phase A is detected in the first step the OC fault for case II can be used. For case II, the direction of
and the four IGBTs connected to phase A are isolated. Although eaf should be in the opposite direction in case I. So, according
the fault case I is detected, the location of the faulty switch (S11 to (10), when eaf is in the reverse direction, the gate signals are
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7782 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 8, AUGUST 2022
the peak values of the stator currents are smaller than the values
in Fig. 19(a). Besides, smaller ZSC can reduce the ripples in
torque.
The phase currents of the other two phases are changed by
the PR controller, which can decrease the ripple of the speed.
Therefore, by comparing the waveforms in Fig. 19(a) and (b),
if the fault case is detected in the first step, the PR controller
should be enabled when the faulty phase is isolated. From
Fig. 19(b), it can be seen that the performance of suppression
of the zero-sequence components decreases obviously, because
Fig. 14. Equivalent circuits of S22 with gate signals. (a) Stage 1. the frequency of the zero-sequence components is no longer the
(b) Stage 2. resonant frequency of the PR controller, and as the increase of
the zero-sequence components, the zero-voltage vectors are not
given to the devices. Case III is combination of cases I and II, enough to compensate. For the output value of the PR controller,
so the controller should generate PWM signals to four devices it is sensitive to the speed of the motor. In the proposed method,
connected to the faulty phase in turn in one fundamental period. the robustness of the proposed method is mainly affected by the
When the controller generates PWM signals in one device, if a first step.
current in the corresponding direction is detected, this device is
healthy. If not, this device is under the OC fault. The operational B. Immunity Test
flowchart of the proposed is shown in Fig. 15.
In order to increase the robustness, step change of reference
In order to control this current, a closed-loop strategy is shown
speed is given to the system. The initial speed in Fig. 20(a) is
in Fig. 16, where Iref is the reference current.
1000 r/min. Then, it is changed to 1400 and 1000 r/min. The
frequency of the stator currents is changed according to the
V. EXPERIMENTAL VERIFICATION
reference speed. But i0 can be suppressed by the PR controller in
The experimental platform of the open-end winding PMSM this period of time. Because the EMF of the permanent magnets
is shown in Fig. 17. A TMS320F28335 evaluation board from would change with the speed of the rotor, the amplitude of
Texas Instruments has been adopted as the main control chip. the output of the PR controller increases when the speed is
The sampling frequency is 10 kHz. An analog-to-digital con- 1400 r/min. Fig. 20(b) shows the waveforms of load change from
verter chip AD7606 is used for capturing voltages and currents 0.8 to 1.2 Nm. Several factors, such as the transient process
of the main system. The dead time is 2.3 μs. The dc bus voltage induced by speed and load changes, switches, and sensors noises
is 100 V. The parameters of the motor are listed as: rating power should be selected accounted when the threshold values are
750 W, self-inductance 7.5 mH, mutual inductance 0.8 mH, and selected. In this article, u0th is set to 0.5. Although a ripple exists
winding resistance 2.1Ω. The load torque is 1 Nm. when the speed and load are changed, the average value of the
The control scheme is shown in Fig. 4. The reference speed PR controller output can stay within the predefined threshold
is 1000 r/min. The reference current iq is generated by a speed u0th = 0.5, without emitting false alarms. This can show the
PI controller. And the reference current id is equal to zero so high immunity against false alarms and the robustness of the
that the maximum torque per ampere can be achieved. The OC method under different operating conditions.
fault is obtained by shutting down the gate drive signal to the
considered IGBTs. C. Fault Detection Test
The performance of the proposed OC fault diagnostic method
A. PR Controller Test
of S11 fault for fault case I is shown in Fig. 21. The stator currents
In Fig. 18, the comparison between the condition with and i0 , u0, and u0av are given out. The speed is 1000 r/min. The load
without the PR controller is shown. According to [2], the PR torque is 1 Nm. In the normal condition, the stator currents
controller is designed to suppress the ZSC i0 . The resonant are symmetrical. And the frequency of the output of the PR
frequency of the PR controller is set according to the reference controller is three times that of the fundamental. When the gate
speed. It can be seen that the ZSC can be suppressed obviously. signal of S11 of phase A is removed, the current of phase A loses
Fig. 19 is shown to verify the performance of the PR controller its positive half cycle. Currents of phases B and C are distorted.
after the fault. In Fig. 19, the drive signals of the four IGBTs The output of the PR controller starts to increase. The frequency
connected to phase A (S11 , S12 , S21 , and S22 ) are removed. In is also changed. So, the average value starts to increase. When
Fig. 19(a), the PR controller is also disabled at the same time. it is larger than u0th , the controller starts to count the number
So, the output of the PR controller is set to zero. In Fig. 19(a), of current samples, which is zero. In one fundamental period,
it can be seen that the stator currents increase obviously. This the signs of u0av is “++0,” and the sample number of phase
can lead to the action of SC protection circuits. Compared with A is larger than nmax = 20. So, fault case I of phase A can be
the stator current waveforms in Fig. 19(a), the PR controller in detected. Then, the four IGBTs is isolated. The PR controller
Fig. 19(b) continues to work after the drive signals of the four would continue to work in order to limit the peak value of the
IGBTs are removed. The stator currents also increase. However, other two stator currents. Then, PWM gate signals are given to
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JIANG et al.: NOVEL OPEN-CIRCUIT FAULT DETECTION AND LOCATION FOR OPEN-END WINDING PMSM 7783
Fig. 15. Operational flowchart of the proposed OC fault detection and location.
Fig. 19. Stator currents and i0 after phase A is isolated. (b) Without
the PR controller. (b) With the PR controller.
Fig. 18. Stator currents and i0 after the PR is enabled in the normal
condition.
S11 and S22 . Iref is 0.1 A. A positive current can be detected Fig. 21. Fault diagnosis process of S11 under the OC fault.
when the signal is given to S22 . As a result, OC is located to
S11 of phase A. The red dotted lines are the signs of the alarms. to confirm S22 , the alarm is obtained after the current of S22 is
When the signs rise, the corresponding alarms are detected. In detected.
case I, the alarm fault case is obtained at the end of step I. When Fig. 22(a) shows the diagnostic process when S22 of phase A is
S11 is given a PWM signal, the alarm does not rise. In order broken. This process is similar with the process in Fig. 19. When
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7784 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 8, AUGUST 2022
Fig. 22. Fault diagnosis process of different IGBTs. (a) S22 . (b) S11 and S12 . (c) S11 and S21 .
Fig. 23. Fault diagnosis process of S11 under the OC fault with no load Fig. 24. Fault diagnosis process of S11 under the OC fault with
100 r/min. 1.2 Nm and 1400 r/min.
the fault. Compared with Fig. 24, i0 is very large. This is because
the gate signals of S21 of phase A are removed, the current loses the time of zero-voltage vectors is not enough to compensate
its negative half cycle. The sequence of the three signs in one i0 when the modulation index is in very high area. Besides,
fundamental period is “– – 0” and phase A current is zero. So, the proposed method can detect the faulty phase and locate the
fault case II of phase A can be detected. Then, PWM gate signals faulty switches. The threshold values and the number of current
are given to S12 and S21 ; a positive current can be detected when samples should be selected carefully. If the threshold values are
the signals are given to S12 . As a result, OC is located to S21 of selected too high, the average value may not be detected. If they
phase A. are too small, the probability of wrong detection increases. If the
Experimental results of two faulty IGBTs combinations are first step detects the fault wrongly, the second step can further
shown in Fig. 22(b) and (c). Fig. 22(b) shows the waveforms of confirm the fault. Assume that the combination of S11 and S22
S11 and S12 under the OC fault, which two faulty switches are faults is detected in the first step; however, in the second step,
in the same leg. The current is zero in the period. And the u0av is two positive currents are detected when the PWM signals are
changed from negative to positive direction. When |u0av | > u0th , given to S11 and S22 , respectively.
the number of zero current samples will be counted. As to the number of the samples, if it is selected too large,
Fig. 22(c) shows the waveforms of S11 and S21 under the OC the detection time would be affected. The detection time of the
fault, which two faulty switches are top switches in different faulty case is 15 ms, and the location time is 15 ms, both nearly
legs. The phase currents after the fault are very similar to that the current period, which proves that the proposed method is fast
in Fig. 22(b). And the order of locating the faulty switches is and effective.
different. In Fig. 22(b) and (c), two alarms exist in step II. For
example, in Fig. 22(b), the alarm of S11 rises after the current
VI. CONCLUSION
of S22 is detected.
In order to verify the performance of the proposed method In this article, a new method to detect and locate the IGBT OC
in different operating conditions, Figs. 23 and 24 show the fault fault in an open-end winding PMSM fed by a dual inverter was
diagnosis processes under 100 r/min with no load and 1400 r/min presented. The causes of the DMC generated by fundamental
with 1.4 Nm. In Fig. 23, it can be seen that i0 is near zero after stator current and dead time in the faulty condition were
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JIANG et al.: NOVEL OPEN-CIRCUIT FAULT DETECTION AND LOCATION FOR OPEN-END WINDING PMSM 7785
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Nov. 2015.
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7786 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 69, NO. 8, AUGUST 2022
Hongchen Liu (Member, IEEE) received the Fengjiang Wu (Senior Member, IEEE) received
B.S. degree from Northeast Agricultural Univer- the B.S., M.S., and Ph.D. degrees in electrical
sity, Harbin, China, in 2001, and the master’s engineering from the Harbin Institute of Tech-
and Ph.D. degrees from the Harbin Institute of nology (HIT), Harbin, China, in 2002, 2004, and
Technology (HIT), Harbin, in 2003 and 2007, 2007, respectively.
respectively, all in electrical engineering. Since 2007, he has been with the Department
In 2009, he joined the Department of Electri- of Electrical Engineering, HIT, where he is cur-
cal Engineering, HIT, as a Lecturer, where he rently an Associate Professor. He has authored
has been a Professor of Electrical Engineer- or coauthored more than 100 top-tier journal
ing since 2020. From 2008 to 2012, he was a and conference papers. His research interests
Postdoctoral Fellow in measuring and control- include renewable energy generation, energy
ling technology and instrument specialty. He has authored more than 60 storage systems, solid-state transformers, and microgrids.
technical papers published in journals and conference proceedings. His Dr. Wu is an Associate Editor for IEEE ACCESS and IET Power
current major research interests include dc–dc converters and inverters Electronics.
in photovoltaic systems, matrix converters, and nonlinear dynamics in
power electronics.
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