AOZ1015

EZBuck™ 1.5A Non-Synchronous Buck Regulator

General Description Features

The AOZ1015 is a high efficiency, simple to use, 1.5A ● 4.5V to 16V operating input voltage range
buck regulator. The AOZ1015 works from a 4.5V to ● 130mΩ internal PFET switch for high efficiency:
16V input voltage range, and provides up to 1.5A of up to 95%
continuous output current with an output voltage
● Internal Schottky diode
adjustable down to 0.8V.
● Internal soft start
The AOZ1015 comes in an SO-8 package and is rated ● Output voltage adjustable to 0.8V
over a -40°C to +85°C ambient temperature range.
● 1.5A continuous output current
● Fixed 500kHz PWM operation
● Cycle-by-cycle current limit
● Short-circuit protection
● Under voltage lockout
● Output over voltage protection
● Thermal shutdown
● Small size SO-8 package

Applications
● Point of load DC/DC conversion
● PCIe graphics cards
● Set top boxes
● DVD drives and HDD
● LCD panels
● Cable modems
● Telecom/networking/datacom equipment

Typical Application
VIN

C1
22µF Ceramic

VIN L1
4.7µH
From µPC EN VOUT
AOZ1015 LX
COMP R2
C4, C6
R1 FB 22µF x 2
Ceramic
C5 AGND PGND R3
C2
1nF

Figure 1. 3.3V/1.5A Buck Regulator

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 AOZ1015

Ordering Information
Part Number Ambient Temperature Range Package Environmental
AOZ1015AI -40°C to +85°C SO-8 RoHS

All AOS Products are offering in packaging with Pb-free plating and compliant to RoHS
standards. www.aosmd.com/media/AOSGreenPolicy.pdf Please visit for additional information.

Pin Configuration

PGND 1 8 LX

VIN 2 7 LX

AGND 3 6 EN

FB 4 5 COMP

SO-8
(Top View)

Pin Description
Pin Number Pin Name Pin Function
1 PGND Power ground. Electrically needs to be connected to AGND.
2 VIN Supply voltage input. When VIN rises above the UVLO threshold the device starts up.
3 AGND Reference connection for controller section. Also used as thermal connection for controller
section. Electrically needs to be connected to PGND.
4 FB The FB pin is used to determine the output voltage via a resistor divider between the output
and GND.
5 COMP External loop compensation pin.
6 EN The enable pin is active HIGH. Connect EN pin to VIN if not used. Do not leave the EN pin
floating.
7, 8 LX PWM output connection to inductor. Thermal connection for output stage.

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 AOZ1015

Block Diagram
VIN

EN UVLO 5V LDO Internal OTP

& POR Regulator +5V

+
ISen
–
Reference
Softstart
& Bias Q1
ILimit

+
+ PWM Level
0.8V PWM
EAmp – Control Shifter
FB – Comp +
Logic
+ FET LX
Driver

COMP

Frequency 500kHz/38kHz
Foldback Oscillator
Comparator
+
0.2V –
Over Voltage
Protection
0.96V Comparator
+
–

AGND PGND

Absolute Maximum Ratings Recommend Operating Ratings

Exceeding the Absolute Maximum ratings may damage the
The device is not guaranteed to operate beyond the Maximum
device.
Operating Ratings.
Parameter Rating
Parameter Rating
Supply Voltage (VIN) 18V
Supply Voltage (VIN) 4.5V to 16V
LX to AGND -0.7V to VIN+0.3V
Output Voltage Range 0.8V to VIN
EN to AGND -0.3V to VIN+0.3V
Ambient Temperature (TA) -40°C to +85°C
FB to AGND -0.3V to 6V
Package Thermal Resistance SO-8 87°C/W
COMP to AGND -0.3V to 6V (ΘJA)(2)
PGND to AGND -0.3V to +0.3V Note:
Junction Temperature (TJ) +150°C 2. The value of ΘJA is measured with the device mounted on 1-in2 FR-4
board with 2oz. Copper, in a still air environment with TA = 25°C. The
Storage Temperature (TS) -65°C to +150°C value in any given application depends on the user’s specific board
(1) design.
ESD Rating
Human Body Model 2kV
Machine Model 200V
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5kΩ in series with 100pF.
The machine model is a 200pF capacitor discharged directly into
each pin.

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 AOZ1015

Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.(3)

Symbol Parameter Conditions Min. Typ. Max. Units

VIN Supply Voltage 4.5 16 V
VUVLO Input Under-Voltage Lockout Threshold VIN Rising 4.00
V
VIN Falling 3.70
IIN Supply Current (Quiescent) IOUT = 0, VFB = 1.2V, VEN > 1.2V 2 3 mA
IOFF Shutdown Supply Current VEN = 0V 1 10 µA
VFB Feedback Voltage 0.782 0.8 0.818 V
Load Regulation 0.5 %
Line Regulation 0.5 %
IFB Feedback Voltage Input Current 200 nA
ENABLE
VEN EN Input Threshold Off Threshold 0.6
V
On Threshold 2.0
VHYS EN Input Hysteresis 100 mV
IEN EN Input Current 1 µA
MODULATOR
fO Frequency 400 500 600 kHz
DMAX Maximum Duty Cycle 100 %
DMIN Minimum Duty Cycle 6 %
Error Amplifier Voltage Gain 500 V/ V
Error Amplifier Transconductance 200 µA / V
PROTECTION
ILIM Current Limit 2 3.6 A
VPR Output Over-Voltage Protection Off threshold 960
mV
Threshold On threshold 860
TJ Over-Temperature Shutdown Limit 150 °C
tSS Soft Start Interval 2.2 ms
OUTPUT STAGE
High-Side Switch On-Resistance VIN = 12V 97 130
mΩ
VIN = 5V 166 200
Note:
3. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.

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 AOZ1015

Typical Performance Characteristics

Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.

Light Load (DCM) Operation Full Load (CCM) Operation

Vin Vin
ripple ripple
0.1V/div 0.1V/div

Vo Vo
ripple ripple
20mV/div 20mV/div

IL IL
1A/div 1A/div

VLX VLX
10V/div 10V/div

1μs/div 1μs/div

Startup to Full Load Full Load to Turnoff

Vin
10V/div Vin
10V/div

Vo
1V/div

Iin Vo
0.5A/div 1V/div
Iin
0.5A/div

400μs/div 400μs/div

50% to 100% Load Transient Light Load to Turnoff

Vo
Ripple Vin
50mV/div 5V/div

Vo
1V/div

Io
Iin
1A/div
0.5A/div

100μs/div 1s/div

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 AOZ1015

Typical Performance Characteristics (Continued)

Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.

Short Circuit Protection Short Circuit Recovery

Vo
2V/div
Vo
2V/div

IL
1A/div IL
1A/div

100μs/div 1ms/div

AOZ1015AI Efficiency
Efficiency (VIN = 12V) vs. Load Current
100

8.0V OUTPUT
95

5.0V OUTPUT
90
Efficieny (%)

85
3.3V OUTPUT
80

75

70

65
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
Load Current (A)

Thermal de-rating curves for SO-8 package part under typical input and output condition based on the evaluation board.
25°C ambient temperature and natural convection (air speed < 50LFM) unless otherwise specified.
Derating Curves at 5V Input Derating Curves at 12V Input
2.0 2.0
1.8 1.8
1.6 3.3V, 5.0V Output 1.6 3.3V, 5.0V, 8.0 Output
Output Current (IO)

Output Current (IO)

1.4 1.8V Output 1.4

1.2 1.2 1.8V Output
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0 0
25 35 45 55 65 75 85 25 35 45 55 65 75 85

Ambient Temperature (TA) Ambient Temperature (TA)

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 AOZ1015

Detailed Description The AOZ1015 uses a P-Channel MOSFET as the high

side switch. It saves the bootstrap capacitor normally
The AOZ1015 is a current-mode step down regulator
seen in a circuit which is using an NMOS switch. It allows
with integrated high side PMOS switch and a low side
100% turn-on of the upper switch to achieve linear regu-
freewheeling Schottky diode. It operates from a 4.5V to
lation mode of operation. The minimum voltage drop from
16V input voltage range and supplies up to 1.5A of load
VIN to VO is the load current X DC resistance of MOSFET
current. The duty cycle can be adjusted from 6% to 100%
+ DC resistance of the buck inductor. It can be calculated
allowing a wide range of output voltages. Features
by equation below:
include; enable control, Power-On Reset, input under
voltage lockout, fixed internal soft-start and thermal shut V O_MAX = V IN – I O × ( R DS ( ON ) + R inductor )
down.
where;
The AOZ1015 is available in an SO-8 package.
VO_MAX is the maximum output voltage,
Enable and Soft Start VIN is the input voltage from 4.5V to 16V,
The AOZ1015 has an internal soft start feature to limit IO is the output current from 0A to 1.5A,
in-rush current and ensure the output voltage ramps RDS(ON) is the on resistance of the internal MOSFET, the value
up smoothly to regulation voltage. A soft start process is between 97mΩ and 200mΩ depending on input voltage and
begins when the input voltage rises to 4.0V and voltage junction temperature, and
on EN pin is HIGH. In the soft start process, the output Rinductor is the inductor DC resistance.
voltage is typically ramped to regulation voltage in 2.2ms.
The 2.2ms soft start time is set internally. Switching Frequency
The EN pin of the AOZ1015 is active HIGH. Connect the The AOZ1015 switching frequency is fixed and set by an
EN pin to VIN if the enable function is not used. Pulling internal oscillator. The actual switching frequency could
EN to ground will disable the AOZ1015. Do not leave it range from 400kHz to 600kHz due to device variation.
open. The voltage on the EN pin must be above 2.0V to
enable the AOZ1015. When voltage on EN falls below
Output Voltage Programming
0.6V, the AOZ1015 is disabled. If an application circuit
requires the AOZ1015 to be disabled, an open drain or Output voltage can be set by feeding back the output to
open collector circuit should be used to interface to EN the FB pin with a resistor divider network. In the
pin. application circuit shown in Figure 1. The resistor divider
network includes R2 and R3. Usually, a design is started
Steady-State Operation by picking a fixed R3 value and calculating the required
R2 with equation below.
Under steady-state conditions, the converter operates
in fixed frequency and Continuous-Conduction Mode ⎛ R 2⎞
(CCM). V O = 0.8 × ⎜ 1 + -------⎟
⎝ R 3⎠
The AOZ1015 integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying Some standard values of R2, R3 for most commonly used
the voltage drop across the drain to source of the high output voltage values are listed in Table 1.
side power MOSFET. Output voltage is divided down by
Table 1.
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the VO (V) R2 (kΩ) R3 (kΩ)
internal transconductance error amplifier. The error
voltage, which shows on the COMP pin, is compared 0.8 1.0 Open
against the current signal, which is the sum of inductor 1.2 4.99 10
current signal and ramp compensation signal, at PWM 1.5 10 11.5
comparator input. If the current signal is less than the
1.8 12.7 10.2
error voltage, the internal high-side switch is on. The
inductor current flows from the input through the inductor 2.5 21.5 10
to the output. When the current signal exceeds the error 3.3 31.6 10
voltage, the high-side switch is off. The inductor current 5.0 52.3 10
is freewheeling through the internal Schottky diode to
output.

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 AOZ1015

The combination of R2 and R3 should be large enough to Power-On Reset (POR)

avoid drawing excessive current from the output, which A power-on reset circuit monitors the input voltage.
will cause power loss. When the input voltage exceeds 4V, the converter starts
Since the switch duty cycle can be as high as 100%, the operation. When input voltage falls below 3.7V, the
maximum output voltage can be set as high as the input converter will stop switching.
voltage minus the voltage drop on upper PMOS and
inductor. Thermal Protection
An internal temperature sensor monitors the junction
Protection Features temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
The AOZ1015 has multiple protection features to prevent
150°C.
system circuit damage under abnormal conditions.

Over Current Protection (OCP) Application Information

The sensed inductor current signal is also used for The basic AOZ1015 application circuit is shown in
over current protection. Since the AOZ1015 employs Figure 1. Component selection is explained below.
peak current mode control, the COMP pin voltage is
proportional to the peak inductor current. The COMP pin Input Capacitor
voltage is limited to be between 0.4V and 2.5V internally. The input capacitor (C1 in Figure 1) must be connected
The peak inductor current is automatically limited cycle to the VIN pin and PGND pin of the AOZ1015 to maintain
by cycle. steady input voltage and filter out the pulsing input
current. A small decoupling capacitor (Cd in Figure 1),
The cycle by cycle current limit threshold is set between
usually 1µF, should be connected to the VIN pin and
2.5A and 3.6A. When the load current reaches the
AGND pin for stable operation of the AOZ1015. The
current limit threshold, the cycle by cycle current limit
voltage rating of input capacitor must be greater than
circuit turns off the high side switch immediately to
maximum input voltage plus ripple voltage.
terminate the current duty cycle. The inductor current
stop rising. The cycle by cycle current limit protection The input ripple voltage can be approximated by equa-
directly limits inductor peak current. The average induc- tion below:
tor current is also limited due to the limitation on peak
IO ⎛ VO ⎞ VO
inductor current. When cycle by cycle current limit circuit ΔV IN = ----------------- × ⎜ 1 – ---------⎟ × ---------
is triggered, the output voltage drops as the duty cycle f × C IN ⎝ V IN⎠ V IN
decreases.
Since the input current is discontinuous in a buck
The AOZ1015 has internal short circuit protection to converter, the current stress on the input capacitor is
protect itself from catastrophic failure under output short another concern when selecting the capacitor. For a buck
circuit conditions. The FB pin voltage is proportional to circuit, the RMS value of input capacitor current can be
the output voltage. Whenever FB pin voltage is below calculated by:
0.2V, the short circuit protection circuit is triggered.
As a result, the converter is shut down and hiccups at VO ⎛ VO ⎞
a frequency equal to 1/8 of normal switching frequency. I CIN_RMS = I O × --------
- ⎜ 1 – --------
-⎟
V IN ⎝ V IN⎠
The converter will start up via a soft start once the short
circuit condition is resolved. In short circuit protection
mode, the inductor average current is greatly reduced If let m equal the conversion ratio:
because of the low hiccup frequency. VO
--------
- = m
Output Over Voltage Protection (OVP) V IN
The AOZ1015 monitors the feedback voltage. When the
feedback voltage is higher than 960mV, it immediately The relationship between the input capacitor RMS current
turns-off the PMOS to protect the output voltage and voltage conversion ratio is calculated and shown in
overshoot at fault condition. When feedback voltage is Figure 2. It can be seen that when VO is half of VIN, CIN is
lower than 940mV, the PMOS is allowed to turn on in under the worst current stress. The worst current stress
the next cycle. on CIN is 0.5 x IO.

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 AOZ1015

0.5 The inductor takes the highest current in a buck circuit.

The conduction loss on inductor needs to be checked for
thermal and efficiency requirements.
0.4
Surface mount inductors in different shape and styles are
ICIN_RMS(m) 0.3
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. They cost
IO
0.2 more than unshielded inductors. The choice depends on
EMI requirement, price and size.
0.1
Output Capacitor
0 The output capacitor is selected based on the DC output
0 0.5 1 voltage rating, output ripple voltage specification and
m ripple current rating.
Figure 2. ICIN vs. Voltage Conversion Ratio The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
For reliable operation and best performance, the input voltage including ripple. De-rating needs to be consid-
capacitors must have current rating higher than ICIN_RMS ered for long term reliability.
at the worst operating conditions. Ceramic capacitors are
Output ripple voltage specification is another important
preferred for input capacitors because of their low
factor for selecting the output capacitor. In a buck
ESR and high ripple current rating. Depending on the
converter circuit, output ripple voltage is determined by
application circuits, other low ESR tantalum capacitors
inductor value, switching frequency, output capacitor
or aluminum electrolytic capacitors may also be used.
value and ESR. It can be calculated by the equation
When selecting ceramic capacitors, X5R or X7R type
below:
dielectric ceramic capacitors are preferred for their better
1
temperature and voltage characteristics. Note that the
ΔV O = ΔI L × ⎛ ESR CO + -------------------------⎞
ripple current rating from capacitor manufacturers is ⎝ 8×f×C ⎠ O
based on a certain device life time. Further de-rating may
be necessary for practical design requirement. where,
CO is output capacitor value, and
Inductor
ESRCO is the equivalent series resistance of the output
The inductor is used to supply constant current to output capacitor.
when it is driven by a switching voltage. For a given input
and output voltage, inductance and switching frequency When a low ESR ceramic capacitor is used as an output
together decide the inductor ripple current, which is: capacitor, the impedance of the capacitor at the switch-
ing frequency dominates. Output ripple is primarily
VO ⎛ VO ⎞ caused by capacitor value and inductor ripple current.
ΔI L = ----------- × ⎜ 1 – --------
-⎟
f×L ⎝ V IN⎠ The output ripple voltage calculation can be simplified to:
1
The peak inductor current is: ΔV O = ΔI L × -------------------------
8×f×C O
ΔI L
I Lpeak = I O + -------- If the impedance of ESR at switching frequency
2 dominates, the output ripple voltage is primarily decided
by capacitor ESR and inductor ripple current. The output
High inductance gives low inductor ripple current but ripple voltage calculation can be further simplified to:
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also ΔV O = ΔI L × ESR CO
reduces RMS current through the inductor and switches,
which results in less conduction loss. Usually, peak to For lower output ripple voltage across the entire
peak ripple current on inductor is designed to be 20% operating temperature range, X5R or X7R dielectric
to 30% of output current. type of ceramic, or other low ESR tantalum are
When selecting the inductor, make sure it is able to recommended to be used as output capacitors.
handle the peak current without saturation even at the
highest operating temperature.

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 AOZ1015

In a buck converter, output capacitor current is continuous. where;

The RMS current of the output capacitor is decided by GEA is the error amplifier transconductance, which is 200 x 10-6
the peak to peak inductor ripple current. It can be A/V,
calculated by: GVEA is the error amplifier voltage gain, which is 500 V/V, and
ΔI L CC is compensation capacitor.
I CO_RMS = ----------
12 The zero given by the external compensation network,
Usually, the ripple current rating of the output capacitor capacitor CC (C5 in Figure 1) and resistor RC (R1 in
is a smaller issue because of the low current stress. Figure 1), is located at:
When the buck inductor is selected to be very small and 1
inductor ripple current is high, the output capacitor could f Z2 = -----------------------------------
be overstressed. 2π × C C × R C

Loop Compensation To design the compensation circuit, a target crossover

frequency fC for close loop must be selected. The
The AOZ1015 employs peak current mode control for system crossover frequency is where the control loop
easy use and fast transient response. Peak current mode has unity gain. The crossover frequency is also called the
control eliminates the double pole effect of the output converter bandwidth. Generally, a higher bandwidth
L&C filter. It greatly simplifies the compensation loop means faster response to load transient. However,
design. the bandwidth should not be too high due to system
With peak current mode control, the buck power stage stability concern. When designing the compensation
can be simplified to be a one-pole and one-zero system loop, converter stability under all line and load conditions
in frequency domain. The pole is the dominant pole and must be considered.
can be calculated by: Usually, it is recommended to set the bandwidth to be
1 less than 1/10 of the switching frequency. The AOZ1015
f P1 = ----------------------------------- operates at a fixed switching frequency range from
2π × C O × R L
350kHz to 600kHz. It is recommended to choose a
The zero is a ESR zero due to output capacitor and its crossover frequency less than 30kHz.
ESR. It is can be calculated by:
f C = 30kHz
1
f Z1 = ------------------------------------------------ The strategy for choosing RC and CC is to set the cross
2π × C O × ESR CO
over frequency with RC and set the compensator zero
where; with CC. Using selected crossover frequency, fC, to
CO is the output filter capacitor, calculate RC :
RL is load resistor value, and VO 2π × C O
ESRCO is the equivalent series resistance of output capacitor.
R C = f C × ---------- × -----------------------------
-
V G ×G
FB EA CS
The compensation design is actually to shape the
converter close loop transfer function to get the desired where;
gain and phase. Several different types of compensation fC is the desired crossover frequency,
networks can be used for the AOZ1015. In most cases, a
VFB is 0.8V,
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable GEA is the error amplifier transconductance, which is 200 x 10-6
high-bandwidth control loop. A/V, and
GCS is the current sense circuit transconductance, which is
The FB pin and the COMP pin are the inverting input
5.64 A/V.
and the output of the internal transconductance error
amplifier. A series R and C compensation network The compensation capacitor CC and resistor RC together
connected to COMP provides one pole and one zero. make a zero. This zero is put somewhere close to the
The pole is: dominate pole fp1 but lower than 1/5 of selected
G EA crossover frequency. CC can is selected by:
f P2 = -------------------------------------------
2π × C C × G VEA 1.5
C C = -----------------------------------
2π × R C × f P1

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 AOZ1015

The previous equation above can also be simplified to: The maximum junction temperature of the AOZ1015 is
150°C, which limits the maximum load current capability.
CO × RL
C C = --------------------- Please see the thermal de-rating curves for the maximum
RC load current of the AOZ1015 under different ambient
temperatures.
An easy-to-use application software which helps to The thermal performance of the AOZ1015 is strongly
design and simulate the compensation loop can be found affected by the PCB layout. Extra care should be taken
at www.aosmd.com. by users during the design process to ensure that the IC
will operate under the recommended environmental
Thermal Management and Layout conditions.
Consideration Several layout tips are listed below for the best electronic
In the AOZ1015 buck regulator circuit, high pulsing and thermal performance. Figure 3 illustrates a single
current flows through two circuit loops. The first loop layer PCB layout example as reference.
starts from the input capacitors, to the VIN pin, to the
1. Do not use thermal relief connection to the VIN and
LX pins, to the filter inductor, to the output capacitor
the PGND pins. Pour a maximized copper area to the
and load, and then returns to the input capacitor through
PGND pin and the VIN pin to help thermal dissipation.
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the 2. The input capacitors should be connected as close
output capacitors and load, to the PGND pin of the as possible to the VIN and PGND pins.
AOZ1015, to the LX pins of the AOZ1015. Current flows 3. A ground plane is preferred. If a ground plane is not
in the second loop when the low side diode is on. used, separate PGND from AGND and connect
In PCB layout, minimizing the two loops area reduces the them only at one point to avoid the PGND pin noise
noise of this circuit and improves efficiency. A ground coupling to the AGND pin. In this case, a decoupling
plane is recommended to connect input capacitor, output capacitor should be connected between VIN and
capacitor, and PGND pin of the AOZ1015. AGND.
In the AOZ1015 buck regulator circuit, the two major 4. Make the current trace from LX pins to L to CO to the
power dissipating components are the AOZ1015 and PGND as short as possible.
the output inductor. The total power dissipation of 5. Pour copper plane on all unused board area and
converter circuit can be measured by input power minus connect it to stable DC nodes, like VIN, GND or
output power. VOUT .
P total_loss = V IN × I IN – V O × I O 6. The two LX pins are connected to the internal PFET
drain. They are low resistance thermal conduction
The power dissipation of the inductor can be approxi- path and a noisy switching node. Connecting a
mately calculated by output current and DCR of inductor. copper plane to the LX pin to help thermal dissipa-
tion. This copper plane should not be too large
P inductor_loss = IO2 × R inductor × 1.1
otherwise switching noise may be coupled to other
parts of the circuit.
The actual AOZ1015 junction temperature can be
calculated with power dissipation in the AOZ1015 and 7. Keep sensitive signal traces such as trace
thermal impedance from junction to ambient. connecting FB and COMP away from the LX pins.

T junction = ( P total_loss – P inductor_loss ) × Θ

+ + T ambient

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 AOZ1015

PGND LX Cout
1 8
Cin
VIN 2 SO-8 7 LX
Cd L
AGND 3 6 EN
R3
FB
4 5 COMP
R2

C5 R1

Figure 3. AOZ1015 PCB Layout

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 AOZ1015

Package Dimensions, SO-8L

D Gauge Plane Seating Plane

e 0.25
8
L

E E1

h x 45°
1 C
θ

7° (4x)

A2 A
0.1

b A1

Dimensions in millimeters Dimensions in inches

Symbols Min. Nom. Max. Symbols Min. Nom. Max.
2.20
A 1.35 1.65 1.75 A 0.053 0.065 0.069
A1 0.10 — 0.25 A1 0.004 — 0.010
A2 1.25 1.50 1.65 A2 0.049 0.059 0.065
b 0.31 — 0.51 b 0.012 — 0.020
5.74 c 0.17 — 0.25 c 0.007 — 0.010
D 4.80 4.90 5.00 D 0.189 0.193 0.197
E1 3.80 3.90 4.00 E1 0.150 0.154 0.157
1.27 e 1.27 BSC e 0.050 BSC
E 5.80 6.00 6.20 E 0.228 0.236 0.244
h 0.25 — 0.50 h 0.010 — 0.020
L 0.40 — 1.27 L 0.016 — 0.050
0.80
Unit: mm θ 0° — 8° θ 0° — 8°

Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.

Rev. 1.4 April 2011 www.aosmd.com Page 13 of 15

 AOZ1015

Tape and Reel Dimensions

SO-8 Carrier Tape P1 See Note 3

D1
P2
T
See Note 5
E1

E2 E

See Note 3
B0
K0 D0
A0 P0 Feeding Direction
Unit: mm
Package A0 B0 K0 D0 D1 E E1 E2 P0 P1 P2 T
SO-8 6.40 5.20 2.10 1.60 1.50 12.00 1.75 5.50 8.00 4.00 2.00 0.25
(12mm) ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10 ±0.10

SO-8 Reel
W1

S
G

N
M K
V

R
H

Tape Size Reel Size M N W W1 H K S G R V

12mm ø330 ø330.00 ø97.00 13.00 17.40 ø13.00 10.60 2.00 — — —
±0.50 ±0.10 ±0.30 ±1.00 +0.50/-0.20 ±0.50

SO-8 Tape
Leader/Trailer
& Orientation

Trailer Tape Components Tape Leader Tape

300mm min. or Orientation in Pocket 500mm min. or
75 empty pockets 125 empty pockets

Rev. 1.4 April 2011 www.aosmd.com Page 14 of 15

 AOZ1015

AOZ1015 Part Marking

Z1015AI
Part Number Code
FAYWLT

Fab & Assembly Location Assembly Lot Code

Year & Week Code

LEGAL DISCLAIMER

Applications or uses as critical components in life support devices or systems are not authorized. AOS does not
assume any liability arising out of such applications or uses of its products. AOS reserves the right to make
changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability of the
product for their intended application. Customer shall comply with applicable legal requirements, including all
applicable export control rules, regulations and limitations.

AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at:
http://www.aosmd.com/terms_and_conditions_of_sale

LIFE SUPPORT POLICY

ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.

As used herein:

1. Life support devices or systems are devices or 2. A critical component in any component of a life
systems which, (a) are intended for surgical implant into support, device, or system whose failure to perform can
the body or (b) support or sustain life, and (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in a significant injury of
the user.

Rev. 1.4 April 2011 www.aosmd.com Page 15 of 15