Introduction to CMOS RF Integrated Circuits Design

IV. Mixers

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-1
Outline

•Functionality
•Figures of Merit
•Passive Mixer Design
•Active Mixer Design
•Single-Balanced Mixer
•Double-Balanced Mixer (Gilbert Cell)
•Design Example

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-2
Mixer Functionality

•To perform frequency translation (Up-conversion and Down-

Conversion)
•Linearity must be good to avoid SNR degradation due to
interference
•Positive gain is preferred

fRF fIF fIF fRF

fLO fLO
vIF (t )  KvRF (t )vLO (t )
Introduction to CMOS RF Integrated Circuits Design
Fall 2012, Prof. JianJun Zhou IV-3
Frequency Translation

v (t )  Kv (t )v (t )
OUT RF LO

vRF (t )  A(t ) cos( t  t )

0
vLO (t )  A cos( t )
LO LO
KA(t ) A
v (t )  LO {cos((   )t   (t ))  cos((   )t   (t ))}
OUT
2 LO 0 0 LO

•Low-pass filter for down-conversion

•High-pass filter for up-conversion

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-4
Image Rejection

LO
    
LO 0 LO Image

IF
We need Image Rejection Filter!

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-5
Mixer Figures of Merit

•Frequency and Bandwidth

•Linearity (P-1dB, IIP3)
•Noise Figure
•Conversion Gain
•Power Consumption
•Supply Voltage
•Isolation (RF-LO, LO-RF, LO-IF)

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-6
Typical Values

IIP3 ~ 10 dBm
P-1dB ~ 0 dBm
Gain 10 dB
NF ~ 12 dB
Port Isolation < -20 dB
Current ~ 3 mA

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-7
Mixer Noise Figure

LO LO

IF IF
Single-Sideband (SSB) NF Double-Sideband (DSB) NF

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-8
SSB vs DSB NF

•SSB NF Applied if Desired Signal Exists at Only One

Frequency
•DSB NF Applied if Desired Signals Exist at Both Image
and Desired Frequencies
•SSB NF = DSB NF + 3 dB
•Typically, Desired Signal Only Exists at One Frequency
=> SSB NF
•For Direct Conversion, No Image Noise => DSB NF

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-9
Input/Output Matching

•Input matching is needed if an off-chip image-

rejection filter is used in front to:
•Maximizes Power Transferred
•Preserves Characteristics of the Filter
•Output matching is needed if an off-chip channel-
selection filter is used

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-10
Conversion Gain

The conversion gain may be measured as voltage or

power gain.
Voltage Conversion Gain=rms voltage of the IF
signal/rms voltage of the RF signal
Power Conversion Gain=IF Power delivered to the
load/rms available RF power from the source

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-11
Port-to-Port Isolation

Signals may leak through different paths from one port to the
other.
•LO-to-RF leakage
causes self-mixing (problem for zero-IF)
•RF-to-LO feedthrough
allows interferers and spurs present in the RF signal to interact with the LO.
• LO-to-IF feedthrough
may cause desensitization of consequent blocks
• RF-to-IF feedthrough
causes problems in some architectures such as zero-IF because of the leakage of
low-frequency even-order intermod. products (even-order distortion).

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-12
Multiplication: Non-Linearity

The multiplication can be implemented with a

multiplier or nonlinear circuit

Vout a a V a V 2 a V 3a V 4 ....

0 1 in 2 in 3 in 4 in
vin (t ) V cos( t ) V cos( t )
RF RF LO LO
vout (t )  a1[V cos( t ) V cos( t )]
RF RF LO LO
 a 2[V 2 cos2 ( t ) V 2 cos2 ( t )]
RF RF LO LO
2* a2[V cos( t )V cos( t )]  ...
RF RF LO LO

a2V V [cos(   )t  cos(   )t ]

RF LO RF LO RF LO

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-13
Implementation of a Simple Mixer

For VLO >>Vdsat,

VIF
W
G  nCOX VLO
vRF L

vLO

vBias *No RF-LO port isolation

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-14
Implementation of Dual-Gate Mixer

VIF
D2
vLO
M2 G2
S 2 D1
G1
M1
vRF S1
vBias

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-15
Dual-Gate Mixer

The LO signal is large enough to push M1 into triode during part of the
operating cycle.
The gm of M1 is therefore modulated periodically

nCOX W
nCOXW g m Triode  VDS
gm sat  (VGS VT ) L
L
Introduction to CMOS RF Integrated Circuits Design
Fall 2012, Prof. JianJun Zhou IV-16
Implementation of Dual-Gate Mixer

VGS2 is roughly constant since M1 acts like a current source.

VD1  vLO  VGS 2  VB 2  V0 cos 0t  VGS 2
nCOXW
g(t) V V V  (VGS1 VT )
D1 GS T
L
nCOX W
g (t ) V  (VB 2  VGS 2  V 0 cos 0t )
D 1 VGS VT
L

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-17
Passive vs Active Mixers

LO LO

IF IF
VRF
RF
RL RL

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-18
Passive Mixers

•MOS Devices Operate in Triode Region

•High Linearity
•High Frequency
•No Gain or even Loss
•In Practice, Buffer Needed to Isolate or to Convert
Output Current to Voltage

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-19
Voltage Switching Mixers

•Switching of voltage
•Requires good switches
that turn on hard (low
resistance) and turn off
well (good insolation)

During the +LO cycle, feeds the RF to the output directly. In the -LO cycle, feeds an
inverted RF signal to the output. We see that the RF signal is effectively multiplied by
±1 with a rate determined by the LO signal. A differential RF signal is created using a
balun or fed directly from a balanced LNA.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-20
Voltage Switching Mixers

When the device is “on”, it’s in the triode region. Due to the low on-resistance,
the coupling through the substrate and LO path is minimal.
When the device is “off”, the RF and LO leak into the IF through the overlap
and substrate capacitances.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-21
Voltage Switching Mixers

•MOS passive mixer is very linear. The device is either “on” or “off” and
does not impact the linearity too much. Since there is no
transconductance stage, the linearity is very good.
•The downside is that the MOS mixer is passive, or lossy.
•There is no power gain in the device.
•Need large LO drive to turn devices on/off Need to create a differential
RF and LO signal. This can be done using baluns or by using a
differential LNA and LO buffer.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-22
Passive Mixer LO Power

RF IF

LO

•Large capacitive load  P=CV2LOfLO large power

•Large inverters or tuned buffer

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-23
Passive Current Mixer

•The input stage is a Gm stage similar to a Gilbert cell mixer. The Gilbert Quad,
though, has no DC current and switches on/off similar to a passive mixer.
•The output signal drives the virtual ground of a differential op-amp. The
current signal is converted into a voltage output by the op-amp.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-24
Passive Current Mixer

•No DC current in quad implies that there is no flicker noise generated

by the switching quad. This is the key advantage.
•The linearity is very good since the output signal is a current. The
voltage swing does not limit the linearity of the mixer. This is to be
contrasted to a Gilbert cell mixer where the voltage swing is limited due
to the headroom of the switching mixer and the transconductance stage.
•The op-amp output stage can be converted into an IF filter (discussed
later)

•Need large LO drive compared to the active Gilbert cell mixer.

•Need an op-amp. This requires extra power consumption and
introduces additional noise.
•Need a common mode feedback circuit at the input of the op-amp.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-25
Passive Current Mixer

Note that the Gilbert quad is really a folded ring. Thus the passive and
active mixers are very similar. The main difference is how the quad
devices are biased. In the Gilbert cell they are biased nominally in
saturation and have DC current. In the passive mixers, they are biased
near the threshold.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-26
Passive Current Mixer

The op-amp input referred noise is amplified to IF. The resistance seen
at the op-amp input terminals is actually a switched capacitor resistor!
The parasitic capacitance at the output of the transconductance stage is
charged and discharged at the rate of the LO.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-27
Passive Current Mixer

Note that the parasitic capacitances are charged at the rate of the LO
to the input voltage Vx, and then to the -Vx, every cycle.
The total charge transferred during a period is given by
Qtot = CpVx-(-CpVx)= 2CpVx
The net current is given by
Ix = Qtot/TLO= 2CpVxfLO

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-28
Passive Current Mixer

Since there are two differential pairs connected to the op-amp

terminals in parallel, the total charge is twice. So the effective
resistance seen at this node is given by:
Rp =Vx/2Ix
The effective resistance is therefore given by：
Rp =1/4fLOCp
This is a switched capacitor “resistors”.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-29
Passive Current Mixer

The noise is thus transferred to the output with transfer function given
by：
Rf
vo  (1 
2
) 2 v amp 2
Rp
To minimize this noise, we have to minimize the parasitic capacitance
Cp and the op-amp noise.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-30
Passive Current Mixer

Since a down-conversion mixer will naturally drive a filter, we see that

the output current can be used directly to drive a current mode filter.
For instance, the op-amp can be absorbed into the first stage of a multi-
stage op-amp RC IF filter. The feedback resistor Rf is shunted with a
capacitor Cf to produce a pole.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-31
Implementation of Active Mixer

V LO (t )
V LO (t )
+1
V RF (t )
0
V IF (t )

V RF (t )  V LO (t )
 ARF cos  ω RF t   sq  ω LO t 

1 2 1
 ARF cos  ω RF t   [ 
2 

n 1,3,5... n
cos( n ω LO t )]

1 1  1 
 ARF cos  ω RF t   ARF  cos(ω RF  ω LO ) t  cos  ω RF  3ω LO ) t    
2 π  3 
Introduction to CMOS RF Integrated Circuits Design
Fall 2012, Prof. JianJun Zhou IV-32
Multiplier-Based Mixers

IRF=IBias+gmVrf RIF
VIF  I RF  VLO
VIF
VRF IRF +1
0
LO
IRF VIF VIF

Phase 1 Phase 2

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-33
Multiplier-Based Mixers

VRF  ARF cosω RF t 

I bias 4 4 4 g
I IF  [1  cos LO t  cos 3LO t  cos 5LO t  ....]  m ARF cos RF t
2  3 5 2

1 1
 gm ARF[ cos(LO RF)t  cos(LO  RF)t]
 
1 1
 g m ARF [ cos(3LO  RF )t  cos(3LO  RF )t ]
3 3
1 1
 g m ARF [ cos(5LO  RF )t  cos(5LO  RF )t ]
5 5
DC ωRF nωLO nωLO+- ωRF n=1,3,5
n=1,3,5

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-34
Multiplier-Based Mixers

•LO-IF feedthrough
A spectra component at wLO appears at the IF-port. If the LO
frequency is not far enough from the desired RF, it may be difficult
to attenuate the LO component enough via filtering.
• RF-IF feedthrough (or direct feedthrough).
An RF spectra components shows at the IF-port. Direct
feedthrough worsens the NF of the mixer because it allows the
noise at the RF-port at the desired IF frequency to leak to the IF-
port.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-35
Single-Balanced Mixers

RIF RIF
VIF
VIF
VRF IRF +1 IRF
IRF
IRF=IBias+gmVrf -1
LO
Switching between IRF and -IRF

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-36
Single-Balanced Mixers

VRF  ARF cosω RF t 

4 4 4
I IF  I bias [ cos LO t  cos 3LO t  cos 5LO t  ....]
 3 5
2 2
 gm ARF[ cos(LO RF)t  cos(LO  RF)t]
 
2 2
 g m ARF [ cos(3LO  RF )t  cos(3LO  RF )t ]
3 3
2 2
 g m ARF [ cos(5LO  RF )t  cos(5LO  RF )t ]
5 5
nωLO nωLO+- ωRF n=1,3,5
n=1,3,5

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-37
Double-Balanced Mixers

IF- IF+

LO+ LO+
LO-

RF RF

VB

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-38
Double-Balanced Mixers

VRF  ARF cosω RF t 

2 2
I IF  g m ARF [ cos(LO  RF )t  cos(LO  RF )t ]
 
2 2
 g m ARF [ cos(3LO  RF )t  cos(3LO  RF )t ]
3 3
2 2
 g m ARF [ cos(5LO  RF )t  cos(5LO  RF )t ]
5 5

nωLO+- ωRF n=1,3,5

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-39
Linearization

VRF
Vbias
VRF R

Common-Gate Input Common-Source Input

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-40
Linearization

Common-Gate Linearization:
•The transconductance of the common-gate at the RF
port is:
Gm=IM RF/VRF=gm/(1+gmR)1/R
can be made is R is large enough
The disadvantage is the additional noise due to R.
•The conversion transconductance is
Gc=2Gm/π

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-41
Noise in Mixers

IF- IF+

LO+ LO+
LO-
RF Vni
RF
Noise

•Noise Contributors: VB
•Loads
•Transconductance FETs
•Switches

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-42
Noise in Mixers

•Loads
1/f noise
•Transconductance FETs
1/f noise and white noise

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-43
Noise in Mixers

1/f

-fLO -fc fc fLO f

3fLO

1/f

-fLO -fc fc fLO f

3fLO

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-44
Noise in Mixers

•Switch Noise
Assume that all input phase noise is reflected to one side of the differential pair
and is given by:
vid = vn(t)+2AsinωLOt
Each time the Vid crosses zero the iod switches from –I to I or vice-versa.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-45
Noise in Mixers

Random current pulses due to vn(t). The width of each

pulse is:
Δt= vn(t)/s
S is the slope of LO
And its height=2 I
Frequency=2fLO

The average current noise pulses is:

2 I 0t 2 IVn (t ) IVn (t )
i0,nav    s  2fA  2
T /2 sT / 2 A

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-46
Noise in Mixers

SNR due to the switch noise:

SNR=i0/ino
2 g mVin
signal  Gm  Vin 

2 g mVin 1 2 A Vin
SNR   g m  VGS  VT
 1 IVn VGS  VT Vn
 A
The SNRs can be improved by:
•In crease LO swing
•Trade off with frequency
•(reduce over-ride voltage)
•(Reduce Nn by increase WL of the switch)

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-47
Simulation of Mixers in Spectre-RF

•Periodic Transfer Function (PXF)

conversion gain
•Periodic Steady State (PSS)
1dB compression point and conversion gain
•Periodic Distortion (Pdisto) analysis
IIP3
•Periodic Noise (Pnoise)
noise figure.

Introduction to CMOS RF Integrated Circuits Design

Fall 2012, Prof. JianJun Zhou IV-48
Introduction to CMOS RF Integrated Circuits Design
Fall 2012, Prof. JianJun Zhou IV-49