Analog Integrated Circuit Design

Anurag Nigam
What do you mean by Analog Circuits?
Analog Circuits process analog signal. Analog signals are continuous in time and amplitude.

Analog Circuits are either voltage mode or current mode circuits. Voltage mode circuits have
only voltage swings at various circuits nodes while the current is near to zero i.e. all the nodes
are high impedance nodes and power dissipation is nearly zero. Current mode circuits have
only current swings in various circuit branches while node voltages are near to zero i.e. all the
nodes are low impedance and power dissipation is nearly zero.

RF circuits are power mode circuits i.e. nodes have finite impedance and dissipate power.

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CMOS Circuits
CMOS or Complementary MOS circuits use n-channel MOS (NMOS) and p-channel MOS
(PMOS) devices to implement the circuits.

Gain circuits use one of the transistor as gain stage while the complementary transistor acts as
an active load.

The circuits can be single ended i.e. all the voltages are with respect to circuit ground or can be
differential i.e. the signals are 180 degrees out of phase on differential parts so that the ground
is a virtual ground.

Single ended circuits suffer from noise pickups and small tolerance for bias point. Differential
circuits are immune to noise pickups and have large common mode voltage range.

For demonstration of various circuit design concepts and operation principles, I will use
Keysight’s Advanced Design System and 130 nm CMOS technology from Silterra.

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NMOS Device- Transfer Characteristics

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Transfer Characteristics
Threshold Voltage

𝑄𝑏0 𝑄𝑆𝑆 2𝑞𝜖𝑁𝐴

𝑉𝑡𝑛 = 𝜙𝑆𝑀 + 2𝜙0 + − + 2𝜙0 + 𝑉𝑆𝐵 − 2𝜙0
𝐶𝑜𝑥 𝐶𝑜𝑥 𝐶𝑜𝑥

𝑉𝑡0
𝐾𝑏 𝑇 𝑁𝐴 Subthreshold Leakage 𝑓𝑜𝑟 𝑉𝑔𝑠 < 𝑉𝑡𝑛
𝜙0 = 𝑙𝑛
𝑞 𝑛𝑖 𝑞𝑉𝑔𝑠 −𝑞𝑉𝑑𝑠
𝑞𝐸𝑔 𝐷𝑛 𝐷𝑝
−2𝐾 𝑇 𝐼𝑠 ≅ 𝑞𝑊𝐿 + 𝑒 𝐾𝑏 𝑇 1− 𝑒 𝐾𝑏 𝑇
𝑛𝑖 = 𝑁𝐶 𝑁𝑉 𝑒 𝑏 𝑁𝐴 𝐿𝑛 𝑁𝐷 𝐿𝑝
𝜖
𝐶𝑜𝑥 =
𝑡𝑜𝑥
Short Channel Effects

DIBL Drain Induced Barrier Lowering

Gate Induced Drain Leakage
Mobility Degradation- carrier-carrier interaction
GIDL
𝜇𝑛
𝜇𝑛_𝑒𝑓𝑓 =
1 + 𝑉𝑔𝑠 + 𝑉𝑡𝑛 Τ 𝐸𝐶 𝑡𝑜𝑥

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NMOS Device- Output Characteristics

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Output Characteristics
Triode Region 𝑓𝑜𝑟 𝑉𝑑𝑠 < 𝑉𝑂𝑉
𝜇𝑛 𝐶𝑜𝑥 𝑊 2
𝐼𝑑𝑠 = 2𝑉𝑂𝑉 𝑉𝑑𝑠 − 𝑉𝑑𝑠
2 𝐿
𝑉𝑂𝑉 = 𝑉𝑔𝑠 − 𝑉𝑡𝑛 Short Channel Effects

Pinch Off 𝑓𝑜𝑟 𝑉𝑑𝑠 = 𝑉𝑂𝑉 Velocity Saturation

𝐼𝐷𝑆
𝜇𝑛 𝐶𝑜𝑥 𝑊 2 𝐼𝑠𝑠 =
𝐼𝐷𝑆 = 𝑉 1 + 𝑉𝑑𝑠 Τ 𝐸𝐶 𝐿
2 𝐿 𝑂𝑉
2𝑣𝑠𝑎𝑡
Pinch Off 𝑓𝑜𝑟 𝑉𝑑𝑠 > 𝑉𝑂𝑉 𝐸𝐶 =
𝜇𝑒𝑓𝑓

𝐼𝑑𝑠 = 𝐼𝐷𝑆 1 + 𝜆 𝑉𝑑𝑠 − 𝑉𝑂𝑉 Channel Length Modulation

𝐾𝑑𝑠 2 1
𝜆= 𝑟𝑑𝑠 =
2𝐿 𝑉𝑑𝑠 − 𝑉𝑂𝑉 + 𝜙0 𝜆𝐼𝑑𝑠 1 + 𝜙0
𝑉𝑑𝑠 − 𝑉𝑂𝑉 + 𝜙0
2𝜖
𝐾𝑑𝑠 =
𝑞𝑁𝐴

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Small Signal Model of NMOS
𝐶𝑔𝑑 𝑊 2𝐼𝐷𝑆
𝐺 𝐷 𝑔𝑚 = 𝜇𝑛 𝐶𝑜𝑥 𝑉𝑂𝑉 =
𝐿 𝑉𝑂𝑉
𝐶𝑔𝑠 𝑣𝑖 𝑟𝑑𝑠
𝑆
𝑔𝑚 𝑔𝑚𝑏 2𝑞𝜖𝑁𝐴 1
𝐶𝑑𝑏 𝑔𝑚𝑏 = −𝑔𝑚
𝐶𝑜𝑥 2 𝑉𝑆𝐵 + 2𝜙0
𝐶𝑠𝑏

𝐵 𝐶𝑔𝑑 = 𝑊𝐿𝑂𝑉 𝐶𝑜𝑥

2
𝐶𝑔𝑠 = 𝑊𝐿𝑂𝑉 𝐶𝑜𝑥 + 𝑊𝐿𝐶𝑜𝑥
3
𝐶𝑠𝑗0 𝐶𝑆𝑊𝑠0
𝐶𝑠𝑏 = 𝑉
𝐴𝑆𝑗 + 𝑊𝐿 + 𝑉
𝑃𝑆𝐵
1+ 𝜙𝑆𝐵 1+ 𝜙𝑆𝐵
0 0

𝐶𝑑𝑗0 𝐶𝑆𝑊𝑑0
𝐶𝑑𝑏 = 𝑉
𝐴𝐷𝑗 + 𝑉
𝑃𝐷𝐵
1+ 𝜙𝑑𝑠 1+ 𝜙𝑑𝑠
0 0

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Simple PMOS Current Mirror
0𝑉 𝑖𝑜
𝐺 𝐷
1
𝑔𝑚 𝑟𝑑𝑠 𝑣𝑜
𝑔𝑚
𝑆

𝑣𝑜 𝑔𝑑𝑠 − 𝑖𝑜 = 0
𝑣𝑜
𝑟𝑜 = = 𝑟𝑑𝑠
𝑖𝑜

𝑖𝑜
𝐺 𝐷
𝑟𝑑𝑠 𝑣𝑜
𝑔𝑚
𝑆

𝑣𝑜 𝑔𝑑𝑠 + 𝑔𝑚 − 𝑖𝑜 = 0
𝑣𝑜 1 1
𝑟𝑜 = = ≅
𝑖𝑜 𝑔𝑑𝑠 + 𝑔𝑚 𝑔𝑚
𝑔𝑑𝑠 ≫ 𝑔𝑚

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Current Mirror with Source Degeneration

0𝑉 𝑖𝑜
𝐺 𝐷

𝑟𝑑𝑠 𝑣𝑜
𝑣𝑠 𝑔𝑚 + 𝑔𝑚𝑏
𝑆

𝑅𝑠

𝑣𝑜 𝑔𝑑𝑠 − 𝑖𝑜 𝑅𝑠 𝑔𝑚 + 𝑔𝑚𝑏 + 𝑔𝑑𝑠 − 𝑖𝑜 = 0

𝑣𝑜
𝑟𝑜 = = 𝑟𝑑𝑠 1 + 𝑅𝑠 𝑔𝑚 + 𝑔𝑚𝑏 + 𝑔𝑑𝑠 ≅ 𝑔𝑚 𝑟𝑑𝑠 𝑅𝑠
𝑖𝑜
𝑔𝑚 ≫ 𝑔𝑚𝑏 + 𝑔𝑑𝑠

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Telescopic Cascode Current Mirror

𝑣𝑜 2
𝑟𝑜 = = 𝑟𝑑𝑠 1 + 𝑟𝑑𝑠 𝑔𝑚 + 𝑔𝑚𝑏 + 𝑔𝑑𝑠 ≅ 𝑔𝑚 𝑟𝑑𝑠
𝑖𝑜
𝑔𝑚 ≫ 𝑔𝑚𝑏 + 𝑔𝑑𝑠

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Wide Swing Cascode Current Mirror

2
𝑣𝑜 𝑔𝑚 𝑟𝑑𝑠
𝑟𝑜 = ≅
𝑖𝑜 2

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Common Source Amplifier
𝑎𝑖 ≅ ∞
𝑟𝑖 ≅ ∞

𝑇3 𝑇2

𝑇1

𝐺 𝐷
𝑣𝑖
𝑔𝑚1 𝑟𝑑𝑠1 𝑟𝑑𝑠2 𝑅𝐿 𝑣𝑜 𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 − 𝑖𝑜 = 0
𝑆
𝑣𝑜 1
𝑟𝑜 = =
𝑖𝑜 𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2

𝑣𝑜 𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 + 𝑔𝑚1 𝑣𝑖 = 0 𝑖𝑜

𝐺 𝐷
𝑣𝑜 𝑔𝑚1 𝑣𝑜
𝑎𝑣 = =−
𝑣𝑖 𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 𝑆 𝑔𝑚1 𝑟𝑑𝑠1 𝑟𝑑𝑠2 𝑅𝐿

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AC Response of Common Source Amplifier
Dominant Pole is due to Miller Capacitance
referred to input node

* Ignore the gain indicated in deg. This bug

has been reported to Keysight for past 7
𝑇3 years but no response
𝑇2

Dominant Pole is due to Miller Capacitance

referred to input node

𝑇1

Phase Margin is hardly 45˚ not suitable for feedback

Lead Compensation
RC compensation introduces zero between
dominant and second pole Dominant Pole

Split Pole Compensation Second Pole

Increasing transconductance of T1 moves
dominant pole to lower frequency and second pole
to higher frequency.

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Lead Compensation

Frequency
Uncompensated
Compensated
Issues with CS Amp
• Miller Capacitance lowers bandwidth
• Potentially unstable
• High input resistance
• Small Input Voltage Range
• Prone to Noise Pickup

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Common Gate Amplifier
Input Voltage Range for CS Amplifier is 0.063V and bias point is 0.438V. Thus we provide a Gate voltage
greater than 0.501V to transform the CS Amplifier circuit into Common Gate Amplifier with same Gain.
𝑣𝑜
𝐺 𝐷
𝑔𝑚𝑏1

𝑣𝑠 𝑔𝑚1 𝑟𝑑𝑠1 𝑅𝐿 𝑟𝑑𝑠2

𝑆

𝑅𝑠
𝑣𝑖𝑛
𝑣𝑜 𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 − 𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 𝑣𝑠 = 0
𝑣𝑜 𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 𝑣𝑠 𝐺𝑠
= =
𝑣𝑠 𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 𝑣𝑖𝑛 𝐺𝑠 + 𝑌𝑖𝑛

𝑣𝑜 𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 𝐺𝑠 𝑔𝑚1

𝑎𝑣 = = ≅
𝑣𝑖𝑛 𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 𝐺𝑠 + 𝑌𝑖𝑛 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2

𝑅𝑠 = 0 & 𝐺𝐿 = 0 & 𝑔𝑚1 ≫ 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1

𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 𝑣𝑠 − 𝑣𝑜 𝑔𝑑𝑠1 − 𝑖𝑖𝑛 = 0
𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1
𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 𝑣𝑠 − 𝑣𝑠 𝑔𝑑𝑠1 = 𝑖𝑖𝑛
𝐺𝐿 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2
𝑖𝑖𝑛 𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 1 2
𝑌𝑖𝑛 = = 𝑟𝑖𝑛 = 𝑅𝑠 + ≅
𝑣𝑠 𝑔 𝑌𝑖𝑛 𝑔𝑚1
1 + 𝐺 +𝑑𝑠1
𝐿 𝑔𝑑𝑠2
𝑅𝑠 = 0 & 𝐺𝐿 = 0 & 𝑔𝑚1 ≫ 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 & 𝑔𝑑𝑠1 = 𝑔𝑑𝑠2

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AC Response of Common Gate Amplifier
Merits of CG Amp
• No Miller Capacitance and
hence large Bandwidth
• Low input impedance
• Stable

𝑎𝑖 = 1
1
𝑟𝑜 = 𝑟𝑑𝑠1 1 + 𝑅𝑠 𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 𝑟𝑑𝑠2 𝑅𝐿 ≅
𝑔𝑑𝑠1 + 𝑔𝑑𝑠2

𝑅𝑠 = 0 & 𝐺𝐿 = 0 & 𝑔𝑚1 ≫ 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 & 𝑔𝑑𝑠1 = 𝑔𝑑𝑠2

Issues with CG Amp

• Small Input Voltage Range
• Prone to Noise Pickup

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Common Drain Amplifier
𝐷
𝐺
𝑣𝑖𝑛 𝑔𝑚𝑏1

𝑔𝑚1 𝑟𝑑𝑠1
𝑆
𝑣𝑜
𝑟𝑑𝑠2 𝑅𝐿 𝑎𝑖 ≅ ∞
𝑟𝑖 ≅ ∞

1
𝑟𝑜 =
𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 + 𝐺𝐿

𝑣𝑜 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 + 𝐺𝐿 − 𝑣𝑖𝑛 − 𝑣𝑜 𝑔𝑚1 = 0

𝑣𝑜 𝑔𝑚1
𝑎𝑣 = = ≅1
𝑣𝑖𝑛 𝑔𝑚1 + 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 + 𝐺𝐿
𝑔𝑚1 >> 𝑔𝑚𝑏1 + 𝑔𝑑𝑠1 + 𝑔𝑑𝑠2 + 𝐺𝐿
Merits of CD Amp
• No Miller Capacitance and hence large
Bandwidth
• Level Shift with near gain of 1
• Large input voltage range
De-merits of CD Amp
• Complex Poles makes it unstable, has to be
capacitively loaded at the output

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Cascode Amplifier
𝑎𝑖 ≅ ∞
𝑟𝑖 ≅ ∞
𝑔𝑚1 𝑔𝑚2 𝑟𝑑𝑠1 𝑟𝑑𝑠2
𝑎𝑣 ≅ −
2
𝑔𝑚1 𝑟𝑑𝑠1 𝑟𝑑𝑠2
𝑟𝑜 ≅
2

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AC Response of Cascode Amplifier

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Operational Amplifier
Two stage Operational Amplifier consists of a differential input stage and a common source output stage. It is suitable
for driving capacitive loads. To drive resistive loads, another Source Follower stage should be included at the output.

𝑇1 𝑇2 𝑇8

𝑣1
𝑇3 𝑇4
𝑣1 𝑣2

𝑇7
𝑇5 𝑇6

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AC Response of Operational Amplifier
𝑔𝑚4
𝑣𝑜1 = 𝑣
𝑔𝑑𝑠4 + 𝑔𝑑𝑠6 1

𝑔𝑚4
𝑣𝑜2 = − 𝑣
𝑔𝑑𝑠4 + 𝑔𝑑𝑠6 2

𝑔𝑚4
𝑣𝑜 = 𝑣𝑜1 + 𝑣𝑜2 = 𝑣1 − 𝑣2
𝑔𝑑𝑠4 + 𝑔𝑑𝑠6

𝑣𝑜 𝑔𝑚4
𝑎𝑣𝑑 = =
𝑣𝑑 𝑔𝑑𝑠4 + 𝑔𝑑𝑠6
𝑔𝑚7
𝑎𝑣7 = −
𝑔𝑑𝑠7 + 𝑔𝑑𝑠8

Swapping inverting and non-inverting terminals

𝑔𝑚4 𝑔𝑚7
𝑎𝑣𝑑 = −
𝑔𝑑𝑠4 + 𝑔𝑑𝑠6 𝑔𝑑𝑠7 + 𝑔𝑑𝑠8

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Small Signal Model of an OpAmp
𝑅 𝐶 1 1
𝑣1 𝑣𝑜 𝑣𝑜 𝐺2 + 𝑠𝐶2 + − 𝑣1 − 𝑔𝑚7 = 0
1 1
𝑅+ 𝑅+
𝑠𝐶 𝑠𝐶
1
𝑔𝑚4 𝑣𝑖𝑛 𝑅1 𝐶1 𝑔𝑚7 𝑣1 𝑅2 𝐶2 1 − 𝑔𝑚7
𝑣𝑜 𝑅+
𝑠𝐶
=
𝑣1 1
𝐺2 + 𝑠𝐶2 + 1
1 𝑅+
𝐺1 = = 𝑔𝑑𝑠4 + 𝑔𝑑𝑠6 𝑠𝐶
𝑅1
1 1 1
𝐺2 = = 𝑔𝑑𝑠7 + 𝑔𝑑𝑠8 + 𝐺𝐿 𝑣1 𝐺1 + 𝑠𝐶1 + − 𝑣𝑜 + 𝑔𝑚4 𝑣𝑖𝑛 = 0
𝑅2 1 1
𝑅+ 𝑅+
𝑠𝐶 𝑠𝐶
𝐶1 = 𝐶𝑑𝑏4 + 𝐶𝑑𝑏6 + 𝐶𝑔𝑠7
𝐶2 = 𝐶𝑑𝑏7 + 𝐶𝑑𝑏8 + 𝐶𝐿 𝑠𝐶 𝑠𝐶
𝐺1 + 𝑠𝐶1 + 𝐺2 + 𝑠𝐶2 + 𝑠𝐶
𝑠𝐶𝑅 + 1 𝑠𝐶𝑅 + 1
𝑣0 − = −𝑔𝑚4 𝑣𝑖𝑛
𝑠𝐶 𝑠𝐶𝑅 +1
− 𝑔𝑚7
𝑠𝐶𝑅 + 1

1
𝑣𝑜 −𝑔𝑚4 𝑅1 𝑔𝑚7 𝑅2 𝑠𝐶 𝑅 − 𝑔 −1
𝑚7
𝑎𝑣 = =
𝑣𝑖𝑛 1 + 𝑠 𝑅2 𝐶2 + 𝐶 + 𝑅1 𝐶1 + 𝐶 + 𝐶𝑅2 𝑔𝑚7 + 𝑅𝐶 + 𝑠 2 𝑅1 𝑅2 𝐶2 𝐶1 + 𝐶𝐶1 + 𝐶𝐶2 + 𝐶𝑅 𝑅2 𝐶2 + 𝑅1 𝐶1

𝑠
𝐴0 1 + 𝜔 1
𝑧 1 𝑔𝑚7 𝐶
𝑎𝑣 = 𝜔𝑧 = 𝜔𝑝1 ≅ 𝜔𝑝2 ≅
𝑠 𝑠2 1 𝑅1 𝐶𝑅2 𝑔𝑚7 𝐶2 𝐶1 + 𝐶𝐶1 + 𝐶𝐶2
1+𝜔 +𝜔 𝜔 𝐶 𝑅−𝑔
𝑝1 𝑝1 𝑝2 𝑚7

09-07-2020 Tanoshige Technologies Pvt. Ltd. 23

Frequency Compensation
Split Pole Compensation
𝑔𝑚7
1 𝑔𝑚7 𝐶
𝜔𝑝1 ≅ 𝜔𝑝2 ≅
𝑅1 𝐶𝑅2 𝑔𝑚7 𝐶2 𝐶1 + 𝐶𝐶1 + 𝐶𝐶2

𝑓𝑟𝑒𝑞

Lead Compensation
1
𝑅=
1 𝑔𝑚7
𝜔𝑧 = ∞
1
𝐶 𝑅−𝑔
𝑚7

𝑔𝑚7 2
𝜔𝑝2 ≅ = 𝜔𝑧 𝐶 = 𝐶2 + 𝐶1 𝑅=
𝐶2 + 𝐶1 𝑔𝑚7

𝜔𝑝2 >= 𝜔𝑧 2
𝑅>
𝑔𝑚7

09-07-2020 Tanoshige Technologies Pvt. Ltd. 24

Unity Gain Bandwidth and Slew Rate
Gain beyond dominant pole simplifies to
𝑣𝑜 −𝑔𝑚4
𝑎𝑣 = =
𝑣𝑖𝑛 𝑠𝐶
Assuming UGB is between two poles
𝑔𝑚4
𝑈𝐺𝐵 =
𝐶
𝐼
Slew Rate (Low to High)= 𝑜𝑢𝑡
𝐶
𝐼
Slew Rate (High to Low)= 𝑡𝑎𝑖𝑙
𝐶

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Slew Rate of OpAmp

09-07-2020 Tanoshige Technologies Pvt. Ltd. 26

Three Stage OpAmp

In order to drive resistive loads, we can add a source follower stage at the output
of two stage OpAmp. Due to capacitive loading of the two stage, you can reduce
the compensation capacitor. You should make sure that the output stage does not
ring i.e. it is sufficiently capacitively loaded.

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OpAmp Applications- Inverting & Non-Inverting Amplifiers
𝑅𝐹
𝑎𝑣 = − = −100
𝑅1

09-07-2020 Tanoshige Technologies Pvt. Ltd. 28

IC555 using OpAmp

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IC555 as Astable Multivibrator

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OpAmp as Integrator

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R2R DAC using OpAmp

You can use inverting or non-inverting configuration for

OpAmp. Here I used R2R on inverting input.

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Colpitts using OpAmp

The operation of these oscillators is based on

positive feedback. Oscillator frequency is decided
by Barkhausen Criteria. Barkhausen criteria states
that for sustainable oscillations to occur, the loop
gain should be one and the total phase shift
should be 360˚. In Colpitts Oscillator, the feedback
is provided by a capacitive feedback network while
in Hartley Oscillator an inductive feedback
network is used.
Issue of this oscillator is poor phase noise.

09-07-2020 Tanoshige Technologies Pvt. Ltd. 33

Ring Oscillator
Odd number of inverters in a feedback will result in ring oscillator. Ring oscillator suffers from poor phase noise and noise
pickups.

09-07-2020 Tanoshige Technologies Pvt. Ltd. 34

LC- Voltage Controlled Oscillator

For Oscillations
1
𝑅𝑝 ≪
𝑔𝑚𝑛 + 𝑔𝑚𝑝

Various Trade-offs involved are

• VCO Gain Vs. Loaded Q of Tank
• VCO Gain Vs. Power Dissipation
• Phase Noise Vs. Power Dissipation
• Phase Noise Vs. VCO Gain

09-07-2020 Tanoshige Technologies Pvt. Ltd. 35

LC-VCO Gain
∇𝑓
𝐺𝑎𝑖𝑛 = = −671 𝑀𝐻𝑧/𝑉
∇𝑉𝑐

𝑉𝑐 = 0.8𝑉 𝑉𝑐 = 0𝑉

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Source of Noise in Active Devices
Electrical Noise in active devices is of the form of random current and voltage fluctuations. The source of
these noises is mainly the discrete nature of charge or random motion of carriers or scattering from
defect sites and alloy impurities. Extraneous pickup of noise will be discussed later.

Most of the devices have PN junctions that are forward or reverse biased. In reverse biased diode, the
leakage current is very small. Noise becomes significant in case of forward biased diode due to
accompanying current.

Thermal Noise

Burst Noise Noise Flicker Noise

Shot Noise

09-07-2020 Tanoshige Technologies Pvt. Ltd. 37

Shot Noise

Minor fluctuations in the number of carriers crossing

the junction causes shot noise. The current is
composed of bursts of charge crossing the junction
with random time intervals.

2qI d
Na Nd
ni2 White Noise
n 2
pno =
n po = i
Nd i f
2

Na
− Ln Lp x 1 f
Carrier Distribution across forward biased PN Junction Shot Noise Power Spectral Density

The minimum time for transition, 𝜏, through the junction sets the upper limit on the frequency, 1/𝜏, up to
which such a noise is present.

Reverse Biased Junctions have very small leakage current and hence do not contribute
to Shot Noise

09-07-2020 Tanoshige Technologies Pvt. Ltd. 38

Thermal Noise
Unlike the Shot Noise, Thermal Noise is present in active and passive devices due to random motion of
carriers in physical resistances. This random motion of carriers is directly proportional to the temperature.
Shot Noise is independent of temperature.

Like Shot Noise, Thermal Noise Spectral Power Density is independent of frequency. Current or voltage
fluctuations have Gaussian Probability Density Function about their mean values.

Thermal Noise Spectral Density can be specified as

mean square current or voltage per unit bandwidth
or root mean square current or voltage per unit
v 2 = 4 KTRf bandwidth root. It can also be specified as
equivalent thermal resistance.

1 Thermal Noise extends to much higher frequencies

R R i 2 = 4 KT f than Shot Noise which is limited by smallest
R
transition time through the junction. Thus at high
frequencies one can expect only thermal noise as
white noise.
Small Signal Thermal Noise Model of a resistor

09-07-2020 Tanoshige Technologies Pvt. Ltd. 39

Flicker Noise
Source of Flicker Noise is carrier traps due to crystal defects in bulk or at polycrystalline interface with the
semiconductor. These traps capture & release carriers with randomly varying time intervals. Most of the
time intervals are large causing most of the energy to be concentrated around low frequencies. Flicker noise
is process dependent and can vary from wafer lot to wafer lot as well as device to device on same wafer.
PCM (Process Control Monitor) can provide insight into on wafer variations.

where K1is process dependent parameter For low noise avoid bulk resistors and use metal film
a can vary between 0.5 to 2 resistors.
b can be 1 or higher
Larger the defect area more are the trap sites and nice
averaging leads to lower Flicker Noise.
log scale

In Pseudomorphic materials it is a function of critical

thickness. In quantum well devices like pHEMT it is
1 f dependent on material lattice constants.
i2
f
log scale f

Flicker Noise Spectral Density

09-07-2020 Tanoshige Technologies Pvt. Ltd. 40

Burst Noise
Source of Burst Noise is the alloy (heavy metal) contamination. Usually gold doped devices show high level of
burst noise. Heavy metal ions are capture sites and time constants are large. This causes pulses of current at
much lower frequencies in audio range (few KHz). The period and width of pulses is random resulting in
following spectral content-

where K 2is process dependent parameter

Noise Current Amplitude

c can vary between 0.5 to 2

t IC
i = K2
2
2
f
 f 
1 +  
 fC 
Burst Noise Amplitude Pulses i2
f
fC f
Burst Noise Spectral Density

09-07-2020 Tanoshige Technologies Pvt. Ltd. 41

MOSFET Noise Model

Two dominant sources of Noise in a MOSFET at the output node are Flicker Noise and Thermal Noise. Source of thermal noise is the resistive nature of
the channel. Source of Flicker Noise is the polycrystalline gate interface with the semiconductor. Number of traps at this interface contribute to the Flicker
Noise. The direct current for the Flicker Noise is the drain current of the device. In the model the mean square noise at the output is given by-

2  Ia At the input node the dominant sources of noise are the Shot Noise and the Thermal Noise. Short Noise is due to the
id2 = 4kT  g m f + K1 d f fluctuations in the gate leakage current which is small at low frequencies. It is given by- i 2 = 2qI f
3  f g1 g
Thermal Noise Flicker Noise

The Thermal Noise at the input node is in the form of fluctuations in AC gate current due to fluctuations in Gate-to-Channel voltage arising out of charge
trapped under the gate at various defect sites. This can be modeled using gate capacitance as-
2
16  1 
 f = 16 kT 2C gs 2 f This thermal noise at the input node is negligible at low frequencies.
i 2
= kT
15  1 C gs 
g2
 15
id2  2  I da
G D vi
2
= = 4 kT 
 3g   f + K1 f Note: Flicker Noise referred to the input has inverse
g m2  m g m2 f nature with bias current with very weak dependence
ig2 id2 Flicker Noise referred to the input has stronger inverse
 2  Kf
vi = 4kT 
2
f + f relationship with Gate Area
S  3g m  WLC ox f
Noisy MOSFET Small Signal Model

vi2  2C gs2 K  2C 2 I a
2  2 
G D
ii2 = ig21 + id2 = 2qI g f + 4kT 2C gs  f + 1 2 gs d f
g m2  3g m  gm f
ii2
Shot Noise Thermal Noise Flicker Noise
S
Modified Noisy MOSFET Small Signal Model

42
Single Sideband Phase Noise of a VCO
Device noise is upconverted to the output frequency and results in jitter and phase noise. In digital implementation the
time period changes to result in spurs, referred to as jitter. A continuous spectrum adjacent to output tone results when
time periods are more random. This is referred to as phase noise.
In RADAR systems, phase noise results in target distance and velocity ambiguity while in communication systems, the Bit
Error Rate drops with increasing phase noise.
Ideal
Real

t f

1Τ∆𝑓 3
t
1Τ∆𝑓 2
1Τ∆𝑓

∆𝑓
Leeson’s Model of SSB Phase Noise
f

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Phase Noise in LC- VCO

Differential LC- VCO is most commonly used Voltage Controlled Oscillator at microwave frequencies. This is due to its very good phase noise characteristics.
The phase noise characteristics are predicted by Leeson’s Model
Up converted Flicker Noise

F Device excess noise factor

1  3 Ps Power Dissipation in real part of Tank Circuit

-dBc
0 Free running oscillation frequency
1  2
Up converted Shot & 1 f 3
Corner frequency as shown in figure Leeson’s Model
Thermal Noise  2 FkT       1 f 3
2

 Frequency offset from the carrier L = 10. log 10  .1 +  0
 .1 + 
−3dB  Ps   2QL      
1 Hz  QL Loaded Q of the Tank Circuit    
f3

Phase Noise Characteristics of typical VCO

2
By lowering the Shot and Thermal Noise of individual devices the Phase Noise in 1 f region can be reduced. By lowering the Flicker Noise in the devices
3
Phase Noise in 1 f region can be reduced. Use smaller NMOS Devices as they show higher Flicker Noise and Shot Noise. Use a topology where PMOS is
a tail device. Bypass the tail device with a capacitor to reduce perturbation across the tank circuit while voltage across the tank circuit is zero. Tail Capacitor
also damps the noise of Tail Device.

The design has been divided into small sub-goals. These are-

a) Design an on-board resonator using SMT Components at the desired frequency of oscillation
b) Characterize the resonator to determine appropriate feedback
c) Design a negative resistance circuit
d) Simulate Transient Response of the Oscillator to observe startup characteristics
e) Simulate Phase Noise of the VCO

44
VCO Phase Noise Simulation using Two Port Oscillator

09-07-2020 Tanoshige Technologies Pvt. Ltd. 45

Translinear Cell
𝑣𝑑 = 𝑣1 − 𝑣2
2 𝐼𝑑1 𝐼𝑑2
𝐼𝑡𝑎𝑖𝑙 𝑣𝑖2 𝑣𝑖 𝑣1 𝑣2
𝐼𝑑1 = 𝑘 − +
2𝑘 4 2
𝑣𝑆
2
𝐼𝑡𝑎𝑖𝑙 𝑣𝑖2 𝑣𝑖
𝐼𝑑2 = 𝑘 − − 𝐼𝑡𝑎𝑖𝑙
2𝑘 4 2

𝐼𝑡𝑎𝑖𝑙 𝑣𝑖2
𝐼𝑑 = 𝐼𝑑1 − 𝐼𝑑2 = 2𝑘 − 𝑣𝑖 Translinear Cell
2𝑘 4

For the Translinear Cell, above equation is valid till differential current
is 𝐼𝑡𝑎𝑖𝑙 . This happens for − 2𝑉𝑜𝑣 < 𝑉𝑜𝑣 < 2𝑉𝑜𝑣
𝐼𝑡𝑎𝑖𝑙
𝐼𝑑2 𝐼𝑑1

- 2𝑉𝑜𝑣 2𝑉𝑜𝑣
Transfer Characteristics of Translinear Cell

09-07-2020 Tanoshige Technologies Pvt. Ltd. 46

Gilbert Cell
𝐼𝑑 = 𝐼7 − 𝐼8 = 𝐼3 + 𝐼5 − 𝐼4 + 𝐼6 = 𝐼3 − 𝐼4 − 𝐼6 + 𝐼5

𝐼1 𝑣𝑦2 𝐼2 𝑣𝑦2
𝐼𝑑 = 2𝑘𝑣𝑦 2𝑘
− 4
− 2𝑘
− 4
𝐼7 𝐼8
2 2
𝐼3 𝐼4 𝐼5 𝐼6 𝐼𝑡𝑎𝑖𝑙 𝑣𝑥2 𝐼𝑡𝑎𝑖𝑙 𝑣𝑥2
𝐼𝑑 = 𝑘𝑣𝑦 − + 2𝑣𝑥 − 𝑣𝑦2 − − − 2𝑣𝑥 − 𝑣𝑦2
+ 𝑘 2 𝑘 2

𝑣𝑦
_ 𝐼𝑡𝑎𝑖𝑙 𝑣𝑥2
For 𝑘
− 2
+ 2𝑣𝑥 > 𝑣𝑦
𝐼1 𝐼2
+
𝐼𝑑 = 4𝑘𝑣𝑦 𝑣𝑥
𝑣𝑥
_ 𝑣𝑑 = 𝐼𝑑 𝑅𝑑 = 4𝑅𝑑 𝑘𝑣𝑦 𝑣𝑥
𝑣𝑑
𝑔𝐶 = = 4𝑅𝑑 𝑘𝑣𝑦
𝑣𝑥

This is for all the transistors to be of same size. In case top transistors differ
Gilbert Cell Mixer using MOSFET from bottom transistor, the relation modifies to
𝑣𝑑
𝑔𝐶 = = 4𝑅𝑑 𝑘𝑦 𝑘𝑥 𝑣𝑦
𝑣𝑥
Issue with Gilbert Cell Mixer is poor RF LO Isolation
because of which it is not suitable for down conversion Thus, conversion gain of a Gilbert Cell Mixer depends on
in zero and low IF transceivers. • Device Size- Larger the devices size higher the conversion gain but at the
cost of higher harmonic distortion
Gilbert Cell mixer is suitable for direct up conversion. • LO Power- Increasing the LO power increases the gain but the overdrive
limits this relationship
• Load Resistance- Increasing the load resistance increases the conversion
gain but is limited by the supply voltage.

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Gilbert Cell

09-07-2020 Tanoshige Technologies Pvt. Ltd. 48

Gilbert Cell Mixer-Up Conversion

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Operational Transconductance Amplifier (OTA)
All the nodes except the output node are low input impedance. And hence the 3dB bandwidth of a single stage is large.
Slew rate limiting avoided by two NMOS devices. OTA is for driving capacitive loads. Lead compensation is implemented
using RC at the output node. This is a single stage amplifier.

09-07-2020 Tanoshige Technologies Pvt. Ltd. 50

AC response of OTA

09-07-2020 Tanoshige Technologies Pvt. Ltd. 51

Rutherford’s Model of an Atom
Protons are positively charged 𝑞𝑝 = 1.602 × 10−19 𝐶
Neutrons are electrically neutral 𝑚𝑝 = 1.67 × 10−27 𝐾𝑔
Neutrons 𝑚𝑛 = 1.67 × 10−27 𝐾𝑔
Protons Electrons are negatively charged 𝑞𝑒 = 1.602 × 10−19 𝐶
Electrons
𝑚𝑒 = 9.1 × 10−31 𝐾𝑔
𝑞1 𝑞2
Coulomb's Law 𝐹𝑒 = 𝐾 2 𝐾 = 8.98 × 109 𝑁. 𝑚2 Τ𝐶 2
𝑟 Larger the velocity larger the rotational
kinetic energy and higher the orbital.
Orbit is stable when 𝐹𝑒 = 𝐹𝑐 Electrons in outermost orbital have
highest energy. These are known as
Valence Electrons. The energy is
Centripetal Centrifugal
Force Force 𝑚𝑣 2 known as Valence Level
𝐹𝑐 =
𝑟 Energy Band Diagram (EBD)
𝐸𝐽 Conduction Level
𝑒𝑣 =
𝑞𝑒 𝑒𝑣 𝐸𝑔 (Bandgap)
Valence Level
Minimum energy of electron free from its nucleus is
known as Conduction Level 𝑑

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Energy Band Diagram
𝑁𝐶 Conduction Band Conduction Level

𝑒𝑣 𝐸𝑔
Valence Level
𝑁𝑉 Valence Band

𝑑 6 − 12 𝑒𝑣 Insulator
𝑑 𝑑
𝑑

Solids Liquids Gases

0.2 − 3.6 𝑒𝑣
Semiconductor

Conductor

09-07-2020 Semiconductor Physics 53

Direct & Indirect Bandgap
𝑒−
𝑒−
Energy

Energy
𝐸𝑔 𝐸𝑔
+
𝑒 𝑒+

Wave Number Wave Number

Indirect Energy Bandgap Direct Energy Bandgap

Diamond
Example C, Si, Ge Example GaAs, InP, AlAs

𝑒−
Energy, Mobility

Energy

𝐸 𝐸

Zinc Blend

09-07-2020 Semiconductor Physics 54

Bandgap and Morphism
SiGe

Modility Improvement
Mobility Improvement

SiGe

09-07-2020 Semiconductor Physics 55

Intrinsic and Extrinsic Semiconductors
Boron (Trivalent) in Silicon contributes one hole per dopant atom, hence holes are in majority with same density as Doping Density. The dopant
is also referred to as Acceptor. Besides there are intrinsically generated holes small in number. Doping Silicon with Arsenic results in electrons in
conduction band and hence known as Donor. Intrinsically generated electrons are much less.
Si Energy applied
Thermal, Stress, Photon, Impact Si
Si Si Si
Si Si B 𝑒−
Si 0.2 − 3.6 𝑒𝑣

Energy
Expected value of Energy is known as Fermi Level Si
𝑒+ 𝐸𝑓
p-Type
𝑒+ + 𝑒+
𝑒 −
𝑝𝑝 ≅ 𝑁𝐴 /𝑚3 𝑒+ 𝑒 +
𝑒+ + 𝑒
0.2 − 3.6 𝑒𝑣 𝑛𝑖2 𝑒+ 𝑒 𝑒+ 𝑒+
/𝑚3
Energy

𝐸𝑓 𝑛𝑝 ≅
𝑁𝐴

𝑒+ Si 𝑒− −
𝑒− 𝑒 − 𝑒
−
𝑒− − 𝑒
𝑒− 𝑒 𝑒− 𝑒−
Si Si As
𝐸𝑓

Energy
Thermally Generated Intrinsic Pairs (𝑛𝑖 /𝑚3 ) Si 0.2 − 3.6 𝑒𝑣
𝑞𝐸𝑔 Strong Temperature
n-Type
−2𝐾 𝑇 𝑒+
𝑛𝑖 = 𝑁𝐶 𝑁𝑉 𝑒 𝑏 Dependency and 𝑛𝑛 ≅ 𝑁𝐷 /𝑚3
hence Doping 𝑛𝑖2
For Intrinsic Silicon @ 298.16 K 𝑝𝑛 ≅ /𝑚3
𝑁𝐷
𝑛𝑖 ≅ 1016 /𝑚3

09-07-2020 Semiconductor Physics 56

PN-junction diode applications
Applications of PN-junction diode

• Reverse bias diode offers a voltage dependent capacitance that can be used in design of voltage
controlled oscillators

• Reverse biased diode is used to isolate frontend of the line devices from the substrate

• Unidirectional nature of diode provides rectification and power detection

• I-V characteristics of a forward biased diode has exponential nature and hence can be used for
designing mixers

• Output characteristics of a BJT depends on reverse bias diode characteristics of Collector Base NP-
junction.

To understand the operation of BJT, it important to understand the characteristics of a diode

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PN Junction
𝑁𝐴 > 𝑁𝐷
p-type n-type
1
𝜕 2𝑉 𝜌𝑣 2𝜖 𝜙0 + 𝑉𝑟 𝑁𝐷 2
2
=− 𝑊1 =
𝜕𝑥 𝜖 𝑞𝑁𝐴 𝑁𝐴 + 𝑁𝐷
𝜌𝑣 𝑞𝑁 1
𝐷 𝑁𝐴 𝑊1 = 𝑁𝐷 𝑊2 2𝜖 𝜙0 + 𝑉𝑟 𝑁𝐴 2
𝑊2 =
−𝑊1 0 𝑊2 𝑥 𝑞𝑁𝐷 𝑁𝐴 + 𝑁𝐷

−𝑞𝑁𝐴 1
𝑁𝐴 𝑁𝐷 2
𝑞𝑁𝐴 𝑄± = 2𝑞𝜖 𝜙0 + 𝑉𝑟
𝐸 𝐸𝑙𝑒𝑓𝑡 = − 𝑥 + 𝑊1 𝑁𝐴 + 𝑁𝐷
0 𝜖
−𝑊1 𝑊2 𝑥 𝑞𝑁𝐷
𝐸𝑟𝑖𝑔ℎ𝑡 = 𝑥 − 𝑊2
𝜖 In case of metal instead of n-type
𝑞𝑁𝐴 𝑥 2 𝑊12 𝑁𝐷 → ∞
𝑉𝑙𝑒𝑓𝑡 = + 𝑊1 𝑥 +
𝜖 2 2 1
𝑉 𝑄± = 2𝑞𝜖 𝜙0 + 𝑉𝑟 𝑁𝐴 2
𝑞𝑁𝐷 𝑥 2 𝑁𝐷 𝑊22
𝑉2 𝑉𝑟𝑖𝑔ℎ𝑡 = − − 𝑊2 𝑥 −
𝜖 2 2𝑁𝐴
𝑉1 𝑞𝑁𝐴 𝑊12 𝑞𝑁𝐷 𝑊22
−𝑊1 0 𝑊2 𝑥 𝑉1 = 𝑉2 =
2𝜖 2𝜖
𝑝𝑝0 𝑞𝑁𝐴 𝑊12 𝑞𝑁𝐷 𝑊22 𝐾𝑏 𝑇 𝑁𝐴 𝑁𝐷
𝑛𝑛0 𝑉1 + 𝑉2 = + = 𝜙0 + 𝑉𝑟 𝜙0 = 𝑙𝑛
2𝜖 2𝜖 𝑞 𝑛𝑖2
𝑁𝐴 𝑁𝐷
𝑛𝑝0 𝑝𝑛0

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Reverse and Forward Biased PN Junction
Unbiased Reverse Biased Zener Breakdown
𝑁𝐴 > 𝑁𝐷 𝑁𝐴 > 𝑁𝐷 𝑁𝐴 > 𝑁𝐷
p-type n-type p-type n-type p-type n-type

𝐸𝑓 𝑒− Tunnelling in heavily
𝐸𝑓 doped PN Junction
𝐸𝑓

𝑁𝐴 > 𝑁𝐷 1
𝑉𝑑
𝑉𝑑 1 𝑁𝐴 𝑁𝐷 2 1
p-type n-type 𝐼𝑒 = 𝑞𝐴𝐷𝑛
𝜕𝑛 𝑥
= 𝑞𝐴𝐷𝑛
𝑛𝑝𝑜 𝑒 𝑉𝑇 −𝑛𝑝𝑜
=
𝑞𝐴𝐷𝑛 𝑛𝑖2
𝑒 𝑉𝑇 −1 𝐶𝑗 = 2𝑞𝜖
2 𝑁𝐴 + 𝑁𝐷
𝜙0 + 𝑉𝑟 −
2
𝜕𝑥 𝐿𝑛 𝑁𝐴 𝐿𝑛
𝑉𝑑
𝑉𝑑
𝜕𝑝 𝑥 𝑝𝑛𝑜 𝑒 𝑉𝑇 −𝑝𝑛𝑜 𝑞𝐴𝐷𝑝 𝑛𝑖2
𝐼ℎ = 𝑞𝐴𝐷𝑝 𝜕𝑥 = 𝑞𝐴𝐷𝑝 = 𝑒 𝑉𝑇 −1
𝐿𝑝 𝑁𝐷 𝐿𝑝

𝑛𝑛0 𝐶𝑗
𝐷𝑛 𝐷𝑝 𝑉𝑑
𝑁𝐴 𝑁𝐷 𝐼𝑑 = 𝐼𝑒 + 𝐼ℎ = qA𝑛𝑖2 + 𝑒 𝑉𝑇 −1
𝑝𝑛0 𝑁𝐴 𝐿𝑛 𝑁𝐷 𝐿𝑝
𝑛𝑝0
−𝐿𝑛 𝐿𝑝 𝑉𝑑 = −𝑉𝑟
𝑥2 𝑥3
𝑒𝑥 = 1 + 𝑥 + + +⋯
2! 3!

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Diffusion Capacitance
Diode does not turn off till the minority carriers in space charge region get depleted. This delay
in diode current in response to diode voltage is given by
1
𝜏=
𝑟𝑑 𝐶𝑑
IV Characteristics of a diode
1 1 𝐼𝑑
𝐶𝑑 = =
𝜏𝑟𝑑 𝑟𝑑 𝑉𝑇
𝐼𝑑 𝐼𝑑
𝐶𝑑 =
𝜏𝑉𝑇

𝑉𝑑

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BJT in Forward Active Region of Operation
A simplified approach to understand a BJT device is to consider it as two back to back connected diodes. We mostly use
npn BJT, as the carriers transiting the base are electrons with high mobility. This results in BJT that can operate at high
frequency. PNP BJT has holes as the carrier and due to lower mobility of holes, pnp BJT is much slower than an npn BJT.
Three terminals of a BJT are –(a) Emitter that emits majority carriers in base (b) Base that modulates the current that
flows towards collector and (c) collector that collects the majority carriers. In forward active region of operation Base
Emitter junction is forward biased while Collector-Base junction is reverse biased.
𝑁𝐷𝐸 ≫ 𝑁𝐴 ≫ 𝑁𝐷𝐶 𝜕𝑛𝑝 𝑥 𝑛𝑝 𝑊𝑏 − 𝑛𝑝 0 𝑞𝐴𝐷𝑛 𝑛𝑖2 𝑉𝑉𝐵𝐸
𝐼𝐶 = − −𝑞 𝐴𝐷𝑛 = 𝑞𝐴𝐷𝑛 =− 𝑒 𝑇
𝑁𝐷𝐸 𝑁𝐴 𝑁𝐷𝐶 𝜕𝑥 𝑊𝑏 𝑁𝐴 𝑊𝑏
𝑉
− 𝐶𝐵
𝑛𝑝 𝑊𝑏 = 𝑛𝑝𝑜 𝑒 𝑉𝑇 ≅0
Carrier Density

𝑉𝐵𝐸
𝑛𝑛𝑜𝑒 𝑛𝑖2 𝑘𝑏 𝑇
𝑛𝑝 0 = 𝑛𝑝𝑜 𝑒 𝑉𝑇 𝑛𝑝𝑜 ≅ 𝑉𝑇 ≅
𝑁𝐴 𝑞
𝑛𝑛𝑜𝑐
Base Current has two component- due to electron recombination and due to
𝑛𝑝 0
𝑛𝑝𝑜 𝑝𝑛𝑜𝑐 Base Emitter diode current mainly because of holes
𝑝𝑛𝑜𝑒 1 𝑞𝐴𝑊𝑏 𝑛𝑖2 𝑉𝑉𝐵𝐸 𝜏𝑏 is carrier relaxation time in
𝐼𝑏1 = −𝑞𝐴 𝑊𝑏 𝑛𝑝 0 = − 𝑒 𝑇 base, not to be confused with
−𝐿𝑛0 𝑊𝑏 𝑥 2𝜏𝑏 2𝑁𝐴 𝜏𝑏
base transit time
𝑞𝐴𝐷𝑝 𝑛𝑖2 𝑉𝐵𝐸
𝐼𝑏2 = − 𝑒 𝑉𝑇
𝑁𝐷 𝐿𝑝

𝐼𝐵 = 𝐼𝑏1 + 𝐼𝑏2

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Gummel Plot
𝐼𝐶 1
𝛽𝐹 = = 2
𝐼𝐵 𝑊𝑏 𝐷𝑝 𝑁𝐴 𝑊𝑏

Modulation (Kirk Effect)

+
2𝜏𝑏 𝐷𝑛 𝑁𝐷 𝐿𝑝
𝑙𝑛 𝐼𝐶 , 𝑙𝑛 𝐼𝐵 , 𝑙𝑛 𝛽

Inverse Base Width

Low hole current

𝛽𝐹 1 1 1
𝑙𝑛 𝛽 𝛼𝐹 = = ≅
1 + 𝛽𝐹 𝑊𝑏2 𝐷𝑝 𝑁𝐴 𝑊𝑏 𝑊𝑏2 𝐷𝑝 𝑁𝐴 𝑊𝑏
1+ + 1+ 1+
2𝜏𝑏 𝐷𝑛 𝑁𝐷 𝐿𝑝 2𝜏𝑏 𝐷𝑛 𝑁𝐷 𝐿𝑝
𝛼𝐹 = 𝛼𝐵 𝛾

𝑉𝐵𝐸 1
𝛼𝐵 = Base Transport Factor
𝑊𝑏2
1+
2𝜏𝑏

1
𝛾= Emitter Injection Efficiency
𝐷𝑝 𝑁𝐴 𝑊𝑏
1+
𝐷𝑛 𝑁𝐷 𝐿𝑝

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Small Signal Model of a BJT
Small signal refers to the amplitude of the input signal that does not affect the transconductance of the device. For BJT
𝑣𝑖 < 𝑉𝑇 is referred to as small signal while for MOSFET 𝑣𝑖 < 2𝑉𝑂𝑉 is referred to as small signal.
𝜕𝐼𝐶 𝑞𝐼𝐶
𝑅𝜇 𝑔𝑚 = =
𝜕𝑉𝐵𝐸 𝑘𝑏 𝑇
𝑣𝑖 𝐶𝜇
𝐵 𝐶 𝑣𝑖 𝑣𝑖 𝑖𝑐 𝛽𝐹
𝑟𝜋 = = =
𝐶𝜋 𝑟𝜋 𝑔𝑚 𝑟𝑜 𝐶𝑐𝑠 𝑖𝑏 𝑖𝑐 𝑖𝑏 𝑔𝑚

𝐸 𝑣𝑐 𝜕𝑉𝐶𝐸 𝜕𝑉𝐶𝐸 𝜕𝑊𝑏 𝑊𝑏 𝜕𝑉𝐶𝐸 𝑉𝐴 𝑉𝐴

𝑟𝑜 = = = =− = =
𝑖𝑐 𝜕𝐼𝐶 𝜕𝑊𝐵 𝜕𝐼𝐶 𝐼𝐶 𝜕𝑊𝐵 𝐼𝐶 𝑉𝑇 𝑔𝑚
𝐵𝑉𝐶𝐵𝑂
𝐵𝑉𝐶𝐸𝑂 = 𝜕𝑉𝐶𝐸
𝛽𝐹 𝑉𝐴 = −𝑊𝑏
𝜕𝑊𝐵

𝐶𝜋 = 𝐶𝑏 + 𝐶𝑗𝑒
𝜕𝑄𝑏 𝑞𝐴 𝑊𝑏 𝑛𝑖2 𝑉𝑉𝐵𝐸 𝑊𝑏2 𝐼𝐶
𝐶𝑏 = = 𝑒 𝑇 = = 𝜏𝐹 𝑔𝑚
𝜕𝑉𝐵𝐸 2 𝑁𝐴 𝑉𝑇 2𝐷𝑛 𝑉𝑇
𝑊𝑏2
𝜏𝐹 = Base Transit Time
2𝐷𝑛
𝐶𝑗0 𝐶𝑗0 𝐶𝑗0
𝐶𝑗𝑒 = 𝐴 𝐶𝜇 = 𝐴 𝐶𝐶𝑆 = 𝐴
𝑉𝐵𝐸 𝑉 𝑉𝐶𝑆
1− 1 + 𝐶𝐵 1+
𝜓0 𝜓0 𝜓0
𝜕𝑉𝐶𝐸 𝜕𝐼𝑏 𝜕𝑉𝐶𝐸 𝜕𝐼𝐶
𝑟𝜇 = = ≅ 5𝑟𝑜 𝛽𝐹
𝜕𝐼𝑏2 𝜕𝐼𝑏2 𝜕𝐼𝐶 𝜕𝐼𝑏

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PTAT Current Reference
1:1 Current Mirror 𝑉𝐵𝐸1 = 𝑉𝐵𝐸2 + 𝐼𝑃𝑇𝐴𝑇 𝑅𝐵

𝐼𝑃𝑇𝐴𝑇
𝑁𝐴 𝑊𝑏 𝐼𝑃𝑇𝐴𝑇 𝑁𝐴 𝑊𝑏 𝐼𝑃𝑇𝐴𝑇
𝐼𝑃𝑇𝐴𝑇 𝑉𝑇 𝑙𝑛 − 𝑉𝑇 𝑙𝑛 = 𝐼𝑃𝑇𝐴𝑇 𝑅𝐵
𝑞𝐴1 𝐷𝑛 𝑛𝑖2 𝑞𝐴2 𝐷𝑛 𝑛𝑖2
𝐼𝑃𝑇𝐴𝑇
𝑉𝑇 𝐴2 𝐾𝑏 𝐴2
𝐼𝑃𝑇𝐴𝑇 = 𝑙𝑛 = 𝑙𝑛 T
𝐴1 𝐴2 𝑅𝐵 𝐴1 𝑞𝑅𝐵 𝐴1
𝑉𝐵𝐸1 𝑉𝐵𝐸2

𝑅𝐵

𝛽 − 𝐻𝑒𝑙𝑝𝑒𝑟

𝑆𝑡𝑎𝑟𝑡𝑢𝑝 𝐶𝑖𝑟𝑐𝑢𝑖𝑡

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PTAT Response Across Temperature

𝑅𝑏 = 25Ω

𝑅𝑏 = 35Ω

𝑅𝑏 = 35Ω
𝑅𝑏 = 55Ω

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CTAT Voltage Reference

CTAT

CTAT Compensated

09-07-2020 Tanoshige Technologies Pvt. Ltd. 66

Bandgap Circuit

𝛽 − 𝐻𝑒𝑙𝑝𝑒𝑟
𝑆𝑡𝑎𝑟𝑡𝑢𝑝 𝐶𝑖𝑟𝑐𝑢𝑖𝑡

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Brokaw’s Cell

𝛽 − 𝐻𝑒𝑙𝑝𝑒𝑟

𝑆𝑡𝑎𝑟𝑡𝑢𝑝 𝐶𝑖𝑟𝑐𝑢𝑖𝑡

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OpAmp Applications
Large Gain and high corner frequency OpAmps offer themselves to be treated as black box as their characteristics does
not affect circuit operation. Performance only depends on external components.
𝐶𝐹 𝑅𝐹
𝑅
𝑣𝑖 = 𝑣𝑜 1
𝑅𝐹 +𝑅1

𝑣𝑜 𝑅𝐹 𝑅1
𝑅1
0 _ =1+
𝑣𝑖 _
𝑣𝑜 𝑣𝑖 𝑅1 𝑣𝑜
𝑣𝑖 0 𝑣𝑖
+ +

1 𝑣𝑖 1
𝑣𝑜 = − න 𝑑𝑡 = − න 𝑣𝑖 𝑑𝑡
𝐶𝐹 𝑅1 𝑅1 𝐶𝐹 𝑅𝐹
𝑅𝐹 𝑣𝑖
− 𝑅𝐹 = 𝑣𝑜
𝑅1
𝑅1
𝐶1 0 _
0 _ 𝑣𝑜 𝑅𝐹 𝑣𝑜
𝑣𝑜 =− 𝑣𝑖
𝑣𝑖 𝑅1 0
𝑣𝑖 0 +
+

𝑑𝑣1
𝑣𝑜 = −𝑅𝐹 𝐶1
𝑑𝑡

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Summing Amplifier, Difference Amplifier, Buffer
𝑅𝐹

𝑅1 𝑣𝑖
_
0 _ 𝑣𝑜 0 𝑣𝑜
𝑣𝑜 =1+ =1
𝑣𝑖 ∞ 𝑣𝑖
𝑣1 0
+
+

𝑅2
𝑣1 𝑣2 𝑣3
𝑣2 𝑣𝑜 = −𝑅𝐹 + + 𝑅𝐹
𝑅1 𝑅2 𝑅3 1 + 𝑅𝐹 Τ𝑅1 𝑅𝐹
𝑣0 = 𝑣𝑝 − 𝑣𝑛
1 + 𝑅2 Τ𝑅3 𝑅1
𝑅1 𝑣1 _
𝑣𝑜 𝑅𝐹 1 + 𝑅1 Τ𝑅𝐹
𝑅3 𝑣0 = 𝑣𝑝 − 𝑣𝑛
𝑣𝑛 𝑅1 1 + 𝑅2 Τ𝑅3
+
𝑣3 𝑅2 𝑅3
𝑅𝐹
𝑣1 𝑣0 = 𝑣 − 𝑣𝑛 ቤ
𝑣𝑝 𝑅1 𝑝 𝑅2 𝑅1
=
𝑅3 𝑅𝐹

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Instrumentation Amplifier
𝑣1
+ 𝑣𝑜1 𝑅1 𝑅𝐹
_
𝑅2
_
𝑣𝑜
𝑅𝑏
+
𝑅2
_ 𝑅1 𝑅𝐹
𝑣2 𝑣𝑜2
+

𝑅𝑏
𝑣1 − 𝑣2 = 𝑣 − 𝑣𝑜2
𝑅𝑏 + 2𝑅2 𝑜1
𝑅𝐹
𝑣𝑜 = 𝑣 − 𝑣𝑜2
𝑅1 𝑜1

2𝑅2 𝑅𝐹
𝑣𝑜 = − 1 + 𝑣 − 𝑣2
𝑅𝑏 𝑅1 1

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High Frequency Instrumentation Amplifier

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First Order High Pass Filter

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First Order Low Pass Filter

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First Order Band Pass Filter

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