Datasheet (ltm200wd1)
Datasheet (ltm200wd1)
SAMSUNG
SAMSUNG TFT-
TFT-LCD PRODUCT
TFT-LCD PRODUCT INFORMATION
INFORMATION
MODEL
MODEL :: LTM200KP01
LTM200KP01
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Note : This is Product Information is subject to change after 3 months of issuing date.
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Product Information
Contents
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5.3 LVDS Interface(2)
5.4 Back Light Unit
5.5 Input Signals, Basic Display Colors and Gray Scale of Each Color
Description
LTM200KP01 is a color active matrix liquid crystal display (LCD) that uses amorphous
silicon TFT (Thin Film Transistor) as switching components. This model is composed of
a TFT LCD panel, a driver circuit and a back light unit. The resolution of a 20.0” is 1600
x 900 and this model can display up to 16.7 millions colors.
Features
Applications
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Workstation & desktop monitors
Display terminals for AV application products
Monitors for industrial machine
* If the module is used to other applications besides the above, please contact SEC
in advance.
General Information
Items Specification Unit Note
Pixel Pitch 0.2768(H) x 0.2768(W) mm
Active Display Area 442.8(H) x 249.075(V) mm
Surface Treatment Hard-coating (3H), Haze 44%
Display Colors 16.7M ( 6bit Hi-FRC ) colors
Number of Pixels 1600 x 900 pixel
Pixel Arrangement RGB vertical stripe
Display Mode Normally Black
Luminance of White 250(Typ.) cd/㎡
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If the condition exceeds maximum ratings, it can cause malfunction or unrecoverable
damage to the device.
(39,90)
(50,50.4)
(60,27.7)
(-25,5)
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Fig. Temperature and Relative humidity range
Response Tr - 17 - (5)
On/Off msec
Time Tf - 8 - RD-80S
Rx 0.640
Red
Ry 0.330
Gx Normal 0.300
Green θL,R=0
Color Gy 0.600
θU,D=0
Chromaticity -0.030 +0.030
(CIE 1931) Bx 0.150
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Blue
White
By
Wx
Viewing
Angle 0.070
0.313
Wy 0.329 (7),(8)
Gu' - 0.125 -
Color Green
Chromaticity Gv' - 0.563 -
(CIE 1976) Bu' - 0.169 -
Blue
Bv' - 0.178 -
Wu' - 0.198 -
White
Wv' - 0.468 -
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Single lamp current : 6.5mA
Environment condition : Ta = 25 ± 2 °C
Photo detector
Photo detector Field
SR-3 1°
Field
SR-3 : 50㎝
6 5 4 450
3 2 1
810
: Test Point
G max
CR =
G min
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Gmax : Luminance with all pixels white
Gmin : Luminance with all pixels black
( B max− B min)
Buni = 100 ×
B max
Display Data Black (TFT OFF) White (TFT ON) Black (TFT OFF)
TR TF
100%
90%
Optical
Response
10%
0%
Time
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Note (7) Definition of Color Chromaticity (CIE 1931, CIE1976)
Color coordinate of Red, Green, Blue & White at center point⑤
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c. Test method
-1st gray step : move a square of 255 gray level should be moved into the center of the
screen and measure luminance and u’ and v’ coordinates.
- Next gray step : Move a 225 gray square into the center and measure both
luminance and coordinates, too.
d. Test evaluation
Where A, B : 2 gray levels found to have the largest color differences between them
i.e. get the largest Δu’ and Δv’ of each 6 pair of u’ and v’ and calculate the Δu’v’.
Power
Supply
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Current of
(a) Black
(b) White
(c) Dot
IDD
-
-
800
1000
1400
-
1700
mA
mA
mA
(5),(6)
Vsync Frequency fV 50 60 75 Hz
Note (1) The ripple voltage should be controlled under 10% of VDD.
Note a.
Note b.
(3) LVDS Receiver DC parameters are measured under static and steady conditions
which may not be reflective of its performance in the end application.
LVDS Data
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Differential
RX +/-
tSKEW
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100%
90%
VDD
10%
GND
TRUSH=470㎲
Rush Current IRUSH can be measured when TRUSH. is 470㎲.
The back light unit is an edge - lighting type with 2 dual CCFTs ( Cold Cathode
Fluorescent Tube ) The characteristics of two dual lamps are shown in the following tables.
Ta=25 ± 2°C
0℃ : 1,700
Startup Voltage Vs - - Vrms (6)
25℃: 1,400
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Note (1) Specified values are for a single lamp.
Lamp current is measured with current meter for high frequency as shown below.
Refer to the following block diagram of the back light unit for more information.
HOT (Red)
COLD (WHITE) I1
HOT (BLUE) A
COLD (GRAY) I2
A INVERTER
LCD Module HOT (Red)
(SK1700)
COLD (WHITE) I3
HOT (BLUE) A
COLD (GRAY) I4
A
(2) Lamp frequency which may produce interference with horizontal synchronous
frequency may cause line flow on the display. Therefore lamp frequency should be
detached from the horizontal synchronous frequency and its harmonics as far as
possible in order to avoid interference.
(3) Life time (Hr) is defined as the time when brightness of a lamp unit itself becomes
50% or less than its original value at the condition of Ta = 25±2°C and IL = 6.5mArms
(4) Designing a system inverter intended to have better display performance, power
efficiency and lamp reliability.
They would help increase the lamp lifetime and reduce leakage current.
a. The measurement should be done at typical lamp current.
b. The asymmetry rate of the inverter waveform should be less than 10%.
c. The distortion rate of the waveform should be √2 with ±10% tolerance.
- Inverter output waveform had better be more similar to ideal sine wave.
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Asymmetry rate
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Irms
× 100
Distortion rate
I-p
Ip I -p
| | or | |
Irms Irms
Fig. Wave form of the inverter
(5) If an inverter has shutdown function, it should keep its output for over 1 second
even if the lamp connector is open. Otherwise the lamps may not be turned on.
RSDS
LVDS S1 S1600
pair #1 Control signal
RSDS(Tx)
LVDS (Rx)
LVDS
pair #2
CN1
(30pin) TFT-LCD
(1600 x RGB x 900 pixels)
Timing Controller
+5.0V
VDD Power
Circuit
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4.2 Back Light Unit
Yeonho 35001H5-02L or Compatible
HOT (RED)
LAMP(CCEL) 1
2 COLD (WHITE)
1 HOT (RED)
LAMP(CCEL) COLD (WHITE)
2
3 HOT (BLUE)
LAMP(CCEL) COLD (GRAY)
4
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15 RXE1- Negative Transmission Data of Pixel 1 (EVEN data)
16 RXE1+ Positive Transmission Data of Pixel 1 (EVEN data)
17 GND Power Ground
18 RXE2- Negative Transmission Data of Pixel 2 (EVEN data)
19 RXE2+ Positive Transmission Data of Pixel 2 (EVEN data)
20 RXEC- Negative Sampling Clock (EVEN data)
21 RXEC+ Positive Sampling Clock (EVEN data)
22 RXE3- Negative Transmission Data of Pixel 3 (EVEN data)
23 RXE3+ Positive Transmission Data of Pixel 3 (EVEN data)
24 GND Power Ground
25 NC * CE (For LCD internal use only. Do not connect)
26 NC * CTL (For LCD internal use only. Do not connect)
27 NC No Connection
28 VDD
29 VDD Power Supply : +5V
30 VDD
* If the system already uses the 25, 26pins, it should keep under GND level
The voltage applied to those pins should not exceed -200mV.
PCB
▼
▼
#1 #30
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a. All GND pins should be connected together and also be connected to the
LCD’s metal chassis.
b. All power input pins should be connected together.
c. All NC pins should be separated from other signal or power.
8
10
11
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TXIN10
TXIN11
TXIN12
GO6
GO7
GO3
Green Odd Pixel Data
Green Odd Pixel Data (MSB)
Green Odd Pixel Data
TXOUT3-
TXOUT3+
No. 10
No. 11
RXO3-
RXO3+
To LTM200KP01
Device Input Pin Device Input Signal Output Interface ( CN1 )
Signal
No Symbol Symbol Function Terminal Symbol
10
11
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TXIN10
TXIN11
TXIN12
GE6
GE7
GE3
Green Even Pixel Data
94
93
99
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G16
G17
G13
GO6
GO7
GO3
Green Odd Pixel Data
Green Odd Pixel Data (MSB)
Green Odd Pixel Data
A3M
A3P
No. 10
No. 11
RXO3-
RXO3+
To LTM200KP01
Device Input Pin Device Input Signal Output Interface ( CN1 )
Signal
No Symbol Symbol Function Terminal Symbol
84 R20 RE0 Red Even Pixel Data (LSB)
81 R21 RE1 Red Even Pixel Data
A4M No. 12 RXE0-
80 R22 RE2 Red Even Pixel Data
A4P No. 13 RXE0+
79 R23 RE3 Red Even Pixel Data
78 R24 RE4 Red Even Pixel Data
A7M No. 22 RXE3-
75 R27 RE7 Red Even Pixel Data (MSB)
A7P No. 23 RXE3+
77 R25 RE5 Red Even Pixel Data A4M No. 12 RXE0-
74 G20 GE0 Green Even Pixel Data (LSB) A4P No. 13 RXE0+
66
65
71
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G26
G27
G23
GE6
GE7
GE3
Green Even Pixel Data
Green Even Pixel Data (MSB)
Green Even Pixel Data
A7M
A7P
No. 22
No. 23
RXE3-
RXE3+
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BLACK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
BLUE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 -
GREEN 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 -
CYAN 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
BASIC
COLO RED 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
R
MAGENT
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 -
A
YELLOW 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 -
WHITE 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
BLACK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1
DARK 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R2
GRAY ↑
SCALE : : : : : : : : : : : : : : : : : : R3~
OF : : : : : : : : : : : : : : : : : : R252
RED ↓
LIGHT 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R253
RED
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BLACK
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R254
R255
G0
G1
DARK 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G2
GRAY
↑
SCALE : : : : : : : : : : : : : : : : : :
G3~
OF
: : : : : : : : : : : : : : : : : : G252
GREE
↓
N
LIGHT 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 G253
0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 G254
GREEN 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 G255
BLACK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 B1
DARK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 B2
GRAY ↑
SCALE : : : : : : : : : : : : : : : : : : B3~
OF : : : : : : : : : : : : : : : : : : B252
BLUE ↓
LIGHT 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 B253
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 B254
BLUE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B255
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Note (1) This product is DE only mode. The input of Hsync & Vsync signal does
not have an effect on normal operation.
(2) Test Point : TTL control signal and CLK at LVDS Tx input terminal in system
(3) Internal Vcc = 3.3V
TV
TVD TVB
DE
TH
THD
DE
DCLK
TC
DATA
SIGNALS
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TCH TCL
DCLK 0.5
VCC
TDS TDH
DISPLAY 0.5
DATA
VCC
TES
DE 0.5
VCC
㎲≤T1≤
300㎲ ≤10msec
≤T2≤
0≤ ≤50msec
≤T3≤
0≤ ≤50msec
≤T4
1sec≤
Back-Light
(Recommended)
500msec≤≤T5
100msec≤≤T6
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T1 : VDD rising time from 10% to 90%
T2 : The time from VDD to valid data at power ON.
T3 : The time from valid data off to VDD off at power Off.
T4 : VDD off time for Windows restart
T5 : The time from valid data to B/L enable at power ON.
T6 : The time from valid data off to B/L disable at power Off.
The supply voltage of the external system for the Module input should be the same
as the definition of VDD.
Apply the lamp voltage within the LCD operation range. When the back light turns on
before the LCD operation or the LCD turns off before the back light turns off,
the display may momentarily show abnormal screen.
In case of VDD = off level,
please keep the level of input signals low or keep a high impedance.
T4 should be measured after the Module has been fully discharged between power off
and on period.
Interface signal should not be kept at high impedance when the power is on.
VDD Td
90%
80% VCC
GND
Note
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(1) The above conditions are for the glitch of the input voltage.
(2) For stable operation of an LCD Module power, please follow them.
i.e., if typ VDD x 80% ≤ Vcc ≤ typ VDD x 90%, then Td should be less than 20ms.
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8.1 Handling
(a) When the module is assembled, it should be attached to the system firmly
using all mounting holes. Be careful not to twist and bend the module.
(b) Because the inverter uses high voltages, it should be disconnected from power
source before it is assembled or disassembled.
(c) Refrain from strong mechanical shock and / or any force to the module.
In addition to damage, it may cause improper operation or damage to the module
and CCFT back light.
(d) Note that polarizer films are very fragile and could be damaged easily.
Do not press or scratch the surface harder than a HB pencil lead.
(e) Wipe off water droplets or oil immediately. If you leave the droplets for a long
time, staining or discoloration may occur.
(f) If the surface of the polarizer is dirty, clean it using absorbent cotton or soft cloth.
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reaction.
(h) If the liquid crystal material leaks from the panel, it should be kept away
from the eyes or mouth . In case of contact with hands, legs or clothes, it must
be washed away with soap thoroughly.
(i) Protect the Module from static, or the CMOS Gate Array IC would be damaged.
(j) Use finger-stalls with soft gloves in order to keep display clean during the
incoming inspection and assembly process.
(n) Protection film for polarizer on the Module should be slowly peeled off just before use
so that the electrostatic charge can be minimized.
(o) Pins of I/F connector should not be touched directly with bare hands.
(a) Do not leave the Module in high temperature, and high humidity for a long time.
It is highly recommended to store the Module with temperature from 0 to 35℃
and relative humidity of less than 70%.
(c) The Module should be stored in a dark place. It is prohibited to apply sunlight or
fluorescent light in storing.
8.3 Operation
(a) Do not connect or disconnect the Module in the "Power On" condition.
(b) Power supply should always be turned on/off by the item 6.3
"Power on/off sequence"
(c) Module has high frequency circuits. Sufficient suppression to the electromagnetic
interference should be done by system manufacturers. Grounding and shielding
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methods may be important to minimize the interference.
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(d) The cable between the back light connector and its inverter power supply should
be connected directly with a minimized length. A longer cable between
the back light and the inverter may cause lower luminance of lamp(CCFT) and
may require higher startup voltage(Vs).
(b) If the product will be used in extreme conditions such as high temperature,
humidity, display patterns or operation time etc.., It is strongly recommended
to contact SEC for Application engineering advice. Otherwise, its reliability and
function may not be guaranteed. Extreme conditions are commonly found at
Airports, Transit Stations, Banks, Stock market, and Controlling systems.
8.5 Others
(c) Do not exceed the absolute maximum rating value. ( supply voltage variation,
input voltage variation, variation in part contents and environmental temperature,
and so on)
Otherwise the Module may be damaged.
(d) If the Module keeps displaying the same pattern for a long period of time,
the image may be "stuck" to the screen.
To avoid image sticking, it is recommended to use a screen saver.
(e) This Module has its circuitry PCB's on the rear side and should be handled
carefully in order not to be stressed.
(f) Please contact SEC in advance when you display the same pattern for a long time.
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