B.E. (Information Technology) Third Semester (C.B.S.
)
Digital Electronics & Fundamentals of Microprocessor
P. Pages : 2 NJR/KS/18/4385
Time : Three Hours *0118* Max. Marks : 80
_____________________________________________________________________
Notes : 1. All questions carry marks as indicated.
2. Solve Question 1 OR Questions No. 2.
3. Solve Question 3 OR Questions No. 4.
4. Solve Question 5 OR Questions No. 6.
5. Solve Question 7 OR Questions No. 8.
6. Solve Question 9 OR Questions No. 10.
7. Solve Question 11 OR Questions No. 12.
8. Due credit will be given to neatness and adequate dimensions.
9. Illustrate your answers whenever necessary with the help of neat sketches.
10. Use of non programmable calculator is permitted.
1. a) Perform the following operations. 8
i) (ABCD EF)H (?)10
ii) (10110110)B (?)G
iii) (796 54)10 (?)BCD
iv) (4793 98)10 (?)2
b) Simplify the following using Demorgan's Law 6
i) F(x, y, z) xyz xy yz
ii) F(x, y, z) x y z (xy zx)
OR
2. a) Design 3 bit gray to binary code converter. 8
b) Realise basic gates by using universal gates. 6
3. a) For the function f (A, B, C, D) AB AC C AD ABC ABC . Express in canonical 6
sop form and minimize the given function using k-map.
b) Minimise the following logic function using k-map and realize using only NOR gates. 7
f (A, B,C, D) M(1, 4,6,9,10,11,14,15)
OR
4. a) Simplify the following logic functions using k-map. 8
i) f (A, B,C, D) m(1,3,5,8,9,11,15) d (2,13)
ii) f (A, B,C, D) M(1, 2,3,8,9,10,11,14) d (7,15)
b) Explain min and max terms of a function. Express the given function in forms of min and 5
max terms.
y (A, B, C, D) ABCD ABCD ABCD AB CD ABCD ABCD
5. a) Design full adder using two half adder & one OR gate. 7
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b) Realise the following functions using 3 : 8 decoder and suitable gates 6
F1(A, B, C) m (0, 2, 4, 7) and
F2 (A, B, C) m (1, 2,5, 6) .
OR
6. a) Implement the following function using 8 : 1 MUX select A,B,C as select lines. 7
F(A, B,C, D) m(0, 2,3,5,7,9,11,14,15)
b) Design a 4 - line to 2 - line priority encoder. Include an output E to indicate that at least 6
one input is a 1.
7. a) Explain race around condition in JK flip flop. How is it eliminated using master slave JK 8
flip flop? Explain in brief.
b) Differentiate between combinational circuits and sequential circuits. 5
OR
8. a) Convert the following 6
i) JK Flip Flop to SR Flip Flop
ii) D Flip Flop to JK Flip Flop
b) Design a synchronous 3 bit gray code counter using JK flip flops for the following 7
sequence.
S0 S1 S3 S2 S6 S7 S5 S4
9. a) Draw and explain the architecture of 8085 microprocessor in detail. 9
b) Explain different addressing modes of 8085 microprocessor. 5
OR
10. a) Explain the following instructions. 8
i) LXI H, 1000 H
ii) ACI data
iii) SUB M
iv) PUSH B
b) Explain the following pins in 8085 microprocessor. 6
i) HLDA
ii) TRAP
iii) READY
11. a) Write a program for an 8085 to complement the bytes stored in memory locations 0F00H 6
through 0FFFH and store them in locations starting from 1F00H.
b) Draw & explain interrupt structure of 8085 microprocessor in detail. 7
OR
12. a) Write a program to find the smallest element in a block of 8-byte of data. 7
b) Draw and explain timing diagram of LHLD 0A22H. 6
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