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PWM Inverter Dead-Time Solutions

This document describes the analysis of dead-time effects in three-phase PWM inverters. Dead-time is inserted between switching signals to prevent short circuits, but it causes distortions to the output voltage. During dead-time, the output voltage deviates from the reference voltage in a way that opposes the load current direction. This can cause the current to decrease to zero during dead-time, resulting in a loss of voltage control known as zero crossing. Previous compensation methods did not fully address this zero crossing issue. The document proposes a new method to analyze and compensate for both dead-time effects and zero crossing to improve voltage waveform quality in PWM inverters.

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0% found this document useful (0 votes)
127 views6 pages

PWM Inverter Dead-Time Solutions

This document describes the analysis of dead-time effects in three-phase PWM inverters. Dead-time is inserted between switching signals to prevent short circuits, but it causes distortions to the output voltage. During dead-time, the output voltage deviates from the reference voltage in a way that opposes the load current direction. This can cause the current to decrease to zero during dead-time, resulting in a loss of voltage control known as zero crossing. Previous compensation methods did not fully address this zero crossing issue. The document proposes a new method to analyze and compensate for both dead-time effects and zero crossing to improve voltage waveform quality in PWM inverters.

Uploaded by

Cương Phạm
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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The analysis and Compensation of dead-time effects in

three phase PWM inverters


Lazhar BEN-BRAHIM
Faculty of Technology
University Of Qatar
PO Box 2713, Doha, Qatar
email: [email protected]

Abstract The switching lag-time, which as MOSFET, IGBT and others. Therefore, the
prevents the phase shortage of inverter arms, understanding of the dead-time effect is cru-
causes serious distortions of the output voltage cial to the improvement of the performance of
of the inverter. This effect is well known as PWM inverters. Furthermore, in some appli-
dead-time eflect. Several compensation meth- cations such as sensor-less vector control and
ods were proposed to improve the output wave- direct vector control, the inverter output volt-
forms. These proposed approaches did improve ages are needed to calculate the rotor flux an-
the inverter’s output voltage waveforms. The gle. Unfortunately, it is very difficult to measure
improved waveforms however still suffer from the output voltages and requires an additional
the zero-crossing phenomenon. A new approach hardware. The most desirable method to ob-
to overcome the zero current clamping in Voltage- tain the output voltage is to use the reference
f e d PWM inverters is proposed. This paper de- voltage instead. However, the relation between
scribes the analysis of dead-time effect in three the output voltage and the reference voltage is
phases P W M inverters and the proposed scheme. nonlinear due to the dead-time effect [l].Thus
The conventional compensation methods as well unless the dead-time is properly compensated,
as the zero crossing problem are highlighted. The- the reference voltage can not be used instead
oretical analysis and digital simulation were car- of the output voltage. Many approaches were
ried out to verify the analysis and the proposed proposed to overcome the effect of dead time
scheme for dead time compensation. These approaches do not treat the
[2],[3],[4],[5].
zero current clamping problem. It is worth to
note that the zero current crossing phenomenon
1 Introduction
is still not fully understood and not well re-
PWM Inverters are very well used in AC motor solved. This zero crossing distortion is caused
drives and UPS. In inverters, time delay must be by the current ripples and the inadequate con-
inserted in switching signals to prevent a short ventional compensation of the dead-time effect.
circuit in the dc link. Although, this time de- This paper presents a detailed analysis and
lay guarantees safe operation of the inverter, it method of compensations of the dead-time and
causes a serious distortion in the output volt- the zero crossing phenomenon. It proposes a
ages. It results in a momentary loss of control, new method to overcome the zero current cross-
and the output voltage deviates from the ref- ing effect. It is shown that the dead-time effect
erence voltage. Since this is repeated for ev- and the zero crossing compensation depend not
ery switching operation , its effect may become only on the switching frequency but also on the
significant. This is known as the dead-time ef- load power factor and the load current. Simu-
fect. This effect is still apparent even with the lations are carried out using a simplified model
recently developed fast switching devices such of IM drive system.

0-7803-4503-7/98/$10.00 1998 IEEE 792


2 Dead-time effect & Compensa- put through diode D1. As a result, the output
t ion voltage is distorted as illustrated in Fig. 1. The
direction of the load current flow, during the de-
2.1 Effect lay time, determines the output voltage rather
than the control signals. The voltage devia-
tion due to the time delay opposes the current
flow in either direction. As a result, the devia-
tion reduces the current magnitude, regardless
iu iu I
I of the current polarity. However, if the current
I
I is around zero, the current may decrease to zero
during the deadtime (Td). Whenever the cur-
rent reaches zero during the deadtime and stays
at zero level during the rest of the deadtime. If
this occurs, there is no means of controlling the
I
I
output voltage. As will be shown later, this
I . .
I
...
...
...
...
phenomena zero crossing is difficult to avoid by
I . .
I the conventional techniques of compensation.
I .
,
.
.
I . . , .

L _ _ _ _ _ _yn J
Relation between voltage sign and output voltage

Figure 1: Deadtime effect in PWM inverters -


A 2A
- 4rr
- -
5A
3 3 3 3 27r
phase
Fig. 1 shows the leg of one phase of the
Figure 2: Deadtime effect
PWM inverter, where power transistors are used
as switching devices. To turn off transistor X,
The deviation voltage caused by the dead-
U should be off and if the turn on speed is faster time is shown in Fig. 1. It is, as illustrated in
than the turn of€ speed, a dc link short-circuit the Figure, a number of pulses with a constant
will occur, therefore a delay time or dead-time
amplitude equal to the dc link voltage Vd, a
(generally with IGBTs a delay in the order of
constant pulse width equal to the delay time
20ps is inserted for safety). This dead-time is
Td and a polarity opposed to the polarity of
inserted by delaying the on signal of the tran- the load current and a frequency equal to the
sistors by the delay time Td. During this delay switching frequency of the inverter. Although
time, both transistors cease to conduct, and the
this dead-time is very short, its accumulated er-
output terminal seems to be floating. However, ror causes considerable distortions in the output
due to the inductive load, the output current i is waveforms (see Fig. 2)
continuous, the current then flows through the
freewheeling diodes D2 when the current is pos-
itive and the negative dc voltage is connected to
the output. If the current is negative, flowing
toward the inverter, The positive voltage is out-

0-7803-4503-7/98/$10.00 I998 IEEE 793


quency of the inverter. Therefore, np is ex-
\... ; I
......... .....................................................
I
pressed by the relation
1

&A.&&
\\ *
;
;....................
......i.................. .................
fc

7
:

np =
where fc is the carrier or switching frequency
and f is the operating frequency of the inverter.
The average deviation voltage height AV, caused
by the cumulative of the deadtime pulses, is
I I I I I I given by
-
7r
-
2 * 7 r T T -577
3 3 3 3 27r
phase

Figure 3: Deadtime Compensation

2.2 Compensation
Eq. 2 shows that the deviation increases with
To analyse the distortion caused by the dead- the increase of the switching frequency fc. Al-
time, we assume the followings: though Eq. 2 shows that the dead-time dis-
tortion is independent of the inverter output
1. The turn-off time of the switching device
frequency and voltage, it is worth to note that
is neglected.
this distortion becomes significant at low speed
2. The switching frequency is bigger than the when the inverter frequency f is low and the
fundament a1 frequency. fundamental output voltage is also low. This
average deviation AV which is added to the
3. Current ripples are neglected
reference voltage to calculate the new reference
Under the above assumptions, the dead-time voltage applied to the inverter (see Fig. 3):
effect can be analysed quantitatively. These as-
sumptions will facilitate the understanding of v: = v* + A V (3)

-
the compensation techniques.
INVERTER
This equation is used to derive the conventional
compensation method shown in Fig. 4. This
approach is widely used in industrial PWM in-
AC/DC verters to compensate for the dead-time effect.
canverte
It is based on Eq. (3) and Fig. 3. For simplic-
ity, this concept uses the current reference to
compensate for the dead-time effect. The com-
pensation signals in uvw-axis as well as dq-axis
are shown in Fig. 5 . These signals were mod-
ified so that the inserted deadtime compensa-
tion voltages will keep the three phase output
voltages of the PWM inverter balanced. Note
that d-current and the q-current compensation
signals are different. The current reference po-
I larity is used instead of the actual current po-
larity. This technique of compensation is valid
under the assumption 3. However, in most prac-
Figure 4: Conventional compensation method tical case and especially for high power drive
systems, the current has significant ripples and
The number of pulses, np,per period caused
this will affect the compensation around the
by the dead-time depends on the switching fre-

0-7803-4503-7/98/$10.00 1998 IEEE 794


~

zero-crossing zone of the current. The pres- dead-time compensation. The bandwidth of this
ence of significant ripples around zero-zone will smooth curve is defined as a function of current
lead to several zero-crossing of the actual cur- ripples. If PWM inverter current ripples are
rent and with each zero-clamping the current large, then the "hysteresis" is large. The curve
polarity changes. This makes the conventional inside is selected by cut and try error. This
compensation method umproper as it is using method has improved the current distortion at
the reference current polarity to cancel the ef- the zero current clamping area in the voltage-
fect of the dead-time. The conventional com- fed PWM inverter.
pensation described so far performs well when
current ripples axe very small.

Im ............ j..... .....I........................... .....) ................................ j ....


iu ........ ................................................... ......... ......................................
.j ................................
i, 0
........................ i..................... i ....................... .j...................... j ........................ j...................
2,
-I m ..'................ ..........,... ...*........................... $ . . . . . . . . ......................
~

........................................................................ I I I
~ ...................-
I
.................................. ...........................................
........................................................................................................... :....................... ..: ........................
Avu 0
................ ...........................
....................... .................... ........................... ........................ Figure 6: Proposed method of compensation

AV ............... .......................
........................... ........................
4 Simulations
Y "
............... ........................ .................... i........................
-AV .............................................. .....
........................ :....................................................... ........................... i ......................... ...................
;

INVERTER

............ .......................... eu e, e,
........................
Avw 0
n
........................ ..........................
: i........................... i ........................... : ...........................

........................ .......................... ........................... Figure 7: Simulation model


........................ i.......................... ...........................
i i ........................... ...........................
i ........................
i

Simulations were carried out to verify the


proposed method. 7 shows the scheme used
Figure 5: Conventional compensation signals for simulation, where the IM is modeled as an
R-L networks and a back-emf. Fig. 8 shows
the simulation model results without dead-time
3 Proposed method for dead-time compensation. It is worth to note here the sim-
& zero crossing effect compen- ilarity between the distorted (Id and I4)current
sat ion waveforms in Fig. 8 and Fig. 5. Fig. 9 de-
picted the current waveforms using the conven-
The proposed method is shown in 6. This Fig- tional compensation method. In this Figure the
ure shows that the dead-time compensation is zero-crossing phenomenon is apparent. Fig. 10
similar to the conventional method except for shows the proposed method for compensation
the zero-crossing;. Close to the zero-zone we of both the dead-time and the zero-crossing ef-
use a kind of "sniooth hysteresis" curve for the fects. This shows that the proposed method

0-7803-4503-7/98/$10.00 1998 IEEE 795


improves the current waveforms by eliminating tion Motor Drive system”, IECON’98 (to
the effect caused by the dead-time. The current be published), August 1998.
harmonics are greatly reduced as illustrated in
Figure Fig. 11.
[a] Y. Murai, T. Watanabe and H. Iwasaki
”Waveform distortion and correction cir-
cuit for PWM inverters with switching lag-
times”, IEEE, Trans. on Industy Applica-
tions, vol. 23, No. 5 pp. 881-886, Septem-
ber/October 1987.
[3] T. Sukegawa et all. ”Fully digital vector
controlled PWM VSI-FED AC drives with
an inverter dead-time compensation strat-
1 egy”, IEEE, IAS’88 Annual Meeting pp.
-15 I I I I I

0 0.02 0.04 0.06 0.08 0.1 463-469, 1988.


12 r I I I I [4] S.G. Joeong and M.H. Park, ”The analy-
sis and compensation of dead-time effects
in PWM inverters”, IEEE, Trans. on Ind.
Electron., vol. 38, No. 2 pp. 108-114, 1991.
[5] J.W. Choi and S.K. Sul ”Inverter out-
put voltage synthesis using novel dead-time
compensation”, IEEE, Trans. on Power
0 0.02 0.04 0.06 0.08 0.1 Electronics, vol. 11, No. 2 pp. 221-227,
time (sec)
March 1996.

Figure 8: No compensation simulation


15 I I I I
I
5 Conclusions
The PWM inverters dead time analysis and ef-
fect were analysed. Conventional compensation
methods as well as the zero crossing phenomena
were highlighted. A proposed method for dead- I
time and zero current clamping compensation
-15 I I I I I

0 0.02 0.04 0.06 0.08 0.1


was described in this paper. The elimination of time (sec)
the zero current clamping effect in a voltage-fed 12 I I I I I I
PWM inverter was achieved. Theoretical anal-
ysis and digital simulation were carried out to ................. ........................ ........................ ....................... .....................

verify the analysis and the proposed scheme for ..................... ..................... j....................... j ....................... ....................

dead time compensation. The simulation has Iq 4 ..................... ...................... ............................................ ....................

shown that the current waveforms ‘output by .................-j..................... j ...................i.................... ;j ............ ..-I
the inverters were greatly improved.
0 0.02 0.04 0.06 0.08 0.1
time (sec)
References
[l]L. Ben-Brahim and S. Tadakuma, ” Prac- Figure 9: Conventional compensation simulation
tical Considerations for Sensorless Induc-

0-7803-4503-7/98/$10.00 1998 IEEE 796


3 .I I. I. I.. I. I I I I
:
:.
.
:.
..
i.:
..
.
i:
..
fa) n</ codpens&& / / ;
............ .. . . . .. . .................... ..
. .
2.5 . . . . . .
"
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1 ...
j
..
..
.
./..
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../.
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.
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../
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/.
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2 ............ ........I........
... L.
.:. .:..
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.................................
....................................
(.
... ...................................
.)
... *. .
..
.: :
. :
. :
. :
. :
:. :. :. :. :.
:
.. :
.. .. .. ... ... .... :
....
............................................. . . . . . . .
1.5 .. .. ................................
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~

.. ..................... ............. ....


" ~

.. .. .. ... ... ... ... ...


.. . . . . .. .. . .
............................... ......................... ..* .....~................... ... .................. ....
/ / / : / : / /
1 .. . . .. . :
. :
.
?.."
:
. :
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.. .. .. .. .. ... ... ...
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- ..:. .:. . -
i : : : : ; . :

0.5 ...........................................
.... ... .. . . . . . . ..
..
.. ... ... ... ... ... ... ....
. .. . . . . . . . ... . .... ...
11. -1. - I l - . . P

-15 I I I I
1
0 0.02 0.04 0.06 0.08 0.1
12 0.8

.................... ....................... ............... ................... ........... ...- 0.6


................... ....................... ....................... ....................... ................._
0.4
................. ........................ ............................................... .... ..............._

.................... ........................ i...................... i...................... i..................... 0.2

-*
0 0.02 0.04 0.06 0.08 0.1 I
time (sec)
0.8
Figure 10: Proposed compensation simulation
0.6

0.4

0.2

Figure 11: FFT analysis of current waveforms with


(a) no deadtime compensation
(b) conventional method
(c) proposed method

0-7803-4503-7/98,'$10.00 1998 IEEE 797

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