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Acer Travelmate p214 - Daz8iambaco - Z8ia-Zaia Z8i

This block diagram shows the key components and connections of the TigerLake-UP3 chipset. It includes CPU cores, integrated graphics, memory controllers supporting DDR4 RAM, I/O controllers with interfaces for PCIe, SATA, USB, display, and wireless connectivity. The diagram also outlines optional components like cameras, biometric sensors, and storage interfaces that can be included on boards using this chipset.

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Sonel Smith
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0% found this document useful (0 votes)
1K views62 pages

Acer Travelmate p214 - Daz8iambaco - Z8ia-Zaia Z8i

This block diagram shows the key components and connections of the TigerLake-UP3 chipset. It includes CPU cores, integrated graphics, memory controllers supporting DDR4 RAM, I/O controllers with interfaces for PCIe, SATA, USB, display, and wireless connectivity. The diagram also outlines optional components like cameras, biometric sensors, and storage interfaces that can be included on boards using this chipset.

Uploaded by

Sonel Smith
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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5 4 3 2 1

Z8IA(Timapni_TL)/ZAIA (BassDrum_TL) TigerLake-UP3 Block Diagram (DIS/UMA ) 01

TGL-UP3 (4+2) PCIE 1~4


D DDR4 1866/2133/2400 MT/s PCI-e GPU VRAM P23 D

DDR N17S-G0(MX230) GDDR5 x32*2pcs


N17S-G3(MX330)
DDR4-SoDIMM DDR4-SoDIMM 27MHz
P19-22
CH. B P18 CH. A P17

SATA HDMI 2.0 HDMI


SATA0 TCP2 re-driver
PS8409 P27 P27
Re-Driver PCIe-SSD
SATA - HDD SN75LVCP601RTJR
P31 P31 P32
DP to DSUB CRT
PCIE 5~8 DDIB RTD2166
PCI-e P38 P38
USB 3.0
PCIE 9 PCIE 10 USB3 4 USB3 2 USB3 1 DDI2, Type C
DDIA
LCD Panel
LAN Wifi / BT UB3/DB Port4 UB3/MB Port2 UB3/MB Port1 P25
25MHz RTK8111K/Intel LAN IC
P28 P32 P45 P24 P24

Battery
RJ45 P50
C C
P28
P25
TouchSceen (Reserve) Integrated PCH-LP
USB2.0 HUB GL850G P39
P40 (Option)
Smart Card (Option) 32.768kHz
USB2 2 USB2 10 USB2 6 USB2 8 USB2 4
USB 2.0
USB2 7 USB2 5 USB2 3 USB2 1 USB2 9
(Option)
(option)

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IR Camera Card Reader USB 3 D/B e-SPI Interface
(Option) P25 CCD LTE RTS5170
P25 (Option) P45 P44 P45 TouchPAD
FAN P29
Click button
Spin Side Key Viki P29
Finger Print Finger Print DMIC RS232 D/B
P30 P25 Keyboard Backlight P29
(Reserve for SPIN) P30 e-SIM
Viki P45 Embedded Controller
SIM Slot
(Option) (Option) I2C Touch Pad P29
IT5571
K/B transer
Keyboard 14" or 15" P29 D/B
Audio Codec
Viki Speaker P26 ALC255-CG
HDA G-sensor/ Viki P29
Sensor HUB P41
P2 Speaker P26 P26 P33 Hall Sensor P45
(Reserve for SPIN)
B B

Type-C CC+PD Intel Burn-side TCP1


SPI NFC GMR P42 Extension IO P34
P29
CYPD5126 P29 (Reserve for SPIN)
(Option) P43 (Reserve for SPIN)

Thermal IC P46
Power solution Type-C Conn
P37 P30
Batery Charger SPI ROM d-TPM
P16
BQ24780SRUYRP50 NPCT750AABYX
Daughter Board
+3VPCU +5VPCU +VCCIN +VGPU_COREP56
SKU remind
RT6256BGQUF P51 RT6258CGQUF P51 RT3612EBGQW P53 RT8813DGQW GMR sensor/B Spin side key/B PCB 8L STACK UP
(Reserve for SPIN) P42
1)LTE SKU notice
(Reserve for SPIN) P30 LAYER 1 : TOP
+3V/+3V_S5 +5V/+5V_S5 +VCCIN_AUX +1.35V_GFX +1.03_GFX a.LTE SKU without HDD (14” & 15”)
AOZ1331ADI P51 AOZ1331ADI P51 RT6543AGQW P54 G5335QT2U P57 G9336ADJTP1U P58
LAYER 2 : SGND b.LTE SKU without IR CCD (14” & 15)
LTE/B USB3/B LAYER 3 : IN1 c.LTE SKU without Touch Panel (14”)
LAYER 4 : SVCC 2)HDD/SSD/TSN didn't BOM Option. Others OPTION/D.R by tender requirement?
P45 P45
LAYER 5 : IN2
+1.2VSUS/+VDDQ_VTT/+VDDQ +1.8V_S5 3)M.S or S3. MB ID decision system support no follow to Storage Config.
A RT8231BGQW P52 JW5213DFND_TRPBF P55
LAYER 6 : IN3 A
RS232 D/B LAYER 7 : SGND a.SSD + HDD
b.SSD only
Viki P45 LAYER 8 : IN4 c.HDD only
+1.2V +1.8V +1V8_AON/+1V8_GFX_MAIN
AOSS32334C P52 AOSS32334C P55 JW7110DFNC P58
LAYER 9 : SGND
K/B transer D/B TouchPAD LAYER 10 : BOT
Click button
Viki P29 Viki P29 Quanta Computer Inc.
+2.5V_SUS +1.5V +VCCSTG/+VCCST
G5719CTB1U P52 JW5222RSOTB_TRPBFP55 EMF11N02J P47 PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
Intel Block Diagram
Date: Tuesday, October 06, 2020 Sheet 1 of 62
5 4 3 2 1
5 4 3 2 1

02
D U6539A D

AC2 AY2
DDIA_TXP_3 TCP0_TXRX_P1 TCP0_TXRX_P1 [35]
AC1 AY1
DDIA_TXN_3 TCP0_TXRX_N1 TCP0_TXRX_N1 [35]
AD2 BB1
DDIA_TXP_2 TCP0_TXRX_P0 TCP0_TXRX_P0 [35]
AD1 BB2
AF1 DDIA_TXN_2 DP:C/TCP0 TCP0_TXRX_N0 AM5
TCP0_TXRX_N0 [35]
[25] INT_eDP_TXP1
AF2 DDIA_TXP_1 DP:A TCP0_TX_P1 AM7
TCP0_TX_P1 [35] TCP0 (TypeC)
eDP [25]
[25]
INT_eDP_TXN1
INT_eDP_TXP0
AG2 DDIA_TXN_1 TCP0_TX_N1 AT7
TCP0_TX_N1 [35]
TCP0_TX_P0 [35]
AG1 DDIA_TXP_0 TCP0_TX_P0 AT5
[25] INT_eDP_TXN0 DDIA_TXN_0 TCP0_TX_N0 TCP0_TX_N0 [35]
AP7
TCP0_AUX_P TCP0_AUX_DP [35]
AJ2 AP5
[25] INT_eDP_AUXP DDIA_AUX_P TCP0_AUX TCP0_AUX_DN [35]
AJ1
[25] INT_eDP_AUXN DDIA_AUX AT2
DN4 TCP1_TXRX_P1 AT1
TP13352 DT6 GPP_E22/DDPA_CTRLCLK/DNX_FORCE_RELOAD TCP1_TXRX_N1 AU1
TP13353 GPP_E23/DDPA_CTRLDATA TCP1_TXRX_P0 AU2
DR5 TCP1_TXRX_N0 AD5
[25] ULT_EDP_HPD GPP_E14/DDSP_HPDA/DISP_MISCA DP:D/TCP1 TCP1_TX_P1 AD7
R68243 100K_1%_2 T12 TCP1_TX_N1 AH7
T11 DDIB_TXP_3 TCP1_TX_P0 AH5
Y11 DDIB_TXN_3 TCP1_TX_N0 AF7
Y9 DDIB_TXP_2 TCP1_AUX_P AF5
T9 DDIB_TXN_2 TCP1_AUX
[38] DP_D1P P9 DDIB_TXP_1 BF1
[38] DP_D1N V11 DDIB_TXN_1 DP:B TCP2_TXRX_P1 BF2
HDMI_TXCP [27]
DP to DSUB [38] DP_D0P V9 DDIB_TXP_0 TCP2_TXRX_N1 BE2
HDMI_TXCN [27]
[38] DP_D0N DDIB_TXN_0 TCP2_TXRX_P0 BE1
HDMI_TXDP1 [27]
HDMI_TXDN1 [27]
TCP2 ( HDMI )
C AB9 TCP2_TXRX_N0 BD7 C
[38] DP_AUXP
AD9 DDIB_AUX_P DP:E/TCP2 TCP2_TX_P1 BD5
HDMI_TXDP0 [27]
HDMI_TXDN0 [27]
[38] DP_AUXN DDIB_AUX TCP2_TX_N1 AY5
TCP2_TX_P0 HDMI_TXDP2 [27]
DM29 AY7
TP13238 GPP_H16/DDPB_CTRLCLK/PCIE_LNK_DOW N TCP2_TX_N0 HDMI_TXDN2 [27]
DK27 BB5
TP13239 GPP_H17/DDPB_CTRLDATA TCP2_AUX_P BB7
DG43 TCP2_AUX
[38] DP_HPD GPP_A18/DDSP_HPDB/DISP_MISCB/I2S4_RXD BK1
R68910 *0_5%_2 DDPC_CLK DG47 TCP3_TXRX_P1 BK2
R68911 *0_5%_2 DDPC_DATA DJ47 GPP_A21/DDPC_CTRLCLK/I2S5_TXD TCP3_TXRX_N1 BJ2
GPP_A22/DDPC_CTRLDATA/I2S5_RXD TCP3_TXRX_P0 BJ1
[35] TBT_LSX0_TXD_Soc
DU8 DP:F/TCP3 TCP3_TXRX_N0 BM7
DV8 GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD TCP3_TX_P1 BM5
TCP0 (TypeC) [15,35] TBT_LSX0_RXD_Soc GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD DP:C/LSx0 TCP3_TX_N1 BH5
TP13392 DF6 TCP3_TX_P0 BH7
GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD TCP3_TX_N0

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DD6 BK5
[15] TBT_LSX1_RXD GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD DP:D/LSx1 TCP3_AUX_P BK7
R68909 *Short_0201 HDMI_DDCCLK_DDP3 DN23 TCP3_AUX
[27] HDMI_DDCCLK GPP_D9/ISH_SPI_CS#/DDP3_CTRLCLK/TBT_LSX2_TXD/GSPI2_CS0#
R68908 *Short_0201 HDMI_DDCDATA_DDP3 DM23 AN2 TCRCOMP_DP
[27] HDMI_DDCDATA GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/TBT_LSX2_RXD/GSPI2_CLK DP:E:/LSx2 TC_RCOMP_P AN1 TCRCOMP_DN R68242 150_1%_2
TP13393 DK23 TC_RCOMP
[15] TBT_LSX2_RXD GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/TBT_LSX3_TXD/GSPI2_MISO
DN21 M8 DSI_DE_TE_2
[15] TBT_LSX3_RXD GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/TBT_LSX3_RXD/GSPI2_MOSI DP:F:/LSx3 DSI_DE_TE_2
DF43 AB1 DP_RCOMP
TP13366 DDSP_HPD1 DF45 GPP_A17/DISP_MISCC/I2S4_TXD DDI_RCOMP
TP13240 TBTB_HPD DF47 GPP_A19/DDSP_HPD1/DISP_MISC1/I2S5_SCLK CE4
GPP_A20/DDSP_HPD2/DISP_MISC2/I2S5_SFRM DISP_UTILS/DSI_DE_TE_1 R68245 R68246
HDMI_HPD_PCH DH52 150_1%_2 100K_1%_2
[27] HDMI_HPD_PCH GPP_A14/USB_OC1#/DDSP_HPD3/I2S3_RXD/DISP_MISC3/DMIC_CLK_B1
USB_OC2# DK45
[45] USB_OC2# GPP_A15/USB_OC2#/DDSP_HPD4/DISP_MISC4/I2S4_SCLK
B DM8 B
[25] PCH_DISP_ON EDP_VDDEN
DN8
[25] PCH_LVDS_BLON EDP_BKLTEN
DG10
[25] PCH_DPST_PWM EDP_BKLTCTL DISP_UTILS
TP13241

TGL_U_IP_EXT/BGA

+3V_DEEP_SUS

R68247 *10K_1%_2 HDMI_HPD_PCH R68227 100K_1%_2

R68248 10K_1%_2 USB_OC2#

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 1/14 (DDI/TBT/eDP)
Date: Tuesday, October 06, 2020 Sheet 2 of 62
5 4 3 2 1
5 4 3 2 1

DDR CHANNEL A

M_A_DQ_07 CP53
U6539B

LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)


DDR4/LP4/LP5/LP5 CMD Flip
TIGER LAKE Processor DDR4/4X
BT42 M_A_CLKP1 [17]
U6539C
DDR CHANNEL B
03
[17] M_A_DQ7 M_A_DQ_06 DDR0_DQ0_7/DDR0_DQ0_7/DDR0_DQ0_7 DDR0_CLK_P1/DDR3_CLK_P/DDR3_CLK_P/DDR3_CLK_P
CP52 BT41 M_A_CLKN1 [17]
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)
[17] M_A_DQ6 M_A_DQ_05 DDR0_DQ0_6/DDR0_DQ0_6/DDR0_DQ0_6 DDR0_CLK_N1/DDR3_CLK_N/DDR3_CLK_N/DDR3_CLK M_B_DQ7
CP50 BP52 AL53 DDR4/LP4/LP5/LP5 CMD Flip R41 M_B_CLKP1 [18]
[17] M_A_DQ5 M_A_DQ_04 DDR0_DQ0_5/DDR0_DQ0_5/DDR0_DQ0_5 NC/DDR2_CLK_P/DDR2_CLK_P/DDR2_CLK_P [18] M_B_DQ7 M_B_DQ6 DDR4_DQ0_7/DDR1_DQ0_7/DDR0_DQ4_7 DDR1_CLK_P1/DDR7_CLK_P/DDR7_CLK_P/DDR7_CLK_P
CP49 BP53 AL52 R42 M_B_CLKN1 [18]
[17] M_A_DQ4 M_A_DQ_03 DDR0_DQ0_4/DDR0_DQ0_4/DDR0_DQ0_4 NC/DDR2_CLK_N/DDR2_CLK_N/DDR2_CLK [18] M_B_DQ6 M_B_DQ5 DDR4_DQ0_6/DDR1_DQ0_6/DDR0_DQ4_6 DDR1_CLK_N1/DDR7_CLK_N/DDR7_CLK_N/DDR7_CLK
CU53 CD42 AL50 M52
[17] M_A_DQ3 M_A_DQ_02 DDR0_DQ0_3/DDR0_DQ0_3/DDR0_DQ0_3 NC/DDR1_CLK_P/DDR1_CLK_P/DDR1_CLK_P [18] M_B_DQ5 M_B_DQ4 DDR4_DQ0_5/DDR1_DQ0_5/DDR0_DQ4_5 NC/DDR6_CLK_P/DDR6_CLK_P/DDR6_CLK_P
CU52 CD41 AL49 M53
[17] M_A_DQ2 M_A_DQ_01 DDR0_DQ0_2/DDR0_DQ0_2/DDR0_DQ0_2 NC/DDR1_CLK_N/DDR1_CLK_N/DDR1_CLK [18] M_B_DQ4 M_B_DQ3 DDR4_DQ0_4/DDR1_DQ0_4/DDR0_DQ4_4 NC/DDR6_CLK_N/DDR6_CLK_N/DDR6_CLK
CU50 CC52 M_A_CLKP0 [17] AP53 AC42
D [17] M_A_DQ1 M_A_DQ_00 DDR0_DQ0_1/DDR0_DQ0_1/DDR0_DQ0_1 DDR0_CLK_P0/DDR0_CLK_P/DDR0_CLK_P/DDR0_CLK_P [18] M_B_DQ3 M_B_DQ2 DDR4_DQ0_3/DDR1_DQ0_3/DDR0_DQ4_3 NC/DDR5_CLK_P/DDR5_CLK_P/DDR5_CLK_P D
CU49 CC53 M_A_CLKN0 [17] AP52 AC41
[17] M_A_DQ0 M_A_DQ_17 DDR0_DQ0_0/DDR0_DQ0_0/DDR0_DQ0_0 DDR0_CLK_N0/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK [18] M_B_DQ2 M_B_DQ1 DDR4_DQ0_2/DDR1_DQ0_2/DDR0_DQ4_2 NC/DDR5_CLK_N/DDR5_CLK_N/DDR5_CLK
CH53 AP50 Y52 M_B_CLKP0 [18]
[17] M_A_DQ15 M_A_DQ_16 DDR0_DQ1_7/DDR0_DQ1_7/DDR0_DQ1_7 DDR4/LP4/LP5/LP5 CMD Flip [18] M_B_DQ1 M_B_DQ0 DDR4_DQ0_1/DDR1_DQ0_1/DDR0_DQ4_1 DDR1_CLK_P0/DDR4_CLK_P/DDR4_CLKP/DDR4_CLK_P
CH52 BT45 AP49 Y53 M_B_CLKN0 [18]
[17] M_A_DQ14 M_A_DQ_15 DDR0_DQ1_6/DDR0_DQ1_6/DDR0_DQ1_6 NC/DDR3_CKE0/DDR3_WCK_P/DDR3_WCK_P [18] M_B_DQ0 M_B_DQ15 DDR4_DQ0_0/DDR1_DQ0_0/DDR0_DQ4_0 DDR1_CLK_N0/DDR4_CLK_N/DDR4_CLK_N/DDR4_CLK
CH50 BT47 AF53
[17] M_A_DQ13 M_A_DQ_14 DDR0_DQ1_5/DDR0_DQ1_5/DDR0_DQ1_5 NC/DDR3_CKE1/DDR3_WCK_N/DDR3_WCK [18] M_B_DQ15 M_B_DQ14 DDR4_DQ1_7/DDR1_DQ1_7/DDR0_DQ5_7
CH49 BN51 AF52 DDR4/LP4/LP5/LP5 CMD Flip R47
[17] M_A_DQ12 M_A_DQ_13 DDR0_DQ1_4/DDR0_DQ1_4/DDR0_DQ1_4 NC/DDR2_CKE0/DDR2_WCK_P/DDR2_WCK_P [18] M_B_DQ14 M_B_DQ13 DDR4_DQ1_6/DDR1_DQ1_6/DDR0_DQ5_6 NC/DDR7_CKE0/DDR7_WCK_P/DDR7_WCK_P
CL53 BN53 AF50 R45
[17] M_A_DQ11 M_A_DQ_12 DDR0_DQ1_3/DDR0_DQ1_3/DDR0_DQ1_3 NC/DDR2_CKE1/DDR2_WCK_N/DDR2_WCK [18] M_B_DQ13 M_B_DQ12 DDR4_DQ1_5/DDR1_DQ1_5/DDR0_DQ5_5 NC/DDR7_CKE1/DDR7_WCK_N/DDR7_WCK
CL52 CD45 AF49 K51
[17] M_A_DQ10 M_A_DQ_11 DDR0_DQ1_2/DDR0_DQ1_2/DDR0_DQ1_2 NC/DDR1_CKE0/DDR1_WCK_P/DDR1_WCK_P [18] M_B_DQ12 M_B_DQ11 DDR4_DQ1_4/DDR1_DQ1_4/DDR0_DQ5_4 NC/DDR6_CKE0/DDR6_WCK_P/DDR6_WCK_P
CL50 CD47 AH53 K53
[17] M_A_DQ9 M_A_DQ_10 DDR0_DQ1_1/DDR0_DQ1_1/DDR0_DQ1_1 NC/DDR1_CKE1/DDR1_WCK_N/DDR1_WCK [18] M_B_DQ11 M_B_DQ10 DDR4_DQ1_3/DDR1_DQ1_3/DDR0_DQ5_3 NC/DDR6_CKE1/DDR6_WCK_N/DDR6_WCK
CL49 CA51 AH52 AC47
[17] M_A_DQ8 M_A_DQ_27 DDR0_DQ1_0/DDR0_DQ1_0/DDR0_DQ1_0 NC/DDR0_CKE0/DDR0_WCK_P/DDR0_WCK_P [18] M_B_DQ10 M_B_DQ9 DDR4_DQ1_2/DDR1_DQ1_2/DDR0_DQ5_2 NC/DDR5_CKE0/DDR5_WCK_P/DDR5_WCK_P
CT47 CA53 AH50 AC45
[17] M_A_DQ23 M_A_DQ_26 DDR1_DQ0_7/DDR0_DQ2_7/DDR1_DQ0_7 NC/DDR0_CKE1/DDR0_WCK_N/DDR0_WCK [18] M_B_DQ9 M_B_DQ8 DDR4_DQ1_1/DDR1_DQ1_1/DDR0_DQ5_1 NC/DDR5_CKE1/DDR5_WCK_N/DDR5_WCK
CV47 AH49 W51
[17] M_A_DQ22 M_A_DQ_25 DDR1_DQ0_6/DDR0_DQ2_6/DDR1_DQ0_6 DDR4/LP4/LP5/LP5 CMD Flip [18] M_B_DQ8 M_B_DQ23 DDR4_DQ1_0/DDR1_DQ1_0/DDR0_DQ5_0 NC/DDR4_CKE0/DDR4_WCK_P/DDR4_WCK_P
CT45 BU52 M_A_CKE1 [17] AR41 W53
[17] M_A_DQ21 M_A_DQ_24 DDR1_DQ0_5/DDR0_DQ2_5/DDR1_DQ0_5 DDR0_CKE1/DDR2_CA4/DDR2_CA5/DDR2_CA1 [18] M_B_DQ23 M_B_DQ22 DDR5_DQ0_7/DDR1_DQ2_7/DDR1_DQ4_7 NC/DDR4_CKE1/DDR4_WCK_N/DDR4_WCK
CV45 BL50 M_A_CKE0 [17] AV42
[17] M_A_DQ20 M_A_DQ_23 DDR1_DQ0_4/DDR0_DQ2_4/DDR1_DQ0_4 DDR0_CKE0/DDR2_CA5/DDR2_CA6/DDR2_CA0 [18] M_B_DQ22 M_B_DQ21 DDR5_DQ0_6/DDR1_DQ2_6/DDR1_DQ4_6
CT42 AR42 DDR4/LP4/LP5/LP5 CMD Flip P52 M_B_CKE1 [18]
[17] M_A_DQ19 M_A_DQ_22 DDR1_DQ0_3/DDR0_DQ2_3/DDR1_DQ0_3 DDR4/LP4/LP5/LP5 CMD Flip [18] M_B_DQ21 M_B_DQ20 DDR5_DQ0_5/DDR1_DQ2_5/DDR1_DQ4_5 DDR1_CKE1/DDR6_CA4/DDR6_CA5/DDR6_CA1
CV42 CF42 M_A_CS#1 [17] AV41 J50 M_B_CKE0 [18]
[17] M_A_DQ18 M_A_DQ_21 DDR1_DQ0_2/DDR0_DQ2_2/DDR1_DQ0_2 DDR0_CS1/DDR1_CA1/DDR1_CA1/DDR1_CA5 [18] M_B_DQ20 M_B_DQ19 DDR5_DQ0_4/DDR1_DQ2_4/DDR1_DQ4_4 DDR1_CKE0/DDR6_CA5/DDR6_CA6/DDR6_CA0
CT41 CF47 M_A_CS#0 [17] AR45
[17] M_A_DQ17 M_A_DQ_20 DDR1_DQ0_1/DDR0_DQ2_1/DDR1_DQ0_1 DDR0_CS0/NC/DDR1_CS1/DDR1_CA4 [18] M_B_DQ19 M_B_DQ18 DDR5_DQ0_3/DDR1_DQ2_3/DDR1_DQ4_3
CV41 AV45 DDR4/LP4/LP5/LP5 CMD Flip AE42 M_B_CS#1 [18]
[17] M_A_DQ16 M_A_DQ_37 DDR1_DQ0_0/DDR0_DQ2_0/DDR1_DQ0_0 DDR4/LP4/LP5/LP5 CMD Flip [18] M_B_DQ18 M_B_DQ17 DDR5_DQ0_2/DDR1_DQ2_2/DDR1_DQ4_2 DDR1_CS1/DDR5_CA1/DDR4_CA1/DDR4_CA5
CK47 CE53 AR47 AE47 M_B_CS#0 [18]
[17] M_A_DQ31 M_A_DQ_36 DDR1_DQ1_7/DDR0_DQ3_7/DDR1_DQ1_7 NC/DDR0_CA0/DDR0_CA0/DDR0_CA6 [18] M_B_DQ17 M_B_DQ16 DDR5_DQ0_1/DDR1_DQ2_1/DDR1_DQ4_1 DDR1_CS0/NC/DDR4_CS1/DDR4_CA4
CM47 CE50 AV47
[17] M_A_DQ30 M_A_DQ_35 DDR1_DQ1_6/DDR0_DQ3_6/DDR1_DQ1_6 NC/DDR0_CA1/DDR0_CA1/DDR0_CA5 [18] M_B_DQ16 M_B_DQ31 DDR5_DQ0_0/DDR1_DQ2_0/DDR1_DQ4_0
CK45 BL53 AJ41 DDR4/LP4/LP5/LP5 CMD Flip N42
[17] M_A_DQ29 M_A_DQ_34 DDR1_DQ1_5/DDR0_DQ3_5/DDR1_DQ1_5 NC/DDR2_CS0/DDR2_CA2/DDR2_CA2 [18] M_B_DQ31 M_B_DQ30 DDR5_DQ1_7/DDR1_DQ3_7/DDR1_DQ5_7 NC/DDR7_CA5/DDR7_CA6/DDR7_CA0
CM45 BP47 AJ42 N45
[17] M_A_DQ28 M_A_DQ_33 DDR1_DQ1_4/DDR0_DQ3_4/DDR1_DQ1_4 NC/DDR3_CA5/DDR3_CA6/DDR3_CA0 [18] M_B_DQ30 M_B_DQ29 DDR5_DQ1_6/DDR1_DQ3_6/DDR1_DQ5_6 NC/DDR7_CA4/DDR7_CA5/DDR7_CA1
CK42 BP42 AL41 N44
[17] M_A_DQ27 M_A_DQ_32 DDR1_DQ1_3/DDR0_DQ3_3/DDR1_DQ1_3 NC/DDR3_CA4/DDR3_CA5/DDR3_CA1 [18] M_B_DQ29 M_B_DQ28 DDR5_DQ1_5/DDR1_DQ3_5/DDR1_DQ5_5 NC/DDR7_CA3/DDR7_CA4/DDR7_CS1
CM42 BP45 AL42 N47
[17] M_A_DQ26 M_A_DQ_31 DDR1_DQ1_2/DDR0_DQ3_2/DDR1_DQ1_2 NC/DDR3_CA3/DDR3_CA4/DDR3_CS1 [18] M_B_DQ28 M_B_DQ27 DDR5_DQ1_4/DDR1_DQ3_4/DDR1_DQ5_4 NC/DDR7_CA2/DDR7_CA3/DDR7_CS0
CM41 BP44 AJ45 J53
[17] M_A_DQ25 M_A_DQ_30 DDR1_DQ1_1/DDR0_DQ3_1/DDR1_DQ1_1 NC/DDR3_CA2/DDR3_CA3/DDR3_CS0 [18] M_B_DQ27 M_B_DQ26 DDR5_DQ1_3/DDR1_DQ3_3/DDR1_DQ5_3 NC/DDR6_CS0/DDR6_CA2/DDR6_CA2
CK41 AJ47 AC50
[17] M_A_DQ24 M_A_DQ_47 DDR1_DQ1_0/DDR0_DQ3_0/DDR1_DQ1_0 LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL)
M_A_DQSP7 [18] M_B_DQ26 M_B_DQ25 DDR5_DQ1_2/DDR1_DQ3_2/DDR1_DQ5_2 NC/DDR4_CA1/DDR4_CA1/DDR4_CA5
BF53 BB44 M_A_DQSP7 [17] AL45 AC53
[17] M_A_DQ39 M_A_DQ_46 DDR2_DQ0_7/DDR0_DQ4_7/DDR0_DQ2_7 DDR3_DQSP_1/DDR0_DQSP_7/DDR1_DQSP_3 M_A_DQSN7 [18] M_B_DQ25 M_B_DQ24 DDR5_DQ1_1/DDR1_DQ3_1/DDR1_DQ5_1 NC/DDR4_CA0/DDR4_CA0/DDR4_CA6
BF52 BD44 M_A_DQSN7 [17] AL47
[17] M_A_DQ38 M_A_DQ_45 DDR2_DQ0_6/DDR0_DQ4_6/DDR0_DQ2_6 DDR3_DQSN_1/DDR0_DQSN_7/DDR1_DQSN_3 M_A_DQSP6 [18] M_B_DQ24 M_B_DQ39 DDR5_DQ1_0/DDR1_DQ3_0/DDR1_DQ5_0
BF50 BK44 M_A_DQSP6 [17] A43 LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) K36 M_B_DQSP7 M_B_DQSP7 [18]
[17] M_A_DQ37 M_A_DQ_44 DDR2_DQ0_5/DDR0_DQ4_5/DDR0_DQ2_5 DDR3_DQSP_0/DDR0_DQSP_6/DDR1_DQSP_2 M_A_DQSN6 [18] M_B_DQ39 M_B_DQ38 DDR6_DQ0_7/DDR1_DQ4_7/DDR0_DQ6_7 DDR7_DQSP_1/DDR1_DQSP_7/DDR1_DQSP_7
BF49 BH44 M_A_DQSN6 [17] B43 K38 M_B_DQSN7 M_B_DQSN7 [18]
[17] M_A_DQ36 M_A_DQ_43 DDR2_DQ0_4/DDR0_DQ4_4/DDR0_DQ2_4 DDR3_DQSN_0/DDR0_DQSN_6/DDR1_DQSN_2 M_A_DQSP5 [18] M_B_DQ38 M_B_DQ37 DDR6_DQ0_6/DDR1_DQ4_6/DDR0_DQ6_6 DDR7_DQSN_1/DDR1_DQSN_7/DDR1_DQSN_7
BH53 BA51 M_A_DQSP5 [17] D43 G44 M_B_DQSP6 M_B_DQSP6 [18]
[17] M_A_DQ35 M_A_DQ_42 DDR2_DQ0_3/DDR0_DQ4_3/DDR0_DQ2_3 DDR2_DQSP_1/DDR0_DQSP_5/DDR0_DQSP_3 M_A_DQSN5 [18] M_B_DQ37 M_B_DQ36 DDR6_DQ0_5/DDR1_DQ4_5/DDR0_DQ6_5 DDR7_DQSP_0/DDR1_DQSP_6/DDR1_DQSP_6
C BH52 BA50 M_A_DQSN5 [17] E44 J44 M_B_DQSN6 M_B_DQSN6 [18]
C
[17] M_A_DQ34 M_A_DQ_41 DDR2_DQ0_2/DDR0_DQ4_2/DDR0_DQ2_2 DDR2_DQSN_1/DDR0_DQSN_5/DDR0_DQSN_3 M_A_DQSP4 [18] M_B_DQ36 M_B_DQ35 DDR6_DQ0_4/DDR1_DQ4_4/DDR0_DQ6_4 DDR7_DQSN_0/DDR1_DQSN_6/DDR1_DQSN_6
BH50 BG51 M_A_DQSP4 [17] A46 D39 M_B_DQSP5 M_B_DQSP5 [18]
[17] M_A_DQ33 M_A_DQ_40 DDR2_DQ0_1/DDR0_DQ4_1/DDR0_DQ2_1 DDR2_DQSP_0/DDR0_DQSP_4/DDR0_DQSP_2 M_A_DQSN4 [18] M_B_DQ35 M_B_DQ34 DDR6_DQ0_3/DDR1_DQ4_3/DDR0_DQ6_3 DDR6_DQSP_1/DDR1_DQSP_5/DDR0_DQSP_7
BH49 BG50 M_A_DQSN4 [17] B46 C39 M_B_DQSN5 M_B_DQSN5 [18]
[17] M_A_DQ32 M_A_DQ_57 DDR2_DQ0_0/DDR0_DQ4_0/DDR0_DQ2_0 DDR2_DQSN_0/DDR0_DQSN_4/DDR0_DQSN_2 M_A_DQSP3 [18] M_B_DQ34 M_B_DQ33 DDR6_DQ0_2/DDR1_DQ4_2/DDR0_DQ6_2 DDR6_DQSN_1/DDR1_DQSN_5/DDR0_DQSN_7
AY53 CK44 M_A_DQSP3 [17] D46 C45 M_B_DQSP4 M_B_DQSP4 [18]
[17] M_A_DQ47 M_A_DQ_56 DDR2_DQ1_7/DDR0_DQ5_7/DDR0_DQ3_7 DDR1_DQSP_1/DDR0_DQSP_3/DDR1_DQSP_1 M_A_DQSN3 [18] M_B_DQ33 M_B_DQ32 DDR6_DQ0_1/DDR1_DQ4_1/DDR0_DQ6_1 DDR6_DQSP_0/DDR1_DQSP_4/DDR0_DQSP_6
AY52 CM44 M_A_DQSN3 [17] E47 D45 M_B_DQSN4 M_B_DQSN4 [18]
[17] M_A_DQ46 M_A_DQ_55 DDR2_DQ1_6/DDR0_DQ5_6/DDR0_DQ3_6 DDR1_DQSN_1/DDR0_DQSN_3/DDR1_DQSN_1 M_A_DQSP2 [18] M_B_DQ32 M_B_DQ47 DDR6_DQ0_0/DDR1_DQ4_0/DDR0_DQ6_0 DDR6_DQSN_0/DDR1_DQSN_4/DDR0_DQSN_6
AY50 CT44 M_A_DQSP2 [17] E38 AJ44 M_B_DQSP3 M_B_DQSP3 [18]
[17] M_A_DQ45 M_A_DQ_54 DDR2_DQ1_5/DDR0_DQ5_5/DDR0_DQ3_5 DDR1_DQSP_0/DDR0_DQSP_2/DDR1_DQSP_0 M_A_DQSN2 [18] M_B_DQ47 M_B_DQ46 DDR6_DQ1_7/DDR1_DQ5_7/DDR0_DQ7_7 DDR5_DQSP_1/DDR1_DQSP_3/DDR1_DQSP_5
AY49 CV44 M_A_DQSN2 [17] D38 AL44 M_B_DQSN3 M_B_DQSN3 [18]
[17] M_A_DQ44 M_A_DQ_53 DDR2_DQ1_4/DDR0_DQ5_4/DDR0_DQ3_4 DDR1_DQSN_0/DDR0_DQSN_2/DDR1_DQSN_0 M_A_DQSP1 [18] M_B_DQ46 M_B_DQ45 DDR6_DQ1_6/DDR1_DQ5_6/DDR0_DQ7_6 DDR5_DQSN_1/DDR1_DQSN_3/DDR1_DQSN_5
BC53 CK51 M_A_DQSP1 [17] B38 AV44 M_B_DQSP2 M_B_DQSP2 [18]
[17] M_A_DQ43 M_A_DQ_52 DDR2_DQ1_3/DDR0_DQ5_3/DDR0_DQ3_3 DDR0_DQSP_1/DDR0_DQSP_1/DDR0_DQSP_1 M_A_DQSN1 [18] M_B_DQ45 M_B_DQ44 DDR6_DQ1_5/DDR1_DQ5_5/DDR0_DQ7_5 DDR5_DQSP_0/DDR1_DQSP_2/DDR1_DQSP_4
BC52 CK50 M_A_DQSN1 [17] A38 AR44 M_B_DQSN2 M_B_DQSN2 [18]
[17] M_A_DQ42 M_A_DQ_51 DDR2_DQ1_2/DDR0_DQ5_2/DDR0_DQ3_2 DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1 M_A_DQSP0 [18] M_B_DQ44 M_B_DQ43 DDR6_DQ1_4/DDR1_DQ5_4/DDR0_DQ7_4 DDR5_DQSN_0/DDR1_DQSN_2/DDR1_DQSN_4
BC50 CR51 M_A_DQSP0 [17] E41 AG51 M_B_DQSP1 M_B_DQSP1 [18]
[17] M_A_DQ41 M_A_DQ_50 DDR2_DQ1_1/DDR0_DQ5_1/DDR0_DQ3_1 DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0 M_A_DQSN0 [18] M_B_DQ43 M_B_DQ42 DDR6_DQ1_3/DDR1_DQ5_3/DDR0_DQ7_3 DDR4_DQSP_1/DDR1_DQSP_1/DDR0_DQSP_5
BC49 CR50 M_A_DQSN0 [17] D40 AG50 M_B_DQSN1 M_B_DQSN1 [18]
[17] M_A_DQ40 M_A_DQ_67 DDR2_DQ1_0/DDR0_DQ5_0/DDR0_DQ3_0 DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0 [18] M_B_DQ42 M_B_DQ41 DDR6_DQ1_2/DDR1_DQ5_2/DDR0_DQ7_2 DDR4_DQSN_1/DDR1_DQSN_1/DDR0_DQSN_5
BK47 B40 AN51 M_B_DQSP0 M_B_DQSP0 [18]
[17] M_A_DQ55 M_A_DQ_66 DDR3_DQ0_7/DDR0_DQ6_7/DDR1_DQ2_7 DDR4/LP4/LP5/LP5 CMD Flip [18] M_B_DQ41 M_B_DQ40 DDR6_DQ1_1/DDR1_DQ5_1/DDR0_DQ7_1 DDR4_DQSP_0/DDR1_DQSP_0/DDR0_DQSP_4
BK45 CF44 M_A_DIM0_ODT1 [17] A40 AN50 M_B_DQSN0 M_B_DQSN0 [18]
[17] M_A_DQ54 M_A_DQ_65 DDR3_DQ0_6/DDR0_DQ6_6/DDR1_DQ2_6 DDR0_ODT1/DDR1_CA0/DDR1_CA0/DDR1_CA6 [18] M_B_DQ40 M_B_DQ55 DDR6_DQ1_0/DDR1_DQ5_0/DDR0_DQ7_0 DDR4_DQSN_0/DDR1_DQSN_0/DDR0_DQSN_4
BH47 CF45 M_A_DIM0_ODT0 [17] G42
[17] M_A_DQ53 M_A_DQ_64 DDR3_DQ0_5/DDR0_DQ6_5/DDR1_DQ2_5 DDR0_ODT0/DDR1_CS0/DDR1_CA2/DDR1_CA2 [18] M_B_DQ55 M_B_DQ54 DDR7_DQ0_7/DDR1_DQ6_7/DDR1_DQ6_7
BH45 G41 DDR4/LP4/LP5/LP5 CMD Flip AE44 M_B_DIM0_ODT1 [18]
[17] M_A_DQ52 M_A_DQ_63 DDR3_DQ0_4/DDR0_DQ6_4/DDR1_DQ2_4 DDR4/LP4/LP5/LP5 CMD Flip [18] M_B_DQ54 DDR7_DQ0_6/DDR1_DQ6_6/DDR1_DQ6_6 DDR1_ODT1/DDR5_CA0/DDR5_CA0/DDR5_CA6
BH42 CB47 M_A_RAS# M_A_RAS# [17]
M_B_DQ53 J41 AE45 M_B_DIM0_ODT0 [18]
[17] M_A_DQ51 M_A_DQ_62 DDR3_DQ0_3/DDR0_DQ6_3/DDR1_DQ2_3 DDR0_MA16/DDR1_CA4/DDR1_CA5/DDR1_CA1 [18] M_B_DQ53 DDR7_DQ0_5/DDR1_DQ6_5/DDR1_DQ6_5 DDR1_ODT0/DDR5_CS0/DDR5_CA2/DDR5_CA2
BK42 CB44 M_A_CAS# M_A_CAS# [17]
M_B_DQ52 J42
[17] M_A_DQ50 M_A_DQ_61 DDR3_DQ0_2/DDR0_DQ6_2/DDR1_DQ2_2 DDR0_MA15/DDR1_CA3/DDR1_CA4/DDR1_CS1 [18] M_B_DQ52 DDR7_DQ0_4/DDR1_DQ6_4/DDR1_DQ6_4
BK41 CB45 M_A_WE# M_A_WE# [17]
M_B_DQ51 G45 DDR4/LP4/LP5/LP5 CMD Flip AA47 M_B_RAS# [18]
[17] M_A_DQ49 M_A_DQ_60 DDR3_DQ0_1/DDR0_DQ6_1/DDR1_DQ2_1 DDR0_MA14/DDR1_CA2/DDR1_CA3/DDR1_CS0 [18] M_B_DQ51 DDR7_DQ0_3/DDR1_DQ6_3/DDR1_DQ6_3 DDR1_MA16/DDR5_CA4/DDR5_CA5/DDR5_CA1
BH41 CF41 M_A_A13 M_A_A13 [17]
M_B_DQ50 J45 AA44 M_B_CAS# [18]
[17] M_A_DQ48 DDR3_DQ0_0/DDR0_DQ6_0/DDR1_DQ2_0 DDR0_MA13/DDR1_CS1/DDR1_CS0/DDR1_CA3 [18] M_B_DQ50 DDR7_DQ0_2/DDR1_DQ6_2/DDR1_DQ6_2 DDR1_MA15/DDR5_CA3/DDR5_CA4/DDR5_CS1

https://vinafix.com/
M_A_DQ_77 BD47 BU53 M_A_A12 M_B_DQ49 G47 AA45
[17] M_A_DQ63 DDR3_DQ1_7/DDR0_DQ7_7/DDR1_DQ3_7 DDR0_MA12/DDR2_CA1/DDR2_CA1/DDR2_CA5 M_A_A12 [17] [18] M_B_DQ49 DDR7_DQ0_1/DDR1_DQ6_1/DDR1_DQ6_1 DDR1_MA14/DDR5_CA2/DDR5_CA3/DDR5_CS0 M_B_WE# [18]
M_A_DQ_76 BB47 BT51 M_A_A11 M_B_DQ48 J47 AE41 M_B_A13
[17] M_A_DQ62 DDR3_DQ1_6/DDR0_DQ7_6/DDR1_DQ3_6 DDR0_MA11/NC/DDR2_CS1/DDR2_CA4 M_A_A11 [17] [18] M_B_DQ48 DDR7_DQ0_0/DDR1_DQ6_0/DDR1_DQ6_0 DDR1_MA13/DDR5_CS1/DDR5_CS0/DDR5_CA3 M_B_A13 [18]
M_A_DQ_75 BD45 BV42 M_A_A10 M_B_DQ63 G38 P53 M_B_A12
[17] M_A_DQ61 DDR3_DQ1_5/DDR0_DQ7_5/DDR1_DQ3_5 DDR0_MA10/DDR3_CA1/DDR3_CA1/DDR3_CA5 M_A_A10 [17] [18] M_B_DQ63 DDR7_DQ1_7/DDR1_DQ7_7/DDR1_DQ7_7 DDR1_MA12/DDR6_CA1/DDR6_CA1/DDR6_CA5 M_B_A12 [18]
M_A_DQ_74 BB45 BU50 M_A_A9 M_B_DQ62 G36 N51 M_B_A11
[17] M_A_DQ60 DDR3_DQ1_4/DDR0_DQ7_4/DDR1_DQ3_4 DDR0_MA9/DDR2_CA0/DDR2_CA0/DDR2_CA6 M_A_A9 [17] [18] M_B_DQ62 DDR7_DQ1_6/DDR1_DQ7_6/DDR1_DQ7_6 DDR1_MA11/NC/DDR6_CS1/DDR6_CA4 M_B_A11 [18]
M_A_DQ_73 BB42 BY53 M_A_A8 M_B_DQ61 H36 U42 M_B_A10
[17] M_A_DQ59 DDR3_DQ1_3/DDR0_DQ7_3/DDR1_DQ3_3 DDR0_MA8/DDR0_CA2/DDR0_CA3/DDR0_CS0 M_A_A8 [17] [18] M_B_DQ61 DDR7_DQ1_5/DDR1_DQ7_5/DDR1_DQ7_5 DDR1_MA10/DDR7_CA1/DDR7_CA1/DDR7_CA5 M_B_A10 [18]
M_A_DQ_72 BB41 CA50 M_A_A7 M_B_DQ60 H38 P50 M_B_A9
[17] M_A_DQ58 DDR3_DQ1_2/DDR0_DQ7_2/DDR1_DQ3_2 DDR0_MA7/DDR0_CA4/DDR0_CA5/DDR0_CA1 M_A_A7 [17] [18] M_B_DQ60 DDR7_DQ1_4/DDR1_DQ7_4/DDR1_DQ7_4 DDR1_MA9/DDR6_CA0/DDR6_CA0/DDR6_CA6 M_B_A9 [18]
M_A_DQ_71 BD42 BY52 M_A_A6 M_B_DQ59 N36 U53 M_B_A8
[17] M_A_DQ57 DDR3_DQ1_1/DDR0_DQ7_1/DDR1_DQ3_1 DDR0_MA6/DDR0_CA3/DDR0_CA4/DDR0_CS1 M_A_A6 [17] [18] M_B_DQ59 DDR7_DQ1_3/DDR1_DQ7_3/DDR1_DQ7_3 DDR1_MA8/DDR4_CA2/DDR4_CA3/DDR4_CS0 M_B_A8 [18]
M_A_DQ_70 BD41 BY50 M_A_A5 M_B_DQ58 L36 W50 M_B_A7
[17] M_A_DQ56 DDR3_DQ1_0/DDR0_DQ7_0/DDR1_DQ3_0 DDR0_MA5/DDR0_CA5/DDR0_CA6/DDR0_CA0 M_A_A5 [17] [18] M_B_DQ58 DDR7_DQ1_2/DDR1_DQ7_2/DDR1_DQ7_2 DDR1_MA7/DDR4_CA4/DDR4_CA5/DDR4_CA1 M_B_A7 [18]
CD51 M_A_A4 M_A_A4 [17]
M_B_DQ57 L38 U52 M_B_A6
M_B_A6 [18]
DDR0_MA4/DDR0_CS0/DDR0_CA2/DDR0_CA2 [18] M_B_DQ57 DDR7_DQ1_1/DDR1_DQ7_1/DDR1_DQ7_1 DDR1_MA6/DDR4_CA3/DDR4_CA4/DDR4_CS1
CD53 M_A_A3 M_A_A3 [17]
M_B_DQ56 N38 U50 M_B_A5
M_B_A5 [18]
DDR0_MA3/DDR0_CS1/DDR0_CS0/DDR0_CA3 [18] M_B_DQ56 DDR7_DQ1_0/DDR1_DQ7_0/DDR1_DQ7_0 DDR1_MA5/DDR4_CA5/DDR4_CA6/DDR4_CA0
BV47 M_A_A2 M_A_A2 [17] AA51 M_B_A4
M_B_A4 [18]
B DDR0_MA2/DDR3_CS0/DDR3_CA2/DDR3_CA2 CE52 M_A_A1 DDR1_MA4/DDR4_CS0/DDR4_CA2/DDR4_CA2 AA53 M_B_A3 B
DDR0_MA1/NC/DDR0_CS1/DDR0_CA4 M_A_A1 [17] DDR1_MA3/DDR4_CS1/DDR4_CS0/DDR4_CA3 M_B_A3 [18]
BV41 M_A_A0 M_A_A0 [17] U47 M_B_A2
M_B_A2 [18]
DDR0_MA0/NC/DDR3_CS1/DDR3_CA4 DDR1_MA2/DDR7_CS0/DDR7_CA2/DDR7_CA2 AC52 M_B_A1
DDR4/LP4/LP5/LP5 CMD Flip DDR1_MA1/NC/DDR4_CS1/DDR4_CA4 M_B_A1 [18]
BN50 U41 M_B_A0
DDR0_BG1/DDR2_CA2/DDR2_CA3/DDR2_CS0 M_A_BG#1 [17] DDR1_MA0/NC/DDR7_CS1/DDR7_CA4 M_B_A0 [18]
BL52 M_A_BG#0 [17]
DDR0_BG0/DDR2_CA3/DDR2_CA4/DDR2_CS1 DDR4/LP4/LP5/LP5 CMD Flip K50
DDR4/LP4/LP5/LP5 CMD Flip DDR1_BG1/DDR6_CA2/DDR6_CA3/DDR6_CS0 M_B_BG#1 [18]
CB42 M_A_BS#1 [17] J52 M_B_BG#0 [18]
DDR0_BA1/DDR1_CA5/DDR1_CA6/DDR1_CA0 BV44 DDR1_BG0/DDR6_CA3/DDR6_CA4/DDR6_CS1
DDR0_BA0/DDR3_CA0/DDR3_CA0/DDR3_CA6 M_A_BS#0 [17]
DDR4/LP4/LP5/LP5 CMD Flip AA42 M_B_BS#1 [18]
DDR4/LP4/LP5/LP5 CMD Flip DDR1_BA1/DDR5_CA5/DDR5_CA6/DDR5_CA0
BT53 M_A_ACT# [17] U44 M_B_BS#0 [18]
DDR0_ACT#/DDR2_CS1/DDR2_CS0/DDR2_CA3 DDR1_BA0/DDR7_CA0/DDR7_CA0/DDR7_CA6
DDR4/LP4/LP5/LP5 CMD Flip
BV45 M_A_PARITY [17] N53 M_B_ACT# [18]
DDR0_PAR/DDR3_CS1/DDR3_CS0/DDR3_CA3 DDR1_ACT#/DDR6_CS1/DDR6_CS0/DDR6_CA3
AU50 M_A_ALERT# [17] U45 M_B_PARITY [18]
DDR0_ALERT# ?AU49 DDR1_PAR/DDR7_CS1/DDR7_CS0/DDR7_CA3
DDR0_VREF_CA SM_VREF [17]
AU53 M_B_ALERT# [18]
E52 DDR_VTT_CTRL DDR1_ALERT# AU52
DDR_VTT_CTL DV47 DRAM_RESET# DDR1_VREF_CA
DRAM_RESET# C49 DDR_RCOMP0 R68249 100_1%_2
DDR_RCOMP
TGL_U_IP_EXT/BGA

TGL_U_IP_EXT/BGA SMDDR_VREF_DQ1_M3 [18]


+3V_S5 +3V_S5 +3V

+1.2VSUS

U6539D R68250 R68251 R68940


10K_1%_2 *10K_1%_2 10K_1%_2
A A
R68252 DDR_VTTT_PG_CTRL [52]
470_1%_2 DV24
RSVD_2
3

DW47
DRAM_RESET# DW49 RSVD_3 DDR_VTT_CTRL 2

3
R68253 *Short_0201 DDR4_DRAMRST# [17,18] R68254 10K_1%_2
A48 RSVD_4 Q6582 2 R68255
RSVD_5 METR3904-G Q6583 100K_1%_2
Quanta Computer Inc.
1

2N7002KTB
C96574 R68256

1
TGL_U_IP_EXT/BGA
100K_1%_2
*0.1u/6.3V_2 PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 2/14 (LPDDR4 I/F)
Date: Tuesday, October 06, 2020 Sheet 3 of 62
5 4 3 2 1
5 4 3 2 1

04
D D

+VCCSTG_TERM +VCCSTG

+VCCST U6539U
R69058
*0_5%_4

R68257 1K_1%_2 H_CATERR# M7 K4 XDP_TRST#


BK9 CATERR# PROC_TRST# B9 XDP_TMS_CPU TP13242
[33] EC_PECI PECI PROC_TMS TP13243 Reserve
H_PROCHOT# R68260 499_1%_2 PROCHOT#_CPU E2 D12 XDP_TDO_CPU for check
[14,33,50,53] H_PROCHOT# PM_THRMTRIP# M5 PROCHOT# PROC_TDO A12 XDP_TDI_CPU TP13244
THRMTRIP# PROC_TDI XDP_TCK TP13245 H_PROCHOT# list
B6 R68259 1K_1%_2
CPU_POPI_RCOMP PROC_TCK TP13246
R68262 49.9_1%_2 CT39
R68264 49.9_1%_2 PCH_OPI_RCOMP CB9 PROC_POPIRCOMP D8 PCH_JTAGX R68265 *Short_0201 XDP_TCK PCH_TMS R68261 *51_1%_2
CW 12 PCH_OPIRCOMP PCH_JTAGX A9 PCH_TMS R68267 *Short_0201 XDP_TMS_CPU
CM39 TP_1 PCH_TMS E12 PCH_TDO R68268 *Short_0201 XDP_TDO_CPU PCH_TDO R68263 51_1%_2
TP_2 PCH_TDO B12 PCH_TDI R68269 *Short_0201 XDP_TDI_CPU
DF4 PCH_TDI A7 PCH_TCK PCH_TDI R68266 *51_1%_2
[10] DBG_PMODE DBG_PMODE PCH_TCK TP13247
H4 PCH_TRST# R68271 *Short_0201 XDP_TRST#
DB42 PCH_TRST# CPU_PREQ# R68270 *51_1%_2
[31] HDD_MS_PWR_EN_GPPB4 TBT_FORCE_PWR_GPPB3 GPP_B4/CPU_GP3 CPU_PREQ#
R68686 *Short_0201 DB41 C11
[35,36] TBT_FORCE_PWR GPP_B3/CPU_GP2 PROC_PREQ# CPU_PRDY# TP13249
DF8 D11
TP13365
[22] GPU_EVENT#
GPU_EVENT# DU5 GPP_E7/CPU_GP1 3V PROC_PRDY# TP13250
C GPP_E3/CPU_GP0 G1 CPU_EAR C
DF31 EAR_N_TEST_NCTF XDP_TCK R68274 51_1%_2
[15] GPP_H2 GPP_H2
DV32 DT15
[15] GPP_H1 GPP_H1 GPP_F7 GPP_F7 [10]
DW 32 DR15 PCH_TRST# R68275 *51_1%_2
[15] GPP_H0 GPP_H0 3V 3V GPP_F9 DT14
GPP_F10 [10]
R69033 *0_5%_2 DJ27 GPP_F10 PCH_TCK R68276 *51_1%_2
[32] M.2_UART_BT_WAKE GPP_H19/TIME_SYNC0

+3V_S5 R69034 10K_1%_2


TGL_U_IP_EXT/BGA +VCCSTG

THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches +VCCST
R68277 +3V

https://vinafix.com/
1K_1%_2
GPU_EVENT#
3

R68278 *10K_1%_2
2 Q85
[13,53] IMVP_PWRGD CPU_EAR
DMG301NU-7

Stall CPU reset sequence


1

R825 *100K_1%_2
until de-asserted:
- 1 = (Default) Normal R68279
R821 R822 *1K_1%_2
1K_1%_2
Operation; No stall.
1K_1%_2
- 0 = Stall
Q86
METR3904-G
2

B B
3 1 PM_THRMTRIP#
[33,51,55] SYS_SHDN#

[17,18,46] PM_THRMTRIP#

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 3/14 (CPU MISC/JTA)
Date: Tuesday, October 06, 2020 Sheet 4 of 62
5 4 3 2 1
5 4 3 2 1

+VCCIN
U6539M
+VCCIN
+VCCIN: 65A
05
A24 G32 +1.2VSUS: 1.5A
A26 VCCIN_1 VCCIN_66 H24 U6539O
A29 VCCIN_2 VCCIN_67 H26 +1.2VSUS
A30 VCCIN_3 VCCIN_68 H30
Backside Cap
D A33 VCCIN_4 VCCIN_69 H32 C96575 10u/6.3V_4 C96587 22u/6.3V_6 C96576 *10u/6.3V_4 D
A35 VCCIN_5 VCCIN_70 J1 AA39 AF9
VCCIN_6 VCCIN_71 VDD2_1 VCCSTG_OUT_1 +VCCSTG_OUT_FUSE
AY39 J2 C96588 10u/6.3V_4 C96577 22u/6.3V_6 C96578 *10u/6.3V_4 AB40 AF12
VCCIN_7 VCCIN_72 VDD2_2 VCCSTG_1 +VCCSTG_FUSE
B24 K1 AC39 AD12 C96589 1u/10V_2
B26 VCCIN_8 VCCIN_73 K2 C96590 10u/6.3V_4 C96579 22u/6.3V_6 C96591 *10u/6.3V_4 AD40 VDD2_3 VCCSTG_2
B29 VCCIN_9 VCCIN_74 K24 AD51 VDD2_4 AN10 C96592 *1u/10V_2
B30 VCCIN_10 VCCIN_75 K26 C96580 10u/6.3V_4 C96593 22u/6.3V_6 C96581 *10u/6.3V_4 AD52 VDD2_5 VCCSTG_OUT_2 AM9
VCCIN_11 VCCIN_76 VDD2_6 VCCSTG_OUT_3 +VCCFPGM
B33 K30 AE39 AG10
B35 VCCIN_12 VCCIN_77 K32 C96582 10u/6.3V_4 C96583 22u/6.3V_6 C96584 *10u/6.3V_4 AF40 VDD2_7 VCCSTG_OUT_4
BA10 VCCIN_13 VCCIN_78 L24 AG39 VDD2_8 V15
VCCIN_14 VCCIN_79 VDD2_9 VCCION_OUT +VCCIO_OUT
BA40 L26 C96585 10u/6.3V_4 C96594 22u/6.3V_6 C96586 *10u/6.3V_4 AH40
BB39 VCCIN_15 VCCIN_80 L30 AJ39 VDD2_10 M9 +VCCSTG_OUT_LGC R68280 *Short_0402
VCCIN_16 VCCIN_81 VDD2_11 VCCSTG_OUT_LGC +VCCSTG_TERM
BB9 L32 C96595 10u/6.3V_4 C96596 22u/6.3V_6 C96597 *10u/6.3V_4 AK40
BC10 VCCIN_17 VCCIN_82 N24 AK51 VDD2_12 BT2 500mA
VCCIN_18 VCCIN_83 VDD2_13 VCCST_1 +VCCST
BC40 N26 C96598 10u/6.3V_4 C96599 22u/6.3V_6 C96600 *10u/6.3V_4 AK52 BT1 C96601 1u/10V_2
BD39 VCCIN_19 VCCIN_84 N30 AL39 VDD2_14 VCCST_2 BT4
BD9 VCCIN_20 VCCIN_85 N32 C96603 10u/6.3V_4 C96604 22u/6.3V_6 C96605 *10u/6.3V_4 AM40 VDD2_15 VCCST_3 C96602 *1u/10V_2
BE10 VCCIN_21 VCCIN_86 P24 AN39 VDD2_16 BP2 300mA
BE40 VCCIN_22 VCCIN_87 P26 C96606 10u/6.3V_4 C96607 22u/6.3V_6 C96608 *10u/6.3V_4 AP40 VDD2_17 VCCSTG_3 BP1
VCCIN_23 VCCIN_88 VDD2_18 VCCSTG_4 +VCCSTG
BF9 P28 AR39 BP4
BG10 VCCIN_24 VCCIN_89 P30 C96609 10u/6.3V_4 C96610 10u/6.3V_4 AT52 VDD2_19 VCCSTG_5
BG40 VCCIN_25 VCCIN_90 P32 AU40 VDD2_20
BH12 VCCIN_26 VCCIN_91 T21 C96611 10u/6.3V_4 C96612 *10u/6.3V_4 AW 40 VDD2_21
BH39 VCCIN_27 VCCIN_92 T23 C96613 *1u/10V_2 AW 51 VDD2_22
BH9 VCCIN_28 VCCIN_93 T25 C96615 *10u/6.3V_4 AW 52 VDD2_23
BJ10 VCCIN_29 VCCIN_94 T27 C96614 *10u/6.3V_4 C96616 *1u/10V_2 BD51 VDD2_24 +VCCFPGM +VCCSTG_OUT_FUSE
BJ40 VCCIN_30 VCCIN_95 T31 C96618 *10u/6.3V_4 BD52 VDD2_25
BK39 VCCIN_31 VCCIN_96 U23 C96617 *10u/6.3V_4 C96619 *1u/10V_2 BK51 VDD2_26 R68281 *Short_0402
BL10 VCCIN_32 VCCIN_97 U27 C96621 10u/6.3V_4 BK52 VDD2_27
BL40 VCCIN_33 VCCIN_98 U29 C96620 *10u/6.3V_4 C96622 *1u/10V_2 BV51 VDD2_28
C BM39 VCCIN_34 VCCIN_99 U31 C96624 *10u/6.3V_4 BV52 VDD2_29 C96625 C
BN40 VCCIN_35 VCCIN_100 U33 C96623 *10u/6.3V_4 C96626 *1u/10V_2 CA40 VDD2_30 1u/10V_2
BP12 VCCIN_36 VCCIN_101 V23 C96628 10u/6.3V_4 CC40 VDD2_31
BP39 VCCIN_37 VCCIN_102 V25 C96627 *10u/6.3V_4 C96629 *1u/10V_2 CC49 VDD2_32
BR10 VCCIN_38 VCCIN_103 V27 C96631 *10u/6.3V_4 CC50 VDD2_33
BR40 VCCIN_39 VCCIN_104 V29 C96630 *10u/6.3V_4 C96632 *1u/10V_2 CE40 VDD2_34
BT12 VCCIN_40 VCCIN_105 V31 C96634 *10u/6.3V_4 CG40 VDD2_35
BT39 VCCIN_41 VCCIN_106 V33 C96633 *10u/6.3V_4 C96635 *1u/10V_2 CH39 VDD2_36
BU10 VCCIN_42 VCCIN_107 W 22 C96637 *10u/6.3V_4 CJ40 VDD2_37 +VCCSTG_OUT_FUSE +VCCSTG_FUSE
BU40 VCCIN_43 VCCIN_108 W 24 C96636 *10u/6.3V_4 C96638 *1u/10V_2 CL40 VDD2_38
BV12 VCCIN_44 VCCIN_109 W 28 C96639 10u/6.3V_4 CN40 VDD2_39 R68282 *Short_0402
BY12 VCCIN_45 VCCIN_110 W 32 C96640 *1u/10V_2 CP47 VDD2_40
CA10 VCCIN_46 VCCIN_111 C96641 10u/6.3V_4 CR40 VDD2_41
CB12 VCCIN_47 R38 C96642 *1u/10V_2 D50 VDD2_42 C96643
VCCIN_48 VCCIN_SENSE VCCSENSE [53] VDD2_43
D24 R37 C96644 10u/6.3V_4 E51 1u/10V_2
VCCIN_49 VSSIN_SENSE VSSSENSE [53] VDD2_44

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D26 C96645 *1u/10V_2 F49
D29 VCCIN_50 M12 CPU_SVID_DAT C96646 *10u/6.3V_4 T51 VDD2_45
D30 VCCIN_51 VIDSOUT M11 CPU_SVID_CLK T52 VDD2_46
D33 VCCIN_52 VIDSCK P12 CPU_VIDALERT# C96647 *10u/6.3V_4 VDD2_47
D35 VCCIN_53 VIDALERT#
E24 VCCIN_54
VCCIN_55 TGL_U_IP_EXT/BGA
E26
E27 VCCIN_56
E29 VCCIN_57
E30 VCCIN_58
E32 VCCIN_59
E33 VCCIN_60
G2 VCCIN_61
G24 VCCIN_62 +VCCST
G26 VCCIN_63
B G30 VCCIN_64 B
VCCIN_65

TGL_U_IP_EXT/BGA Vinafix.com
R68283 R68284
56.2_1%_2 100_1%_2

CPU_VIDALERT# R68285 *Short_0201


VR_SVID_ALERT# [53]
CPU_SVID_CLK R68286 *Short_0201
VR_SVID_CLK [53]
CPU_SVID_DAT R68287 *Short_0201
VR_SVID_DATA [53]

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 4/14 (VCCIN/VDDQ)
Date: Tuesday, October 06, 2020 Sheet 5 of 62
5 4 3 2 1
5 4 3 2 1

06
D D

U6539F

DC53 DR27
[32] CNVI_EN DA51 GPP_B16/GSPI0_CLK GPP_D14/ISH_UART0_TXD DW 27
[10] GPP_B18 DC49 GPP_B18/GSPI0_MOSI GPP_D13/ISH_UART0_RXD DV25
DC50 GPP_B17/GSPI0_MISO 3V GPP_D16/ISH_UART0_CTS# DT25
SSD_MS_PWR_EN_GPPD16 [32]
[10,26,33] ACZ_SPKR DC52 GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1# GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/IMGCLKOUT5
[32] INT_RF_OFF#_L GPP_B15/GSPI0_CS0# DB45
[33] SIO_EXT_SCI#
CY49 3V GPP_B6/ISH_I2C0_SCL DB44
CY53 GPP_B20/GSPI1_CLK GPP_B5/ISH_I2C0_SDA
CY52 GPP_B22/GSPI1_MOSI CY39 ISH_I2C1_SCL
GPP_B21/GSPI1_MISO GPP_B8/ISH_I2C1_SCL ISH_I2C1_SCL [41] TO G-sensor
DA50 DB47 ISH_I2C1_SDA
GPP_B19/GSPI1_CS0# 3V GPP_B7/ISH_I2C1_SDA ISH_I2C1_SDA [41]
TO SENSOR HUB ACCEL_INTA DV21 DD47
[41] ACCEL_INTA TPD_INT# GPP_C9/UART0_TXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL
TO TP DT21 DD44
[29] TPD_INT# GPP_C8/UART0_RXD GPP_B9/I2C5_SDA/ISH_I2C2_SDA
DR21
DW 21 GPP_C11/UART0_CTS# DJ8
GPP_C10/UART0_RTS# GPP_E16/ISH_GP7 DR7
TP13399 UART1_TXD DV19 3V GPP_E15/ISH_GP6 DR24
MODE1_ISH [41]
TP13400 UART1_RXD DT19 GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_D18/ISH_GP5 DU25
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_D17/ISH_GP4 MODE2_ISH [41]
DR18 DV31
DU19 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_D3/ISH_GP3/BK3/SBK3 DU31
[30] TPM_PIRQ# GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_D2/ISH_GP2/BK2/SBK2 DT27
BIOS UART Log TP13251 UART2_TXD DJ21 3V GPP_D1/ISH_GP1/BK1/SBK1 DV27 GS_HUB_INT2# [41]
C UART2_RXD DG23 GPP_C21/UART2_TXD GPP_D0/ISH_GP0/BK0/SBK0 GS_HUB_INT1# [41] C
TP13252
[32] WLAN_PCIE_WAKE#
DJ19 GPP_C20/UART2_RXD 3V DR51 GPP_RCOMP R68290 200_1%_2
DF21 GPP_C23/UART2_CTS# GPP_RCOMP
GPP_C22/UART2_RTS# DN33
TP13371 I2C0_SCL_TS DV18 GPP_T3 DT35
TP13372 I2C0_SDA_TS DW 18 GPP_C17/I2C0_SCL 3V GPP_T2
GPP_C16/I2C0_SDA DG17
I2C1_CLK_TP DJ23 GPP_U5 DG19
TO TP
[29] I2C1_CLK_TP I2C1_DATA_TP DT18 GPP_C19/I2C1_SCL 3V GPP_U4
[29] I2C1_DATA_TP GPP_C18/I2C1_SDA
I2C2_SCL_SEN_HUB DJ29
[41] I2C2_SCL_SEN_HUB I2C2_SDA_SEN_HUB GPP_H5/I2C2_SCL
TO SENSOR HUB DJ31
[41] I2C2_SDA_SEN_HUB GPP_H4/I2C2_SDA
I2C3_SCL_NFC DF29
[43] I2C3_SCL_NFC I2C3_SDA_NFC GPP_H7/I2C3_SCL
TO NFC DG29
[43] I2C3_SDA_NFC GPP_H6/I2C3_SDA 3V

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R68947 *0_5%_2 DF25
[32] CNV_MFUART2_TXD GPP_H9/I2C4_SCL/CNV_MFUART2_TXD
R68948 *0_5%_2 DF27
[32] CNV_MFUART2_RXD GPP_H8/I2C4_SDA/CNV_MFUART2_RXD

TGL_U_IP_EXT/BGA

+3V_S5

ACCEL_INTA R68747 2.2K_5%_2

B TPD_INT# R68737 2.2K_5%_2 B

I2C1_CLK_TP R68738 2.2K_5%_2

I2C1_DATA_TP R68739 2.2K_5%_2

I2C2_SCL_SEN_HUB R68742 2.2K_5%_2

I2C2_SDA_SEN_HUB R68743 2.2K_5%_2

I2C3_SCL_NFC R68740 2.2K_5%_2

I2C3_SDA_NFC R68741 2.2K_5%_2

ISH_I2C1_SCL R68744 *[email protected]_5%_2

ISH_I2C1_SDA R68745 *[email protected]_5%_2

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 5/14 (I2C/ISH)
Date: Tuesday, October 06, 2020 Sheet 6 of 62
5 4 3 2 1
5 4 3 2 1

U6539P U6539Q U6539R


07
A27 B19 BY44 CY44 DP53 K34
A32 VSS_223 VSS_289 B2 BY45 VSS_109 VSS_169 CY45 DR11 VSS_2 VSS_46 K48 +1.2VSUS
A45 VSS_224 VSS_290 B23 BY47 VSS_110 VSS_170 CY47 DR16 VSS_3 VSS_47 K5
A49 VSS_225 VSS_291 B27 BY49 VSS_111 VSS_171 CY5 DR22 VSS_4 VSS_48 L22
AA41 VSS_226 VSS_292 B32 BY9 VSS_112 VSS_172 D27 DR28 VSS_5 VSS_49 L28
Backside Cap
D AA48 VSS_227 VSS_293 B36 C13 VSS_113 VSS_173 D32 DR34 VSS_6 VSS_50 L34 D
AB5 VSS_228 VSS_294 B39 C19 VSS_114 VSS_174 D36 DR40 VSS_7 VSS_51 L39 C96648 *1u/10V_2
AB7 VSS_229 VSS_295 B42 C23 VSS_115 VSS_175 D42 DR46 VSS_8 VSS_52 L41 C96649 47u/6.3V_6 C96650 1u/10V_2
AB8 VSS_230 VSS_296 B48 CA48 VSS_116 VSS_176 D49 DT4 VSS_9 VSS_53 L42 C96651 *1u/10V_2
AC44 VSS_231 VSS_297 B52 CB41 VSS_117 VSS_177 D5 DT50 VSS_10 VSS_54 L44 C96652 47u/6.3V_6 C96653 1u/10V_2
AC49 VSS_232 VSS_298 B8 CC10 VSS_118 VSS_178 DA30 DU11 VSS_11 VSS_55 L45 C96654 *1u/10V_2
AD4 VSS_233 VSS_299 BA48 CC3 VSS_119 VSS_179 DA33 DU16 VSS_12 VSS_56 L47 C96655 1u/10V_2
AD48 VSS_234 VSS_300 BA53 CC5 VSS_120 VSS_180 DA53 DU22 VSS_13 VSS_57 L49 C96656 *1u/10V_2
AD8 VSS_235 VSS_301 BB4 CD44 VSS_121 VSS_181 DC17 DU28 VSS_14 VSS_58 M1 C96657 1u/10V_2
AF4 VSS_236 VSS_302 BB8 CD48 VSS_122 VSS_182 DD15 DU34 VSS_15 VSS_59 M2 C96658 *1u/10V_2
AF8 VSS_237 VSS_303 BC1 CD7 VSS_123 VSS_183 DD24 DU40 VSS_16 VSS_60 M50 C96659 1u/10V_2
AG41 VSS_238 VSS_304 BC2 CE49 VSS_124 VSS_184 DD26 DU46 VSS_17 VSS_61 N22 C96660 10u/6.3V_4 C96661 *1u/10V_2
AG42 VSS_239 VSS_305 BD12 CG48 VSS_125 VSS_185 DD28 DV1 VSS_18 VSS_62 N28 C96662 1u/10V_2
AG44 VSS_240 VSS_306 BD4 CG51 VSS_126 VSS_186 DD31 DV40 VSS_19 VSS_63 N34 C96663 10u/6.3V_4 C96664 *1u/10V_2
AG45 VSS_241 VSS_307 BD48 CG52 VSS_127 VSS_187 DD33 DV52 VSS_20 VSS_64 N39 C96665 1u/10V_2
AG47 VSS_242 VSS_308 BD8 CG9 VSS_128 VSS_188 DD35 DW 51 VSS_21 VSS_65 N41 C96666 10u/6.3V_4 C96667 *1u/10V_2
AG48 VSS_243 VSS_309 BF39 CH41 VSS_129 VSS_189 DD39 E13 VSS_22 VSS_66 N48 C96668 1u/10V_2
AG53 VSS_244 VSS_310 BF4 CH42 VSS_130 VSS_190 DD45 E19 VSS_23 VSS_67 P11 C96669 10u/6.3V_4 C96670 *1u/10V_2
AH4 VSS_245 VSS_311 BF41 CH44 VSS_131 VSS_191 DD51 E35 VSS_24 VSS_68 P14 C96671 *1u/10V_2
AH8 VSS_246 VSS_312 BF42 CH45 VSS_132 VSS_192 DD52 E48 VSS_25 VSS_69 P16 C96672 10u/6.3V_4 C96673 *1u/10V_2
AK12 VSS_247 VSS_313 BF44 CH47 VSS_133 VSS_193 DE3 G22 VSS_26 VSS_70 P18 C96674 *1u/10V_2
AK4 VSS_248 VSS_314 BF45 CJ3 VSS_134 VSS_194 DE5 G28 VSS_27 VSS_71 P20 C96675 10u/6.3V_4 C96676 *1u/10V_2
AK48 VSS_249 VSS_315 BF47 CJ5 VSS_135 VSS_195 DF19 G34 VSS_28 VSS_72 P22 C96677 *1u/10V_2
AK5 VSS_250 VSS_316 BF5 CJ9 VSS_136 VSS_196 DF37 G39 VSS_29 VSS_73 P33 C96678 10u/6.3V_4 C96679 *1u/10V_2
AK7 VSS_251 VSS_317 BF7 CK39 VSS_137 VSS_197 DG15 G48 VSS_30 VSS_74 P35 C96680 *1u/10V_2
AK8 VSS_252 VSS_318 BF8 CK48 VSS_138 VSS_198 DG21 G51 VSS_31 VSS_75 P4 C96681 10u/6.3V_4 C96682 *1u/10V_2
AM1 VSS_253 VSS_319 BG48 CK53 VSS_139 VSS_199 DG27 G52 VSS_32 VSS_76 P49 C96683 *1u/10V_2
AM2 VSS_254 VSS_320 BG53 CL9 VSS_140 VSS_200 DG33 H12 VSS_33 VSS_77 P8 C96684 10u/6.3V_4 C96685 *1u/10V_2
AM4 VSS_255 VSS_321 BH1 CN12 VSS_141 VSS_201 DG39 H22 VSS_34 VSS_78 R39 C96686 *1u/10V_2
AM8 VSS_256 VSS_322 BH2 CN48 VSS_142 VSS_202 DG45 H28 VSS_35 VSS_79 R44 C96687 10u/6.3V_4 C96688 *1u/10V_2
C AN41 VSS_257 VSS_323 BH4 CN51 VSS_143 VSS_203 DG5 H34 VSS_36 VSS_80 T19 C96689 *1u/10V_2 C
AN42 VSS_258 VSS_324 BH8 CN52 VSS_144 VSS_204 DG53 H8 VSS_37 VSS_81 T29 C96690 *1u/10V_2
AN44 VSS_259 VSS_325 BK12 CN9 VSS_145 VSS_205 DG6 J39 VSS_38 VSS_82 T33 C96691 *1u/10V_2
AN45 VSS_260 VSS_326 BK4 CP3 VSS_146 VSS_206 DJ1 J49 VSS_39 VSS_83 T4 C96692 *1u/10V_2
AN47 VSS_261 VSS_327 BK48 CP41 VSS_147 VSS_207 DJ2 K16 VSS_40 VSS_84 T48
AN48 VSS_262 VSS_328 BK8 CP42 VSS_148 VSS_208 DJ4 K18 VSS_41 VSS_85 T8 C96693 *1u/10V_2
AN53 VSS_263 VSS_329 BL49 CP44 VSS_149 VSS_209 DK51 K20 VSS_42 VSS_86 U19
AP4 VSS_264 VSS_330 BM1 CP45 VSS_150 VSS_210 DL3 K22 VSS_43 VSS_87 U25 C96694 *1u/10V_2
AP8 VSS_265 VSS_331 BM4 CP5 VSS_151 VSS_211 DL5 K28 VSS_44 VSS_88 U39
AT4 VSS_266 VSS_332 BM41 CR48 VSS_152 VSS_212 DM10 VSS_45 VSS_89 U49 C96695 *1u/10V_2
AT48 VSS_267 VSS_333 BM42 CR53 VSS_153 VSS_213 DM15 VSS_90 V19
AT51 VSS_268 VSS_334 BM44 CR9 VSS_154 VSS_214 DM21 VSS_91 V4 C96696 *1u/10V_2
AT8 VSS_269 VSS_335 BM45 CT5 VSS_155 VSS_215 DM27 VSS_92 V8
AV12 VSS_270 VSS_336 BM47 CU4 VSS_156 VSS_216 DM33 VSS_93 W1
AV39 VSS_271 VSS_337 BM8 CU9 VSS_157 VSS_217 DM39 VSS_94 W 16
VSS_272 VSS_338 VSS_158 VSS_218 VSS_95

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AV4 BN48 CV10 DM4 W 26
AV5 VSS_273 VSS_339 BP41 CV48 VSS_159 VSS_219 DM45 VSS_96 W 30
AV7 VSS_274 VSS_340 BP49 CV5 VSS_160 VSS_220 DN1 VSS_97 W 39
AV8 VSS_275 VSS_341 BP5 CV51 VSS_161 VSS_221 DN2 VSS_98 W 41
AW 1 VSS_276 VSS_342 BP50 CV52 VSS_162 VSS_222 VSS_99 W 42
AW 2 VSS_277 VSS_343 BP7 CY17 VSS_163 VSS_100 W 44
AW 48 VSS_278 VSS_344 BT44 CY22 VSS_164 VSS_101 W 45
AY4 VSS_279 VSS_345 BT48 CY35 VSS_165 VSS_102 W 47
AY41 VSS_280 VSS_346 BU49 CY41 VSS_166 VSS_103 W 48
AY42 VSS_281 VSS_347 BV3 CY42 VSS_167 VSS_104 Y4
AY44 VSS_282 VSS_348 BV48 VSS_168 VSS_105 Y49
AY45 VSS_283 VSS_349 BV5 VSS_106 Y50
AY47 VSS_284 VSS_350 BW 10 VSS_107 Y8
VSS_285 VSS_351 TGL_U_IP_EXT/BGA VSS_108
AY8 BY41
AY9 VSS_286 VSS_352 BY42
B B13 VSS_287 VSS_353 B
VSS_288 TGL_U_IP_EXT/BGA

TGL_U_IP_EXT/BGA

Vinafix.com

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 6/14 (GND)
Date: Tuesday, October 06, 2020 Sheet 7 of 62
5 4 3 2 1
5 4 3 2 1

TP13257 TP_M34 DF53


U6539S

C53 MIPI60_CFG14#
MIPI60_CFG15# T15
V17
U6539T

CFG_15 RSVD_TP_7
A51
B51
RSVD_TP_7
RSVD_TP_8
08
TP13258
TP13256
RSVD_19 RSVD_23 T35 MIPI60_CFG13# U15 CFG_14 RSVD_TP_8
DF52 RSVD_24 E53 MIPI60_CFG12# K11 CFG_13 C1 RSVD_TP_9 TP13253
RSVD_20 RSVD_25 CF39 MIPI60_CFG11# K12 CFG_12 RSVD_TP_9 D2 RSVD_TP_10 TP13254
TP13255 PCH_IST_TP_1 DT52 RSVD_26 U35 MIPI60_CFG10# K9 CFG_11 RSVD_TP_10
TP13260 PCH_IST_TP_0 DU53 PCH_IST_TP_1 RSVD_27 F53 MIPI60_CFG9# T17 CFG_10 CP39 RSVD_TP_11 TP13259
PCH_IST_TP_0 RSVD_28 B53 MIPI60_CFG8# K7 CFG_9 RSVD_TP_11 CU40 RSVD_TP_12 TP13261
D DF50 RSVD_29 AP9 MIPI60_CFG7# H7 CFG_8 RSVD_TP_12 AK9 D
DF49 RSVD_21 RSVD_30 A52 MIPI60_CFG6# K8 CFG_7 RSVD_12
RSVD_22 RSVD_31 MIPI60_CFG5# H9 CFG_6 AH9
TP13262 TP_DP1 CY30 BF12 TP13411 MIPI60_CFG4# E6 CFG_5 RSVD_13
RSVD_TP_26 CY15 RSVD_TP_25 RSVD_TP_28 V21 TP13412 MIPI60_CFG3# H5 CFG_4 DW6
RSVD_TP_26 RSVD_TP_29 W20 TP13413 MIPI60_CFG2# E9 CFG_3 RSVD_14 DV6
TP13410 D4 RSVD_TP_30 U37 TP13414 MIPI60_CFG1# D9 CFG_2 RSVD_15
RSVD_TP_27 RSVD_TP_31 CD39 TP13415 MIPI60_CFG0# E7 CFG_1 DV4 RSVD_TP_13 TP13263
TP13265 IST_TP_1 A6 RSVD_TP_32 U21 TP13416 CFG_0 RSVD_TP_13 DW3 RSVD_TP_14 TP13264
TP13266 IST_TP_0 A4 IST_TP_1 RSVD_TP_33 CB39 R68305 49.9_1%_2 CFG_RCOMP B5 RSVD_TP_14
IST_TP_0 RSVD_32 BB12 TP13417 CFG_RCOMP DU1 RSVD_TP_15 TP13267
RSVD_TP_34 W37 TP13418 TP13268 MIPI60_CFG17_STB_DP U17 RSVD_TP_15 DT2 RSVD_TP_16 TP13269
RSVD_TP_35 AY12 TP13419 MIPI60_CFG16_STB_DN H11 CFG_17 RSVD_TP_16
RSVD_TP_36 W38 TP13420 CFG_16 DW2 RSVD_TP_17 TP13270
RSVD_TP_37 U38 TP13421 MBP3# Y1 RSVD_TP_17 DV2 RSVD_TP_18 TP13271
RSVD_TP_38 CY28 RSVD_TP_39 MBP2# M4 BPM#_3 RSVD_TP_18
RSVD_TP_39 MBP1# AB4 BPM#_2 E1 RSVD_TP_19 TP13272
MBP0# Y2 BPM#_1 RSVD_TP_19 F1 RSVD_TP_20 TP13273
BPM#_0 RSVD_TP_20
TGL_U_IP_EXT/BGA A3 AB2
R68313 2.2K_5%_2
B3 RSVD_6 RSVD_16
RSVD_7 DR1 RSVD_TP_21 TP13274
should be connect if no used. RSVD_TP_21
AR2 DR2 RSVD_TP_22 TP13275
TP13276 RSVD_TP_2 AL10 RSVD_TP_1 RSVD_TP_22
TP13277 RSVD_TP_3 AM12 RSVD_TP_2 DR53 RSVD_TP_23 TP13278
TP13279 RSVD_TP_4 AH12 RSVD_TP_3 RSVD_TP_23 DW5 RSVD_TP_24 TP13280
TP13281 RSVD_TP_5 AJ10 RSVD_TP_4 RSVD_TP_24
TP13282 RSVD_TP_6 AR1 RSVD_TP_5 DV51 R69064 *Short_0201
RSVD_TP_6 VSS_1 DW52 TP_3 TP13283
BN10 TP_3 DV53 TP_4 TP13284
C BM12 RSVD_8 TP_4 W34 C
TP13285 TP_L34 DD13 RSVD_9 RSVD_17 V35
TP13426 RSVD_TP_26 DF13 RSVD_10 RSVD_18
RSVD_11 D52 SKTOCC#
TP13425 RSVD_TP_39 SKTOCC#

TGL_U_IP_EXT/BGA

+3V_S5 R68314 *10K_1%_2

RSVD
MIPI60_CFG0#

R68323
MIPI60_CFG0#_R
TP13286 eDP enable MIPI60_CFG4#
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RSVD MIPI60_CFG8# RSVD MIPI60_CFG12#
+VCCIO_OUT

*Short_0201
Red value follow PDG 607872-V1.1-P113
R68324 R68291 *1K_1%_2 MIPI60_CFG0#_R
*1K_1%_2 R68326 R68335 R68320
1K_1%_2 *1K_1%_2 *1K_1%_2 R68292 1K_1%_2 MIPI60_CFG1#
1 : Disable
0 : Enable R68293 1K_1%_2 MIPI60_CFG2#

R68294 1K_1%_2 MIPI60_CFG3#

RSVD MIPI60_CFG1# RSVD RSVD MIPI60_CFG9# RSVD MIPI60_CFG13# R68295 *1K_1%_2 MIPI60_CFG4#
B MIPI60_CFG5# MIPI60_CFG6# B
R68296 *1K_1%_2 MIPI60_CFG5#

R68331 R68322 R68321 R68297 *1K_1%_2 MIPI60_CFG6#


*1K_1%_2 R68333 R68334 *1K_1%_2 *1K_1%_2
*1K_1%_2 *1K_1%_2 R68298 1K_1%_2 MIPI60_CFG7#

R68299 *1K_1%_2 MIPI60_CFG8#

R68300 1K_1%_2 MIPI60_CFG9#


RSVD MIPI60_CFG2# RSVD MIPI60_CFG10# PEG60 Lane Reversal
MIPI60_CFG14#
R68301 1K_1%_2 MIPI60_CFG10#
PEG Training:
MIPI60_CFG7# R68302 1K_1%_2 MIPI60_CFG11#
R68325 R68328 R68329
*1K_1%_2 *1K_1%_2 1 : Normal *1K_1%_2 R68303 *1K_1%_2 MIPI60_CFG12#

— 1 = (default) PEG Train immediately following R68327


0 : Reversal R68304 *1K_1%_2 MIPI60_CFG13#
RESET# de assertion. *1K_1%_2
R68306 1K_1%_2 MIPI60_CFG14#
— 0 = PEG Wait for BIOS for training.
RSVD MIPI60_CFG3# RSVD MIPI60_CFG11# RSVD MIPI60_CFG15# R68307 *1K_1%_2 MIPI60_CFG15#

R68308 10K_1%_2 MBP0#

R68332 R68317 R68330 R68309 10K_1%_2 MBP1#


*1K_1%_2 *1K_1%_2 *1K_1%_2
R68310 10K_1%_2 MBP2#

R68311 10K_1%_2 MBP3#


A A
R68312 *51_1%_2 MIPI60_CFG16_STB_DN

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 7/14 (RSVD/XDP)
Date: Tuesday, October 06, 2020 Sheet 8 of 62
5 4 3 2 1
5 4 3 2 1

GC6_FB_EN_Q R68356 EV@10K_1%_2


+3V

+3V
09
DGPU_PWROK R68357 *EV@10K_1%_2
SATA_LED# R68355 10K_1%_2
DGPU_PWR_EN R68358 *EV@10K_1%_2
GPP_E2 R68359 10K_1%_2
R69104 EV@10K_1%_2
D D

DGPU_HOLD_RST# R68352 EV@100K_1%_2


+3V_DEEP_SUS

PCH_SMBCLK R68346 *1K_1%_2


PCH_SMBDATA R68347 *1K_1%_2

SMB_SML0_CLK_R R68348 499_1%_2


SMB_SML0_DAT_R R68349 499_1%_2

SMB_ME1_CLK R68350 2.2K_5%_2


R68336 100K_1%_2 U6539E SMB_ME1_DAT R68351 2.2K_5%_2

DJ37 DK21 PCH_SMBCLK


[16] PCH_SPI0_CLK SPI0_CLK GPP_C0/SMBCLK PCH_SMBDATA
DG35 DM19 TO TP/ DDR
[10,16] PCH_SPI0_IO3 SPI0_IO3 GPP_C1/SMBDATA
DJ39 DN19
[10,16] PCH_SPI0_IO2 SPI0_IO2 GPP_C2/SMBALERT# SMB_ALERT# [10]
DJ33
[16] PCH_SPI0_SO SPI0_MISO SMB_SML0_CLK_R
DJ35 DK19
[10,16] PCH_SPI0_SI
TP13398 DF35 SPI0_MOSI 3V GPP_C3/SML0CLK DM17 SMB_SML0_DAT_R TO BBR/LAN
DG37 SPI0_CS1# GPP_C4/SML0DATA DN17
[16] PCH_SPI0_CS0# SPI0_CS0# GPP_C5/SML0ALERT# SML0_ALERT# [15]
DF39
[16] SPI_TPM_CS# SPI0_CS2# SMB_ME1_CLK
DK17
GPP_C6/SML1CLK SMB_ME1_CLK [36]
TP13427 DJ6 DJ17 SMB_ME1_DAT TO PD
GPP_E2 GPP_E11/SPI1_CLK/THC0_SPI1_CLK GPP_C7/SML1DATA SMB_ME1_DAT [36]
DN5 CY50
GC6_FB_EN_Q DR9 GPP_E2/SPI1_IO3/THC0_SPI1_IO3 GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1# GPP_B23 [10]
C96700 *10p/25V_2
[20,22] GC6_FB_EN_Q DGPU_PWROK GPP_E1/SPI1_IO2/THC0_SPI1_IO2 ESPI_CLK_R
DM6 DN53 R68339 49.9_1%_2
[22] DGPU_PWROK DGPU_HOLD_RST# GPP_E12/SPI1_MISO_IO1/THC0_SPI1_IO1 GPP_A5/ESPI_CLK ESPI_3_R ESPI_CLK [33]
C DK6 DJ53 R68340 15_1%_2 C
TP13428
[19] DGPU_HOLD_RST#
DK8 GPP_E13/SPI1_MOSI_IO0/THC0_SPI1_IO0 3V GPP_A3/ESPI_IO3/SUSACK# DH50 ESPI_2_R R68341 15_1%_2
ESPI_3 [33]
ESPI_2 [33]
SATA_LED# DV11 GPP_E10/SPI1_CS#/THC0_SPI1_CS# GPP_A2/ESPI_IO2/SUSW ARN#_SUSPW RDNACK DP50 ESPI_1_R R68342 15_1%_2
GPP_E8/SPI1_CS1#/SATA_LED# GPP_A1/ESPI_IO1 ESPI_1 [33]
DGPU_PWR_EN DW 9 DP52 ESPI_0_R R68343 15_1%_2
[20,58] DGPU_PWR_EN GPP_E17/THC0_SPI1_INT# GPP_A0/ESPI_IO0 ESPI_CS#_R ESPI_0 [33]
DT8 DK52 R68344 *Short_0201
[10] GPPC_E6 GPP_E6/THC0_SPI1_RST# 1.8V GPP_A4/ESPI_CS# DL50 ESPI_RESET#_R R68345 *Short_0201
ESPI_CS# [33]
ESPI_RESET# [33]
DN15 GPP_A6/ESPI_RESET#
[15] BOARD_ID1 GPP_F11/THC1_SPI2_CLK
DK13
[15] BOARD_ID5 GPP_F15/GSXSRESET#/THC1_SPI2_IO3
DM13
[15,25] BOARD_ID4_TSN GPP_F14/GSXDIN/THC1_SPI2_IO2
DN13
[15] BOARD_ID3 GPP_F13/GSXSLOAD/THC1_SPI2_IO1
DJ15 R68353 75K_1%_2
[15] BOARD_ID2
[15,25] BOARD_ID6_MIC_Single
DK15 GPP_F12/GSXDOUT/THC1_SPI2_IO0 3V
DN10 GPP_F16/GSXCLK/THC1_SPI2_CS# R68354 100K_1%_2
[15] BOARD_ID0 GPP_F18/THC1_SPI2_INT#
DV14
[15] BOARD_ID7 GPP_F17/THC1_SPI2_RST#

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DH3
[32] CL_CLK CL_CLK
DH4
[32] CL_DATA CL_DATA
DF2
[32] CL_RST# CL_RST#

TGL_U_IP_EXT/BGA

+3V
+3V_DEEP_SUS

B B
R68363 R68361
4.7K_1%_2 4.7K_1%_2
5

5
Q6616A 4 3 *2N7002KDW SMB_SML0_CLK_R Q6585A 4 3 *2N7002KDW PCH_SMBDATA
[35] SMB_SML0_CLK [17,18,38] SMB_RUN_DAT

R68893 *Short_0201 R68360 *Short_0201 PCH side


TO TBT re-timer PCH side TO DDR , reserve to DSUB
2

2
Q6616B 1 6 *2N7002KDW SMB_SML0_DAT_R Q6585B 1 6 *2N7002KDW PCH_SMBCLK
[35] SMB_SML0_DAT [17,18,38] SMB_RUN_CLK

R68894 *Short_0201 R68362 *Short_0201

[28] I219_PCH_SMDATA

TO LAN
A A

[28] I219_PCH_SMCLK

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 8/14 (SMBus/SPI)
Date: Tuesday, October 06, 2020 Sheet 9 of 62
5 4 3 2 1
5 4 3 2 1

TOP SWAP OVERRIDE


High: Enable
Low: Disable(Default)
+3V Port Voltage-GPP_D10 Flash Descriptor Security Override
High: Disable (debug only)
Low: Enable(Default)
+1.8V_DEEP_SUS +3V_DEEP_SUS
(RSVD) XTAL INPUT MODE
High: XTAL INPUT IS SINGLE ENDED
Low: XTAL IS ATTACHED
+3V_S5
SPIVCCIOSEL
High = 1.8V
Low = 3.3V
+3V_S5
10
R68364 R68392 R69091 R68408 R68410
*4.7K_1%_2 Page15 4.7K_1%_2 *4.7K_1%_2 *4.7K_1%_2 *4.7K_1%_2

[13] PCH_TBT_PERST# [13] INPUT3VSEL


ACZ_SPKR

3
[6,26,33] ACZ_SPKR 2
[33] ME_WR#
D Q6649 R68411 R68413 D
PJE138K *20K_1%_2 4.7K_1%_2
R68371 iPD

1
iPD *20K_1%_2
[13] ACZ_SDOUT

iPD

NO REBOOT (RSVD) JTAG ODT DISABLE XTAL FREQUENCE SEL MAF/SAF STRAP
High: Enable , useful ITP/XDP
Port Voltage-GPP_D12 High: Enable High: 24MHZ High: SAF ENABLE
+3V +1.8V_DEEP_SUS
Low: Disable(Default) Low: Disable +3V_DEEP_SUS +1.8V_DEEP_SUS Low: 38.4MHZ (DEFAULT) Low: MAF ENABLE
PU is required WEAK INTERNAL PD 20K

R68377 R68390 R68391 R68409


4.7K_1%_2 100K_1%_2 *100K_1%_2 *4.7K_1%_2
CRB s 1.8V
[6] GPP_B18 Page15 [12] CNV_BRI_DT_R
[9] GPPC_E6

R68383 R68412
iPD *20K_1%_2 R68396 *20K_1%_2
*4.7K_1%_2 iPD

CPUNSSC CLOCK FREQ +3V_DEEP_SUS FOR FAST BOOT


C TLS CONFIDENTIALITY High: 19.2MHz
Port Voltage-GPP_E19 M.2 CNVi Mode Select High : 140MSEC WITH 3.3V FLASH SUPPORT
C
+3V_DEEP_SUS +1.8V_DEEP_SUS +1.8V_DEEP_SUS
High: Enable Low: 38.4MHz (Default) High: disabled +3V_RTC
Low: Disable(Default) Low: enabled
R68382 R68379
R68388 R68389 *150K_5%_2 100K_1%_2
[email protected]_1%_2 *4.7K_1%_2 R68401
Checklist PU
place to M.2 1M_1%_2

[9] SMB_ALERT#
[9] GPP_B23
Page15 [12,32] CNV_RGI_DT
[13] INTRUDER#

Checklist PU

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CRB s 1.8V R68387 R68385
R68395 *20K_1%_2 *4.7K_1%_2 R68406
iPD *20K_1%_2 iPD *1M_1%_2

THC0_SPI1_CLK
Boot Strap 0 (RSVD) CONSENT STRAP Port Voltage-GPP_E21 Reserved THC0_SPI1 Clock: THC SPI1
+3V_DEEP_SUS
PU is required +3V_DEEP_SUS
clock output from PCH.
Supports 20 MHz, 33 MHz and
50 MHz.

R68380
100K_1%_2 R68544
*4.7K_1%_2
B Page15 [9,16] PCH_SPI0_IO2 Page15 B

[4] GPP_F7
R68381
*Short_0201
R68386
*4.7K_1%_2 R68546
iPD *20K_1%_2

THC0_SPI1_CS#
(RSVD) BOOT HALT (RSVD) A0 PERSONALITY STRAP (RSVD) ITP PMODE Reserved THC0_SPI1 Chip Select: Used
+3V_DEEP_SUS +3V_DEEP_SUS
PU is required PU is required High: Disable(default) +VCC1.05_OUT_FET +3V_DEEP_SUS
to select the touch devices if
Low: Enable it is connected to THC0_SPI1
interface.
PGD is 4.7K R68378
R68369 100K_1%_2 R68400
different to 100K_1%_2 1K_1%_2 R68545
checklist iPU *4.7K_1%_2
CRB s 1.05V
[9,16] PCH_SPI0_IO3
[9,16] PCH_SPI0_SI [4] DBG_PMODE [4] GPP_F10
R68370
*Short_0201 R68384 R68405
R68376 *4.7K_1%_2 *20K_1%_2 R68547
*4.7K_1%_2 iPD *20K_1%_2

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 9/14 (HW STRAP)
Date: Tuesday, October 06, 2020 Sheet 10 of 62
5 4 3 2 1
5 4 3 2 1

BT7
BT8
U6539I

PCIE12_TXP/SATA1_TXP USB2P_10
CV4
CY3 USBP10+_BT [32]
BT
11
CE2 PCIE12_TXN/SATA1_TXN USB2N_10 USBP10-_BT [32]
CE1 PCIE12_RXP/SATA1_RXP DD5
PCIE12_RXN/SATA1_RXN USB2P_9 DD4 USBP9+_DB [45]
BT9 USB2N_9 USBP9-_DB [45] USB3.0 (DB)
[31] SATA_TXP0_HDD PCIE11_TXP/SATA0_TXP
BV9 CW 9
[31] SATA_TXN0_HDD PCIE11_TXN/SATA0_TXN USB2P_8 USBP8+ [24]
HDD CF4 DA9 Combo USB3.0 Right UP(BC1.2)
[31] SATA_RXP0_HDD PCIE11_RXP/SATA0_RXP USB2N_8 USBP8- [24]
D CF3 D
[31] SATA_RXN0_HDD PCIE11_RXN/SATA0_RXN DD1
BV7 USB2P_7 DD2 USBP7+_FP [30]
TP13394 Finger print
BV8 PCIE10_TXP USB2N_7 USBP7-_FP [30]
TP13395
TP13396 CG2 PCIE10_TXN DA1
CG1 PCIE10_RXP USB2P_6 DA2 USBP6+_HUB [39]
TP13397 U2 Hub (Touch Screen/Smart Card)
PCIE10_RXN USB2N_6 USBP6-_HUB [39]
C96791 0.1u/6.3V_2 PCIE_TXP9_LAN_C BY7 DA12
[28] PCIE_TXP9_LAN PCIE_TXN9_LAN_C BY8 PCIE9_TXP USB2P_5 DA11 USBP5+_CAM [25]
[28] PCIE_TXN9_LAN C96792 0.1u/6.3V_2 Camera
CG5 PCIE9_TXN USB2N_5 USBP5-_CAM [25]
LAN [28] PCIE_RXP9_LAN
CG4 PCIE9_RXP DC8
[28] PCIE_RXN9_LAN PCIE9_RXN USB2P_4 USBP4+ [24]
DC7 Combo USB3.0 Right Down
CB8 USB2N_4 USBP4- [24]
[32] PCIE_TXP8_SSD PCIE8_TXP
CB7 DB4
[32] PCIE_TXN8_SSD PCIE8_TXN USB2P_3 USBP3+_LTE [45]
CK5 DB3 LTE
[32] PCIE_RXP8_SSD PCIE8_RXP USB2N_3 USBP3-_LTE [45]
CK4
[32] PCIE_RXN8_SSD PCIE8_RXN DA5
CD9 USB2P_2 DA4 USBP2+_TPC [36]
[32] PCIE_TXP7_SSD CD8 PCIE7_TXP USB2N_2 USBP2-_TPC [36] Type C
[32] PCIE_TXN7_SSD PCIE7_TXN
CK1 DC11
[32] PCIE_RXP7_SSD PCIE7_RXP USB2P_1 USBP1+_CR [44]
CK2 DC9 Card reader
[32] PCIE_RXN7_SSD PCIE7_RXN USB2N_1 USBP1-_CR [44]
PCIE SSD CG8 DP4 SSD_DET_E0
[4x1: LR] [32] PCIE_TXP6_SSD CG7 PCIE6_TXP GPP_E0/SATAXPCIE0/SATAGP0 DF41 SSD_DET_A12 TP13422
[32] PCIE_TXN6_SSD PCIE6_TXN GPP_A12/SATAXPCIE1/SATAGP1/I2S3_SFRM TP13423
CL4
[32] PCIE_RXP6_SSD PCIE6_RXP USB_OC0#
CL3 DD8
[32] PCIE_RXN6_SSD PCIE6_RXN GPP_E9/USB_OC0# USB_OC0# [24]
DJ45 USB_OC3#
CJ8 GPP_A16/USB_OC3#/I2S4_SFRM USB_OC3# [24]
[32] PCIE_TXP5_SSD CJ7 PCIE5_TXP DN6
[32] PCIE_TXN5_SSD DEVSLP1
CN2 PCIE5_TXN GPP_E5/DEVSLP1 DG8 TP13367
[32] PCIE_RXP5_SSD PCIE5_RXP GPP_E4/DEVSLP0 DEVSLP0 [31]
C CN1 C
[32] PCIE_RXN5_SSD PCIE5_RXN DN29
CR8 GPP_H15/M2_SKT2_CFG3 DK29 TS_ON
[45] USB30_TX4+ PCIE4_TXP/USB31_4_TXP GPP_H14/M2_SKT2_CFG2 I2C_INT#_TS TP13368
CR7 DT31
[45] USB30_TX4- CN5 PCIE4_TXN/USB31_4_TXN GPP_H13/M2_SKT2_CFG1 DR32 I2C_RST#_TS TP13369
USB3.0 (DB) [45] USB30_RX4+ CN4 PCIE4_RXP/USB31_4_RXP GPP_H12/M2_SKT2_CFG0 TP13370
[45] USB30_RX4- PCIE4_RXN/USB31_4_RXN DV9 PCIE_RCOMPP
CU8 PCIE_RCOMP_P DT9 PCIE_RCOMPN R68421 100_1%_2
[32] PCIE_TXP3_WLAN PCIE3_TXP/USB31_3_TXP PCIE_RCOMP PCIE_RCOMPp - PCIE_RCOMPnL <5mils
CU7
[32] PCIE_TXN3_WLAN PCIE3_TXN/USB31_3_TXN USB_VBUSSENSE
WLAN CT2 DC12 R68422 10K_1%_2
[32] PCIE_RXP3_WLAN PCIE3_RXP/USB31_3_RXP USB_VBUSSENSE USB_ID
CT1 DF1 R68423 10K_1%_2
[32] PCIE_RXN3_WLAN PCIE3_RXN/USB31_3_RXN USB_ID DE1
CW 8 USB2_COMP USB2_COMP R68424 113_1%_2 +3V_DEEP_SUS
[24] USB30_TX2+ PCIE2_TXP/USB31_2_TXP spacing to othes min 16mils
Combo USB3.0 Right CW 7 E3
[24] USB30_TX2- PCIE2_TXN/USB31_2_TXN RSVD_BSCAN
CU3
UP(BC1.2) [24] USB30_RX2+ PCIE2_RXP/USB31_2_RXP

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CT4
[24] USB30_RX2- PCIE2_RXN/USB31_2_RXN USB_OC0# R68418 10K_1%_2
DA8 USB_OC3# R68419 10K_1%_2
[24] USB30_TX1+ DA7 PCIE1_TXP/USB31_1_TXP
[24] USB30_TX1- CV2 PCIE1_TXN/USB31_1_TXN
Combo USB3.0 Right Down [24] USB30_RX1+ CV1 PCIE1_RXP/USB31_1_RXP
[24] USB30_RX1- PCIE1_RXN/USB31_1_RXN
+3V
TGL_U_IP_EXT/BGA I2C_INT#_TS R68420 10K_1%_2

B B
U6539H

C96701 0.22u/6.3V_2 PEG_TXP4_C P5 V5 PEG_TXP2_C C96702 0.22u/6.3V_2


[19] PEG_TXP4 PCIE4_TX_P_3 PCIE4_TX_P_1 PEG_TXP2 [19]
C96703 0.22u/6.3V_2 PEG_TXN4_C P7 V7 PEG_TXN2_C C96704 0.22u/6.3V_2
[19] PEG_TXN4 PCIE4_TX_N_3 PCIE4_TX_N_1 PEG_TXN2 [19]
N1 T1
[19] PEG_RXP4 PCIE4_RX_P_3 PCIE4_RX_P_1 PEG_RXP2 [19]
N2 T2
[19] PEG_RXN4 PCIE4_RX_N_3 PCIE4_RX_N_1 PEG_RXN2 [19]
C96705 0.22u/6.3V_2 PEG_TXP3_C T5 Y5 PEG_TXP1_C C96706 0.22u/6.3V_2
[19] PEG_TXP3 PEG_TXN3_C PCIE4_TX_P_2 PCIE4_TX_P_0 PEG_TXN1_C PEG_TXP1 [19]
C96707 0.22u/6.3V_2 T7 Y7 C96708 0.22u/6.3V_2
[19] PEG_TXN3 PCIE4_TX_N_2 PCIE4_TX_N_0 PEG_TXN1 [19]
R1 V1
[19] PEG_RXP3 PCIE4_RX_P_2 PCIE4_RX_P_0 PEG_RXP1 [19]
R2 V2
[19] PEG_RXN3 PCIE4_RX_N_2 PCIE4_RX_N_0 PEG_RXN1 [19]
Y12 PCIE4_RCOMPP
PCIE4_RCOMP_P V12 PCIE4_RCOMPN R68426 2.2K_1%_2
PCIE4_RCOMP
should be connect if no used. PDG is 1%
TGL_U_IP_EXT/BGA

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 10/14(USB/PCIE/SAT)
Date: Tuesday, October 06, 2020 Sheet 11 of 62
5 4 3 2 1
5 4 3 2 1

U6539J
12
D22 DK47
CSI_F_DP_1 CNVI_W T_D1P CNV_WT_LANE1_DP [32]
B22 DM47
CSI_F_DN_1 CNVI_W T_D1N CNV_WT_LANE1_DN [32]
E22 DN49
CSI_F_DP_0 CNVI_W T_D0P CNV_WT_LANE0_DP [32]
U6539K D20 DR49
CSI_F_DN_0 CNVI_W T_D0N CNV_WT_LANE0_DN [32]
A20 DN45
CSI_F_CLK_P CNVI_W T_CLKP CNV_WT_CLK_DP [32]
D B20 DN47 D
CSI_F_CLK CNVI_W T_CLKN CNV_WT_CLK_DN [32]
BW 1 DU14 B18 DU43
BW 2 CLKOUT_PCIE_P6 GPP_F19/SRCCLKREQ6# DF23 PCIE_CLKREQ_#6 A18 CSI_E_DP_1/CSI_F_DP_2 CNVI_W R_D1P DV43 CNV_WR_LANE1_DP [32]
CLKOUT_PCIE_N6 GPP_H11/SRCCLKREQ5# PCIE_CLKREQ_#5 CSI_E_DN_1/CSI_F_DN_2 CNVI_W R_D1N CNV_WR_LANE1_DN [32]
DG25 D18 DR44
CB2 GPP_H10/SRCCLKREQ4# DT24 PCIE_CLKREQ_LAN# E18 CSI_E_DP_0/CSI_F_DP_3 CNVI_W R_D0P DT43 CNV_WR_LANE0_DP [32]
CB1 CLKOUT_PCIE_P5 GPP_D8/SRCCLKREQ3# DT30 PCIE_CLKREQ_SSD# PCIE_CLKREQ_LAN# [28] C16 CSI_E_DN_0/CSI_F_DN_3 CNVI_W R_D0N DV44 CNV_WR_LANE0_DN [32]
CLKOUT_PCIE_N5 GPP_D7/SRCCLKREQ2# DV30 PCIE_CLKREQ_WLAN# PCIE_CLKREQ_SSD# [32] D16 CSI_E_CLK_P CNVI_W R_CLKP DW 44 CNV_WR_CLK_DP [32]
GPP_D6/SRCCLKREQ1# DW 30 PCIE_CLKREQ_VGA# PCIE_CLKREQ_WLAN# [32] CSI_E_CLK CNVI_W R_CLKN CNV_WR_CLK_DN [32]
BW 4 GPP_D5/SRCCLKREQ0# PCIE_CLKREQ_VGA# [19] D15 DN51 CNV_WT_RCOMP R68427 150_1%_2 can be NC if no used. , L<11mils
BW 5 CLKOUT_PCIE_P4 DM1 XTAL_38P4M_OUT E15 CSI_C_DP_2 CNVI_W T_RCOMP
CLKOUT_PCIE_N4 XTAL_OUT DL1 XTAL_38P4M_IN A15 CSI_C_DN_2 DJ13 CNV_RGI_RSP
XTAL_IN CSI_C_DP_3 GPP_F3/CNV_RGI_RSP/UART0_CTS# CNV_RGI_DT_R CNV_RGI_RSP [32]
CL7 B15 DG13 R68429 *Short_0201
[28] CLK_PCIE_LANP CLKOUT_PCIE_P3 CSI_C_DN_3 GPP_F2/CNV_RGI_DT/UART0_TXD CNV_RGI_DT [10,32]
CL8 DW 41 DF15 CNV_BRI_RSP
LAN [28] CLK_PCIE_LANN CLKOUT_PCIE_N3 GPD8/SUSCLK SUSCLK_32K [32]
L18 GPP_F1/CNV_BRI_RSP/UART0_RXD DF17 CNV_BRI_DT_R CNV_BRI_RSP [32]
R68431 *Short_0201 CNV_BRI_DT [32]
CB4 DT47 RTC_X2 N18 CSI_C_DP_1 GPP_F0/CNV_BRI_DT/UART0_RTS#
[32] CLK_PCIE_SSDP CLKOUT_PCIE_P2 RTCX2 CSI_C_DN_1
CB5 DR47 RTC_X1 L20 DJ10
SSD [32] CLK_PCIE_SSDN CLKOUT_PCIE_N2 RTCX1 N20 CSI_C_DP_0 GPP_F5/MODEM_CLKREQ/CRF_XTAL_CLKREQ DV15 TP13401
BY4 DN37 RTC_RST# G20 CSI_C_DN_0 GPP_F6/CNV_PA_BLANKING DK10
[32] CLK_PCIE_WLANP CLKOUT_PCIE_P1 RTCRST# SRTC_RST# CSI_C_CLK_P GPP_F4/CNV_RF_RESET# TP13391
WLAN BY3 DK37 H20
[32] CLK_PCIE_WLANN CLKOUT_PCIE_N1 SRTCRST# CSI_C_CLK
CN7 H16
[19] CLK_VGA_P CLKOUT_PCIE_P0 CSI_B_DP_1 CNV_BRI_DT_R [10]
VGA CN8 G16
[19] CLK_VGA_N CLKOUT_PCIE_N0 CSI_B_DN_1
G18
R68443 60.4_1%_2 CLK_BIASREF DJ5 H18 CSI_B_DP_0 R68946 *0_5%_2
XCLK_BIASREF CSI_B_DN_0 CNV_PA_BLANKING [32]
L16
N16 CSI_B_CLK_P
PDG is 60 1% L<25.4mm TGL_U_IP_EXT/BGA CSI_B_CLK
G14
+3V H14 CSI_B_DP_2
C L14 CSI_B_DN_2 C
N14 CSI_B_DP_3
CSI_B_DN_3
R68432 150_1%_2 CSI_RCOMP K14 +1.8V_DEEP_SUS
PCIE_CLKREQ_#6 R68442 *10K_1%_2 CSI_RCOMP
SMART CARD DK25
PCIE_CLKREQ_#5 [40] SC_PWRSV# GPP_H23/IMGCLKOUT4
R68439 *10K_1%_2 DM25
[43] IRQ_R GPP_H22/IMGCLKOUT3 CNV_BRI_RSP
NFC DN25 R68428 *20K_1%_2
[43] DWL_REQ GPP_H21/IMGCLKOUT2
DJ25
PCIE_CLKREQ_WLAN# [43] NFC_RST# GPP_H20/IMGCLKOUT1 CNV_RGI_RSP
R68440 10K_1%_2 DR30 R68430 *20K_1%_2
GPP_D4/IMGCLKOUT_0/BK4/SBK4
PCIE_CLKREQ_SSD# R68436 10K_1%_2 internal PU 20K for both
PCIE_CLKREQ_LAN# TGL_U_IP_EXT/BGA
R68437 10K_1%_2

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PCIE_CLKREQ_VGA# R68441 10K_1%_2

RTC Circuitry(RTC)
R978 *0_4/S
Vinafix.com
+3VPCU

+3VPCU

+3V_RTC_0
B RTC_X1 RTC_X1_R C96709 18p/25V_2 +3V_RTC B
C212 +3V_RTC_2
1

R68433 *0.1u/6.3V_2 +3V_RTC R979 20K_1%_2 RTC_RST# RTC_RST#


*Short_0201 Y5 R953 1K_1%_2 +3V_RTC_1

3
32.768KHZ/20ppm
J9007 2
18–25 ms. CLR_CMOS [33]
D72 C1217 *JUMP
BAT54CW 1u/10V_2 Q22

2
2N7002KTB

1
2

R68434
10M_5%_2 R971 20K_1%_2 SRTC_RST#
R68435
*Short_0201
SRTC_RST#
C96903 C1214 C1211
RTC_X2 RTC_X2_R C96710 18p/25V_2 0.1u/6.3V_2 1u/10V_2 1u/10V_2

3
R68438
*Short_0201 2
+5VPCU

Q6520 R409

1
+3V_RTC_0 1 3 VCCRTC_3 R310 4.7K_1%_2 VCCRTC_4 R67360 4.7K_1%_2 *2N7002KTB 100K_1%_2
Crystal Components with Surrounding 10 mil Wide GND Shield Trace
1
2

Break Out:4-10 mil Wide GND Shield Trace Q28


R67361
2

3 4 METR3904-G
68.1K_1%_2

C96711 10p/25V_2 XTAL_38P4M_IN_R R68444 *Short_0201 XTAL_38P4M_IN CN1


A 50271-0020N-001 A
2
1

R67362
Y6
38.4MHZ/20ppm R68446 150K_5%_2
200K_1%_2

Quanta Computer Inc.


4
3

C96713 12p/25V_2 XTAL_38P4M_OUT_R R68447 *Short_0201 XTAL_38P4M_OUT

PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 11/14(CSI/CNVi/CLK)
Date: Tuesday, October 06, 2020 Sheet 12 of 62
5 4 3 2 1
5 4 3 2 1

13
R68938 *100K_1%_2
U6539G ACZ_SDOUT [10]

ACZ_BCLK
1.8V power rail
DW 15 DR38 R68451 33_1%_2
GPPC_D19 DW 24 GPP_F8/I2S_MCLK2_INOUT GPP_R0/HDA_BCLK/I2S0_SCLK DU37 ACZ_SYNC PCH_AZ_CODEC_BITCLK [26]
TP13290 R68452 33_1%_2
GPP_D19/I2S_MCLK1 GPP_R1/HDA_SYNC/I2S0_SFRM DT37 ACZ_SDOUT PCH_AZ_CODEC_SYNC [26]
R68453 33_1%_2
[15] DGPU_PW_CTRL#
DG41 1.8 V GPP_R2/HDA_SDO/I2S0_TXD DV37 PCH_AZ_CODEC_SDIN0 PCH_AZ_CODEC_SDOUT [26]
PCH_AZ_CODEC_SDIN0 [26]
DT38 GPP_A23/I2S1_SCLK GPP_R3/HDA_SDI0/I2S0_RXD R68455 *100K_1%_2
DV38 GPP_R7/I2S1_SFRM DV41 ACZ_RST# R68454 33_1%_2
R68939 *100K_1%_2 DW 38 GPP_R6/I2S1_TXD 1.8 V GPP_R4/HDA_RST# DL53 PCH_AZ_CODEC_RST# [26]
GPP_R5/HDA_SDI1/I2S1_RXD GPP_A7/I2S2_SCLK/DMIC_CLK_A0 DG51 CNV_RF_RESET# M.2_BT_PCMCLK [32]
D DN31 GPP_A8/I2S2_SFRM/CNV_RF_RESET#/DMIC_DATA_0 DG50 CNV_RF_RESET# [32] D
[25] DMIC_CLK_PCH GPP_S6/SNDW 3_CLK/DMIC_CLK_A0 GPP_A10/I2S2_RXD/DMIC_DATA1 M.2_BT_PCMIN [32]
DM31
[25] DMIC_DAT_PCH GPP_S7/SNDW 3_DATA/DMIC_DATA0 MODEM_CLKREQ
DL49
DK33 GPP_A9/I2S2_TXD/MODEM_CLKREQ/CRF_XTAL_CLKREQ/DMIC_CLK_A1 DL52 MODEM_CLKREQ [32]
[15,33,45] BOARD_ID8_SIM_Type1 GPP_S4/SNDW 2_CLK/DMIC_CLK_A1 GPP_A11/PMC_I2C_SDA/I2S3_SCLK SSD_MS_PWR_EN_GPPA11 [32]
DK31
[15,33,45] BOARD_ID9_SIM_Type2 GPP_S5/SNDW 2_DATA/DMIC_DATA1 INT_BT_OFF#_L
DH49
[15] BOARD_ID10
DW 35 1.8 V GPP_A13/PMC_I2C_SCL/I2S3_TXD/DMIC_CLK_B0 INT_BT_OFF#_L [32]
DV35 GPP_S2/SNDW 1_CLK/DMIC_CLK_B0 DF33 SNDW_RCOMP R68458 200_1%_2
[15] BOARD_ID11 GPP_S3/SNDW 1_DATA/DMIC_CLK_B1 SNDW _RCOMP
DT32
[15] BOARD_ID12 GPP_S0/SNDW 0_CLK
DR35
[15] BOARD_ID13 GPP_S1/SNDW 0_DATA For DSx
For DSx -->Ra +3VPCU +3V_S5
TGL_U_IP_EXT/BGA Non-DSx -->Rb
U6539L BATLOW# Ra R68459 *8.2K_1%_2 AC_PRESENT_EC R68461 *10K_1%_2

+3V_S5 R68471 *10K_1%_2

[33,55] SLP_SUS#_EC
SLP_SUS#_EC DV49 BM9 PROCPWRGD Rb R68460 8.2K_1%_2
SLP_SUS# PROCPW RGD DK41
SLP_S5# GPD3/PW RBTN# DNBSWON# [33]
DM43 DN41 BATLOW#
[35] SLP_S5# GPD10/SLP_S5# GPD0/BATLOW # AC_PRESENT_EC
SUSC# DJ41 DK43 +3V
[33] SUSC# GPD5/SLP_S4# GPD1/ACPRESENT AC_PRESENT_EC [33]
SUSB# DJ43
[13,33,47,53] SUSB# SLP_A# GPD4/SLP_S3# TBT_I2C_INT# SYS_RESET#
DR41 CW 40 R68469 10K_1%_2
SPL_WLAN# GPD6/SLP_A# GPP_B11/PMCALERT# CPU_C10_GATE# TBT_I2C_INT# [36]
DT44 DN27
[32] SPL_WLAN# GPD9/SPL_W LAN# GPP_H18/CPU_C10_GATE# CPU_C10_GATE# [47]
DG31 CPU_C10_GATE# R68468 *100K_1%_2
SLP_S0# GPP_H3/SX_EXIT_HOLDOFF# TP13424
DD42
[30,33,47] SLP_S0# SLP_LAN# GPP_B12/SLP_S0# PCIE_WAKE#
DN39 DK39 PDG then reserve R68935 *100K_1%_2
[28] SLP_LAN# SLP_LAN# W AKE# PCIE_WAKE# [28,32,45]
C R68954 *Short_0201 RSMRST#_R DM35 DM41 LAN_WAKE# C
[33] RSMRST# SYS_RESET# RSMRST# GPD2/LAN_W AKE# LAN_DIS# LAN_WAKE# [28]
DD10 DT41
DD41 SYS_RESET# GPD11/LANPHYPC/DSW LDO_MON LAN_DIS# [28] +3V_DEEP_SUS
PLTRST#
R68593 *Short_0201 GPP_B13/PLTRST# DN43 PCH_TBT_PERST#
[33] PCH_PWROK PCH_DSWROK GPD7 PCH_TBT_PERST# [10]
DK35
R68466 *0_5%_2 SYS_PWROK DF10 DSW _PW ROK CE5 VCCST_PWRGD_TCSS PCIE_WAKE# R68463 1K_1%_2
[4,53] IMVP_PWRGD PCH_PWROK_R SYS_PW ROK VCCSTPW RGOOD_TCSS H_VCCST_PWRGD VCCST_PWRGD_TCSS [47]
DN35 BP8
R68467 *0_5%_2 PCH_PW ROK VCCST_PW RGD BP9 VCCST_OVERRIDE LAN_WAKE# R36 4.7K_1%_2
[33] EC_PWROK VCCST_OVERRIDE VCCST_OVERRIDE [47]
DM37
[10] INTRUDER# INTRUDER# GPP_F20
DT49 DR12
SPIVCCIOSEL GPP_F20/EXT_PW R_GATE# DW 12 GPP_F21
C96716 0.1u/6.3V_2 GPP_F21/EXT_PW R_GATE2# MODEM_CLKREQ R68472 10K_1%_2

[10] INPUT3VSEL TGL_U_IP_EXT/BGA CNV_RF_RESET# R68477 75K_1%_2

https://vinafix.com/
SLP_SUS#_EC R68475 100K_1%_2

SUSB# R68474 100K_1%_2


DSWPGD control System PWR_OK(CLG)
PLTRST#(CLG) SUSC# R68473 100K_1%_2
PLTRST# SYS_PWROK R68478 *Short_0201 EC_PWROK
RSMRST#_R PLTRST# [19,28,30,32,33,39,45] RSMRST#_R
R68476 *0_5%_2 R68470 100K_1%_2

R68483 PCH_PWROK_R R68918 100K_1%_2


100K_1%_2 R68484
100K_1%_2 PROCPWRGD R68480 *10K_1%_2

R68479 *Short_0201 PCH_DSWROK SLP_S5# R338 100K_1%_2


[33] DPWROK_EC
R68683 *Short_0201
B B
R68482 R68919 *0_5%_4 +3VPCU
R68481 C96717 +3V_DEEP_SUS
*1M_1%_2 *0.01u/50V_4
100K_1%_2 TBT reset
R68920 *Short_0402 TBT_I2C_INT# R68728 2.2K_5%_2
+3V_S5
LAN_DIS# R68927 *10K_1%_2

5
1 PLTRST#
4 +3V_DEEP_SUS
[35] TCP_RETIMER_PERST# PCH_TBT_PERST#
2
R68485 *100K_1%_2
U6554 *MC74VHC1G08DFT2G
VCCST_PWRGD control

3
R68684 SLP_S0# R68486 100K_1%_2

*100K_1%_2 Pull-up resistor is required on


+VCCST +1.8V +5V_S5 +3V_S5
GPP_B12 / SLP_S0# if a device is
monitoring SLP_S0# before
R68685 *0_5%_2
RSMRST# de-assertion

R68489 R68490
R68487 R68488 100K_1%_2 10K_1%_2 +VCCST GPP_F20 R68937 100K_1%_2
15K_1%_2 *15K_1%_2
GPP_F21 R68936 100K_1%_2
HWPG No use pin
R68491 SLP_A# R68933 100K_1%_2
3

1K_1%_2
+1.0V_PWRGD_G2 2 Q6588 SPL_WLAN# R68934 100K_1%_2
2N7002KTB
A R68493 SLP_LAN# C96905 0.33u/25V_2 A
3

R68492 60.4_1%_2
1

+1.0V_PWRGD_G1 2 Q6589 100K_1%_2 D13106 2 RB500V-40 H_VCCST_PWRGD_R H_VCCST_PWRGD


[33] HWPG
METR3904-G 1
1

C96719 R68494
0.1u/6.3V_2 100K_1%_2
[13,33,47,53] SUSB# D13107 2 RB500V-40 C96718 Quanta Computer Inc.
1 *10p/25V_2
PROJECT : Z8IA_ZAIA
Size Document Number Rev
D13108 2 *RB500V-40 PCH_PWROK_R 1A
1 TGL-U 12/14(PM/HDA/SD3.0)
Date: Tuesday, October 06, 2020 Sheet 13 of 62
5 4 3 2 1
5 4 3 2 1

VID1

0
VID0

1
Voltage

1.1
Usage

Power saving

Power saving
14
1 0 1.65 Full Current
+VCCIN_AUX: 27A
D
1 1 1.8 Initial boot oe Full current D
+VCCIN_AUX
U6539N

C96730 47u/6.3V_6 C96720 22u/6.3V_6 C96731 10u/6.3V_4


Backside Cap AB12 CY18 1545mA
VCCIN_AUX_1 VCCPRIM_1P8_1 +1.8V_DEEP_SUS
C96721 47u/6.3V_6 C96722 22u/6.3V_6 C96723 10u/6.3V_4 C96732 10u/6.3V_4 AC10 CY20
AE10 VCCIN_AUX_2 VCCPRIM_1P8_2 CY24 C96724 *1u/10V_2
C96725 47u/6.3V_6 C96734 22u/6.3V_6 C96735 10u/6.3V_4 C96736 10u/6.3V_4 AK2 VCCIN_AUX_3 VCCPRIM_1P8_3 CY26 C96733 *1u/10V_2
AR10 VCCIN_AUX_4 VCCPRIM_1P8_4 DA18
C96726 22u/6.3V_6 C96738 10u/6.3V_4 C96727 10u/6.3V_4 AT12 VCCIN_AUX_5 VCCPRIM_1P8_5 DA20
C96737 *47u/6.3V_6 AU10 VCCIN_AUX_6 VCCPRIM_1P8_6 DA22
C96739 22u/6.3V_6 C96728 10u/6.3V_4 C96740 10u/6.3V_4 AW 10 VCCIN_AUX_7 VCCPRIM_1P8_7 DA24
BV1 VCCIN_AUX_8 VCCPRIM_1P8_8 DA26
C96729 22u/6.3V_6 C96741 10u/6.3V_4 C96742 10u/6.3V_4 BV39 VCCIN_AUX_9 VCCPRIM_1P8_9 DC18
BW 40 VCCIN_AUX_10 VCCPRIM_1P8_10 DC20
C96743 22u/6.3V_6 C96744 10u/6.3V_4 C96745 10u/6.3V_4 BY39 VCCIN_AUX_11 VCCPRIM_1P8_11 DC22
CC1 VCCIN_AUX_12 VCCPRIM_1P8_12 DC24
C96746 22u/6.3V_6 C96747 10u/6.3V_4 C96748 10u/6.3V_4 CD12 VCCIN_AUX_13 VCCPRIM_1P8_13 DC26
CF10 VCCIN_AUX_14 VCCPRIM_1P8_14 DD20
C96749 22u/6.3V_6 C96750 10u/6.3V_4 C96751 10u/6.3V_4 CG12 VCCIN_AUX_15 VCCPRIM_1P8_15 DD22
CH10 VCCIN_AUX_16 VCCPRIM_1P8_16 DV22 R68495 *0_5%_6
VCCIN_AUX_17 VCCPRIM_1P8_17 +3VPCU
C96752 22u/6.3V_6 C96753 10u/6.3V_4 C96754 10u/6.3V_4 CJ1
CJ12 VCCIN_AUX_18 DA35 186mA +VCCPRIM_3P3 R68496 *Short_0603
VCCIN_AUX_19 VCCPRIM_3P3_1 +3V_DEEP_SUS
C96755 22u/6.3V_6 C96756 10u/6.3V_4 C96757 10u/6.3V_4 CK10 DC28
CL12 VCCIN_AUX_20 VCCPRIM_3P3_2 DC30 C96758 *1u/10V_2
C96759 22u/6.3V_6 C96760 10u/6.3V_4 CM10 VCCIN_AUX_21 VCCPRIM_3P3_3 DD30 C96761 *0.1u/6.3V_2
CP1 VCCIN_AUX_22 VCCPRIM_3P3_4
C96762 10u/6.3V_4 CP10 VCCIN_AUX_23 DV34 DCPRTC C96931 0.1u/6.3V_2
C CR12 VCCIN_AUX_24 DCPRTC C
C96763 10u/6.3V_4 CT10 VCCIN_AUX_25 DV46 +VCCLDOSTD_OUT_0P85 C96764 2.2u/10V_4
CU12 VCCIN_AUX_26 VCCLDOSTD_0P85
C96765 10u/6.3V_4 CY1 VCCIN_AUX_27 DV16 90mA VCCA_CLKLDO_1V8 R68497 *Short_0402
VCCIN_AUX_28 VCCA_CLKLDO_1P8_1 +1.8V_DEEP_SUS
AK1 DC15 C96766 47u/6.3V_6
VCCIN_AUX_29 VCCA_CLKLDO_1P8_2
AV9 DV28 22mA +VCCDPHY_1P24 C96767 4.7u/6.3V_4 TP13429
[54] VSS_AUX_SENSE AT9 VCCIN_AUX_VSSSENSE VCCDPHY_1P24
[54] VCC_AUX_SENSE VCCIN_AUX_VCCSENSE +VCCDSW_1P05
DD38 3mA C96768 1u/10V_2
+VNN_EXT VCCDSW _1P05
R68498 *1K_1%_2 500mA DD17
DD18 VCC_VNNEXT_1P05_1 BR3
VCC_VNNEXT_1P05_2 VCC1P05_OUT_FET_1 +VCC1.05_OUT_FET
BR4
R68499 *100K_1%_2 500mA DA15 VCC1P05_OUT_FET_2 BT5
VCC_V1P05EXT_1P05_1 VCC1P05_OUT_FET_3 +VCC1.05_OUT_PCH
DA17
+1.05V_EXT VCC_V1P05EXT_1P05_2 DA31 R68500 *Short_0402
VCCPRIM1P05_OUT_PCH_1 +3V_RTC

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VRALERT# DB39 DC33
VNN_CTRL DV12 GPP_B2/VRALERT# VCCPRIM1P05_OUT_PCH_2 DC31 C96769 1u/10V_2 C96772 *1u/10V_2
TP13402 V1P05_CTRL DT12 GPP_F22/VNN_CTRL VCCPRIM1P05_OUT_PCH_3 C96770 0.1u/6.3V_2 R68501 *Short_0402
TP13403 GPP_F23/V1P05_CTRL DC35 202mA +VCCRTC
+3V_S5 For DSX/NDSX option
C96771 *1u/10V_2 For DSX -->+3VPCU
R68502 *Short_0201 VCCAUX_VID0_R DB37 VCCRTC DD37 5mA VCCDSW_3P3 R68503 *0_5%_4
[47,54] VCCAUX_VID0
R68504 *Short_0201 VCCAUX_VID1_R DB38 GPP_B0/CORE_VID0 DSW VCCDSW _3P3 DA28 22mA R68505 *Short_0201 +1.8V_DEEP_SUS
+3VPCU Non-DSX -->+3V_S5
[47,54] VCCAUX_VID1 GPP_B1/CORE_VID1 AUDIO POWER VCCPGPPR R68506 *0_5%_2 +3V_DEEP_SUS
CY31 +VCCPFUSE_3P3 R68507 *Short_0402
VCCPRIM_3P3_5 ?
+3V_DEEP_SUS
CY33
R68509 100K_1%_2 VCCPRIM_3P3_6 CV39
? R68508 *0_5%_4
+1.8V_DEEP_SUS VCCPRIM_1P8_18 +3VPCU
+1.8V_DEEP_SUS
R68510 100K_1%_2 AP12 AP12
RSVD_1 TP13294

B TGL_U_IP_EXT/BGA B

+3V_DEEP_SUS

R68513 +3V_S5 +3V_DEEP_SUS


100K_1%_2 +1.8V_S5 +1.8V_DEEP_SUS
+VCCSTG_TERM

Q6654
2

PJA138K R68812 *Short_0805 R68511 *Short_0805


VRALERT# 3 1 H_PROCHOT# [4,33,50,53]

C96773 C96774
R68514 *0_5%_2 1u/10V_2 0.1u/6.3V_2

R68913 *Short_0201
H_PROCHOT#_CCG5 [36]

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 13/14(PCH POWER)
Date: Tuesday, October 06, 2020 Sheet 14 of 62
5 4 3 2 1
5 4 3 2 1

+3V_DEEP_SUS

R68515

R68517
14@10K_1%_2

CRT@10K_1%_2
BOARD_ID0

BOARD_ID1
[9] BOARD_ID0

[9] BOARD_ID1
R68516

R68518
15@10K_1%_2

CRT_N@10K_1%_2 BOARD_ID0 14@


Low

15@
High 15
[9] BOARD_ID2
R68519 NFC@10K_1%_2 BOARD_ID2 R68520 NFC_N@10K_1%_2
BOARD_ID1 CRT@ CRT_N@
high UMA Only

D [9] BOARD_ID3 BOARD_ID2 NFC@ NFC_N@ DGPU_PW_CTRL# D


GPU power is control by PCH
R68521 FTPM@10K_1%_2 BOARD_ID3 R68522 DTPM@10K_1%_2 low GPIO (Discrete, SG or Optimize)
BOARD_ID3 FTPM@ DTPM@
[9,25] BOARD_ID4_TSN teknisi indonesia BOARD_ID4
TSN@
(Cable control)
TSN_N@
(Default) [13] DGPU_PW_CTRL#
+3V

R68524 *10K_1%_2 BOARD_ID4 R68525 10K_1%_2


R68779 EV@100K_1%_2 DGPU_PW_CTRL# R68780 IV@1K_1%_2
BOARD_ID5 SM@ SM_N@
[9] BOARD_ID5
R68526 SM@10K_1%_2 BOARD_ID5 R68527 SM_N@10K_1%_2
MIC_Single@ MIC_Dual@
BOARD_ID6 (Cable control) (default)

[9,25] BOARD_ID6_MIC_Single
BOARD_ID7 LTE@ LTE_N@
BOARD_ID8 11 : no support LTE DGPU_PW_CTRL# VGA H/W Setup
R68528 *10K_1%_2 BOARD_ID6 R68529 10K_1%_2 10 : u-SIM Signal Menu
SIM Card type 01 : e-SIM
BOARD_ID9 00 : u-SIM+e-SIM UMA Only 1 UMA Hidden UMA boot
[9] BOARD_ID7
R68530 LTE@10K_1%_2 BOARD_ID7 R68531 LTE_N@10K_1%_2 +1.8V_DEEP_SUS SEN_HUB@ SEN_HUB_N@
BOARD_ID10 SG/Optimise 0 GPU Hidden GPU boot

[13,33,45] BOARD_ID8_SIM_Type1 R68957 *Short_0201 BOARD_ID11 SPIN@ SPIN_N@

R68771 *10K_1%_2 BOARD_ID8 R68772 10K_1%_2 BOARD_ID12 IR@ IR_N@


R69028 *Short_0201
C [13,33,45] BOARD_ID9_SIM_Type2 C
R68773 *10K_1%_2 BOARD_ID9 R68774 10K_1%_2 BOARD_ID13 P2@ N1@
[13] BOARD_ID10
R68775 SPIN@10K_1%_2 BOARD_ID10 R68776 SPIN_N@10K_1%_2

[13] BOARD_ID11
R68777 SPIN@10K_1%_2 BOARD_ID11 R68778 SPIN_N@10K_1%_2

[13] BOARD_ID12
R68793 IR@10K_1%_2 BOARD_ID12 R68794 IR_N@10K_1%_2

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[13] BOARD_ID13
R68858 P2@10K_1%_2 BOARD_ID13 R68859 N1@10K_1%_2

Boot Strap 0/1/2/3


Boot Strap 0 GPP_C5 Boot Strap 1 GPP_H0 Boot Strap 2 GPP_H1 Boot Strap 3 GPP_H2 Boot Strap 4-bit boot strap configuration encodings
Table +3V_DEEP_SUS Table +3V_DEEP_SUS Table +3V_DEEP_SUS Table +3V_DEEP_SUS
B B
0000 BIOS/CSME on SPI & eSPI is enabled

0010 BIOS/CSME on SPI & eSPI is disabled


R68536 R68537 R68538 R68539
*4.7K_1%_2 *4.7K_1%_2 *4.7K_1%_2 *4.7K_1%_2
Checklist PU 0100 BIOS on eSPI Peripheral Channel; CSME on master SPI
[9] SML0_ALERT# [4] GPP_H0 [4] GPP_H1 [4] GPP_H2

1000 BIOS/CSME on eSPI


R68540 R68541 R68542 R68543
iPD *20K_1%_2 iPD *20K_1%_2 iPD *20K_1%_2 iPD *20K_1%_2 1100 BIOS on eSPI peripheral Channel; CSME on slave SPI

TBT LSX PINS VCCIO CONFIGURATION


Port Voltage GPP_E19 Port Voltage GPP_E21 Port Voltage GPP_D10 Port Voltage GPP_D12
+3V_DEEP_SUS +3V_DEEP_SUS +3V_DEEP_SUS +3V_DEEP_SUS
High: 3.3V High: 3.3V High: 3.3V High: 3.3V
Low: 1.8V Low: 1.8V Low: 1.8V Low: 1.8V
RING OSCILLATOR BYPASS
R68365 R68366 R68367 R68368 High: BYPASS MODE ENABLED
*4.7K_1%_2 *4.7K_1%_2 4.7K_1%_2 *4.7K_1%_2
A Low: RING OSCILLATOR A

[2,35] TBT_LSX0_RXD_Soc [2] TBT_LSX1_RXD [2] TBT_LSX2_RXD [2] TBT_LSX3_RXD


(QUALIFIED BY DFXTESTMODE)
NO INTERNAL PU/PD
TCP Intel B.B/1.8V no use TCP HDMI/3.3V no use
R68372 R68373 R68374 R68375
iPD *20K_1%_2 iPD *20K_1%_2 iPD *20K_1%_2 iPD *20K_1%_2 GPP_H3
Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TGL-U 14/14 (BLANK)
Date: Tuesday, October 06, 2020 Sheet 15 of 62
5 4 3 2 1
5 4 3 2 1

BIOS ROM 16M (CLG)


16
D R68571 *Short_0201 PCH_SPI0_CLK_R R68572 15_1%_2 SPI0_CLK_R D
[9] PCH_SPI0_CLK
R68573 *Short_0201 PCH_SPI0_SI_R R68574 15_1%_2 SPI0_SI_R
[9,10] PCH_SPI0_SI

PCH Side [9]


[9,10]
PCH_SPI0_SO
PCH_SPI0_IO2
R68575
R68577
R68579
*Short_0201
*Short_0201
*Short_0201
PCH_SPI0_SO_R
PCH_SPI0_IO2_R
PCH_SPI0_IO3_R
R68576
R68578
R68580
15_1%_2
49.9_1%_2
49.9_1%_2
SPI0_SO_R
BIOS_WP#
HOLD#
ROM
[9,10] PCH_SPI0_IO3 PCH_SPI0_CS0#_R
[9] PCH_SPI0_CS0# R68581 *Short_0201
R68582 *Short_0201 SPI0_CS0#_R
[9] SPI_TPM_CS#
Branching
R68583 15_1%_2
100mil R68584 100_1%_2
[30] TPM_SPI0_CLK PCH_SPI1_CLK_R [33]
[30] TPM_SPI0_SI R68585 15_1%_2 R68586 100_1%_2 PCH_SPI1_SI_R [33]
TPM Side [30] TPM_SPI0_SO R68587

R68921
15_1%_2

*Short_0201
R68588

R68589
100_1%_2

*Short_0201
PCH_SPI1_SO_R [33] EC Side
[30] SPI_TPM_CS#_TPM PCH_SPI_CS0#_R [33]

+3V_DEEP_SUS
+3V_SPI
1 SPI0_CS0#_R
TP13311 SPI0_CLK_R
1
TP13312 SPI0_SI_R
1
TP13313 SPI0_SO_R
R68789 *Short_0603 1
TP13314 BIOS_WP#
1
TP13315
1 HOLD#
TP13316

+3V_SPI C96793
C C
0.1u/6.3V_2
R68591 *1K_1%_2

C96794
1u/10V_2 U6546
8 5 SPI0_SI_R
BIOS_WP# 3 VCC DI(IO0) 2 SPI0_SO_R
HOLD# 7 W P(IO2) DO(IO1) 1 SPI0_CS0#_R
4 HOLD(IO3) CS 6 SPI0_CLK_R
GND CLK
+3V_SPI
C96795
22p/25V_2

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R68592 *1K_1%_2 XX@vpro_32M/non-vpro_16M

SPI ROM(SO-8)
B SPI ROM Socket (SO-8) Vender Size P/N B
+3V_SPI

U6547
8 5 SPI0_SI_R
BIOS_WP# 3 VCC DI(IO0) 2 SPI0_SO_R
HOLD# 7 W P(IO2) DO(IO1) 1 SPI0_CS0#_R
4 HOLD(IO3) CS 6 SPI0_CLK_R
GND CLK
*50960-0084N-001 Socket

DG008000011

SPI ROM(WSON)
SPI ROM Socket (WSON) Vender Size P/N

U6548
SPI0_CS0#_R 1 8 +3V_SPI
CS VCC
A SPI0_SO_R 2 7 HOLD# A
IO1/DO IO3/HOLD
BIOS_WP# 3 6 SPI0_CLK_R
IO2/W P CLK
5 SPI0_SI_R
4 IO0/DI Socket
H1

H2

GND
Quanta Computer Inc.
9

10

*W25Q64FVSSIQ
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
DFHS08FS046 Flash ROM (BIOS,EC)
Date: Tuesday, October 06, 2020 Sheet 16 of 62
5 4 3 2 1
5 4 3 2 1

[3] M_A_A[13:0] M_A_A0


M_A_A1
M_A_A2
M_A_A3
144
133
132
131
JDIM1A

A0
A1
A2
DQ0
DQ1
DQ2
8
7
20
21
M_A_DQ58
M_A_DQ62
M_A_DQ59
M_A_DQ61
M_A_DQ[63:0] [3]

2.48A
+1.2VSUS

111
112
117
JDIM1B

VDD1
VDD2
17
M_A_A4 128 A3 DQ3 4 M_A_DQ56 56-63 118 VDD3 255
M_A_A5 126 A4 DQ4 3 M_A_DQ60 123 VDD4 VDDSPD +3V
M_A_A6 127 A5 DQ5 16 M_A_DQ63 124 VDD5
M_A_A7 122 A6 DQ6 17 M_A_DQ57 129 VDD6 257
A7 DQ7 VDD7 VPP1 +2.5V_SUS
M_A_A8 125 28 M_A_DQ52 130 259
M_A_A9 121 A8 DQ8 29 M_A_DQ51 135 VDD8 VPP2
D M_A_A10 146 A9 DQ9 41 M_A_DQ50 136 VDD9 D
M_A_A11 120 A10/AP DQ10 42 M_A_DQ54 48-55 141 VDD10 258
M_A_A12 119 A11 DQ11 24 M_A_DQ48 142 VDD11 VTT +VDDQ_VTT
M_A_A13 158 A12 DQ12 25 M_A_DQ53 147 VDD12
151 A13 DQ13 38 M_A_DQ55 148 VDD13
[3] M_A_WE# A14/W E# DQ14 M_A_DQ49 VDD14 +SMDDR_VREF_DIMM
156 37 153 164
[3] M_A_CAS# A15/CAS# DQ15 VDD15 VREFCA +SMDDR_VREF_DIMM
152 50 M_A_DQ45 154
[3] M_A_RAS# A16/RAS# DQ16 M_A_DQ46 VDD16
49 159 wide/spacing --> 20mils/20mils
162 DQ17 62 M_A_DQ40 160 VDD17
165 CS2#/C0/NC DQ18 63 M_A_DQ41 40-47 163 VDD18
CS3#/C1/NC DQ19 46 M_A_DQ44 VDD19
DQ20 45 M_A_DQ47
114 DQ21 58 M_A_DQ42 1 2

DDR4 SODIMM 260 PIN


[3] M_A_ACT# ACT# DQ22 M_A_DQ43 VSS1 VSS48
143 59 5 6
[3] M_A_PARITY 116 PARITY DQ23 70 M_A_DQ39 9 VSS2 VSS49 10
[3] M_A_ALERT# PM_EXTTS#0 134 ALERT# DQ24 71 M_A_DQ38 15 VSS3 VSS50 14
108 EVENT# DQ25 83 M_A_DQ35 19 VSS4 VSS51 18
[3,18] DDR4_DRAMRST# RESET# DQ26 M_A_DQ34 VSS5 VSS52
84 32-39 23 22
DQ27 66 M_A_DQ36 27 VSS6 VSS53 26

DDR4 SODIMM 260 PIN


+1.2VSUS DQ28 VSS7 VSS54
C249 *0.1u/6.3V_2 67 M_A_DQ37 31 30
DQ29 79 M_A_DQ32 35 VSS8 VSS55 36
DQ30 80 M_A_DQ33 39 VSS9 VSS56 40
DQ31 174 M_A_DQ12 43 VSS10 VSS57 44
DQ32 173 M_A_DQ10 47 VSS11 VSS58 48
R69025 R224 DQ33 187 M_A_DQ8 51 VSS12 VSS59 52
*10K_1%_2 240_1%_2 DQ34 186 M_A_DQ13 57 VSS13 VSS60 56
DQ35 170 M_A_DQ9 8-15 61 VSS14 VSS61 60
2

DQ36 169 M_A_DQ11 65 VSS15 VSS62 64


DQ37 183 M_A_DQ14 69 VSS16 VSS63 68

(260P)
3 1 PM_EXTTS#0 DQ38 VSS17 VSS64
[4,18,46] PM_THRMTRIP# 182 M_A_DQ15 73 72
C DQ39 195 M_A_DQ6 77 VSS18 VSS65 78 C
Q6639 *METR3904-G DQ40 VSS19 VSS66
150 194 M_A_DQ5 81 82
[3] M_A_BS#0 BA0 DQ41 M_A_DQ2 VSS20 VSS67
145 207 85 86
[3] M_A_BS#1 BA1 DQ42 VSS21 VSS68
115 208 M_A_DQ3 0-7 89 90
[3] M_A_BG#0 BG0 DQ43 M_A_DQ7 VSS22 VSS69

(260P)
113 191 93 94
[3] M_A_BG#1 BG1 DQ44 M_A_DQ4 VSS23 VSS70
190 99 98
149 DQ45 203 M_A_DQ0 103 VSS24 VSS71 102
[3] M_A_CS#0 CS0# DQ46 M_A_DQ1 VSS25 VSS72
157 204 107 106
[3] M_A_CS#1 CS1# DQ47 M_A_DQ29 VSS26 VSS73
109 216 167 168
[3] M_A_CKE0 CKE0 DQ48 M_A_DQ27 VSS27 VSS74
110 215 171 172
[3] M_A_CKE1 CKE1 DQ49 M_A_DQ30 VSS28 VSS75
228 175 176
137 DQ50 229 M_A_DQ28 24-31 181 VSS29 VSS76 180
[3] M_A_CLKP0 CK0 DQ51 M_A_DQ31 VSS30 VSS77
139 211 185 184
+3V [3] M_A_CLKN0 CK0# DQ52 M_A_DQ24 VSS31 VSS78
138 212 189 188
[3] M_A_CLKP1 CK1 DQ53 M_A_DQ25 VSS32 VSS79
140 224 193 192
[3] M_A_CLKN1 CK1# DQ54 VSS33 VSS80

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225 M_A_DQ26 197 196
155 DQ55 237 M_A_DQ21 201 VSS34 VSS81 202
[3] M_A_DIM0_ODT0 ODT0 DQ56 M_A_DQ17 VSS35 VSS82
161 236 205 206
[3] M_A_DIM0_ODT1 ODT1 DQ57 VSS36 VSS83
249 M_A_DQ16 209 210
R225 R226 R227 253 DQ58 250 M_A_DQ22 213 VSS37 VSS84 214
*0_5%_4 *0_5%_4 *0_5%_4 [9,18,38] SMB_RUN_CLK 254 SCL DQ59 232 M_A_DQ19 217 VSS38 VSS85 218
[9,18,38] SMB_RUN_DAT
16-23
SDA DQ60 233 M_A_DQ23 223 VSS39 VSS86 222
CHA_SA0 256 DQ61 245 M_A_DQ18 227 VSS40 VSS87 226
CHA_SA0 CHA_SA1 CHA_SA2 CHA_SA1 260 SA0 DQ62 246 M_A_DQ20 231 VSS41 VSS88 230
+1.2VSUS CHA_SA2 166 SA1 DQ63 235 VSS42 VSS89 234
SA2 EZIW 13 M_A_DQSP7 M_A_DQSP[7:0] [3] 239 VSS43 VSS90 238
R228 R229 R230 R233 *240_1%_2 M_A_CB0 92 DQS0 34 M_A_DQSP6 243 VSS44 VSS91 244
*0_4/S *0_4/S *0_4/S R234 *240_1%_2 M_A_CB1 91 CB0/NC DQS1 55 M_A_DQSP5 247 VSS45 VSS92 248
R235 *240_1%_2 M_A_CB2 101 CB1/NC DQS2 76 M_A_DQSP4 251 VSS46 VSS93 252
R236 *240_1%_2 M_A_CB3 105 CB2/NC DQS3 179 M_A_DQSP1 VSS47 VSS94
B R237 *240_1%_2 M_A_CB4 88 CB3/NC DQS4 200 M_A_DQSP0 B
R238 *240_1%_2 M_A_CB5 87 CB4/NC DQS5 221 M_A_DQSP3
M_A_CB6 CB5/NC DQS6 M_A_DQSP2 263
R239 *240_1%_2 100 242 263 261
R240 *240_1%_2 M_A_CB7 104 CB6/NC DQS7 97 M_A_DQSP8 +VDDQ_VTT 264 GND#1 262
Follow reference board CB7/NC DQS8
264
GND#2
M_A_DQSN7 M_A_DQSN[7:0] [3]
DIMM0 SA0,1,2=LLL 12
DM0_n/DBI0_n DQS#0
11 C251 1u/10V_2
+1.2VSUS 33 32 M_A_DQSN6
+1.2VSUS 54 DM1_n/DBI1_n DQS#1 53 M_A_DQSN5 C253 1u/10V_2
75 DM2_n/DBI2_n DQS#2 74 M_A_DQSN4
C250 1u/10V_2 178 DM3_n/DBI3_n DQS#3 177 M_A_DQSN1 C259 10u/6.3V_4
199 DM4_n/DBI4_n DQS#4 198 M_A_DQSN0
C252 1u/10V_2 220 DM5_n/DBI5_n DQS#5 219 M_A_DQSN3
241 DM6_n/DBI6_n DQS#6 240 M_A_DQSN2 VREF DQ0 M1 Solution
C254 1u/10V_2 96 DM7_n/DBI7_n DQS#7 95 M_A_DQSN8 C255 *1u/10V_2
R69023 *0_5%_2 DBI8# DQS#8
C256 1u/10V_2 C257 *1u/10V_2 +1.2VSUS
D4AS0-26001-1P40
C267 10u/6.3V_4 C261 *10u/6.3V_4

C268 10u/6.3V_4
+1.2VSUS +1.2VSUS +SMDDR_VREF_DIMM R241
C270 10u/6.3V_4 1K_1%_2
C264 0.1u/6.3V_2
C272 10u/6.3V_4 R242 2_1%_6 +SMDDR_VREF_DIMM R67574 *0_5%_4
[3] SM_VREF +VDDQ
C265 2.2u/10V_4
+1.2VSUS R231 R232
C258 *1u/10V_2 240_1%_2 240_1%_2 +2.5V_SUS
EC5 180p/25V_2 C266 R243
C260 *1u/10V_2 C269 1u/10V_2 0.022u/25V_4 1K_1%_2
EC6 180p/25V_2
A C262 *1u/10V_2 C275 10u/6.3V_4 R244 24.9_1%_2 A
M_A_DQSP8 M_A_DQSN8
C263 *1u/10V_2 C271 *1u/10V_2

C274 *10u/6.3V_4 C273 *10u/6.3V_4

C276 *10u/6.3V_4 +3V


Quanta Computer Inc.
C277 *10u/6.3V_4 C278 0.1u/6.3V_2

C279 *10u/6.3V_4 C280 2.2u/10V_4 PROJECT : Z8IA_ZAIA


Size Document Number Rev
1A
DDR4 DIMM0-STD(4.0H)
Date: Tuesday, October 06, 2020 Sheet 17 of 62
5 4 3 2 1
5 4 3 2 1

[3] M_B_A[13:0]
Vinafix.com
JDIM02A
M_B_DQ[63:0] [3]
+1.2VSUS

2.48A
111
112
117
JDIM02B

VDD1
VDD2
18
118 VDD3 255
M_B_A0 144 8 M_B_DQ43 VDD4 VDDSPD +3V
M_B_A1 A0 DQ0 M_B_DQ47 123
133 7 VDD5
M_B_A2 A1 DQ1 M_B_DQ41 124
132 20 VDD6
M_B_A3 A2 DQ2 M_B_DQ44 129 257
131 21 VDD7 VPP1 +2.5V_SUS
M_B_A4 A3 DQ3 M_B_DQ45 130 259
128 4 VDD8 VPP2
M_B_A5 126 A4 DQ4 3 M_B_DQ46 40-47 135
0.5A
D 136 VDD9 D
M_B_A6 127 A5 DQ5 16 M_B_DQ42
141 VDD10 258
M_B_A7 122 A6 DQ6 17 M_B_DQ40 +VDDQ_VTT
142 VDD11 VTT
M_B_A8 125 A7 DQ7 28 M_B_DQ36
147 VDD12
M_B_A9 121 A8
A9
DQ8
DQ9
29 M_B_DQ38
148 VDD13 600mA
M_B_A10 146 41 M_B_DQ33 VDD14
A10/AP DQ10 153 164 +SMDDR_VREF_DQ1_M1
M_B_A11 120 42 M_B_DQ35 VDD15 VREFCA +SMDDR_VREF_DQ1_M1
M_B_A12 A11 DQ11 M_B_DQ37 32-39 154
119 24 VDD16
M_B_A13 A12 DQ12 M_B_DQ39 159 wide/spacing --> 20mils/20mils
158 25 VDD17
A13 DQ13 M_B_DQ32 160
151 38 VDD18
[3] M_B_WE# A14/WE# DQ14 M_B_DQ34 163
156 37 VDD19
[3] M_B_CAS# A15/CAS# DQ15 M_B_DQ58
152 50
[3] M_B_RAS# A16/RAS# DQ16 M_B_DQ61
49
DQ17 M_B_DQ63 1 2
162 62

DDR4 SODIMM 260 PIN


T1 5 VSS1 VSS48 6
165 CS2#/C0/NC DQ18 63 M_B_DQ60
T2 56-63 9 VSS2 VSS49 10
CS3#/C1/NC DQ19 46 M_B_DQ59
15 VSS3 VSS50 14
DQ20 45 M_B_DQ62
19 VSS4 VSS51 18
114 DQ21 58 M_B_DQ56
[3] M_B_ACT# 23 VSS5 VSS52 22
143 ACT# DQ22 59 M_B_DQ57
[3] M_B_PARITY 27 VSS6 VSS53 26
116 PARITY DQ23 70 M_B_DQ55
[3] M_B_ALERT# 31 VSS7 VSS54 30
PM_EXTTS#1 134 ALERT# DQ24 71 M_B_DQ49
35 VSS8 VSS55 36
108 EVENT# DQ25 83 M_B_DQ50
[3,17] DDR4_DRAMRST# 39 VSS9 VSS56 40
RESET# DQ26 84 M_B_DQ53
+1.2VSUS 48-55 43 VSS10 VSS57 44
C20103 *0.1u/6.3V_2 DQ27 66 M_B_DQ51 VSS11 VSS58

DDR4 SODIMM 260 PIN


DQ28 M_B_DQ54 47 48
67 VSS12 VSS59
DQ29 M_B_DQ52 51 52
79 VSS13 VSS60
DQ30 M_B_DQ48 57 56
80 VSS14 VSS61
DQ31 M_B_DQ8 61 60
174 VSS15 VSS62
DQ32 M_B_DQ13 65 64
R1684 R69024 173 VSS16 VSS63
DQ33 69 68

(260P)
*10K_1%_2 240_1%_2 187 M_B_DQ9 VSS17 VSS64
DQ34 M_B_DQ11 73 72
186 VSS18 VSS65
2

C DQ35 170 M_B_DQ15 8-15 77 78 C


81 VSS19 VSS66 82
DQ36 169 M_B_DQ14
3 1 PM_EXTTS#1 85 VSS20 VSS67 86
[4,17,46] PM_THRMTRIP# DQ37 183 M_B_DQ10
89 VSS21 VSS68 90
DQ38 182 M_B_DQ12
*METR3904-G 93 VSS22 VSS69 94
Q124 DQ39 195 M_B_DQ5
99 VSS23 VSS70 98
150 DQ40 194 M_B_DQ6
[3] M_B_BS#0 103 VSS24 VSS71 102
145 BA0 DQ41 207 M_B_DQ2
[3] M_B_BS#1 0-7 107 VSS25 VSS72 106
115 BA1 DQ42 208 M_B_DQ7
[3] M_B_BG#0 167 VSS26 VSS73 168
113 BG0 DQ43 191 M_B_DQ4

(260P)
[3] M_B_BG#1 171 VSS27 VSS74 172
BG1 DQ44 190 M_B_DQ0
175 VSS28 VSS75 176
149 DQ45 203 M_B_DQ3
[3] M_B_CS#0 181 VSS29 VSS76 180
157 CS0# DQ46 204 M_B_DQ1
+3V [3] M_B_CS#1 185 VSS30 VSS77 184
109 CS1# DQ47 216 M_B_DQ31
[3] M_B_CKE0 189 VSS31 VSS78 188
110 CKE0 DQ48 215 M_B_DQ27
[3] M_B_CKE1 193 VSS32 VSS79 192
CKE1 DQ49 228 M_B_DQ24
24-31 197 VSS33 VSS80 196
137 DQ50 229 M_B_DQ29
[3] M_B_CLKP0 201 VSS34 VSS81 202
139 CK0 DQ51 211 M_B_DQ26
R25596 R25597 R25598 [3] M_B_CLKN0 205 VSS35 VSS82 206
138 CK0# DQ52 212 M_B_DQ30 VSS36 VSS83

https://vinafix.com/
*0_5%_4 *0_4/S *0_5%_4 [3] M_B_CLKP1 CK1 DQ53 M_B_DQ25 209 210
140 224 VSS37 VSS84
[3] M_B_CLKN1 CK1# DQ54 M_B_DQ28 213 214
225 VSS38 VSS85
DQ55 M_B_DQ23 217 218
155 237 VSS39 VSS86
[3] M_B_DIM0_ODT0 ODT0 DQ56 M_B_DQ19 223 222
CHB_SA0 CHB_SA1 CHB_SA2 161 236 VSS40 VSS87
[3] M_B_DIM0_ODT1 ODT1 DQ57 M_B_DQ22 227 226
249 VSS41 VSS88
DQ58 M_B_DQ16 231 230
253 250 VSS42 VSS89
[9,17,38] SMB_RUN_CLK
254 SCL DQ59 232 M_B_DQ17 16-23 235 234
R25599 R25600 R25601 [9,17,38] SMB_RUN_DAT 239 VSS43 VSS90 238
SDA DQ60 233 M_B_DQ21
*0_4/S *0_5%_4 *0_4/S 243 VSS44 VSS91 244
CHB_SA0 256 DQ61 245 M_B_DQ20
247 VSS45 VSS92 248
CHB_SA1 260 SA0 DQ62 246 M_B_DQ18
251 VSS46 VSS93 252
+1.2VSUS CHB_SA2 166 SA1 DQ63
M_B_DQSP[7:0] [3] +VDDQ_VTT VSS47 VSS94
SA2 13 M_B_DQSP5
B DQS0 B
R25602 *240_1%_2 M_B_CB0 92 34 M_B_DQSP4 C20105 1u/10V_2
R25603 *240_1%_2 M_B_CB1 91 CB0/NC DQS1 55 M_B_DQSP7 263
Follow reference *240_1%_2 M_B_CB2 CB1/NC DQS2 M_B_DQSP6 263 261
R25604 101 76 C20108 1u/10V_2 GND#1
CB2/NC DQS3 264 262
board DIMM1 R25605 *240_1%_2 M_B_CB3 105 179 M_B_DQSP1 GND#2
R25606 *240_1%_2 M_B_CB4 88 CB3/NC DQS4 200 M_B_DQSP0 264
SA0,1,2=LHL *240_1%_2 M_B_CB5 CB4/NC DQS5 M_B_DQSP3
C20117 10u/6.3V_4
R25608 87 221
R25609 *240_1%_2 M_B_CB6 100 CB5/NC DQS6 242 M_B_DQSP2 D4AR0-26001-1P40
+1.2VSUS *240_1%_2 M_B_CB7 CB6/NC DQS7 M_B_DQSP8
R25610 104 97
CB7/NC DQS8
C20104 1u/10V_2
M_B_DQSN5 M_B_DQSN[7:0] [3] VREF DQ0 M1 Solution
12 11 *1u/10V_2
DM0_n/DBI0_n DQS#0 M_B_DQSN4 C20111
C20107 1u/10V_2 +1.2VSUS 33 32 +1.2VSUS
54 DM1_n/DBI1_n DQS#1 53 M_B_DQSN7
DM2_n/DBI2_n DQS#2 C20114 *1u/10V_2
C20110 1u/10V_2 75 74 M_B_DQSN6
178 DM3_n/DBI3_n DQS#3 177 M_B_DQSN1
DM4_n/DBI4_n DQS#4 C20119 *10u/6.3V_4
C20113 199 198 M_B_DQSN0
1u/10V_2 DM5_n/DBI5_n DQS#5
220 219 M_B_DQSN3
DM6_n/DBI6_n DQS#6 M_B_DQSN2 R25612
C20122 241 240
10u/6.3V_4 DM7_n/DBI7_n DQS#7 M_B_DQSN8 1K_1%_2
96 95
DBI8# DQS#8
C20123 10u/6.3V_4 R69022 *0_5%_2 +SMDDR_VREF_DQ1_M1 R67514 2_1%_6 +SMDDR_VREF_DQ1_M1 R67575 *0_5%_4
D4AR0-26001-1P40 [3] SMDDR_VREF_DQ1_M3 +VDDQ
C20124 10u/6.3V_4 C20101 0.1u/6.3V_2

C20125 10u/6.3V_4 C20102 2.2u/10V_4 C20130 R25615


0.022u/25V_4 1K_1%_2
+2.5V_SUS
C20116 *1u/10V_2 R25614 24.9_1%_2
C20106 1u/10V_2
C20118 *1u/10V_2 +1.2VSUS +1.2VSUS
C20112 10u/6.3V_4
A C20120 *1u/10V_2 A

C20121 *1u/10V_2 C20109 *1u/10V_2

C20115 *10u/6.3V_4
C20126 *10u/6.3V_4 R25607 R25611
240_1%_2 240_1%_2
C20127 *10u/6.3V_4 M_B_DQSP8 M_B_DQSN8 +3V

C20128 *10u/6.3V_4 C20099 0.1u/6.3V_2


Quanta Computer Inc.
C20129 *10u/6.3V_4 C20100 2.2u/10V_4 PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
DDR4 DIMM1-RVS(4.0H)
Date: Tuesday, October 06, 2020 Sheet 18 of 62
5 4 3 2 1
1 2 3 4 5 6 7 8

+1.03_GFX
C347

C363
EV@22u/6.3V_6

EV@10u/6.3V_4
U8A

1/14 PCI_EXPRESS
NVDD = 32.22 ~ 26.66 A
+VGPU_CORE
19
C348 EV@10u/6.3V_4 AB6 C364 *[email protected]/6.3V_2 U8E L4 2 1
NC PEX_W AKE* Under GPU EV@HCB1005KF-330T30_3A +1V8_GFX_MAIN
C349 [email protected]/6.3V_4 PEX_DVDD 11/14 NVVDD
C350 [email protected]/6.3V_4 AA22 C351 EV@1u/10V_2 K10
AB23 PEX_IOVDD_1 AC7 VGA_RST# R296 *EV@0_4/S C352 EV@1u/10V_2 K12 VDD_001
PEX_IOVDD_2 PEX_RST* PEGX_RST# [22] VDD_002
AC24 C353 EV@1u/10V_2 K14
C354 EV@1u/10V_2 AD25 PEX_IOVDD_3 AC6 PEX_CLKREQ# R297 EV@10K_1%_2 +1V8_AON C365 EV@1u/10V_2 K16 VDD_003 U8C VDD33 = 56mA
A C366 [email protected]/6.3V_4 AE26 PEX_IOVDD_4 PEX_CLKREQ* C367 [email protected]/6.3V_4 K18 VDD_004 A
14/14 XVDD/VDD33
AE27 PEX_IOVDD_5 AE8 C368 [email protected]/6.3V_4 L11 VDD_005
PEX_IOVDD_6 PEX_REFCLK AD8
CLK_VGA_P [12]
L13 VDD_006 AD10
1V8_AON G10
CLK_VGA_N [12] C356 [email protected]/6.3V_4 +1V8_AON
PEX_REFCLK* C369 [email protected]/6.3V_4 L15 VDD_007 AD7 NC_1 VDD33_1 G12
PEX_IOVDD + PEX_IOVDDQ = 1.042A AC9 PEG_RXP1_C C370 [email protected]/6.3V_2 PEG_RXP1 [11] C357 [email protected]/6.3V_4 L17 VDD_008 B19 NC_2 VDD33_2 C371 [email protected]/6.3V_2
PEX_TX0 AB9 PEG_RXN1_C C358 [email protected]/6.3V_2 C372 [email protected]/6.3V_4 M10 VDD_009 NC_3
+1V8_GFX_MAIN PEX_TX0* PEG_RXN1 [11] VDD_010
C373 [email protected]/6.3V_4 M12 GPCPLL_AVDD
C377 EV@22u/6.3V_6 AG6 C374 [email protected]/6.3V_4 M14 VDD_011 F11 C376 [email protected]/6.3V_4
AA10
PEX_HVDD PEX_RX0 AG7
PEG_TXP1 [11]
M16 VDD_012 3V3AUX
PEG_TXN1 [11] C355 EV@47u/6.3V_6 C378 EV@1u/10V_2
C379 [email protected]/6.3V_4 AA12 PEX_IOVDDQ_1 PEX_RX0* C359 EV@22u/6.3V_6 M18 VDD_013 V5
C381 EV@10u/6.3V_4 AA13 PEX_IOVDDQ_2 AB10 PEG_RXP2_C C382 [email protected]/6.3V_2 N11 VDD_014 V6 NC_V5
AA16 PEX_IOVDDQ_3 PEX_TX1 AC10 PEG_RXN2_C C384
PEG_RXP2 [11]
N13 VDD_015 NC_V6 VDD18 G8
C383 EV@10u/6.3V_4 [email protected]/6.3V_2 PEG_RXN2 [11] C385 EV@330u/2V_7343H2.22 +1V8_GFX_MAIN
C360 [email protected]/6.3V_4 AA18 PEX_IOVDDQ_4 PEX_TX1* N15 VDD_016 VDD33_3 G9

+
AA19 PEX_IOVDDQ_5 AF7 C387 EV@47u/6.3V_6 N17 VDD_017 VDD33_4
PEX_IOVDDQ_6 PEX_RX1 PEG_TXP2 [11] VDD_018
AA20 AE7 C388 EV@10u/6.3V_4 P10
PEX_IOVDDQ_7 PEX_RX1* PEG_TXN2 [11] VDD_019
AA21 C389 *EV@10u/6.3V_4 P12 CONFIGURABLE
AB22 PEX_IOVDDQ_8 AD11 PEG_RXP3_C C6556 [email protected]/6.3V_2 C391 *EV@10u/6.3V_4 P14 VDD_020 C392 [email protected]/6.3V_4
PEG_RXP3 [11] POWER CHANNELS
AC23 PEX_IOVDDQ_9 PEX_TX2 AC11 PEG_RXN3_C C6554 [email protected]/6.3V_2 C393 *EV@10u/6.3V_4 P16 VDD_021 C394 EV@1u/10V_2
PEG_RXN3 [11] * nc on substrate
C395 EV@1u/10V_2 AD24 PEX_IOVDDQ_10 PEX_TX2* C396 [email protected]/6.3V_4 P18 VDD_022
C362 EV@1u/10V_2 AE25 PEX_IOVDDQ_11 AE9 C397 [email protected]/6.3V_4 R11 VDD_023 G1 C398 [email protected]/6.3V_2
PEX_IOVDDQ_12 PEX_RX2 PEG_TXP3 [11] VDD_024 NC_G1
C399 EV@1u/10V_2 AF26 AF9 C400 [email protected]/6.3V_4 R13 G2 C401 [email protected]/6.3V_2
PEX_IOVDDQ_13 PEX_RX2* PEG_TXN3 [11] VDD_025 NC_G2
C402 EV@1u/10V_2 AF27 C403 [email protected]/6.3V_4 R15 G3
PEX_IOVDDQ_14 AC12 PEG_RXP4_C C6555 [email protected]/6.3V_2 R17 VDD_026 G4 NC_G3
PEX_TX3 PEG_RXP4 [11] VDD_027 NC_G4
AB12 PEG_RXN4_C C6557 [email protected]/6.3V_2 T10 G5
PEX_TX3* PEG_RXN4 [11] VDD_028 NC_G5
C406 [email protected]/6.3V_4 T12 G6
AG9 C407 [email protected]/6.3V_4 T14 VDD_029 G7 NC_G6
PEX_PLL_HVDD + PEX_RX3 AG10
PEG_TXP4 [11]
PEG_TXN4 [11] C408 [email protected]/6.3V_4 T16 VDD_030 NC_G7
PEX_RX3* VDD_031
PEX_SVDD_3V3 = 143mA AB13
C409
C410
[email protected]/6.3V_4
EV@1u/10V_2
T18
U11 VDD_032 V1
PEX_TX4 AC13 C411 EV@1u/10V_2 U13 VDD_033 V2 NC_V1
B
NC PEX_TX4* U15 VDD_034 NC_V2 B
+1V8_GFX_MAIN R299 *EV@0_4/S C412 EV@10u/6.3V_4
AF10 C415 EV@10u/6.3V_4 U17 VDD_035
PEX_RX4 AE10 C418 EV@10u/6.3V_4 V10 VDD_036
PEX_RX4* C421 EV@10u/6.3V_4 V12 VDD_037
AD14 C424 EV@10u/6.3V_4 V14 VDD_038 W1
C425 [email protected]/6.3V_2 AA8 PEX_TX5 AC14 C428 EV@10u/6.3V_4 V16 VDD_039 W2 NC_W 1
C429 [email protected]/6.3V_4 AA9 PEX_PLL_HVDD_1 PEX_TX5* C430 EV@10u/6.3V_4 V18 VDD_040 W3 NC_W 2
C431 [email protected]/6.3V_4 PEX_PLL_HVDD_2 AE12 C432 EV@10u/6.3V_4 VDD_041 W4 NC_W 3
PEX_RX5 AF12 NC_W 4
AB8
NC PEX_RX5* +VGPU_CORE +VGPU_CORE
PEX_SVDD_3V3
PEX_TX6
AC15 Power up
AB15 C375 [email protected]/6.3V_2
PEX_TX6* C413 EV@47u/6.3V_6 C414 *EV@47u/6.3V_6 sequence
AG12 C380 [email protected]/6.3V_4
PEX_RX6 AG13 C416 EV@47u/6.3V_6 C417 *EV@47u/6.3V_6
PEX_RX6*

https://vinafix.com/
C386 EV@22u/6.3V_6
AB16 C419 EV@47u/6.3V_6 C420 *EV@47u/6.3V_6 1V8_AON
PEX_TX7 AC16
PEX_TX7* C422 EV@47u/6.3V_6 C423 *EV@47u/6.3V_6
AF13 1V8_MAIN
PEX_RX7 AE13 C426 EV@47u/6.3V_6 C427 *EV@47u/6.3V_6 1.8V
PEX_RX7*
AD17 3V3_SYS
NC PEX_TX8
NC
AC17
PEX_TX8*
AE15 +1V8_AON
NC PEX_RX8 AF15
NVVDD
NC PEX_RX8*
F2 NC
AC18 NVVDDS
[56] VGA_VCCSENSE VDD_SENSE PEX_TX9
NC AB18
C PEX_TX9* C433 C
F1 AG15 U9 [email protected]/6.3V_2 PEX_VDD
[56] VGA_VSSSENSE GND_SENSE NC
NC
PEX_RX9 AG16 1.0V
PEX_RX9*

5
AB19 1 FBVDD/Q
NC PEX_TX10 [9] DGPU_HOLD_RST# PEGX_RST#_C PEGX_RST#
AC19 4 R305 *EV@0_4/S
NC PEX_TX10* 2
[13,28,30,32,33,39,45] PLTRST#
AF16
NC PEX_RX10
NC
AE16 EV@NL17SZ08DFT2G

3
PEX_RX10*
AD20 R306
NC PEX_TX11 AC20 EV@100K_1%_2
NC PEX_TX11* Power down
AE18
NC PEX_RX11 AF18 sequence
NC PEX_RX11* net PCIE_CLKREQ_VGA# and PU:10K both remove in CPU side
AC21
NC PEX_TX12 AB21
NC PEX_TX12*
PEX_TSTCLK AF22
NC AG18
R307 *EV@200_1%_2 NC
PEX_TSTCLK# AE22 PEX_TSTCLK_OUT PEX_RX12 AG19
PEX_TSTCLK_OUT* NC PEX_RX12*
CX300T30001 Change to 0ohm
AD23
NC PEX_TX13
NC AE23
PEX_TX13*
AA14
NC AF19
PEX_PLLVDD_1 NC PEX_RX13 [22] DGPU_PWROK_1.8V
AA15 NC AE19
PEX_PLLVDD_2 PEX_RX13*
NC
AF24
PEX_TX14 AE24
NC PEX_TX14*
D D
2

AE21
PEX_PLLVDD = 130mA NVJTAG_SEL NC
NC
PEX_RX14 AF21 PEX_CLKREQ# 1 3
AD9 PEX_RX14* PCIE_CLKREQ_VGA# [12]
EV@10K_1%_2 R311 TESTMODE
TESTMODE AG24 Q9 EV@PJA138K
NC PEX_TX15
NC AG25
PEX_TX15* R25487 *EV@0_5%_4
NC PEX_RX15
AG21
AG22
Quanta Computer Inc.
NC PEX_RX15*
GF117 GF119
PROJECT : Z8IA_ZAIA
[email protected]_1%_2 R312 PEX_TERMP AF25 Size Document Number Rev
PEX_TERMP 1A
N17S-G1-A1(PCIE I/F)/NVDD
Date: Tuesday, October 06, 2020 Sheet 19 of 62
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U8B

[23] VMA_DQ[63..0]
R313 EV@10K_1%_2

VMA_DQ[63..0]
PS_FB_CLAMP F3 NC
FB_CLAMP GF119

GF117
GNDS_SENSE
2/14 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
E18 VMA_DQ0
F18 VMA_DQ1
E16 VMA_DQ2
F17 VMA_DQ3
D20 VMA_DQ4
D21 VMA_DQ5
FBVDDQ + FBVDD = 3.116A U8F
13/14 GND
20
FBA_CMD[31:0] FBA_D5 F20 VMA_DQ6 +1.35V_GFX U8D A2 M13
[23] FBA_CMD[31:0] FBA_D6 E21 VMA_DQ7 AB17 GND_001 GND_071 M15
12/14 FBVDDQ
FBA_DBI[7:0] FBA_D7 E15 VMA_DQ8 AB20 GND_005 GND_072 M17
[23] FBA_DBI[7:0] FBA_D8 GND_006 GND_073
D15 VMA_DQ9 C449 EV@1u/10V_2 B26 AB24 N10
FBA_EDC[7:0] FBA_D9 F15 VMA_DQ10 C438 EV@1u/10V_2 C25 FBVDDQ_01 AC2 GND_007 GND_074 N12
[23] FBA_EDC[7:0] FBA_D10 FBVDDQ_02 GND_008 GND_075
F13 VMA_DQ11 C439 EV@1u/10V_2 E23 AC22 N14
A FBA_D11 C13 VMA_DQ12 C447 EV@1u/10V_2 E26 FBVDDQ_03 AC26 GND_009 GND_076 N16 A
FBA_D12 B13 VMA_DQ13 C440 EV@1u/10V_2 F14 FBVDDQ_04 AC5 GND_010 GND_077 N18
FBA_D13 E13 VMA_DQ14 C441 EV@1u/10V_2 F21 FBVDDQ_05 AC8 GND_011 GND_078 P11
FBA_D14 D13 VMA_DQ15 C442 EV@1u/10V_2 G13 FBVDDQ_06 AD12 GND_012 GND_079 P13
FBA_D15 B15 VMA_DQ16 C450 EV@1u/10V_2 G14 FBVDDQ_07 AD13 GND_013 GND_080 P15
+1.35V_GFX FBA_D16 C16 VMA_DQ17 C443 EV@10u/6.3V_4 G15 FBVDDQ_08 A26 GND_014 GND_081 P17
FBA_D17 A13 VMA_DQ18 C444 EV@10u/6.3V_4 G16 FBVDDQ_09 AD15 GND_002 GND_082 P2
FBA_D18 A15 VMA_DQ19 C448 EV@10u/6.3V_4 G18 FBVDDQ_10 AD16 GND_015 GND_083 P23
FBA_CMD14 R316 EV@10K_1%_2 FBA_D19 B18 VMA_DQ20 C451 EV@22u/6.3V_6 G19 FBVDDQ_11 AD18 GND_016 GND_084 P26
FBA_D20 A18 VMA_DQ21 C445 *EV@22u/6.3V_6 G20 FBVDDQ_12 AD19 GND_017 GND_085 P5
FBA_CMD30 R314 EV@10K_1%_2 FBA_D21 A19 VMA_DQ22 C446 *EV@22u/6.3V_6 G21 FBVDDQ_13 AD21 GND_018 GND_086 R10
FBA_D22 C19 VMA_DQ23 H24 FBVDDQ_14 AD22 GND_019 GND_087 R12
FBA_D23 B24 VMA_DQ24 H26 FBVDDQ_15 AE11 GND_020 GND_088 R14
FBA_D24 C23 VMA_DQ25 J21 FBVDDQ_16 AE14 GND_021 GND_089 R16
FBA_CMD13 R315 EV@10K_1%_2 FBA_D25 A25 VMA_DQ26 K21 FBVDDQ_17 AE17 GND_022 GND_090 R18
FBA_D26 A24 VMA_DQ27 L22 FBVDDQ_18 AE20 GND_023 GND_091 T11
FBA_CMD29 R317 EV@10K_1%_2 FBA_D27 A21 VMA_DQ28 L24 FBVDDQ_19 AB11 GND_024 GND_092 T13
FBA_D28 B21 VMA_DQ29 L26 FBVDDQ_20 AF1 GND_003 GND_093 T15
FBA_D29 C20 VMA_DQ30 M21 FBVDDQ_21 AF11 GND_025 GND_094 T17
FBA_D30 C21 VMA_DQ31 N21 FBVDDQ_22 AF14 GND_026 GND_095 U10
FBA_D31 R22 VMA_DQ32 R21 FBVDDQ_23 AF17 GND_027 GND_096 U12
FBA_CMD0 C27 FBA_D32 R24 VMA_DQ33 T21 FBVDDQ_24 AF20 GND_028 GND_097 U14
FBA_CMD1 C26 FBA_CMD0 FBA_D33 T22 VMA_DQ34 V21 FBVDDQ_25 AF23 GND_029 GND_098 U16
FBA_CMD2 E24 FBA_CMD1 FBA_D34 R23 VMA_DQ35 W 21 FBVDDQ_26 AF5 GND_030 GND_099 U18
FBA_CMD3 F24 FBA_CMD2 FBA_D35 N25 VMA_DQ36 FBVDDQ_27 AF8 GND_031 GND_100 U2
FBA_CMD4 D27 FBA_CMD3 FBA_D36 N26 VMA_DQ37 AG2 GND_032 GND_101 U23
FBA_CMD5 D26 FBA_CMD4 FBA_D37 N23 VMA_DQ38 AG26 GND_033 GND_102 U26
FBA_CMD6 F25 FBA_CMD5 FBA_D38 N24 VMA_DQ39 AB14 GND_034 GND_103 U5
FBA_CMD7 F26 FBA_CMD6 FBA_D39 V23 VMA_DQ40 B1 GND_004 GND_104 V11
FBA_CMD8 F23 FBA_CMD7 FBA_D40 V22 VMA_DQ41 B11 GND_035 GND_105 V13
B FBA_CMD9 G22 FBA_CMD8 FBA_D41 T23 VMA_DQ42 B14 GND_036 GND_106 V15 B
FBA_CMD10 G23 FBA_CMD9 FBA_D42 U22 VMA_DQ43 B17 GND_037 GND_107 V17
FBA_CMD11 G24 FBA_CMD10 FBA_D43 Y24 VMA_DQ44 B20 GND_038 GND_108 Y2
FBA_CMD12 F27 FBA_CMD11 FBA_D44 AA24 VMA_DQ45 B23 GND_039 GND_109 Y23
FBA_CMD13 G25 FBA_CMD12 FBA_D45 Y22 VMA_DQ46 B27 GND_040 GND_110 Y26
FBA_CMD14 G27 FBA_CMD13 FBA_D46 AA23 VMA_DQ47 B5 GND_041 GND_111 Y5
FBA_CMD15 G26 FBA_CMD14 FBA_D47 AD27 VMA_DQ48 B8 GND_042 GND_112
FBA_CMD16 M24 FBA_CMD15 FBA_D48 AB25 VMA_DQ49 E11 GND_043
FBA_CMD17 M23 FBA_CMD16 FBA_D49 AD26 VMA_DQ50 E14 GND_044
FBA_CMD18 K24 FBA_CMD17 FBA_D50 AC25 VMA_DQ51 E17 GND_045
FBA_CMD19 K23 FBA_CMD18 FBA_D51 AA27 VMA_DQ52 E2 GND_046
FBA_CMD20 M27 FBA_CMD19 FBA_D52 AA26 VMA_DQ53 E20 GND_047
FBA_CMD21 M26 FBA_CMD20 FBA_D53 W 26 VMA_DQ54 E22 GND_048
FBA_CMD22 M25 FBA_CMD21 FBA_D54 Y25 VMA_DQ55 E25 GND_049
FBA_CMD23 K26 FBA_CMD22 FBA_D55 R26 VMA_DQ56 E5 GND_050
FBA_CMD23 FBA_D56 GND_051

https://vinafix.com/
FBA_CMD24 K22 T25 VMA_DQ57 +1.35V_GFX E8
FBA_CMD25 J23 FBA_CMD24 FBA_D57 N27 VMA_DQ58 H2 GND_052
FBA_CMD26 J25 FBA_CMD25 FBA_D58 R27 VMA_DQ59 H23 GND_053
FBA_CMD27 J24 FBA_CMD26 FBA_D59 V26 VMA_DQ60 H25 GND_054
FBA_CMD28 K27 FBA_CMD27 FBA_D60 V27 VMA_DQ61 D22 FB_CAL_PD_VDDQ R318 [email protected]_1%_2 H5 GND_055
FBA_CMD29 K25 FBA_CMD28 FBA_D61 W 27 VMA_DQ62 FB_CAL_PD_VDDQ K11 GND_056
FBA_CMD30 J27 FBA_CMD29 FBA_D62 W 25 VMA_DQ63 K13 GND_057
FBA_CMD31 J26 FBA_CMD30 FBA_D63 C24 FB_CAL_PU_GND R319 [email protected]_1%_2 K15 GND_058
FBA_CMD31 FB_CAL_PU_GND K17 GND_059
D19 FBA_DBI0 L10 GND_060
FBA_DQM0 D14 FBA_DBI1 B25 FB_CAL_TERM_GND R320 [email protected]_1%_2 L12 GND_061
FBA_DQM1 C17 FBA_DBI2 FB_CAL_TERM_GND L14 GND_062
FBA_DQM2 C22 FBA_DBI3 L16 GND_063
FBA_DQM3 P24 FBA_DBI4 L18 GND_064
FBA_DQM4 W 24 FBA_DBI5 L2 GND_065
C FBA_DQM5 AA25 FBA_DBI6 L23 GND_066 C
R321 *[email protected]_1%_2 F22 FBA_DQM6 U25 FBA_DBI7 L25 GND_067
+1.35V_GFX FBA_DEBUG0 FBA_CMD34 FBA_DQM7 GND_068
R322 *[email protected]_1%_2 J22 L5 AA7
FBA_DEBUG1 FBA_CMD35 M11 GND_069 GND_F AB7
E19 FBA_EDC0 GND_070 GND_H
FBA_DQS_W P0 C15 FBA_EDC1
D24 FBA_DQS_W P1 B16 FBA_EDC2
[23] VMA_CLK0 FBA_CLK0 FBA_DQS_W P2 FBA_EDC3
D25 B22
[23] VMA_CLK0# FBA_CLK0* FBA_DQS_W P3
N22 R25 FBA_EDC4
[23] VMA_CLK1 FBA_CLK1 FBA_DQS_W P4 FBA_EDC5
M22 W 23
[23] VMA_CLK1# FBA_CLK1* FBA_DQS_W P5 FBA_EDC6
AB26
FBA_DQS_W P6 T26 FBA_EDC7
FBA_DQS_W P7
For support GC6 2.0
VMA_WCK01 D18 F19 +3V
[23] VMA_WCK01 VMA_WCK01# FBA_W CK01 FBA_DQS_RN0
C18 C14
[23] VMA_WCK01# FBA_W CK01* FBA_DQS_RN1
VMA_WCK23 D17 A16
[23] VMA_WCK23 VMA_WCK23# FBA_W CK23 FBA_DQS_RN2
D16 A22 U11
[23] VMA_WCK23# VMA_WCK45 FBA_W CK23* FBA_DQS_RN3
T24 P25
[23] VMA_WCK45 VMA_WCK45# FBA_W CK45 FBA_DQS_RN4
U24 W 22 R323 *EV@0_5%_4 C452
[23] VMA_WCK45# FBA_W CK45* FBA_DQS_RN5 [9,58] DGPU_PWR_EN

5
VMA_WCK67 V24 AB27 [email protected]/6.3V_2
[23] VMA_WCK67 VMA_WCK67# FBA_W CK67 FBA_DQS_RN6
FB_PLLAVDD = 55mA V25 T27 R324 *EV@0_4/S 2
[23] VMA_WCK67# FBA_W CK67* FBA_DQS_RN7 [22,56,58] GPU_PWR_GD FBVDD_EN
FB_DLLAVDD = 15mA 4 R25469 *EV@0_4/S FBVDDQ_EN [57]
1
+FB_PLLAVDD [9,22] GC6_FB_EN_Q
1 2
L5 *EV@HCB1608KF-301T20_2A F16 EV@NL17SZ32DFT2G

3
FB_PLLAVDD_1
L6 1 2 EV@HCB1005KF-330T30_3A P22 R325
+1V8_GFX_MAIN FB_PLLAVDD_2 EV@100K_1%_2
C453 EV@22u/6.3V_4 H22 GF119
D C454 [email protected]/6.3V_2 FB_DLLAVDD D
C455 [email protected]/6.3V_2
FB_PLLAVDD GF117
C456 [email protected]/6.3V_2

D23
Quanta Computer Inc.
FB_VREF_PROBE
L.H PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
N17S-G1-A1(MEMORY/GND)
Date: Tuesday, October 06, 2020 Sheet 20 of 62
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U8G U8J

AA6
4/14 IFPAB

GF119 GF117

NC
GF117
NC
NC
GF119

IFPA_TXC*
IFPA_TXC
AC4
AC3
7/14 IFPEF

GF119 GF117
GF117

NC
NC
DVI-DL

I2CY_SDA
I2CY_SCL
GF119
DVI-SL/HDMI

I2CY_SDA
I2CY_SCL
DP

IFPE_AUX_I2CY_SDA*
J3
J2
21
IFPAB_RSET Y3 J7 IFPE_AUX_I2CY_SCL
NC IFPA_TXD0* IFPEF_PLLVDD_1 NC
Y4
NC IFPA_TXD0 J1 +1V8_AON
NC TXC TXC IFPE_L3*
V7 K1
TP9033 IFPAB_PLLVDD_1 NC NC TXC TXC IFPE_L3
NC
AA2 K7 NC
W7 IFPA_TXD1* AA3 IFPEF_PLLVDD_2 K3
TP9032 IFPAB_PLLVDD_2 NC NC IFPA_TXD1 NC TXD0 TXD0 IFPE_L2* U8K
A K2 A
NC TXD0 TXD0 IFPE_L2 R326 EV@10K_1%_2
3/14 DACA
AA1 K6 M3
NC IFPA_TXD2* IFPEF_RSET NC NC TXD1 TXD1 IFPE_L1* GF119
NC
AB1 M2 GF117
GF117 GF119
IFPA_TXD2 NC TXD1 TXD1 IFPE_L1 W5 DACA_VDD NC NC I2CA_SCL B7 I2CA_SCL
NC TXD2 TXD2 IFPE_L0*
M1
NC I2CA_SDA A7 I2CA_SDA R25492 *EV@10K_1%_2
AA5 N1 AE2 DACA_VREF
NC IFPA_TXD3* NC TXD2 TXD2 IFPE_L0 TSEN_VREF
AA4
NC IFPA_TXD3 AF2 DACA_RSET NC NC DACA_HSYNC AE3
IFPE NC DACA_VSYNC AE4
AB4
NC IFPB_TXC* AB5
NC IFPB_TXC
NC HPD_E HPD_E C2 DACA_RED AG3
GF119 GF117 GPIO18 NC
W6 AB2 DACA_GREEN AF4
TP9031 IFPA_IOVDD NC NC IFPB_TXD4* NC
AB3
NC IFPB_TXD4 GF119 GF117
Y6 DACA_BLUE AF3
TP9030 IFPB_IOVDD NC NC
H6 NC
AD2 IFPE_IOVDD
NC GF119
IFPB_TXD5* AD3 J6
NC NC GF117
IFPB_TXD5 IFPF_IOVDD DVI-DL DVI-SL/HDMI DP

NC H4
I2CZ_SDA IFPF_AUX_I2CZ_SDA*
AD1 NC I2CZ_SCL H3
NC IFPB_TXD6* IFPF_AUX_I2CZ_SCL
NC
AE1
IFPB_TXD6
NC TXC J5
AD5 IFPF_L3* J4
NC IFPB_TXD7* NC TXC IFPF_L3
AD4
NC IFPB_TXD7
NC TXD3 TXD0
K5
IFPF_L2* K4
NC TXD3 TXD0 IFPF_L2
B B
NC TXD4 TXD1 L4
IFPF IFPF_L1* L3
NC TXD4 TXD1 IFPF_L1
NC B3
GPIO14
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0*
M5
M4
IFPF_L0

U8H
5/14 IFPC
IFPC NC F7

Vinafix.com
HPD_F GPIO19
GF119 GF117
T6 GF117 GF119
IFPC_RSET NC

DVI/HDMI DP

https://vinafix.com/
M7 NC NC I2CW_SDA N5
N7 IFPC_PLLVDD_1 IFPC_AUX_I2CW _SDA* N4
IFPC_PLLVDD_2 NC NC I2CW_SCL IFPC_AUX_I2CW _SCL PLLVDD = 38mA

N3 L7 1 2 EV@HCB1005KF-330T30_3A
NC TXC IFPC_L3* +1V8_GFX_MAIN
NC N2
TXC IFPC_L3
R3 C457 [email protected]/6.3V_2
NC TXD0 IFPC_L2* R2 C458 *EV@22u/6.3V_4
NC TXD0 IFPC_L2
TXD1 R1
NC IFPC_L1*
NC TXD1 T1 SP_PLLVDD = 17mA
IFPC_L1 U8M
T3 9/14 XTAL_PLL
NC TXD2 IFPC_L0*
C T2 L8 1 2 EV@HCB1005KF-330T30_3A C
NC TXD2 IFPC_L0 +1V8_GFX_MAIN
NV_PLLVDD L6
SP_PLLVDD M6 CORE_PLLVDD
C459 [email protected]/6.3V_2 SP_PLLVDD
P6 NC C3 C460 [email protected]/6.3V_2 R329 *EV@0_4/S N6
IFPC_IOVDD NC GPIO15 VID_PLLVDD GF119
C461 *EV@10u/6.3V_4 +1V8_AON
C462 *EV@47u/6.3V_6 NC GF117
R330 *EV@10K_1%_2
U8I VID_PLLVDD = 41mA
6/14 IFPD R331 EV@10K_1%_2 XTAL_SSIN A10 C10 BXTALOUT R332 EV@10K_1%_2
XTAL_SSIN XTAL_OUTBUFF
GF119 GF117
U6 GF117 GF119 27M_XTAL_IN C11 B10 27M_XTAL_OUT
IFPD_RSET NC XTAL_IN XTAL_OUT
DVI/HDMI DP

T7 I2CX_SDA P4
IFPD_PLLVDD_2 NC NC IFPD_AUX_I2CX_SDA*
NC I2CX_SCL P3 C463 EV@12p/50V_4
R7 IFPD_AUX_I2CX_SCL
IFPD_PLLVDD_1 NC

3
4
R5 27M_XTAL_IN Y3
NC TXC IFPD_L3* R4 27M_XTAL_OUT EV@27MHZ/10ppm
NC TXC IFPD_L3
T5

1
2
NC TXD0 IFPD_L2* T4 C464 EV@12p/50V_4
NC TXD0 IFPD_L2
TXD1 U4
NC IFPD_L1*
IFPD NC TXD1 IFPD_L1
U3

D V4 D
NC TXD2 IFPD_L0* V3
NC TXD2 IFPD_L0

R6 D4
IFPD_IOVDD GF119 NC GPIO17
NC GF117 Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
N17S-G1-A1(DISPLAY)
Date: Tuesday, October 06, 2020 Sheet 21 of 62
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U8L

22
10/14 MISC2
+1V8_AON

+1V8_AON R339 *EV@0_4/S


NC
TP65 E10
TP66 F10 VMON_IN0 D12 ROM_CS TP67
VMON_IN1 ROM_CS* R343 R341 R342 R344 R345 R346 R347 R348 R349
B12 ROM_SI EV@100K_1%_2 EV@100K_1%_2 EV@100K_1%_2 XX@100K_1%_2 XX@100K_1%_2 XX@100K_1%_2 *EV@100K_1%_2 *EV@100K_1%_2 *EV@100K_1%_2
ROM_SI A12 ROM_SO
STRAP0 D1 ROM_SO C12 ROM_SCLK ROM_SO STRAP0
STRAP1 D2 STRAP0 ROM_SCLK STRAP1
STRAP1 ROM_SI
STRAP2 E4 STRAP2
STRAP3 E3 STRAP2 ROM_SCLK STRAP3
STRAP4 D3 STRAP3 STRAP4
STRAP4 STRAP5
A GF119 GF117 A

STRAP5 C1
STRAP5 NC
D11 R351 R350 R352 R353 R354 R355 R356 R357 R358
BUFRST* *EV@100K_1%_2 *[email protected]_1%_4 EV@100K_1%_2 XX@100K_1%_2 XX@100K_1%_2 XX@100K_1%_2 EV@100K_1%_2 EV@100K_1%_2 EV@100K_1%_2
F6 D10
MULTI_STRAP_REF0_GND NC NC PGOOD

GF119 GF117
F4
MULTI_STRAP_REF1_GND VDDS_SENSE
NC MEM_VDD_CTL/ E9
GPIO8 CEC
F5
MULTI_STRAP_REF2_GND NC NC +1V8_AON

R362 [email protected]_1%_2 +1V8_AON


U8N Q13
8/14 MISC1
D9 GPUT_CLK_L 6 1 GPUT_DATA_L
I2CS_SCL GPUT_DATA_L [33,50] MBDATA
D8
I2CS_SDA 2
A9 DGPU_EDIDCLK R363 [email protected]_5%_2 R364 *EV@0_4/S
I2CC_SCL DGPU_EDIDDATA +1V8_AON
B9 R366 [email protected]_5%_2
I2CC_SDA 3 4 GPUT_CLK_L
[33,50] MBCLK
TP69 THERM- E12 GF117 GF119 5
THERMDN C9 N12E_SCL R367 [email protected]_5%_2 R365 [email protected]_1%_2
NC I2CB_SCL +1V8_AON
TP68 THERM+ F12 C8 N12E_SDA R368 [email protected]_5%_2 EV@PJX138K
THERMDP NC I2CB_SDA

TP70 JTAG_TCK AE5


TP71 JTAG_TMS AD6 JTAG_TCK
JTAG_TMS ROM_SO ROM_SI ROM_SCLK SOR3_E SOR2_E SOR1_E SOR0_E Vendor STRAP2 STRAP1 STRAP0
TP72 JTAG_TDI AE6
TP73 JTAG_TDO AF6 JTAG_TDI
JTAG_TRST# AG4 JTAG_TDO C6 GPU_GPIO0
JTAG_TRST* NVVDD_PWM GPIO0
R370 *EV@0_4/S PWM-VID
PWM-VID [56] H H M 0 0 0 0 Micron L M L 0x0009
B2 GC6_FB_EN_N17 R372 *EV@0_4/S GC6_FB_EN
B GC6_FB_EN GPIO1 B
D6 GPU_GPIO2 R373 *EV@0_4/S GPU_EVENT#_GPU 2 1 GPU_EVENT#
GPU_EVENT* GPIO2 GPU_EVENT# [4]
C7 Hynix
NVDDS_PWM GPIO3 F9 1V8_MAIN_EN_N17 R374 *EV@0_4/S 1V8_MAIN_EN
D4 EV@RB500V-40
L M H 0x000A
1V8_MAIN_EN GPIO4 1V8_MAIN_EN [56,58]
A3
FRM_CLK* GPIO5 A4 GPU_GPIO6 R376 *EV@0_4/S DGPU_PSI
NVVDD_PSI* GPIO6 B6
Samsung L H H 0x0003
LCD_BL_PWM GPIO7 A6 VGA_OVT#
GPIO8/OVERT
OVERT ========= F8
THERM_ALERT* GPIO9
ALERT L is Pull down 100K
C5 GPIO10_VREF
MEM_VREF_CTL GPIO10 GPIO10_VREF [23]
E7 STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE
LCD_VDD GPIO11 DGPU_PROCHOT_EC#
D7 H is Pull up 100K
PWR_LEVEL GPIO12 B4
LCD_BLEN GPIO13
L L L 0 0 0 0 M is Pull down 100K and Pull up 100K
GF117 GF119

https://vinafix.com/
D5 GPU_PEX_RST_HOLD#
SYS_PEX_RST_MON* NC GPIO16
NC E6
GPIO20 C4 GPU_GPIO21
MEM_VDD_CTL NC GPIO21

+3V

GC6_FB_EN_Q
STRAP[2:0] VRAM Table for N17S-G0(MX230)/G3(MX330) GDDR5 Recommended Memories
GC6_FB_EN_Q [9,20] RAMCFG
+1V8_AON R382 *EV@0_5%_4
R386 [2:0] DESCRIPTION Vendor Vendor P/N QPN
R384 *EV@0_4/S R385 *[email protected]_1%_2 +3V EV@10K_1%_2
[19] PEGX_RST# 0x9 GDDR5 MT51J256M32HF-80:B
3

Micron B die ?????????


2 Q14
0xA GDDR5 Hynix A die ?????????
2

EV@DMG1012T-7 H5GC8H24AJR-R2C
VGA_OVT# 1 3 DGPU_OVT#_EC TP13169 ?????????
0x3 GDDR5 Samsung C die K4G80325FC-HC25
1
3

GC6_FB_EN 2 Q16
Q15
C EV@DMG1012T-7 C
*EV@DMG1012T-7 R69109 *EV@Short_0201 R25468 *EV@Short_0201 DGPU_PWROK
[57] HWPG_1.35VGFX DGPU_PWROK [9]
1

1 2
D13161 *EV@RB500V-40

+1V8_AON +1V8_AON +3V 3 1 DGPU_PWROK_1.8V [19]

Q6652

2
R25322 R378 +3V EV@2N7002KTB
EV@10K_1%_2 *EV@10K_1%_2 R69078
EV@10K_1%_2
2

GPU_EVENT# R25482 *EV@10K_1%_2


DGPU_PROCHOT_EC# 1 3 +1V8_AON
dGPU_OPP# [33]
+3V
+1V8_AON +1.8V
Q6512
EV@PJE138K RG67
+1V8_AON *EV@10K_1%_2
+1V8_AON
DGPU_PSI R391 EV@10K_1%_2

RG77 RG79 DGPU_PWROK_1.8V


VGA_OVT# R395 EV@10K_1%_2 *EV@10K_1%_2

6
EV@10K_1%_2
QG17B
GC6_FB_EN R394 EV@10K_1%_2 ALERT R397 EV@10K_1%_2 2 *EV@PJX138K

3
JTAG_TRST# R396 EV@10K_1%_2 GPU_PEX_RST_HOLD# R399 *EV@10K_1%_2 R69111 *EV@0_5%_2 1
[20,56,58] GPU_PWR_GD

1
3 5
HWPG_1.35VGFX R69112 *EV@0_5%_2 2
GPIO10_VREF R398 EV@100K_1%_2 GPU_EVENT#_GPU R25490 EV@10K_1%_2 QG17A
D DG4 *EV@PJX138K D

4
EV@BAT54AW-L
1V8_MAIN_EN R403 EV@10K_1%_2

DGPU_PSI GPU_GPIO21 R404 EV@10K_1%_2


[56] DGPU_PSI
DGPU_PWR_EN +1.8V
[9,20,58] DGPU_PWR_EN

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
2

1 3 R69110 *EV@0_5%_2 DGPU_PWROK Size Document Number Rev


1A
QG15 EV@DMG1012T-7 N17S-G1-A1(GPIO/STRAPS)
Date: Tuesday, October 06, 2020 Sheet 22 of 62
1 2 3 4 5 6 7 8
5 4 3 2 1

MF=0 Non-mirrored
Channel 0 MF=0 Non-mirrored CHANNEL A: 2G/4G GDDR5
+1.35V_GFX
Channel 0 MF=0 Non-mirrored +1.35V_GFX
[20,57] +1.35V_GFX
23
<0-31> [20] VMA_DQ[63..0]
VMA_DQ30 M2
VRAM1
B1 C471
<32-63>
EV@22u/6.3V_6 VMA_DQ46 M2
VRAM2
B1 C472 EV@22u/6.3V_6
VMA_DQ26 M4 DQ31 | DQ7 VDDQ#B1 B3 C487 EV@22u/6.3V_6 VMA_DQ40 M4 DQ31 | DQ7 VDDQ#B1 B3 C488 EV@22u/6.3V_6
VMA_DQ31 N2 DQ30 | DQ6 VDDQ#B3 B12 C489 EV@22u/6.3V_6
QD40~47 VMA_DQ44 N2 DQ30 | DQ6 VDDQ#B3 B12 C473 EV@22u/6.3V_6

QD24~31 VMA_DQ24
VMA_DQ28
VMA_DQ27
N4
T2
T4
DQ29 | DQ5
DQ28 | DQ4
DQ27 | DQ3
DQ26 | DQ2
VDDQ#B12
VDDQ#B14
VDDQ#D1
VDDQ#D3
B14
D1
D3
C474
C475
EV@22u/6.3V_6
EV@22u/6.3V_6
VMA_DQ41
VMA_DQ45
VMA_DQ43
N4
T2
T4
DQ29 | DQ5
DQ28 | DQ4
DQ27 | DQ3
DQ26 | DQ2
VDDQ#B12
VDDQ#B14
VDDQ#D1
VDDQ#D3
B14
D1
D3
C490
C476
EV@22u/6.3V_6
EV@22u/6.3V_6

VMA_DQ29 U2 D12 VMA_DQ47 U2 D12


VMA_DQ25 U4 DQ25 | DQ1 VDDQ#D12 D14 C477 EV@1u/10V_2 VMA_DQ42 U4 DQ25 | DQ1 VDDQ#D12 D14 C491 EV@1u/10V_2
VMA_DQ23 M13 DQ24 | DQ0 VDDQ#D14 E5 C492 EV@1u/10V_2 VMA_DQ37 M13 DQ24 | DQ0 VDDQ#D14 E5 C478 EV@1u/10V_2
D DQ23 | DQ15 VDDQ#E5 DQ23 | DQ15 VDDQ#E5 D
VMA_DQ18 M11 E10 C493 EV@1u/10V_2 VMA_DQ35 M11 E10 C494 EV@1u/10V_2
VMA_DQ22 N13 DQ22 | DQ14 VDDQ#E10 F1 C495 EV@1u/10V_2
QD32~39 VMA_DQ36 N13 DQ22 | DQ14 VDDQ#E10 F1 C479 EV@1u/10V_2

QD16~23 VMA_DQ16
VMA_DQ21
VMA_DQ19
N11
T13
T11
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
DQ18 | DQ10
VDDQ#F1
VDDQ#F3
VDDQ#F12
VDDQ#F14
F3
F12
F14
C480
C481
EV@1u/10V_2
EV@1u/10V_2
VMA_DQ33
VMA_DQ39
VMA_DQ38
N11
T13
T11
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
DQ18 | DQ10
VDDQ#F1
VDDQ#F3
VDDQ#F12
VDDQ#F14
F3
F12
F14
C496
C497
EV@1u/10V_2
EV@1u/10V_2
VMA_DQ20 U13 G2 C498 EV@1u/10V_2 VMA_DQ34 U13 G2 C499 EV@1u/10V_2
VMA_DQ17 U11 DQ17 | DQ9 VDDQ#G2 G13 C482 EV@1u/10V_2 VMA_DQ32 U11 DQ17 | DQ9 VDDQ#G2 G13 C483 EV@1u/10V_2
VMA_DQ15 F13 DQ16 | DQ8 VDDQ#G13 H3 VMA_DQ58 F13 DQ16 | DQ8 VDDQ#G13 H3
VMA_DQ13 F11 DQ15 | DQ23 VDDQ#H3 H12 C500 EV@10u/6.3V_4 VMA_DQ62 F11 DQ15 | DQ23 VDDQ#H3 H12 C501 EV@10u/6.3V_4
VMA_DQ9 E13 DQ14 | DQ22 VDDQ#H12 K3 C484 EV@10u/6.3V_4
QD56~63 VMA_DQ59 E13 DQ14 | DQ22 VDDQ#H12 K3 C502 EV@10u/6.3V_4

QD8~15 VMA_DQ12
VMA_DQ14
VMA_DQ8
E11
B13
B11
DQ13 | DQ21
DQ12 | DQ20
DQ11 | DQ19
DQ10 | DQ18
VDDQ#K3
VDDQ#K12
VDDQ#L2
VDDQ#L13
K12
L2
L13
C485
C486
*EV@22u/6.3V_6
*EV@22u/6.3V_6
VMA_DQ63
VMA_DQ56
VMA_DQ61
E11
B13
B11
DQ13 | DQ21
DQ12 | DQ20
DQ11 | DQ19
DQ10 | DQ18
VDDQ#K3
VDDQ#K12
VDDQ#L2
VDDQ#L13
K12
L2
L13
C503
C504
*EV@22u/6.3V_6
*EV@22u/6.3V_6

VMA_DQ10 A13 M1 VMA_DQ57 A13 M1


VMA_DQ11 A11 DQ9 | DQ17 VDDQ#M1 M3 VMA_DQ60 A11 DQ9 | DQ17 VDDQ#M1 M3
VMA_DQ1 F2 DQ8 | DQ16 VDDQ#M3 M12 VMA_DQ48 F2 DQ8 | DQ16 VDDQ#M3 M12
VMA_DQ4 F4 DQ7 | DQ31 VDDQ#M12 M14 VMA_DQ55 F4 DQ7 | DQ31 VDDQ#M12 M14
VMA_DQ0 E2 DQ6 | DQ30 VDDQ#M14 N5 VMA_DQ50 E2 DQ6 | DQ30 VDDQ#M14 N5

QD0~7 VMA_DQ6
VMA_DQ3
VMA_DQ5
E4
B2
B4
DQ5 | DQ29
DQ4 | DQ28
DQ3 | DQ27
DQ2 | DQ26
VDDQ#N5
VDDQ#N10
VDDQ#P1
VDDQ#P3
N10
P1
P3 QD48~55
VMA_DQ54
VMA_DQ49
VMA_DQ52
E4
B2
B4
DQ5 | DQ29
DQ4 | DQ28
DQ3 | DQ27
DQ2 | DQ26
VDDQ#N5
VDDQ#N10
VDDQ#P1
VDDQ#P3
N10
P1
P3
VMA_DQ2 A2 P12 VMA_DQ51 A2 P12
VMA_DQ7 A4 DQ1 | DQ25 VDDQ#P12 P14 VMA_DQ53 A4 DQ1 | DQ25 VDDQ#P12 P14
DQ0 | DQ24 VDDQ#P14 T1 DQ0 | DQ24 VDDQ#P14 T1
VDDQ#T1 T3 VDDQ#T1 T3
VDDQ#T3 T12 VDDQ#T3 T12
VDDQ#T12 T14 VDDQ#T12 T14
VDDQ#T14 VDDQ#T14
FBA_CMD9 J5 FBA_CMD25 J5
[20] FBA_CMD9 FBA_CMD6 A12/A13 [20] FBA_CMD25 FBA_CMD22 A12/A13
K4 C5 K4 C5
[20] FBA_CMD6 FBA_CMD7 A7/A8 | A0/A10 VDD#C5 [20] FBA_CMD22 FBA_CMD23 A7/A8 | A0/A10 VDD#C5
K5 C10 K5 C10
[20] FBA_CMD7 FBA_CMD4 A6/A11 | A1/A9 VDD#C10 [20] FBA_CMD23 FBA_CMD20 A6/A11 | A1/A9 VDD#C10
K10 D11 K10 D11
[20] FBA_CMD4 FBA_CMD3 A5/BA1 | A3/BA3 VDD#D11 [20] FBA_CMD20 FBA_CMD19 A5/BA1 | A3/BA3 VDD#D11
K11 G1 K11 G1
[20] FBA_CMD3 FBA_CMD1 A4/BA2 | A2/BA0 VDD#G1 [20] FBA_CMD19 FBA_CMD17 A4/BA2 | A2/BA0 VDD#G1
H10 G4 H10 G4
[20] FBA_CMD1 FBA_CMD2 A3/BA3 | A5/BA1 VDD#G4 [20] FBA_CMD17 FBA_CMD18 A3/BA3 | A5/BA1 VDD#G4
C
H11 G11 H11 G11 C
[20] FBA_CMD2 FBA_CMD11 A2 /BA0 | A4/BA2 VDD#G11 [20] FBA_CMD18 FBA_CMD27 A2 /BA0 | A4/BA2 VDD#G11
H5 G14 H5 G14
[20] FBA_CMD11 FBA_CMD10 A1/A9 | A6/A11 VDD#G14 [20] FBA_CMD27 FBA_CMD26 A1/A9 | A6/A11 VDD#G14
H4 L1 H4 L1
[20] FBA_CMD10 A0/A10 | A7/A8 VDD#L1 [20] FBA_CMD26 A0/A10 | A7/A8 VDD#L1
L4 L4
VDD#L4 L11 VDD#L4 L11
VDD#L11 L14 VDD#L11 L14
VMA_WCK01 D4 VDD#L14 P11 VMA_WCK67 D4 VDD#L14 P11
[20] VMA_WCK01 VMA_WCK01# WCK01 | WCK23 VDD#P11 [20] VMA_WCK67 VMA_WCK67# WCK01 | WCK23 VDD#P11
D5 R5 D5 R5
[20] VMA_WCK01# WCK01 | WCK23 VDD#R5 [20] VMA_WCK67# WCK01 | WCK23 VDD#R5
R10 R10
VMA_WCK23 P4 VDD#R10 VMA_WCK45 P4 VDD#R10
[20] VMA_WCK23 VMA_WCK23# WCK23 | WCK01 [20] VMA_WCK45 VMA_WCK45# WCK23 | WCK01
P5 P5
[20] VMA_WCK23# WCK23 | WCK01 [20] VMA_WCK45# WCK23 | WCK01
A1 A1
FBA_EDC3 R2 VSSQ#A1 A3 FBA_EDC5 R2 VSSQ#A1 A3
[20] FBA_EDC3 FBA_EDC2 EDC3 | EDC0 VSSQ#A3 [20] FBA_EDC5 FBA_EDC4 EDC3 | EDC0 VSSQ#A3
R13 A12 R13 A12
[20] FBA_EDC2 FBA_EDC1 EDC2 | EDC1 VSSQ#A12 [20] FBA_EDC4 FBA_EDC7 EDC2 | EDC1 VSSQ#A12
C13 A14 C13 A14

https://vinafix.com/
[20] FBA_EDC1 FBA_EDC0 EDC1 | EDC2 VSSQ#A14 [20] FBA_EDC7 FBA_EDC6 EDC1 | EDC2 VSSQ#A14
C2 C1 C2 C1
[20] FBA_EDC0 EDC0 | EDC3 VSSQ#C1 [20] FBA_EDC6 EDC0 | EDC3 VSSQ#C1
C3 C3
FBA_DBI3 P2 VSSQ#C3 C4 FBA_DBI5 P2 VSSQ#C3 C4
[20] FBA_DBI3 FBA_DBI2 DBI3 | DBI0 VSSQ#C4 [20] FBA_DBI5 FBA_DBI4 DBI3 | DBI0 VSSQ#C4
P13 C11 P13 C11
[20] FBA_DBI2 FBA_DBI1 DBI2 | DBI1 VSSQ#C11 [20] FBA_DBI4 FBA_DBI7 DBI2 | DBI1 VSSQ#C11
D13 C12 D13 C12
[20] FBA_DBI1 FBA_DBI0 DBI1 | DBI2 VSSQ#C12 [20] FBA_DBI7 FBA_DBI6 DBI1 | DBI2 VSSQ#C12
D2 C14 D2 C14
[20] FBA_DBI0 DBI0 | DBI3 VSSQ#C14 [20] FBA_DBI6 DBI0 | DBI3 VSSQ#C14
E1 E1
VSSQ#E1 E3 VSSQ#E1 E3
VSSQ#E3 E12 VSSQ#E3 E12
FBA_CMD12 G3 VSSQ#E12 E14 FBA_CMD28 G3 VSSQ#E12 E14
[20] FBA_CMD12 FBA_CMD15 RAS | CAS VSSQ#E14 [20] FBA_CMD28 FBA_CMD31 RAS | CAS VSSQ#E14
L3 F5 L3 F5
[20] FBA_CMD15 CAS | RAS VSSQ#F5 [20] FBA_CMD31 CAS | RAS VSSQ#F5
F10 F10
VSSQ#F10 H2 VSSQ#F10 H2
FBA_CMD14 J3 VSSQ#H2 H13 FBA_CMD30 J3 VSSQ#H2 H13
[20] FBA_CMD14 VMA_CLK0# CKE VSSQ#H13 [20] FBA_CMD30 VMA_CLK1# CKE VSSQ#H13
J11 K2 J11 K2
[20] VMA_CLK0# VMA_CLK0 CK VSSQ#K2 [20] VMA_CLK1# VMA_CLK1 CK VSSQ#K2
J12 K13 J12 K13
[20] VMA_CLK0 CK VSSQ#K13 [20] VMA_CLK1 CK VSSQ#K13
M5 M5
VSSQ#M5 M10 VSSQ#M5 M10
FBA_CMD0 G12 VSSQ#M10 N1 FBA_CMD16 G12 VSSQ#M10 N1
[20] FBA_CMD0 FBA_CMD5 CS | WE VSSQ#N1 [20] FBA_CMD16 FBA_CMD21 CS | WE VSSQ#N1
L12 N3 L12 N3
[20] FBA_CMD5 WE | CS VSSQ#N3 [20] FBA_CMD21 WE | CS VSSQ#N3
B
N12 N12 B
VSSQ#N12 N14 VSSQ#N12 N14
R405 EV@120_1%_2 J13 VSSQ#N14 R1 R406 EV@120_1%_2 J13 VSSQ#N14 R1
SEN_A0 J10 ZQ VSSQ#R1 R3 SEN_A1 J10 ZQ VSSQ#R1 R3
SEN VSSQ#R3 R4 SEN VSSQ#R3 R4
VSSQ#R4 R11 VSSQ#R4 R11
FBA_CMD13 J2 VSSQ#R11 R12 FBA_CMD29 J2 VSSQ#R11 R12
[20] FBA_CMD13 RESET VSSQ#R12 [20] FBA_CMD29 RESET VSSQ#R12
J1 R14 J1 R14
MF VSSQ#R14 U1 MF VSSQ#R14 U1
VSSQ#U1 U3 VSSQ#U1 U3
VSSQ#U3 U12 VSSQ#U3 U12
VSSQ#U12 U14 VSSQ#U12 U14
A5 VSSQ#U14 A5 VSSQ#U14
U5 NC#A5 U5 NC#A5
+1.35V_GFX NC#U5 B5 +1.35V_GFX NC#U5 B5
A10 VSS#B5 B10 A10 VSS#B5 B10
U10 VREFD#A10 VSS#B10 D10 U10 VREFD#A10 VSS#B10 D10
VREFD#U10 VSS#D10 G5 VREFD#U10 VSS#D10 G5
R407 VSS#G5 G10 R25284 VSS#G5 G10
VSS#G10 H1 VSS#G10 H1
VSS#H1 H14 VSS#H1 H14
EV@549_1%_2
VSS#H14
EV@549_1%_2 VREFC_VMA1 0.4MM=16mils VSS#H14
VREFC_VMA1 0.4MM=16mils K1 K1
FBA_VREFC_1 J14 VSS#K1 K14 FBA_VREFC_2 J14 VSS#K1 K14
VREFC VSS#K14 L5 VREFC VSS#K14 L5
VSS#L5 L10 VSS#L5 L10
R410 VSS#L10 P10 R25283 VSS#L10 P10
R411 C505 FBA_CMD8 J4 VSS#P10 T5 R25282 EV@931_1%_2 FBA_CMD24 J4 VSS#P10 T5
[20] FBA_CMD8 ABI VSS#T5 [20] FBA_CMD24 ABI VSS#T5
[email protected]_1%_2 EV@931_1%_2 EV@820p/50V_4 T10 [email protected]_1%_2 T10
VSS#T10 VSS#T10
C506
EV@820p/50V_4
EV@K4G80325FB-HC28_GDDR5_170P EV@K4G80325FB-HC28_GDDR5_170P

A A

MEM_VREF_CTL_QA

VMA_CLK0 VMA_CLK1
3

2 Q20
[22] GPIO10_VREF
EV@DMG1012T-7

R25488 R25489
1

[email protected]_1%_2 [email protected]_1%_2
Quanta Computer Inc.
VMA_CLK0# VMA_CLK1# PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
N17S-G0-A1(GDDR5-1)
Date: Tuesday, October 06, 2020 Sheet 23 of 62
5 4 3 2 1
5 4 3 2 1

USB Charger to 3.0 (UBC)


+5VPCU
80 mils (Iout=2A)
1
U14

VIN VOUT
12
(RILIM_LO 1.2A)
80 mils (Iout=2A)
+USBPWR1
CTL1 CTL2 CTL3 ILIM_SEL 24
ILIM_L
15 ILIM_LO (RILIM_HI 2.3A) SDP 1 1 1 0
C508 16 ILIM_HI
1u/25V_4 ILIM_H C509 C510 C511
9
NC 17
R414 R415
39K_1%_2
100u/6.3V_12 470p/50V_4 0.1u/6.3V_2 CDP 1 1 1 1
GND#2 20K_1%_2
13
D [11] USB_OC0# 4 FAULT# 14 D
[33] USB_BC_ON ILIM_SEL GND#1 DCP 0 1 1 X
5 11 USBP8-_C iPAD charging current is about 2.1A so set on 2.3A
[33] USB_CHARGE_ON EN DM_IN 10 USBP8+_C 1.2A current limit of USB 3.0 SDP mode
R416 100K_1%_2
6 DP_IN
[33] USB_CLT1 7 CTL1 2
+5VPCU R418 10K_1%_2 CTL2
USBP8- [11]
RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
R417 10K_1%_2 CTL3 8 CTL2 DM_OUT 3
CTL3 DP_OUT USBP8+ [11] 1. ILIM_SEL is always set high
2. Load Detection - Port Power Management is not used
3. Mouse / Keyboard wake function is not used
SLGC55544CVTR If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use
RILIM_LO < 80.6 kΩ.
The following equation programs the typical current limit:
(1)
RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.

IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}

USB 3.0 Connector (UB3)


+5V_S5

C C
+USBPWR0
C512 U15 +USBPWR0
1u/10V_2 Close USB3.0
5 1 R25517 *0_4/S USBP4-_R
IN OUT [11] USBP4- USBP4+_R
R25518 *0_4/S
[11] USBP4+
2
GND
USB3.0 Right Down
USBON# 4 3 C515 C516 C517
[33,45] USBON# /EN /OC
470p/50V_4 0.1u/6.3V_2 100u/6.3V_12 CN2
1 VBUS
G524B2T11U USBP4-_R 2 D-
C513 *1.6p/50V_4 USBP4+_R 3
[11] USB_OC3# D+
Enable: Low Active 4 GND
R421 *0_4/S USB30_RX1-_C USB30_RX1-_C 5
BCD:AL002822000 AP2822HKETR-G1 (2.5A) [11] USB30_RX1-
R422 *0_4/S USB30_RX1+_C USB30_RX1+_C 6
SSRX-
SSRX+
[11] USB30_RX1+
GMT:AL000524007 G524B2T11U (2.5A) 7 GND
C518 *1.6p/50V_4 USB30_TX1-_C_R 8
GMT:AL000524009 G524D2T11U (1.5A) USB30_TX1+_C_R 9
SSTX-
SSTX+

USB-097-1R09HG

13
12
11
10
https://vinafix.com/
C519 0.1u/6.3V_2 USB30_TX1-_C R424 *0_4/S USB30_TX1-_C_R
[11] USB30_TX1- USB30_TX1+_C USB30_TX1+_C_R
C520 0.1u/6.3V_2 R432 *0_4/S
U6530 USBP4+_R [11] USB30_TX1+
USB30_RX1-_C 1 10 USB30_RX1-_C
Line-1 NC#4 USBP4-_R +USBPWR0 C521 C522
USB30_RX1+_C 2 9 USB30_RX1+_C *1.6p/50V_4 *1.6p/50V_4
B Line-2 NC#3 +USBPWR1 B
1

3
GND#1 D13163 D13162
USB30_TX1-_C_R 4 7 USB30_TX1-_C_R PESD5V0F1BSF PESD5V0F1BSF D13101 USBP8-_C R426 *0_4/S USBP8-_C_R
Line-3 NC#2 TVM0G5R5M261R_260p USBP8+_C R425 *0_4/S USBP8+_C_R
2

USB30_TX1+_C_R 5 6 USB30_TX1+_C_R
Line-4 NC#1
AZ1045-04F.R7G USB3.0 Right Up
CN3
1 VBUS
USBP8-_C_R 2 D-
C523 *1.6p/50V_4 USBP8+_C_R 3 D+
4 GND
R427 *0_4/S USB30_RX2-_C USB30_RX2-_C 5
[11] USB30_RX2- SSRX-
R428 *0_4/S USB30_RX2+_C USB30_RX2+_C 6
[11] USB30_RX2+ SSRX+
7 GND
USBP8+_C_R C526 *1.6p/50V_4 USB30_TX2-_C_R 8 SSTX-
U6531 USB30_TX2+_C_R 9 SSTX+
USB30_RX2-_C 1 10 USB30_RX2-_C USBP8-_C_R
Line-1 NC#4 USB-097-1R09HG

13
12
11
10
USB30_RX2+_C 2 9 USB30_RX2+_C
Line-2 NC#3
1

3
GND#1 D13164 D13165
USB30_TX2-_C_R 4 7 USB30_TX2-_C_R PESD5V0F1BSF PESD5V0F1BSF C530 0.1u/6.3V_2 USB30_TX2-_C R429 *0_4/S USB30_TX2-_C_R
Line-3 NC#2 [11] USB30_TX2- USB30_TX2+_C R430 USB30_TX2+_C_R
C531 0.1u/6.3V_2 *0_4/S
[11] USB30_TX2+
2

USB30_TX2+_C_R 5 6 USB30_TX2+_C_R
Line-4 NC#1
+USBPWR1

Vinafix.com
AZ1045-04F.R7G C532 C533
*1.6p/50V_4 *1.6p/50V_4
A A

D13102
TVM0G5R5M261R_260p

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
USB3.0*2/USB Chager*1
Date: Tuesday, October 06, 2020 Sheet 24 of 62
5 4 3 2 1
5 4 3 2 1

+3V +5V
Hall Sensor
25
+3V

R439 *1K_1%_2 BRIGHT


R440 *1K_1%_2 PCH_BLON_C
C546 C550 C545
0.1u/6.3V_2 0.1u/6.3V_2 *22u/6.3V_6

20mils +VIN_BLIGHT

BRIGHT R441 1K_1%_2 VADJ1 +3VPCU R25519 2.2_5%_6 LID#


2A/80mils eDP Conn.

2
D R67551 *Short_0603 +VIN_BLIGHT D
+VIN

1
C558 33p/25V_2 D13091 C841
*0.1u/6.3V_2 C542 C536 0.1u/25V_2

S VCC

OUTPUT
*TVM0G5R5M220R_22p C543 0.1u/6.3V_2 +VIN_BLIGHT

1
R442 4.7u/25V_6

GND
100K_1%_2 C537 0.01u/50V_4 C544 100p/50V_2 CN29

42
2
C557 0.1u/6.3V_2 INT_eDP_AUXP_C C842 HE1
[2] INT_EDP_AUXP

3
D13092 APX8132AI-TRG 40
[2] INT_EDP_AUXN C556 0.1u/6.3V_2 INT_eDP_AUXN_C 0.1u/6.3V_2 2A/80mils 39
*TVM0G5R5M220R_22p R25456 *0_5%_6 +3VLCD_CON_R_C 38

1
C552 0.1u/6.3V_2 INT_eDP_TXP0_C 37
[2] INT_EDP_TXP0 +3VLCD_CON_R 36
+3VLCD_CON R25458 *Short_0603
C553 0.1u/6.3V_2 INT_eDP_TXN0_C 35
[2] INT_EDP_TXN0 H : MIC_Dual(default on MB) R25459 *Short_0603 +3V_CCD_PWR1_C 34
INT_eDP_TXP1_C L : MIC_Single( new LCD Cable is requirement) +3V 33
[2] INT_EDP_TXP1 C554 0.1u/6.3V_2
C20002 *180p/25V_2 R25462 *Short_0603 +TS_PWR 32
INT_eDP_TXN1_C +5V_TP 31
[2] INT_EDP_TXN1 C555 0.1u/6.3V_2
30
[9,15] BOARD_ID6_MIC_Single TS_EN_R 29
[33] TS_EN R436 *0_4/S
VADJ1 28
[2] PCH_DPST_PWM R443 10_5%_2 BRIGHT 27
C6616 180p/25V_2 BL_ON
R445 *0_4/S DISP_ON R25467 33_1%_2 ULT_EDP_HPD_R 26
[2] PCH_DISP_ON [2] ULT_EDP_HPD 25
[9,15] Board_ID4_TSN INT_EDP_AUXP_C 24
R25270 *100K_1%_2
C
C20001 *180p/25V_2 R25271 *100K_1%_2 INT_EDP_AUXN_C 23 C
+3V 22
H : w/oTSN(default on MB) INT_EDP_TXP0_C 21
Touch Screen +5V L : w TSN(new LCD Cable is requirement) INT_EDP_TXN0_C 20
19
INT_EDP_TXP1_C 18
INT_EDP_TXN1_C 17
16
IR Camera R68790 *TSN@Short_0603 Cable separate Touch and w/o Touch due
3/26 Acer request Pivacy LCM
[33,34] Privacy_EN
15
14
+5V
to BIOS worry Commercial detection too 13
R69050 *IR@Short_0603
+5V
R68567
late at commercial project. TP13179 TS_INT# 12

8
11
10

1
TSN@10K_1%_2
6 Q6591 R25289 *Short_0402 USBP5+_CAM_C 9
5 [11] USBP5+_CAM USBP5-_CAM_C 8
2 R25288 *Short_0402
C96247
[33] IR_WP#_EC 4 CCD [11] USBP5-_CAM 7
C96249 C96248 3 TSN@DMP2130L-7 R67414 *Short_0402 USBP6+_HUB_TS_R 6
2 [39] USBP6+_HUB_TS 5

3
R67415 *Short_0402 USBP6-_HUB_TS_R
IR@10u/6.3V_4 [email protected]/6.3V_4 IR@1u/10V_2 Touch screen [39] USBP6-_HUB_TS

3
1 Q6592 4
2 L13 2 1 BLM15AG601SN1D_0.3A DMIC_DAT_L_C 3
[33] TouchPanel_PWR +5V_TP [26] DMIC_DAT_L DMIC_CLK_L_C 2

7
CN50 Dual DMIC L12 2 1 BLM15AG601SN1D_0.3A
[26] DMIC_CLK_L 1
IR@50208-00601-V02 TSN@DDTC144EUA-7-F

41
1
B [13] DMIC_DAT_PCH R69063 *33_1%_2 B
[13] DMIC_CLK_PCH R69062 *33_1%_2 C548 C547

10p/25V_2 10p/25V_2
196538-40041-3
+3VPCU Stylus Pen charge
+3V
R25370 +3VPCU
*100K_1%_2
LCD back light +3V CN46

3
LID# LID# [33,42] +3VLCD_CON C559
U19
2.5A / 100mils +3VLCD_CON D13111 1 2 *PESD5V0F1BSF USBP5+_CAM_C
1 +VIN
1

R25368 R25367 2 1u/10V_2 D13112 1 2 *PESD5V0F1BSF USBP5-_CAM_C


10K_1%_2 10K_1%_2 D3 LID591#,EC intrnal PU
4 1
1N4148WS VIN#1 VOUT USBP6-_HUB_TS_R

4
R69073 D13113 1 2 *PESD5V0F1BSF
BL_ON R69105 *22_5%_8 5 2
BL# SPIN@50271-0020N-001 *1M_5%_6 VIN#2 GND D13114 1 2 *PESD5V0F1BSF USBP6+_HUB_TS_R
2

DISP_ON
PCH 3 C560 C561 C562
3

EN
0.01u/50V_4 0.1u/6.3V_2 10u/6.3V_4

3
A R25365 *0_4/S PCH_BLON_C 5 2 2 A
[2] PCH_LVDS_BLON EC_FPBACK# [33] 2
R446 APL3512ABI-TRG
R25366 *0_4/S Q6521A Q6521B Q6522

3
[33] PCH_BLON_EC R25369 Q6646
2N7002KDW 2N7002KDW DDTC144EUA-7-F R69106 *2N7002K 100K_1%_2
4

1
Quanta Computer Inc.

https://vinafix.com/
100K_1%_2 DISP_ON
EC 2 *1M_5%_6

Q6657
*DDTC144EUA-7-F
PROJECT : Z8IA_ZAIA

1
Size Document Number Rev
1A
eDP/LID/CCD/TS/DMIC1/IR/Stylus
Date: Tuesday, October 06, 2020 Sheet 25 of 62
5 4 3 2 1
5 4 3 2 1

Codec(ADO)
HP-R2

HP-L2
26
LINE1-VREFO-L
+1.8V R68839 *0_5%_4 Change to 1U from Realtek's suggestion
LINE1-VREFO-R

MIC2-VREFO

CODEC_VREF C563 2.2u/10V_4 ADOGND


INT_AMIC-VREFO C564

C565

C566

C567
+3V R68687 *Short_0603 10u/6.3V_4 ADOGND
D +5VA CN51 D

R447 100K_1%_2 RING2 SLEEVE 1 M/G


HP-L3 HP-L3 4 L

1u/10V_6

1u/10V_6
10u/6.3V_4
5
C568 C569 HP_JD# 6
0.1u/6.3V_2 10u/6.3V_4 HP_JD# HP-R3 3 R
HP-R3 RING2 2 G/M
CPVDD_Codec SLEEVE
+1.8V R69075 *Short_0402 2SJ3127-023111F
ANALOG
ADOGND Combo Jack
R449 *0_5%_4 L28 1 2 HCB1608KF-121T30_3A U20

36

35

34

33

32

31

30

29

28

27

26

25
+1.5V ALC255-CG C96265 C96266 C96267 C96268

1 AZ5725-01F.R7G

1 AZ5725-01F.R7G

1 AZ5725-01F.R7G
ADOGND *100p/50V_2 *100p/50V_2 *100p/50V_2 *100p/50V_2

CPVEE

HP-OUT-L

LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HP-OUT-R

LINE1-VREFO-R

VREF
DIGITAL R588 *0_5%_4
C845 R589 *0_5%_4
Codec PWR 1.5V(ADO) 10u/6.3V_4
ADOGND 37 24
CBP LINE2-L
38 23 ADOGND
ADOGND AVSS2 LINE2-R
C572 10u/6.3V_4 39 22 LINE1-L ADOGND
LDO2-CAP LINE1-L
Analog AVDD2 40 21 LINE1-R

2
AVDD2 LINE1-R
+5V_PVDD

D10
1 2 41 20

D13094

D13095
Digital +5V L15 PBY160808T-600Y-N_3A
PVDD1 256@5VSTB/255@3V3STB
R450 *0_6/S R736 *0_4/S +3VPCU
analog digital
L_SPK+ 42 19 C573 10u/6.3V_4
SPK-L+ MIC-CAP ADOGND
C574 C575 L_SPK- 43 18 SLEEVE
SPK-L- MIC2-R/SLEEVE trace width of SLEEVE & RING2
10u/6.3V_4 0.1u/6.3V_2
R_SPK- 44 17 RING2 are required at least 40mil and
SPK-R- MIC2-L/RING2 its length should be asshort as possible
R_SPK+ 45 16 R25371 22K_5%_2
Low is power down SPK-R+ 256@PCBEEP/255@MONO-OUT
amplifier output 46 15
PVDD2 SPDIFO/FRONT JD/GPIO3 C844 R734
GPIO0/DMIC-DATA

PD# 47 14 HP_JD#
GPIO1/DMIC-CLK
R451 200K_1%_2
C
PDB MIC2/LIN2 JD 100p/50V_2 10K_1%_2 C
C576 C577 48 13 SENSEA R735
SPDIFO/GPIO2 SDATA-OUT HP/LINE1 JD

LDO3-CAP
10u/6.3V_4

SDATA-IN
0.1u/6.3V_2 *0_2/S

DVDD-IO

PCBEEP
RESETB
DC DET

R452 100K_1%_2 +3V


DVDD

SYNC
49 BCLK
DGND
Analog
Digital
1

10

11

12
R454 *0_5%_4 D11 1 2 1N4148WS
TP9023 ACZ_SPKR [6,10,33]
DMIC_DAT

DMIC_CLK

C578
DC-DET

D6543 1 2 1N4148WS
PCBEEP_EC [33]
C846 0.1u/6.3V_2
R455 *Short_0603 +AZA_VDD
+3V
10u/6.3V_4

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C580 C581 +3V +1.8V
0.1u/6.3V_2 10u/6.3V_4 1.8V power rail

R738 *0_4/S
PCH_AZ_CODEC_RST# [13]
R460 *0_5%_4

[25] DMIC_DAT_L
DMIC_DAT_L

DMIC_CLK_L
R459 *0_4/S
Universal Audio Jack HEADPHONE/MIC/LINE combo (ADO)
Tied at one point only under R461 22_5%_2 PCH_AZ_CODEC_SYNC [13]
[25] DMIC_CLK_L
the codec or near the codec
DVDD_IO R462 *Short_0603
R463 *0_4/S C583
R464 *0_5%_4 33p/25V_2
R465 *0_5%_4 R69059 33_1%_2
PCH_AZ_CODEC_SDIN0 [13]
R467 *0_4/S C584 C585
R469 *0_5%_4 0.1u/6.3V_2 10u/6.3V_4 MIC2-VREFO R468 2.2K_5%_2
PCH_AZ_CODEC_BITCLK [13]
R470 *0_4/S
C586 *1000p/25V_2 C587 *22p/25V_2 R471 2.2K_5%_2

C588 *0.1u/6.3V_2 PCH_AZ_CODEC_SDOUT [13] SLEEVE


B B
R25495 *0_4/S RING2
ADOGND
HP-L2 R472 62_1%_2 HP-L3
Cap need near R732 *100K_1%_2 +3V
AVDD1 and HP-R2 R473 62_1%_2 HP-R3
AVDD2
power source input
LINE1-L C589 4.7u/6.3V_6 R474 R475
*10K_1%_2 *10K_1%_2 C590 C591 C592 C593
100p/50V_2 100p/50V_2 100p/50V_2 100p/50V_2
Internal Speaker LINE1-VREFO-L R476 4.7K_1%_2

LINE1-VREFO-R R477 4.7K_1%_2


ADOGND

Codec PWR 5V(ADO) CN63

5
LINE1-R C594 4.7u/6.3V_6
L_SPK- R67369 P2_P2SPIN@0_5%_6 L_SPK-_1
L_SPK+ R67370 P2_P2SPIN@0_5%_6 L_SPK+_1 3
R_SPK+ R67367 P2_P2SPIN@0_5%_6 R_SPK+_1 4
R_SPK- R67368 P2_P2SPIN@0_5%_6 R_SPK-_1 1
2
+1.5V +1.8V
6

DIGITAL ANALOG
C601 C602 C603 C604
Mute(ADO)
+5V +5VA P2_P2SPIN@1000p/25V_2 P2_P2SPIN@1000p/25V_2 P2_P2SPIN@1000p/25V_2 P2_P2SPIN@1000p/25V_2 R69076 R69077
+AZA_VDD
*0_5%_2 *Short_0201
L16 1 2 HCB2012KF-220T60_6A P2_P2SPIN@50271-0040N-V01

C596 C597 C598 C599 R478


*0.1u/6.3V_2 *10u/6.3V_4 *10u/6.3V_4 *0.1u/6.3V_2 1K_1%_2

2
PD# D12 2 1 *RB500V-40 3 1 PCH_AZ_CODEC_RST#
CN64
5

A A
ADOGND Q21 *PJA138K
L_SPK- R69066 ViKi@0_5%_6 L_SPK-_1_VIKI R479 C595
L_SPK+ L_SPK+_1_VIKI 3
R69067 ViKi@0_5%_6 *10K_1%_2 *1u/25V_4
R_SPK+ R_SPK+_1_VIKI 4
R69068 ViKi@0_5%_6
R_SPK- R_SPK-_1_VIKI 1
R69069 ViKi@0_5%_6 D13 2 1 RB500V-40
2 AMP_MUTE# [33]
6

C96926 C96927 C96928 C96925


ViKi@1000p/25V_2 ViKi@1000p/25V_2 ViKi@1000p/25V_2 ViKi@1000p/25V_2
Quanta Computer Inc.
ViKi@50271-0040N-V01
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
Audio Codec/HP/SPK
Date: Tuesday, October 06, 2020 Sheet 26 of 62
5 4 3 2 1
5 4 3 2 1

HDMI Retimer(HDM)
27

SDATA_SRC
PS8409 strap pin

SCL_SRC

HDMI_SEL#_A1
I2C_SEL_PIN
+1.2V_HDMI
HDMI_RST#
SCL_SRC DCIN_ENB

PRE_SEL
SDATA_SRC DC coupling enable; Internal pull up, 3.3V I/O. DCIN_ENB R68199 4.7K_1%_2

CSDA
CSCL
L: DC coupling input
H: Default,AC coupling input
R68202 4.99K_1%_2
R68200 R68201
*0_5%_4 *0_5%_4 I2C_SEL_PIN I2C_SEL_PIN
U6537 R68203 *4.7K_1%_2

36
35
34
33
32
31
30
29
28
27
26
25
I2C Slave Address selection; Internal pull down, 3.3V I/O. +3V_HDMI
D SI SI L: Default, Slave address 0x10-0x2F. D

VDD12#2
CSCL

RSV2
HDMI_ID
I2C_ADDR
REXT
RESETB

CSDA
PRE
H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.

SCL_SRC/AUXP

NC
SDA_SRC/AUXN
HDMI_SEL#_A1
HDMI_ID enable ; Internal pull down , 3.3V I/O.
L: Default, HDMI ID enable R68204 *4.7K_1%_2 HDMI_SEL#_A1
T3 +3V_HDMI H: HDMI ID disable +3V_HDMI
37 24
C96545 0.1u/6.3V_2 GPU_D2_C 38 POWERSWITCH VDD33#2 23 TX2_HDMI+ R68228 *Short_0402 C_TX2_HDMI+
[2] HDMI_TXDP2 GPU_D2#_C IN_D2p OUT_D2p TX2_HDMI- C_TX2_HDMI-
C96546 0.1u/6.3V_2 39 22 R68229 *Short_0402
[2] HDMI_TXDN2 HDMI_HPD_DC IN_D2n OUT_D2n HDMI_HPD
40 21

TO CONN.
C96547 0.1u/6.3V_2 GPU_D1_C 41 HPD_SRC HPD_SNK 20 TX1_HDMI+ R68230 *Short_0402 C_TX1_HDMI+
[2] HDMI_TXDP1 GPU_D1#_C IN_D1p OUT_D1p TX1_HDMI- C_TX1_HDMI-
EQ_SEL_A0 EQ_SEL_A0
C96548 0.1u/6.3V_2 42 19 R68231 *Short_0402
[2] HDMI_TXDN1 +1.2V_HDMI 43 IN_D1n OUT_D1n 18 +1.2V_HDMI Receiver equalization setting; Internal pull up , 3.3V I/O.
C96549 0.1u/6.3V_2 GPU_D0_C 44 VDDRX12#1 VDDTX12#1 17 TX0_HDMI+ R68232 *Short_0402 C_TX0_HDMI+ L: Compensaton for channel loss up to 13dB R68210 *4.7K_1%_2 R68211 *4.7K_1%_2
[2] HDMI_TXDP0 GPU_D0#_C IN_D0p OUT_D0p TX0_HDMI- C_TX0_HDMI- H: Default , Compensation for channel loss up to 17dB +3V_HDMI
C96550 0.1u/6.3V_2 45 16 R68233 *Short_0402
[2] HDMI_TXDN0 IN_D0n OUT_D0n
+1.2V_HDMI 46 15 +1.2V_HDMI M: Compensation for channel loss up to 11dB
C96551 0.1u/6.3V_2 GPU_CLK_C 47 VDDRX12#2 VDDTX12#2 14 TXC_HDMI+ C_IN_CLK
[2] HDMI_TXCP GPU_CLK#_C 48 IN_CLKp OUT_CLKp 13 TXC_HDMI- C_IN_CLK#
C96552 0.1u/6.3V_2 PRE_SEL
[2] HDMI_TXCN IN_CLKn OUT_CLKn PRE_SEL R68215 *4.7K_1%_2
Output pre-emphasis setting; Internal pull up, 3.3V I/O.
49
EPAD Co-lay L: Pre-emphasis =2.5dB
H: Default, No Pre-emphasis

TESTMODEB
LH1

HDMI_CEC
DCIN_ENB
1 2

SDA_SNK
SCL_SNK
VDD33#1

VDD12#1

CEC_EN
VDDA12
4 3

RSV1
PDB
NFP0QHB372HS2D

EQ
+3V_HDMI
MSIC Optional

1
2
3
4
5
6
7
8
9
10
11
12
XX@PS8209_8409

Reset Reserve +3V_HDMI


R68216 C_IN_CLK

HDMI_SDATA_R2
10K_1%_2

HDMI_SCLK_R1
+1.2V_HDMI

+1.2V_HDMI
EQ_SEL_A0
DCIN_ENB
+3V_HDMI HDMI_RST# C96553 R68217 R68218
C *3.3p/25V_2 *10K_1%_2 *10K_1%_2 C

C96554 C_IN_CLK#
1u/10V_2 CSCL
CSDA

POWER DECOUPLING
+1.2V_HDMI Place Cp,Cq,Cr close to U34 pin15,18

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Place Cs,Ct close to U34 pin30

+1.2V +1.2V_HDMI +3V +3V_HDMI

Cp

Cq

Cr

Cs

Ct
R68236 *Short_0603 C96555 C96556 C96557 C96558 C96559
R68237 *Short_0402 0.01u/50V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.01u/50V_4 0.1u/6.3V_2

C96560 C96561
1u/10V_2 0.1u/6.3V_2

+3V_HDMI Place Cu,Cv close to U34 pin24 +1.2V_HDMI Place Ci,Cj,Ck close to U34 pin7,11
Place Cw close to U34 pin1 Place Cl,Cm,Cn,Co close to U34 pin46

Cu

Cv

Cw

Ci

Cj

Ck

Cl

Cm

Cn

Co
C96562 C96563 C96564 C96565 C96566 C96567 C96568 C96569 C96570 C96571 C96572
0.01u/50V_4 0.1u/6.3V_2 0.1u/6.3V_2 10u/6.3V_4 0.01u/50V_4 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.01u/50V_4 10u/6.3V_4
B B

HDMI HPD R68219 *10K_1%_2 HDMI_HPD_DC


CONNECTOR
+3V_HDMI

[2] HDMI_HPD_PCH R68221 *Short_0402


21 20 CN37
C_TX2_HDMI+ 1 Data2+
2 D2_shield
C_TX2_HDMI- 3 Data2-
C_TX1_HDMI+ 4 Data1+
5 D1_shield
C_TX1_HDMI- 6 Data1-
C_TX0_HDMI+ 7 Data0+
+3V_DEEP_SUS 8 C_TX0_HDMI-
C_TX0_HDMI-
D0_shield D13081 2 1 *PESD5V0H1BSF
+3V_DEEP_SUS 9 Data0-
C_IN_CLK 10 CLK+ C_TX0_HDMI+ D13082 2 1 *PESD5V0H1BSF
11 CLK_shield
C_IN_CLK# 12 CLK- C_TX1_HDMI- D13083 2 1 *PESD5V0H1BSF
13 CEC
R69019 +5V_HDMIC R490 2.2K_5%_2 14 C_TX1_HDMI+
HDMI_SCLK
Reserved D13084 2 1 *PESD5V0H1BSF
4.7K_1%_2 R491 2.2K_5%_2 15 DDC CLK
HDMI_SDATA 16 DDC DATA C_TX2_HDMI- D13085 2 1 *PESD5V0H1BSF
+5V C613 *10p/25V_2 17
5

DDC/CEC GND
Q6508 +5V_HDMIC C614 *10p/25V_2 18 +5V C_TX2_HDMI+ D13086 2 1 *PESD5V0H1BSF
Q62A 4 3 SSM6N43FU R68907 *0_4/S HDMI_SCLK 19 Hot Plug DET
[2] HDMI_DDCCLK 1 +5V_HDMIC
VOUT C_IN_CLK# D13087 2 1 *PESD5V0H1BSF
R68906 *0_4/S HDMI_SDATA
2

A HDMI_HPD R25297 HDMI_HPD_C A


3 23 22
2

VIN 10591-19001 C_IN_CLK D13088 2 1 *PESD5V0H1BSF


C6560 D50
Q62B SSM6N43FU 2 *220p/25V_2 AZ5725-01F.R7G *0_4/S
1 6 GND HDMI_SCLK D13089 2 1 *PESD5V0H1BSF
[2] HDMI_DDCDATA VC2 C616
1

TVM0G5R5M220R_22p 220p/25V_2 HDMI_SDATA D13090 2 1 *PESD5V0H1BSF


G5250Q1T73U
HDMI_SCLK_R1 R69020 *0_4/S

HDMI_SDATA_R2 R69021 *0_4/S


R1250
Quanta Computer Inc.
20K_1%_2
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
HDMI Re-driver(PS8409) and CONN
Date: Tuesday, October 06, 2020 Sheet 27 of 62
5 4 3 2 1
5 4 3 2 1

LAN RTL8111K-CG/Intel I219 GPO R67474 10K_1%_2


+3V_LAN
28
LAN_JTAG_TDI +1.05V_LAN +3V_LAN
+3V_LAN TP13158 +3V_LAN
LAN_JTAG_TDO R67477 [email protected]_1%_2

+1.05V_LAN_REGOUT
Low : Internal SVR TP13159
LAN_JTAG_TMS R4009 [email protected]_1%_2
TP13160
LAN_JTAG_TCK

ENSWREG

LANWAKEB
ISOLATEB
R67475

2
TP13161
*8111K@0_5%_4

XTAL2
XTAL1
Q6619 I219@2N7002K

RSET
1 3

GPO
D D
I219_SMDATA
ENSWREG TP13162
R67504 *I219@0_5%_4
LAN_DIS# [13]
LED2/EEDO TP13152
R67513 R67476

12
11
10
LED0

9
8
7
6
5
4
3
2
1
I219@0_5%_4 TP13153 U6521 R67524 *I219@10K_1%_2
8111K@0_5%_4

AVDD10#1
CKXTAL2
CKXTAL1
DVDD10#1

DVDD33#1
REST

REGOUT
ENSWREG
VDDREG

GPO
LANWAKEB
ISOLATEB
LED1/EESK TP13154 49
GND
EEDI TP13155
R4008
MDI0+ 13 48 PCIE_REQ_LAN#_R ISOLATEB R9340 [email protected]_1%_2 +3V_LAN
I219@1K_1%_2 MDI0- 14 MDIP0 CLKREQB 47 R67599 I219@0_5%_4
MDIN0 NC#6 +1.05V_LAN
15 46 R67598 I219@0_5%_4 R509 8111K@1K_1%_2
+3V_LAN AVDD33#1 NC#5 +3V
16 45
+1.05V_LAN AVDD10#2 REFCLK_N CLK_PCIE_LANN [12]
MDI1+ 17 44
MDIP1 REFCLK_P CLK_PCIE_LANP [12]
MDI1- 18 43 R510 8111K@15K_1%_2
MDIN1 DVDD10#3 +1.05V_LAN
+3V_LAN
19 42
AVDD33#2 HSIN PCIE_TXN9_LAN [11]
MDI2+ 20 41
MDIP2 HSIP PCIE_TXP9_LAN [11]
MDI2- 21 40
MDIN2 DVDD10#2 PCIE_RXN_LAN_L +1.05V_LAN
+1.05V_LAN
22 39 C96306 0.1u/6.3V_2 +3V_LAN
AVDD10#3 HSON PCIE_RXP_LAN_L PCIE_RXN9_LAN [11]
MDI3+ 23 38 C96307 0.1u/6.3V_2
MDIP3 HSOP PCIE_RXP9_LAN [11]
MDI3- 24 37
MDIN3 EVDD10 +1.05V_LAN
+3V_LAN
I219_SMCLK

LED2/EEDO
R4023 I219@499_1%_2

LED1/EESK

DVDD33#2

EECS/SCL
SMBDATA
EEDI/SDA
I219_SMDATA R4024 I219@499_1%_2

PERSTB
C96304 C96305
0.1u/6.3V_2 1u/10V_2

NC#1

NC#2
NC#3
NC#4
LED0
R68929
LAN_JTAG_TDI R67509 *I219@10K_1%_2
10K_1%_2
LAN_JTAG_TDO R67510 *I219@10K_1%_2

25
26
27
28
29
30
I219_SMDATA 31
LAN_JTAG_TDI 32
LAN_JTAG_TMS 33
LAN_JTAG_TDO 34
LAN_JTAG_TCK 35
36
XX@I219_8111K LAN_JTAG_TMS R67511 *I219@10K_1%_2
2

LAN_JTAG_TCK R67512 *I219@10K_1%_2


PLTRST#_LAN

I219_SMCLK
Q6620 3 1 2N7002K

LED2/EEDO

LED1/EESK
[13,19,30,32,33,39,45] PLTRST#

C R68932 *0_5%_4 C

LED0

EEDI
+3V_LAN
+3V_LAN
PLTRST#_LAN RJ45

R68924 U25 9 11
10K_1%_2 MDI2+ 2 23 MDI2+_1
TD1+ MX1+ CN8
MDI2- 3 22 MDI2-_1
5 TD1- MX1- 20 MDI3-_1
2

MDI3- MDI3-_1 8

https://vinafix.com/
MDI3+ 6 TD2+ MX2+ 19 MDI3+_1 MDI3+_1 7
R67505 I219@0_5%_4 Q6618 3 1 2N7002K LANWAKEB MDI0- 8 TD2- MX2- 17 MDI0-_1
[13] LAN_WAKE# MDI1-_1 6
MDI0+ 9 TD3+ MX3+ 16 MDI0+_1 MDI2-_1 5
R67506 8111K@0_5%_4 R68925 *0_5%_4 MDI1- 11 TD3- MX3- 14 MDI1-_1
[13,32,45] PCIE_WAKE# MDI2+_1 4
MDI1+ 12 TD4+ MX4+ 13 MDI1+_1 MDI1+_1 3
TD4- MX4-
MDI0-_1 2
TCT1 1 24 MCT1 R516 75_1%_8 MDI0+_1 1
TCT2 4 TCT1 MCT1 21 MCT2 R517 75_1%_8
+3V_LAN TCT3 7 TCT2 MCT2 18 MCT3 R518 75_1%_8
TCT4 10 TCT3 MCT3 15 MCT4 R519 75_1%_8
25 TCT4 MCT4
10 12 2RJ1622-001111F
GND C646
10p/3KV_1808
R25445 C645 C96313
10K_1%_2 [email protected]/50V_4 I219@1u/50V_6 XX@Transformer
2

Q6531 1 3 2N7002K PCIE_REQ_LAN#_R


[12] PCIE_CLKREQ_LAN#

R25446 *0_5%_4
B B
Q23 +3V_LAN +3V_S5
+3V_LAN DMP2130L-7

1 3 R25617 *Short_0805 R25618 *0_5%_8


+3VPCU
LAN_XTAL1
5

R511 *0_4/S XTAL1


C20131 R25619

2
Q6554A 3 4 I219@2N7002KDW I219_SMCLK 0.1u/6.3V_2 100K_1%_2 Y4
[9] I219_PCH_SMCLK
1 3 R512 *0_4/S XTAL2
R67525 *I219@0_5%_4 2 4

C638 C639
+3V_LAN
R67508 8111K@0_5%_4 10p/25V_2 25MHZ/10ppm
[33] LANPWR# 10p/25V_2
2

I219_SMDATA R67507 I219@0_5%_4 R25620 10K_1%_2


Q6554B 6 1 I219@2N7002KDW [13] SLP_LAN#
[9] I219_PCH_SMDATA
R67526 *I219@0_5%_4 non M3 C20132
1000p/25V_2

+3V_LAN
Keep trace short and width Power trace Layout 寬寬> 60mil

R69018 8111K@0_5%_6 PIN4 PIN5 PIN15 PIN19 PIN29 PIN15 PIN19

La
C96310 C96309 C96308 C96300 C96301 C641 C642 C96302 C96303
A +1.05V_LAN [email protected]/6.3V_2 I219@22u/6.3V_6 I219@1u/10V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 10u/6.3V_4 10u/6.3V_4 A

+1.05V_LAN_REGOUT L4000 1 2 [email protected]_3.2x2.5x2

PIN37 PIN46 PIN47 PIN8 PIN11 PIN16 PIN22 PIN40 PIN43

C20000 C631 C632 C633 C634 C635 C636


0.1u/6.3V_2
C96311
I219@10u/6.3V_4
C96312
I219@10u/6.3V_4
C96922
[email protected]/6.3V_2
C96923
[email protected]/6.3V_2
C96924
[email protected]/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
LAN RTL8111K/I219
Date: Tuesday, October 06, 2020 Sheet 28 of 62
5 4 3 2 1
5 4 3 2 1

KEYBOARD (KBC)
Touch Pad 29

30
30
MY16
MY16 28 MY17 +3V_S5
28 MY17 MY16 [33] 27 MY0
27 MY0 MY17 [33] 26 MY1
26 MY0 [33] 25
MY1 MY2
25 MY2 MY1 [33] 24 MY3
24 MY3 MY2 [33] 23 MY4 R69054
23 MY4 MY3 [33] 22 MY5
22 MY4 [33] 21
MY5 MY6 *Short_0603
21 MY5 [33] 20
D MY6 MY7 D
20 MY6 [33] 19 +3V_S5
MY7 MY8
19 MY8 MY7 [33] 18 MY9
18 MY9 MY8 [33] 17 MY10
17 MY10 MY9 [33] 16 MY11 C697 10p/25V_2 C695
16 MY11 MY10 [33] 15 MY12 R567 R566 0.1u/6.3V_2
15 MY11 [33] 14
MY12 MY13 4.7K_1%_2 4.7K_1%_2 C696 10p/25V_2 CN33

9
14 MY13 MY12 [33] 13 MY14
13 MY14 MY13 [33] 12 MY15
12 MY15 MY14 [33] 11 MX0 1 2 HCB1005KF-330T30_3A TPCLK-1 1
[33] TPCLK L23
11 MY15 [33] 10 1 2 HCB1005KF-330T30_3A 2
MX0 MX1 EC [33] TPDATA L24 TPDAT-1
10 MX1 MX0 [33] 9 MX2 3
9 MX2 MX1 [33] 8 MX3 TP_SMB_DATA 4
R560 *0_4/S
8 MX3 MX2 [33] 7 MX4 [6] I2C1_DATA_TP TP_SMB_CLK 5
R558 *0_4/S
7 MX4 MX3 [33] 6 MX5 [6] I2C1_CLK_TP TP_INTH#_L 6
R573 *0_4/S
6 MX5 MX4 [33] 5 MX6 [6] TPD_INT# R572 7
*0_4/S
5 MX6 MX5 [33] 4 MX7 [33] TPD_EN 8
R25473 *0_4/S
4 MX7 MX6 [33] 3 [33] TPD_INT#_EC
C698 C699

10
3 MX7 [33] 2 NBSWON#_R *10p/25V_2 *10p/25V_2 R574
2 NBSWON#_R R720 NBSWON# 1
1 NBSWON# [30,33]
*10K_1%_2

29
33_1%_2 196047-08021-3
29

C96346 CN19
*180p/25V_2 +3V_S5
14@50584-0280N-V02
2

CN18 Prevent ESD/EOS


D33 Layout near
15@50584-0280N-V02 AZ5725-01F.R7G device
For 14"
1

C C

For 15"
MY5
MY6
MY3
C707
C706
C708
220p/25V_2
220p/25V_2
220p/25V_2
FAN
MY7 C709 220p/25V_2

MY8 C711 220p/25V_2


MY9 C713 220p/25V_2 +3V +5V +3V +5V
MY10 C714 220p/25V_2
MY11 C715 220p/25V_2

https://vinafix.com/
R576 R25373 R25372 R575
1K_1%_2 10K_1%_2 10K_1%_2 FAN3
MY1 C716 220p/25V_2 *Short_0603
MY2 C717 220p/25V_2

5
MY4 C718 220p/25V_2

2
MY0 C719 220p/25V_2 +5V_FAN
1
1 3 [33] FAN1_RPM FAN_PWM_C 2
MX4 C720 220p/25V_2
MX6 C721 220p/25V_2 [33] FAN_PWM 3
MX3 C722 220p/25V_2 Q6523 4
MX2 C723 220p/25V_2 METR3904-G

6
MX7 C724 220p/25V_2
MX0 C725 220p/25V_2
B MX5 B
C726 220p/25V_2
MX1 C727 220p/25V_2 50278-00401-V01

MY12 C728 220p/25V_2


MY13 C729 220p/25V_2
MY14 C730 220p/25V_2
MY15 C731 220p/25V_2
MY16 C732 220p/25V_2
MY17 C733 220p/25V_2

KB_BL LED
+5V +5V

C734 *2.2u/10V_4
R579
10K_1%_2
1

Q30
2 DMP2130L-7
3

CN13
6

A A
3

2 +5V_KB R69055 *Short_0603


[33] KB_BL_LED 4
Q31 3
DDTC144EUA-7-F C736 C737 2
1

4.7u/6.3V_4 0.01u/50V_4 1

Quanta Computer Inc.


5

50505-00401-V01

PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
KB/TP/FAN/PB/KBL
Date: Tuesday, October 06, 2020 Sheet 29 of 62
5 4 3 2 1
5 4 3 2 1

TPM NPCT750
+3V3_TPM +3V3_TPM_VSB
30
+3V3_TPM +3V_SPI
+3V_SPI
Finger print
R25347 *Short_0603
R580 10K_1%_2 TPM_PIRQ# R25344 *Short_0603
D +3V_S5 D
+3V_SPI +3VPCU +PBA_PWR +PBA_PWR
+3V +3V
R583 10K_1%_2 TPM_SPI0_SO R25295 *Short_0402

R586 10K_1%_2 SPI_TPM_CS#_TPM R25346 *0_5%_6 R25348 *0_5%_6


C749
C740 10u/6.3V_4 *[email protected]/10V_4
OPTIONAL: C741 0.1u/6.3V_2
C742 0.1u/6.3V_2 C743 10u/6.3V_4
Required if the Chipset

1
C744 0.1u/6.3V_2 C745 0.1u/6.3V_2 R608
does not have an internal Q32 *FP@0_5%_4
PBA_FP_PWREN# R609 FP@10K_1%_2 2
pull-up on SPI CS# and/or [33] PBA_FP_PWREN# FP@DMP2130L-7

22
MISO signals.

1
+PBA_PWR_C
U33 C750

VHIO_2
VHIO_1

VSB

3
*[email protected]/50V_4
30 2 +PBA_PWR_R +PBA_PWR_C
R592 *0_5%_2 29 SCL/GPIO1 NC_1 3
[13,33,47] SLP_S0# TPM_PIRQ# SDA/GPIO0 NC_2
R593 *0_2/S 18 5 R614
[6] TPM_PIRQ# PIRQ_N/GPIO2 NC_3 7
C752 C753 *Short_0603
NC_4 9
NC_5 [email protected]/6.3V_4 [email protected]/50V_4
19 10
[16] TPM_SPI0_CLK SCLK NC_6
21 11
[16] TPM_SPI0_SI TPM_SPI0_SO MOSI/GPIO7 NC_7
24 12
[16] TPM_SPI0_SO SPI_TPM_CS#_TPM MISO NC_8
20 14
[16] SPI_TPM_CS#_TPM SCS_N/GPIO5 NC_9 15
NC_10 25
6 NC_11 26
option if design PP 13 GPIO3 NC_12 27
C D22 1 2 *PESD5V0H1BSF R600 *1.2K_5%_2 PP 4 GPIO4 NC_13 28 C
PP/GPIO6 NC_14 31
NC_15 32

GND_2
GND_1
TPM_LRESET# NC_16

EPAD
R601 *0_2/S 17
[13,19,28,32,33,39,45] PLTRST# PLTRST_N

33
23
16
NPCT750AABYX +PBA_PWR_C CN14

10
USBP7+_FP R67492 FP_SPIN_N@0_5%_4 USBP7+_FP_P2 8
[11] USBP7+_FP USBP7-_FP USBP7-_FP_P2 7
[11] USBP7-_FP R67493 FP_SPIN_N@0_5%_4
6
5
4

https://vinafix.com/
3
2
1

9
FP_SPIN_N@196241-08021-3

USBP7+_FP_P2
USBP7-_FP_P2

1
B B
EC7 EC8
Reserve for SPIN [email protected] [email protected]

2
CN52
17

1 +PBA_PWR_C
2 +3VPCU
3
4 NBSWON# [29,33]
5 EC_VOLUP_BTN_ODL [33,34]
6 USBP7+_FP_P4 EC_VOLDN_BTN_ODL [33,34] USBP7+_FP
R67497 FP_SPIN@0_5%_4
7 USBP7-_FP_P4 R67496 FP_SPIN@0_5%_4 USBP7-_FP
8
9 INT_BTN_L R67861 FP_SPIN@0_5%_4
10 PBA_FP_PWREN#
11
12 PWRLED# [33,45]
13 SUSLED# [33,45] USBP7+_FP_P4
14 BATLED0# [33,45] USBP7-_FP_P4
15 BATLED1# [33,45]
16
2

EC16 EC17
18

FP_SPIN@51619-01601-V01 [email protected] [email protected]


A A
1

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TPM/PBA/Spin side key
Date: Tuesday, October 06, 2020 Sheet 30 of 62
5 4 3 2 1
5 4 3 2 1

SATA HDD & LED 31

25
+5V_HDD
+5V

23
21
R67358 *HDD@0_4/S DEVSLP0_R
[11] DEVSLP0 1 CN11
D C770 *10u/6.3V_4 R67359 *HDD@Short_0603 +5V_HDD 2 D
+5V 3
C20143 C689 C680 C670 C96242 C669 4
C771 10u/6.3V_4 5
[email protected]/10V_2 *[email protected]/6.3V_2 *[email protected]/6.3V_2 HDD@10u/6.3V_4 *HDD@47u/6.3V_8 *HDD@47u/6.3V_8 6
7
C772 0.1u/6.3V_2 8
9
10
11
R67866 *HDD@0_4/S 12
13
SATA_RXP0_CN 14
SATA_RXN0_CN 15
16
SATA_TXN0_CN 17
SATA_TXP0_CN 18
19
20

26 22
24
HDD@GS12201-1011-7H

Vinafix.com

C C

Q6644 1 3 *HDD_MS@AO3413 R69046 *HDD_MS@0_5%_4 Q6642 1 3 *HDD_MS@AO3413 R69045 *HDD_MS@0_5%_4


+5VPCU +5V_HDD +3VPCU +601_VCC

2
C96920 **[email protected]/6.3V_2 C96921 C96918 **[email protected]/6.3V_2 C96919
*[email protected]/6.3V_2 *[email protected]/6.3V_2
R69047 *HDD_MS@100K_1%_2 R69043 *HDD_MS@100K_1%_2

+3V_S5 +3V_S5

R69048
**HDD_MS@10K_1%_2
3 https://vinafix.com/ R69044
**HDD_MS@10K_1%_2

3
HDD_MS_PWR_EN 2 HDD_MS_PWR_EN 2
[33,34] HDD_MS_PWR_EN
Q6645 Q6643
*HDD_MS@2N7002K *HDD_MS@2N7002K
1

1
R69079 *0_5%_2 R69049 R69042
[4] HDD_MS_PWR_EN_GPPB4
*HDD_MS@100K_1%_2 *HDD_MS@100K_1%_2

B B

+601_VCC

DEW1
EQ2

EQ1
R1234
R497
[email protected]_1%_2
[email protected]_1%_2
EQ2
EQ1
R495
R498
*[email protected]_1%_2
*[email protected]_1%_2
SATA HDD Re-driver +601_VCC
EQ2
H - 14dB

20
19
18
17
16
X - 0dB
R1235 [email protected]_1%_2 DE1 R503 *[email protected]_1%_2 L - 7dB

GND#3
VCC#2
EQ2

EQ1
DEW1
R504 [email protected]_1%_2 DE2 R505 *[email protected]_1%_2 21
EQ1 SATA_TXP0_IN 1 PPAD
H - 14dB SATA_TXN0_IN 2 RX1P 15 SATA_TXP_OUT
R499 *[email protected]_1%_2 DEW1 R500 [email protected]_1%_2 X - 0dB 3 RX1N TX1P 14 SATA_TXN_OUT
R506 *[email protected]_1%_2 DEW2 R1237 [email protected]_1%_2 L - 7dB SATA_RXN0_IN 4 GND#1 TX1N 13
R1236 *[email protected]_1%_2 EN R1238 [email protected]_1%_2 SATA_RXP0_IN 5 TX2N GND#2 12 SATA_RXN_OUT
DEW1 TX2P RX2N 11 SATA_RXP_OUT
H - Long Duration DEW2 6 RX2P
X - NC (Long) EN 7 DEW 2 22
L - Short Duration DE2 8 EN GND#4 23
DE1 9 DE2 GND#5 24
C6586 [email protected]/10V_2 SATA_TXP0_IN SATA_TXP_OUT C6594 [email protected]/10V_2 SATA_TXP0_CN DE1 10 DE1 GND#6 25
[11] SATA_TXP0_HDD +601_VCC VCC#1 GND#7
C6587 [email protected]/10V_2 SATA_TXN0_IN SATA_TXN_OUT C6595 [email protected]/10V_2 SATA_TXN0_CN H - -2dB 26
[11] SATA_TXN0_HDD SATA_RXN0_IN SATA_RXN_OUT SATA_RXN0_CN X - -4dB GND#8
C6588 [email protected]/10V_2 Re-Driver C6596 [email protected]/10V_2
[11] SATA_RXN0_HDD SATA_RXP0_IN SATA_RXP_OUT SATA_RXP0_CN L - 0dB
C6589 [email protected]/10V_2 C6597 [email protected]/10V_2
[11] SATA_RXP0_HDD
A DE2 U42 A
H - -2dB HDD@SN75LVCP601RTJR
X - -4dB
+3V +601_VCC L - 0dB

DEW2
R1239 *HDD@Short_0603 H - Long Duration
X - NC (Long)
L - Short Duration
Quanta Computer Inc.
C6607 C6598 C6599 C6600 C6601 C6602
HDD@10u/6.3V_4 [email protected]/6.3V_2 [email protected]/6.3V_2 [email protected]/6.3V_2 [email protected]/6.3V_2 [email protected]/6.3V_2 SW7 - EN PROJECT : Z8IA_ZAIA
H - Enabled Size Document Number Rev
L - Standby Mode 1A
HDD&Re-driver/Hole
Date: Tuesday, October 06, 2020 Sheet 31 of 62
5 4 3 2 1
5 4 3 2 1

M key

32
CN16
100 mils +3V_SSD +3V
1
NGFF MKEY 2 +3V_SSD 1.4A
R/C to CONN<0.5" GND#1 3.3Vaux_1 +3V_SSD
3 4 EC9 SSD@10u/6.3V_4 R2661 *SSD@Short_0603 EC10 SSD@10u/6.3V_4
R2652 *SSD@0_2/S PCIE_RXN5_SSD_C 5 GND#3 3.3Vaux_2 6
[11] PCIE_RXN5_SSD PCIE_RXP5_SSD_C PETN3 NC#10
R2653 *SSD@0_2/S 7 8 C786 [email protected]/6.3V_2 EC11 [email protected]/6.3V_2
[11] PCIE_RXP5_SSD PETP3 NC#11
9 10
PCIE_TXN5_SSD_C GND#7 DAS/DSS#(I)(OD) TP2092
C788 [email protected]/6.3V_2 11 12 C785 *[email protected]/6.3V_2
[11] PCIE_TXN5_SSD PCIE_TXP5_SSD_C PERN3 3.3Vaux_3
C789 [email protected]/6.3V_2 13 14
[11] PCIE_TXP5_SSD PERP3 3.3Vaux_4
15 16 C2616 *[email protected]/6.3V_2
R2654 *SSD@0_2/S PCIE_RXN6_SSD_C 17 GND#8 3.3Vaux_5 18
[11] PCIE_RXN6_SSD PCIE_RXP6_SSD_C PETN2 3.3Vaux_6
R2655 *SSD@0_2/S 19 20
[11] PCIE_RXP6_SSD PETP2 NC#12
21 22
C790 [email protected]/6.3V_2 PCIE_TXN6_SSD_C 23 GND#2 NC#13 24
[11] PCIE_TXN6_SSD PCIE_TXP6_SSD_C PERN2 NC#14
C791 [email protected]/6.3V_2 25 26
[11] PCIE_TXP6_SSD PERP2 NC#15
27 28
R2656 *SSD@0_2/S PCIE_RXN7_SSD_C 29 GND#9 NC#16 30
[11] PCIE_RXN7_SSD PCIE_RXP7_SSD_C PETN1 NC#17
[11] PCIE_RXP7_SSD R2657 *SSD@0_2/S 31 32
33 PETP1 NC#2 34
C792 [email protected]/6.3V_2 PCIE_TXN7_SSD_C 35 GND#10 NC#3 36
[11] PCIE_TXN7_SSD PCIE_TXP7_SSD_C PERN1 NC#4
C793 [email protected]/6.3V_2 37 38 DEVSLP#
[11] PCIE_TXP7_SSD PERP1 DEVSLP TP13375
D 39 40 D
R647 *SSD@0_2/S PCIE_RXP8_SSD_C 41 GND#11 NC#5 42 Q6655 1 3 *SSD_MS@AO3413 R69092 *SSD_MS@0_5%_4
[11] PCIE_RXP8_SSD SATA B+/PETN0 NC#6 +3VPCU +3V_SSD
R646 *SSD@0_2/S PCIE_RXN8_SSD_C 43 44
[11] PCIE_RXN8_SSD SATA B-/PETP0 NC#7
45 46
C794 [email protected]/6.3V_2 PCIE_TXN8_SSD_C 47 GND#12 NC#8 48
[11] PCIE_TXN8_SSD

2
C795 [email protected]/6.3V_2 PCIE_TXP8_SSD_C 49 SATA A-/PERN0 NC#9 50 SSD_PLTRST# C96929 **[email protected]/6.3V_2 C96930
[11] PCIE_TXP8_SSD SATA A+/PERP0 PERST#/NC
51 52 *[email protected]/6.3V_2
CLK_PCIE_SSDN_C GND#13 CLKREQ#/NC PCIE_CLKREQ_SSD# [12]
R2658 *SSD@0_2/S 53 54 R69099 *0_5%_2 R69093 *SSD_MS@100K_1%_2
[12] CLK_PCIE_SSDN CLK_PCIE_SSDP_C REFCLKN PEWAKE#/NC PCIE_WAKE# [13,28,45]
R2659 *SSD@0_2/S 55 56
[12] CLK_PCIE_SSDP REFCLKP NC#18
57 58
GND#14 NC#19 +3V_S5

67 68 R69098 *0_5%_2 R69094


NC#1 SUSCLK SUSCLK_32K [12,32]
PEDET 69 **SSD_MS@10K_1%_2
TP13376 PEDET(OC-PCIE/GND-SATA)
71 70
GND#4 3.3Vaux_7 +3V_SSD
73 72

3
75 GND#5 3.3Vaux_8 74 R69100 *0_5%_2 HDD_MS_PWR_EN 2
GND#6 3.3Vaux_9 [6] SSD_MS_PWR_EN_GPPD16
Q6656

76
77
78
79
*SSD_MS@2N7002K

1
76
77
78
79
SSD@NASM0-S6701-TSH4 R69096
*SSD_MS@100K_1%_2

R69097 *Short_0201

+3V_S5

5
PLTRST# 1
4 SSD_PLTRST#
2
[13] SSD_MS_PWR_EN_GPPA11
U6565

3
*M74VHC1GT08DFT2G

C C

+3V_WLAN_P

WLAN
https://vinafix.com/
R652
4.7K_1%_2 +3V_WLAN_P
2

REQ_WLAN# Q63 3 1 2N7002KTB PCIE_CLKREQ_WLAN# [12] CN17 Hybrid Ekey


+3V_WLAN_P
NGFF EKEY
1 2
3 GND#3 3.3Vaux#1 4 TP9029
[11] USBP10+_BT USB_D+ 3.3Vaux#2 WIGIG_LED
[11] USBP10-_BT
5 6
7 USB_D- LED#1 8 R69030 *0_5%_2
GND#4 PCM_CLK CNV_RF_RESET#_L M.2_BT_PCMCLK [13]
R651 9 10
[12] CNV_WR_LANE1_DN SDIO CLK(O) 1.8vPCM_SYNC
100K_1%_2 [12] CNV_WR_LANE1_DP
11 12 R69031 *0_5%_2
SDIO CMD(IO) PCM_IN MODEM_CLKREQ_L M.2_BT_PCMIN [13]
13 14
2

15 SDIO DAT0(IO) 1.8vPCM_OUT 16


MINICAR_PME# [12] CNV_WR_LANE0_DN SDIO DAT1(IO) LED#2
Q33 3 1 *2N7002KTB PCIE_WAKE# [13,28,32,45] [12] CNV_WR_LANE0_DP
17 18
19 SDIO DAT2(IO) GND#13 20 R69032 *0_5%_2
SDIO DAT3(IO) UART Wake CNV_BRI_RSP_L M.2_UART_BT_WAKE [4]
21 22 R665 49.9_1%_2
[12] CNV_WR_CLK_DN SDIO Wake(I) CNV_BRI_RSP [12]
[12] CNV_WR_CLK_DP
23 1.8vUART Rx
R69029 *Short_0201 SDIO Reset
WLAN_PCIE_WAKE# [6]

32 CNV_RGI_DT [10,12]
33 1.8vUART Tx 34 CNV_RGI_RSP_L R667 49.9_1%_2
PCIE_TXP3_WLAN_C GND#5 1.8vUART RTS CNV_RGI_RSP [12]
C202 0.1u/6.3V_2 35 36 CNV_BRI_DT [12]
[11] PCIE_TXP3_WLAN PCIE_TXN3_WLAN_C PETp0 1.8vUART CTS
B C203 0.1u/6.3V_2 37 38 R68943 *0_2/S B
[11] PCIE_TXN3_WLAN PETn0 Clink RESET CL_RST# [9]
R68872 *Short_0201 39 40 R68944 *0_2/S CL_DATA [9]
41 GND#6 CLink DATA 42 R68945 *0_2/S
[11] PCIE_RXP3_WLAN PERp0 CLink CLK CL_CLK [9]
[11] PCIE_RXN3_WLAN
43 44 CNV_PA_BLANKING [12]
U35 45 PERn0 COEX3 46
GND#7 COEX2 CNV_MFUART2_TXD [6]
*NL17SZ08DFT2G [12] CLK_PCIE_WLANP
47 48 CNV_MFUART2_RXD [6]
REFCLKP0 COEX1
3

49 50 SUSCLK_32KHZ R670 *0_4/S


[12] CLK_PCIE_WLANN REFCLKN0 SUSCLK(32KHz) WLAN_RST# SUSCLK_32K [12,32]
2 51 52 R2665 *0_2/S PLTRST# [13,19,28,30,33,39,45]
CNV_RF_RESET#_L 4 REQ_WLAN# 53 GND#8 PERST0# 54 BT_OFF#
CNV_RF_RESET# [13] MINICAR_PME# CLKREQ0# W_DISABLE2# RF_OFF#
1 55 56 32KHz, CNVi autodetect for use
57 PEWake0# W_DISABLE1# 58 internal or external if external
59 GND#9 NFC_I2C_SM_DATA 60 alive
[12] CNV_WT_LANE1_DN
5

61 PETp1 NFC_I2C_SM_CLK 62
[12] CNV_WT_LANE1_DP PETn1 NFC_I2C_IRQ PULSAR_38P4M_REFCLK
R676 63 64 TP13354
*75K_1%_2 65 GND#10 GPIO0_NFC_RESET# 66
[12] CNV_WT_LANE0_DN PERp1 UIM_SWP/PERST1#
[12] CNV_WT_LANE0_DP
67 68 38.4M : not supported and not connected by HrP.
69 PERn1 UIM_POWER_SNK 70
+1.8V_DEEP_SUS 71 GND#11 UIM_POWER_SRC 72 +3V_WLAN_P
[12] CNV_WT_CLK_DN Reserved1 3.3Vaux#3
73 74
GND#1
GND#2

[12] CNV_WT_CLK_DP Reserved2 3.3Vaux#4


75
NC#2
NC#1

R68873 *Short_0201 GND#12 R671 *10K_1%_2

R672 *10K_1%_2
79
78
76
77

U36 NASE0-S6701-TS40
*NL17SZ08DFT2G
3

R68690 *Short_0201 BT_EN [33]


2
MODEM_CLKREQ_L 4 R68691 *Short_0201
MODEM_CLKREQ [13] RF_EN [33]
1
BT_OFF# R68692 *0_5%_2 INT_BT_OFF#_L [13]
5

R678 RF_OFF# R68693 *0_5%_2 INT_RF_OFF#_L [6]


*75K_1%_2
CNVI POWER SWITCH +3VPCU RF-Kill (W_DISABLE#) should not be asserted by
the EC when power is provided to the WLAN card as this will block
+1.8V_DEEP_SUS +3V_S5 communication with
the IntelR ME during M3 state.
+3V_WLAN_P +3V R68752
R68751
+3V_S5 **10K_1%_2
Q6600
1

R2666 *0_5%_8 FROM PCH **10K_1%_2

R68941 *Short_0201 2
[6] CNVI_EN
100mils
3

R2667 *Short_0603 R68942 *0_5%_2


[13] SPL_WLAN#
6

R68755 Q6601A
*DMP2130L-7
3

**75K_1%_2 Q6601B 5 **2N7002KDW


C805 C804 C801 C800 non M3 2 **2N7002KDW C96870
10u/6.3V_4 0.1u/6.3V_2 0.01u/10V_2 *0.1u/6.3V_2 **0.1u/6.3V_2
A A
+3V_WLAN
4
1

+3V_WLAN_P

FROM EC +3V_S5 R68756 *0_5%_8


+3V_WLAN_P [33] WLANPWR#

+3V_WLAN_P R68757
C802 10u/6.3V_4
**100K_1%_2
C2609 0.1u/6.3V_2
C96871 C96872 C96873 C96876 R68758 *10K_1%_2
C96344 0.01u/10V_2 10u/6.3V_4 0.1u/6.3V_2 0.01u/10V_2 47u/6.3V_8

C96878
**1000p/25V_2
Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
SSD/WLAN(CNVI)
Date: Tuesday, October 06, 2020 Sheet 32 of 62
5 4 3 2 1
5 4 3 2 1

R359 *0_5%_4

33
+3V_LDO_EC
L29 1 2 BLM15AG121SN1D_0.5A +A3VPCU
+3VPCU_ECPLL L30 1 2 BLM15AG121SN1D_0.5A R25330 *0_4/S
EC(KBC) C96797 C6566 11/11 FAE
+3VPCU_EC +3V_S5 VSTBY_FSPI
R68769 *0_5%_4
KL_NO_EC [51]
1000p/25V_2 0.1u/6.3V_2 suggestion
pin106 +3V_RTC C6573 R68870 *0_5%_4 GPU_CHOKE_THERMAL [34,56]
ECAGND change to 0.1u/6.3V_2
+3VPCU_EC R67886 *Short_0402 LTE_BODY_SAR_ODL [45] R68764 *0_5%_4
WLANPWR# [32]
R25306 2.2_5%_6
12 mils +3VPCU_EC AC_PRESENT_EC [13]
+3V_LDO_EC Prevent ESD/EOS Layout near device
R960 33_1%_2
BT_EN [32]
C1208 180p/25V_2
C6569 C6577 C6575 C6574 C6565 C6570 C6578 CLR_CMOS [12] *10K_1%_2
TPD_INT#_EC R25323
0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 0.1u/6.3V_2 +3VPCU
EC_SIM_SW# [45] EN_3V_DX_LTE
C6580 180p/25V_2 R67871 *10K_1%_2 +3V_LDO_EC
VSTBY_FSPI USBON# [24,45]
R895 33_1%_2
+3V_EC TPD_EN [29] +3V_LDO_EC
+3V R25307 *2.2_5%_6
USB_CHARGE_ON USB_BC_ON [24]
D D
USB_CHARGE_ON [24]
+1.8V_S5 R25317 2.2_5%_6 R69101 *LTE@Short_0402 BOARD_ID8_SIM_Type1 [13,15,45] NBSWON# R25314 10K_1%_2
C1189
[9] ESPI_0 0.1u/6.3V_2

114
121

106

127
U37 IT5571E-128/DX EC Mirror Code S5_ON R25309 10K_1%_2

11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
[9] ESPI_1

3
[9] ESPI_2
10 110 MBCLK
GPG2 PU 10K ESPI_RESET#_EC R68864 *100K_1%_2

VSTBY#1
VSTBY#2
VSTBY#3
VSTBY#4
VSTBY#5

VSTBY#6

EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1

SMCLK4/L80HLAT/BAO/GPE0
SMDAT4/L80LLAT/GPE7

GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/GPH0/ID0
VCC

VFSPI
AVCC
[9] ESPI_3 EIO0/LAD0/GPM0 SMCLK0/GPB3 MBCLK [22,50] GPD2 PD 100K (PCH side)
9 111 MBDATA
EIO1/LAD1/GPM1 SMDAT0/GPB4 2ND_MBCLK MBDATA [22,50]
C2374 *180p/25V_2 8 SM BUS SMCLK1/GPC1 115 2ND_MBCLK [34,45,46]
EIO2/LAD2/GPM2 2ND_MBDATA
7 116 2ND_MBDATA [34,45,46]
ESPI_RESET#_EC EIO3/LAD3/GPM3 SMDAT1/GPC2 EC_PECR_R MAINON R890 100K_1%_2
R894 *0_2/S 22 117 R380 43_5%_2 EC_PECI [4]
[9] ESPI_RESET# CLK_PCI_EC ERST#/LPCRST#/GPD2 SMCLK2/PECI/GPF6
13 118
[9] ESPI_CLK ESCK/LPCCLK/GPM4 SMDAT2/PECIRQT#/GPF7 SUSON R25320 100K_1%_2
[9] ESPI_CS# 6
ECS#/LFRAME#/GPM5 LID#_C
C6610 0.1u/6.3V_2 R25315 33_1%_2
PROCHOT_EC 17 LID# [25,42] VRON R25311 100K_1%_2
C6572 180p/25V_2
LPCPD#/GPE6 D65 TVM0G5R5M220R_22p
PCH_SPI1_SI_R R25303 *10K_1%_2
R69083 *0_5%_4 126 PS/2
[36] ADP_IN_EN_EC GA20/GPB5
R69084 *Short_0402 5 85
[34,42] TABLET_MODE
15 ALERT#/SERIRQ/GPM6 LPC / eSPI PS2CLK0/TMB0/GPF0/CEC 86 SYS_SHDN# [4,51,55] Prevent ESD/EOS Layout near EC PCH_SPI1_SO_R R25316 *10K_1%_2
PLTRST#/ECSMI#/GPD4 PS2DAT0/TMB1/GPF1 EC_FPBACK# [25]
23 89
[6] SIO_EXT_SCI# ECSCI#/GPD3 PS2CLK2/GPF4 TPCLK [29]
WRST# 14 GPIO 90
WRST# PS2DAT2/GPF5 TPDATA [29]
4
[40] SmartCard_ON KBRST#/GPB6 +3V_LDO_EC
R68871 *Short_0402 16
[36] TYPE C_ADP_IN
R68765 *0_5%_4
[28] LANPWR# PWUREQ#/BBO/SMCLK2ALT/GPC7 LED
[13,55] SLP_SUS#_EC

[13] DPWROK_EC
IT5571 PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
24
25
28
PWRLED#
BATLED1#
SUSLED#
PWRLED# [30,45]
BATLED1# [30,45]
SUSLED# [30,45]
PWRLED#
BATLED1#
R67484
R67485
100K_1%_2
100K_1%_2
[29] KB_BL_LED
[13] DNBSWON#
113
123 CRX0/GPC0
CTX0/TMA0/GPB2 CIR LQFP PWM3/GPA3
SMCLK5/PWM4/GPA4
SMDAT5/PWM5/GPA5
29
30
31
BATLED0#
MAINON
BATLED0# [30,45]
MAINON [47,51,52,54,55]
LTE_OFF_ODL [45]
SUSLED#

BATLED0#
R67486

R67487
100K_1%_2

100K_1%_2
R69103 *Short_0402
[6,10,26] ACZ_SPKR
R69087
PWM
[34,41] MODE1 *0_5%_2 80
R69086 [25] TouchPanel_PWR 119 DAC4/DCD0#/GPJ4 47
*0_5%_2
[13,47,53] SUSB# 33 FDIO3/DSR0#/GPG6 TACH0A/GPD6 48 FAN1_RPM [29]
Prevent ESD/EOS Layout near device
[13] EC_PWROK
[25] PCH_BLON_EC TS_EN_C
88
81
GINT/CTS0#/GPD5
PS2DAT1/RTS0#/GPF3
TACH1A/TMA1/GPD7
120
TYPEC1_OUT_1-5A [37]
80PORT_CLK
SM BUS PU(KBC)
C1210 180p/25V_2 SUSON R68570 debug@0_5%_4
DAC5/RIG0#/GPJ5 GPC4 SYS_HWPG SUSON [47,51,52,54]
87 124
R956 33_1%_2 109 PS2CLK1/DTR0#/GPF2 GPC6 R69080 *EX-IO@0_5%_4 +3V_LDO_EC
C [25] TS_EN [10] ME_WR# A_INT [34] C
108 TXD/SOUT0/GPB1 R68736 *0_5%_4
[26] AMP_MUTE# RXD/SIN0/GPB0 R69090 HDD_MS_PWR_EN [31,34]
[34,41] MODE2 R69085 *0_5%_4 *0_5%_2
EC_VOLUP_BTN_ODL [30,34]
R69107 *Short_0201 71 107 NBSWON#
[30] PBA_FP_PWREN# [22] dGPU_OPP# ADC5/DCD1#/GPI5 PWRSW/GPE4 NBSWON# [29,30] R69089 4.7K_1%_2
R68868 *0_5%_4 72 UART port 18 *0_5%_2 MBCLK R361
[36,37] TypeC_FAULT [50] ACIN ADC6/DSR1#/GPI6 RI1#/GPD0 SUSC# [13]
73 WAKE UP 21 HWPG
[50] TEMP_MBAT# ADC7/CTS1#/GPI7 RI2#/GPD1 HWPG [13] 4.7K_1%_2
[13,30,47] SLP_S0#
R68750 *Short_0201 35
RTS1#/GPE5
Battery module MBDATA R369
34
[26] PCBEEP_EC PWM7/RIG1#/GPA7
122 112 +3V_LDO_EC
R69088 [45,52] DDR4_SUSON_2V5 FDIO2/DTR1#/SBUSY/GPG1/ID7 RING#/CK32KOUT/LPCRST#/GPB7 RSMRST# [13]
*0_5%_2 95
[30,34] EC_VOLDN_BTN_ODL CTX1/SOUT1/GPH2/SMDAT3/ID2
94 Prevent ESD/EOS Layout near device
[45] EC_SIM_DET CRX1/SIN1/SMCLK3/GPH1/ID1 2ND_MBCLK 4.7K_1%_2
UMA& VGA SKU R383
80PORT_DAT R68568 debug@0_5%_4 105 R25318 33_1%_2
[16] PCH_SPI1_CLK_R
101 FSCK RF_EN [32] Need Stuff 2ND_MBDATA R25304 4.7K_1%_2
[16] PCH_SPI_CS0#_R PCH_SPI1_SI_R FSCE#
102 EXTERNAL SERIAL FLASH ICMNT
R69014 [16] PCH_SPI1_SI_R PCH_SPI1_SO_R FMOSI ICMNT [50]
*0_5%_2 103 66 C6568

https://vinafix.com/
[34] WRST_IT8013 [16] PCH_SPI1_SO_R FMISO ADC0/GPI0 EC_CCG_I2C_INT#
67 C6564 10u/6.3V_4 ECAGND 180p/25V_2 R67604 *2.2K_5%_2
56 ADC1/GPI1 68
[29] MY16 KSO16/SMOSI/GPC3 ADC2/GPI2 USIM_DET [45]
[25,34] Privacy_EN R68883 *0_5%_4 57 69 VRON
[29] MY17 KSO17/SMISO/GPC5 ADC3/GPI3 VRON [53]
32 70 IDCHG_R [50] R67448 *Short_0402
[29] FAN_PWM PWM6/SSCK/GPA6 ADC4/GPI4 EC_CCG_I2C_SCL [36]
S5_ON
CCG5
100 A/D D/A C96796 100p/50V_2 R67447 *Short_0402
[51,55] S5_ON EC_CCG_I2C_INT# SSCE0#/GPG2 EC_CCG_I2C_SDA [36]
125 SPI ENABLE
[36] EC_CCG_I2C_INT# SSCE1#/GPG0 76 R69102 *LTE@Short_0402 BOARD_ID9_SIM_Type2 [13,15,45]
CLK_PCI_EC 36 TACH2A/GPJ0 77 EN_3V_DX_LTE
[29] MY0 KSO0/PD0 TACH2B/GPJ1 EN_3V_DX_LTE [45]
37 78
[29] MY1 KSO1/PD1 DAC2/TACH0B/GPJ2 PCH_PWROK [13] +3V_LDO_EC
38 79
[29] MY2 KSO2/PD2 DAC3/TACH1B/GPJ3 USB_CLT1 [24] H_PROCHOT# [4,14,50,53]
39
R402 [29] MY3 KSO3/PD3
40
[29] MY4 KSO4/PD4
*22_5%_2 41
[29] MY5 KSO5/PD5
42 KBMX

3
[29] MY6 KSO6/PD6 Q6509
43 PROCHOT_EC 2
[29] MY7 KSO7/PD7
44 2N7002K
[29] MY8 KSO8/ACK#
45
[29] MY9 KSO9/BUSY IR_WP#_EC [25]
46

1
C6562 R25298

1
[29] MY10 KSO10/PE
*10p/25V_2 51 2 R25300 D63
KSI3/SLIN#

[29] MY11 KSO11/ERR# GPJ7 100K_1%_2


KSI1/AFD#
KSI0/STB#

KSI2/INIT#

52 CLOCK 128 R25308 33_1%_2 TPD_INT#_EC 100K_1%_2 RB500V-40


[29] MY12 KSO12/SLCT GPJ6 TPD_INT#_EC [29]
53
VCORE
VSS#1

VSS#2
VSS#3
VSS#4
VSS#5

[29] MY13 KSO13


AVSS

54 Prevent ESD/EOS Layout near device


KSI4
KSI5
KSI6
KSI7

[29] MY14

2
B KSO14 B
55 C6563
[29] MY15 KSO15
180p/25V_2
WRST#
58
59
60
61
62
63
64
65

27
49
91
104

ECAGND 75

12

C6571
[29] MX0 SM Bus 1 Battery , GPU 1u/10V_2
[29] MX1
C1190
[29] MX2
[29] MX3 0.1u/6.3V_2 SM Bus 2 PD-CCG5 ,ThemalIC-98H ,ThemalIC-9AH ,Extension IO-IT8013
1

[29] MX4
[29] MX5
SM Bus 3
[29]
[29]
MX6
MX7
L11
BLM15AG121SN1D_0.5A
HWPG(KBC)
TP13180 SM Bus 4 +3V_S5
2

TP13181

Reserve switch for test Reset SW (FSW) Debug port R101


4.7K_1%_2
+3V

(MP remove) R25312

6
10K_1%_2

3
R25321 *Short_0402 +3V_RTC
CN66 2
debug@51614-00601-V01 5 Q6651B
+1.8V
Q6651A PJX138K
[50] BI SW2 2 4 *NDT016-G1A-KKKT 7 PJX138K

1
1 3 R25310

4
100K_1%_2 1
2 80PORT_CLK PLTRST# [13,19,28,30,32,39,45]
6

Vgs = 1.5V 3 80PORT_DAT


4
3

2 5 R25524 *0_5%_4
6 +5V [55] HWPG_1.5V
NBSWON# 1 3
8
A 2 4 Q81 D62 1 2 *RB500V-40 HWPG A
1

[54,55] HWPG_1.8VS5
3
4

C6615 PJA138K C1044


0.1u/6.3V_2 SW5 debug@T3AL-23S-Q-T/R *0.1u/25V_2 5 D51 1 2 *RB500V-40
[52] HWPG_VDDR
D64 1 2 *RB500V-40
[52] HWPG_2.5V
[49,51] SYS_HWPG
6 D60 1 2 *RB500V-40

SW4
2
1

TME-532W-Q-T/R_439
Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
KBC IT5571
Date: Tuesday, October 06, 2020 Sheet 33 of 62
5 4 3 2 1
5 4 3 2 1

+3V_LDO_EC +1.8V_S5
R69035

R68881

R68867
*0_5%_4

*EX-IO@0_5%_4

*EX-IO@0_5%_4
HDD_MS_PWR_EN

3/26 Acer request Pivacy LCM


Privacy_EN [25,33]
[31,33]

34
GPU_CHOKE_THERMAL [33,56]
C96879 C96880
[email protected]/6.3V_2 [email protected]/6.3V_2 TABLET_MODE [33,42]
MODE1 [33,41]
D D
MODE2 [33,41]

All I/O Signals are 3.3V CMOS Level.

+3V_LDO_EC +1.8V_S5 VSTBY_1.8V for IT8012

15
14
13
12
11
U6556

GP6
GP5
GP4
GP3
GP2
R68795 R68796
*EX-IO@0_5%_4
*EX-IO@Short_0603

16
GP7
IT8013/12 GP1 10
EC_VOLDN_BTN_ODL [30,33]
17 9 Note:VCOREI power-up can't slow than VSTBY_3.3V.
VSTBY_3.3V_R 18 VSS
VSTBY33
QFN-20 GP0
NC/ VCOREI
8 VCOREI
EC_VOLUP_BTN_ODL [30,33]
A_SCL 19 7 A_INT
A_SDA 20 SCL INT 6
SDA NC_6

C C
21

WRST#
EPAD

NC_5
A2
A1
A0
1
2
3
4
5

EX-IO@IT8013FN/CX

Vinafix.com
A_A2
A_A1
A_A0

+3V_LDO_EC

Option:

https://vinafix.com/
1

R68799 D13148
EX-IO@10K_1%_2 EX-IO@RB500V-40
For Power OFF
R68865 EX-IO@0_5%_4
resume discharge
2

B B
WRST_IT8013 [33] A_SDA Q6606A 3 4 *EX-IO@2N7002KDW
2ND_MBDATA [33,45,46]
C96881
EX-IO@1u/10V_2 +3V_LDO_EC R68813 *[email protected]_5%_2

5
+3V_LDO_EC TO EC
R68814 *[email protected]_5%_2
Address 44H / 0100 (A2)(A1)(A0)

2
A_SCL Q6606B 6 1 *EX-IO@2N7002KDW 2ND_MBCLK [33,45,46]
+3V_LDO_EC +3V_LDO_EC +3V_LDO_EC

R68866 EX-IO@0_5%_4

R68802 R68803 R68804


*[email protected]_1%_2 [email protected]_1%_2 *[email protected]_1%_2
R69012 [email protected]_5%_2 A_INT
A_INT [33]

A_A2 A_A1 A_A0 A_SDA C96912 *[email protected]/6.3V_2

A_SCL C96913 *[email protected]/6.3V_2


A A
R68806 R68807 R68808
[email protected]_1%_2 *[email protected]_1%_2 [email protected]_1%_2

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
USB DB/RS232/DMIC2
Date: Tuesday, October 06, 2020 Sheet 34 of 62
5 4 3 2 1
5 4 3 2 1

[2] TCP0_TX_P0 C96799 0.22u/25V_2


C96800 0.22u/25V_2
L<9"
TCP0_TX_P0_C
TCP0_TX_N0_C
J1
J2
U6549D

ASSRXp1 TBT PORTS J12


L<1.5"
Polarity Reversal is allowed on CIO domains (Port B)
Need to be configured in NVM.

TBTA_SSRX1_P R68594 2.2_5%_2 TBTA_SSRX1_P_C C96801 0.33u/25V_2


TBTA_SSRX1_P_C

TBTA_SSRX1_N_C

TBTA_SSTX1_P_C
D13151

D13152
1

1
2

2
PESD5V0H1BSF

PESD5V0H1BSF 35

Port B - TypeC Side


[2] TCP0_TX_N0 ASSRXn1 BSSRXp1 TBTA_RX1_P [37] D13153 1 2 PESD5V0H1BSF
J11 TBTA_SSRX1_N R68596 2.2_5%_2 TBTA_SSRX1_N_C C96802 0.33u/25V_2

Port A - Host Side


TCP0_TXRX_P0_C G1 BSSRXn1 TBTA_RX1_N [37]
[2] TCP0_TXRX_P0 C96798 0.22u/25V_2 TBTA_SSTX1_N_C D13154 1 2 PESD5V0H1BSF
C96803 0.22u/25V_2 TCP0_TXRX_N0_C G2 ASSTXp1 G12 TBTA_SSTX1_P R68598 2.2_5%_2 TBTA_SSTX1_P_C C96804 0.22u/25V_2
[2] TCP0_TXRX_N0 ASSTXn1 BSSTXp1 TBTA_SSTX1_N TBTA_SSTX1_N_C TBTA_TX1_P [37]
G11 R68599 2.2_5%_2 C96805 0.22u/25V_2 TBTA_SSRX2_P_C D13155 1 2 PESD5V0H1BSF
TCP0_TX_P1_C BSSTXn1 TBTA_TX1_N [37]
[2] TCP0_TX_P1 C96806 0.22u/25V_2 C1
C96807 0.22u/25V_2 TCP0_TX_N1_C C2 ASSRXp2 C12 TBTA_SSRX2_P R68600 2.2_5%_2 TBTA_SSRX2_P_C C96808 0.33u/25V_2
[2] TCP0_TX_N1 TBTA_RX2_P [37] TBTA_SSRX2_N_C D13156 1 2 PESD5V0H1BSF
ASSRXn2 BSSRXp2 C11 TBTA_SSRX2_N R68601 2.2_5%_2 TBTA_SSRX2_N_C C96809 0.33u/25V_2
TCP0_TXRX_P1_C BSSRXn2 TBTA_RX2_N [37]
C96810 0.22u/25V_2 E1 TBTA_SSTX2_P_C D13157 1 2 PESD5V0H1BSF
[2] TCP0_TXRX_P1 TCP0_TXRX_N1_C ASSTXp2 TBTA_SSTX2_P TBTA_SSTX2_P_C
C96811 0.22u/25V_2 E2 E12 R68604 2.2_5%_2 C96812 0.22u/25V_2
[2] TCP0_TXRX_N1 ASSTXn2 BSSTXp2 TBTA_SSTX2_N TBTA_SSTX2_N_C TBTA_TX2_P [37]
E11 R68605 2.2_5%_2 C96813 0.22u/25V_2 TBTA_SSTX2_N_C D13158 1 2 PESD5V0H1BSF
BSSTXn2 TBTA_TX2_N [37]
D
[2] TBT_LSX0_TXD_Soc R68815 *Short_0201 TBT_LSX0_TXD M7 D
R68816 *Short_0201 TBT_LSX0_RXD L7 PA_LSTX_SBU1 M10 TBTA_SBU1_TX_BB
[2,15] TBT_LSX0_RXD_Soc PA_LSRX_SBU2 PB_SBU1 TBTA_SBU2_RX_BB TBTA_SBU1_TX_BB [36]
L10
PB_SBU2 TBTA_SBU2_RX_BB [36]
[2] TCP0_AUX_DP R68606 *Short_0201 TCP0_AUX_DP_R L8
R68608 *Short_0201 TCP0_AUX_DN_R M8 PA_AUX_P
[2] TCP0_AUX_DN PA_AUX_N

4/4 R68611 R68612


R68610 R68874 JHL8040R QURW *1M_1%_2 *1M_1%_2 VCC3V3_FLASH
*1M_1%_2 *1M_1%_2

RT_I2C_SCL R68895 *2.2K_5%_2


RT_I2C_SDA R68896 *2.2K_5%_2

RT_I2C_INT R68897 *2.2K_5%_2


U6549A
SMB_SML0_CLK R68898 *2.2K_5%_2
TCP0_FLASH_DI C6 C9 RT_I2C_SCL 3/19 PD FAE confirm CYPD5126 not need
TCP0_FLASH_DO B4 EE_DI I2C_SCL E7 RT_I2C_SDA RT_I2C_SCL [36]
TO PD due to GPIO shortage. No function issue SMB_SML0_DAT R68899 *2.2K_5%_2

FLASH
TCP0_FLASH_CS# EE_DO I2C_SDA RT_I2C_INT RT_I2C_SDA [36] RT_I2C_INT
B6 A10 RT_I2C_INT [36]
TCP0_FLASH_CLK C7 EE_CS# I2C_INT B10 TBT_FORCE_PWR
+VCC3P3_LC_TCP0 EE_CLK FORCE_PWR TCP01_FLASH_BUSY# TBT_FORCE_PWR [4,36]
A9

POC GPIO
FLASH_BUSY# B9 TCP0_GPIO_5

DEBUG
MISC &
POC_GPIO_5 A8 TCP0_GPIO_6
R68621 10K_1%_2 TCP0_JTAG_TDI TCP0_JTAG_TDI A3 POC_GPIO_6 B8
TCP0_JTAG_TMS TP13340 TCP0_JTAG_TMS TDI PERST# SMB_SML0_CLK TCP_RETIMER_PERST# [13]
R68622 10K_1%_2 C3 A7
TCP0_JTAG_TCK TP13341 TCP0_JTAG_TCK TMS SMBUS_SCL SMB_SML0_DAT SMB_SML0_CLK [9]
R68623 10K_1%_2 B5 B7 TO PCH

JTAG
TCP0_JTAG_TDO TP13342 TCP0_JTAG_TDO TCK SMBUS_SDA TCP0_FLASH_SHARE_EN SMB_SML0_DAT [9]
R68624 10K_1%_2 C5 A4
TP13343 TDO FLASH_SHARE_EN A5 TCP0_FLASH_MSTR_SLV
FLASH_MASTER_SLAVE A6 TCP0_GPIO_12 +3V
POC_GPIO_12 L3
TCP0_THERMDA NC_L3 TCP0_GPIO_12 have iPU HW Pull-Up/Pull-Down of BBR#1
M11
+VCC3V3_SX_TCP0 TP13344 THERMDA

2
C C
M12 R68628 *0_5%_2 TCP0_TEST_PWRGD R68595 100_1%_2
TEST_EDM SLP_S5# [13] TCP0_GPIO_5
B2 Q6612 1 3 *PJA138K R68597 10K_1%_2
FUSE_VQPS_64 L11 TCP0_RESET# R68630 *Short_0201
RESET# RT_RESET_P1 [36]
R68631 *10K_1%_2 A11
A12 MONDC L9 XTAL_TCP0_25MHZ_IN

DEBUG

Main
L12 NC_A12 XTAL_25_IN M9 XTAL_TCP0_25MHZ_OUT +3V
MONDC_SVR XTAL_25_OUT
TCP0_TEST_PWRGD B3 L5 AN_RSENSE R68602 10K_1%_2
B11 TEST_PWR_GOOD RSENSE L4 AN_RBIAS R68632 4.75K_0.5%_2 TCP0_GPIO_6 R68603 *10K_1%_2
TEST_EN RBIAS
A1 Place as close as +/- 0.5%
A2 ATEST_P
ATEST_N 1/4 possible to pins VCC3V3_FLASH

JHL8040R QURW TCP01_FLASH_BUSY# R68607 10K_1%_2

https://vinafix.com/
+VCC3V3_SX_TCP0
TCP0_FLASH_MSTR_SLV R68875 *10K_1%_2
+VCC3V3_SX_TCP0

C96816 C96817 C96818 R68609 *10K_1%_2


2.2u/10V_4 47u/6.3V_6 2.2u/10V_4 TBT_FORCE_PWR R68613 10K_1%_2
U6549B

C96819 2.2u/10V_4 +VCC3P3_ANA_TCP0 L2 E6 +VCC3V3_SX_TCP0


VCC3P3_ANA VCC3P3_SX
+VCC3P3_LC_TCP0 E5 M4 +VCC3V3_SX_TCP0
+VCC3P3_LC_TCP0 VCC3P3_LC VCC3P3_SVR#2 M5
C96820 2.2u/10V_4 F6 VCC3P3_SVR#1
VCC0P9_SVR_ANA#2 80mA
G6 J7 +VCC3V3A_SX_TCP0 R68633 *Short_0402 R68876 10K_1%_2 TCP0_FLASH_SHARE_EN R68614 *10K_1%_2
VCC0P9_SVR_ANA#1 VCC3P3A
Power

E3 L1 R68877 *10K_1%_2 TCP0_FLASH_MSTR_SLV R68617 *10K_1%_2


+VCC0V9_SVR_TCP0 G3 VCC0P9_SVR#2 SVR_IND#2 M1
VCC0P9_SVR#1 SVR_IND#1 C96821 C96822 C96823
E9 M2 2.2u/10V_4 10u/6.3V_4 18p/25V_2 TCP0_GPIO_12 R68616 *10K_1%_2
U6549C G9 VCC0P9_SVR_PB_ANA#1 SVR_VSS#1 M3 R68620 *10K_1%_2
B
VCC0P9_SVR_PB_ANA#2 SVR_VSS#2 850mA Output B

B1 F12 +VCC0P9_LC_TCP0 J3 +VCC0V9_SVR_TCP0


B12 VSS_ANA#1 VSS_ANA#10 G7 VCC0P9_LC
D1 VSS_ANA#2 VSS_ANA#20 H1 +VCC0P9_LVR_TCP0 L6 J5 +VCC0V9_SVR_TCP0_PHASE L4001 1 2 0.68uH_2.5x2.0x1.2 +VCC3V3_SX_TCP0
D2 VSS_ANA#3 VSS_ANA#11 H2 M6 VCC0P9_LVR NC_J5 J6
D11 VSS_ANA#4 VSS_ANA#12 H11 VCC0P9_LVR_SENSE NC_J6 TCP0_RESET# R68625 *10K_1%_2
D12
F1
VSS_ANA#5
VSS_ANA#6 GND VSS_ANA#17
VSS_ANA#16
H12
J9 C96824 C96825 C96826 JHL8040R QURW
2/4 C96827
47u/6.3V_6
C96828
18p/25V_2
F2 VSS_ANA#21 VSS_ANA#22 K1 2.2u/10V_4 10u/6.3V_4 R68878
VSS_ANA#7 VSS_ANA#18 2.2u/10V_4
F7 K2 *Short_0201 +VCC3V3_SX_TCP0_DBRonly R68879 *0_5%_4 R68626 100K_1%_2
VSS_ANA#19 VSS_ANA#13 +VCC3V3_SX_TCP0
F9 K11
F11 VSS_ANA#8 VSS_ANA#15 K12 Close to L13
VSS#1
VSS#2
VSS#3

VSS_ANA#9 VSS_ANA#14
3/4 +VCC0V9_SVR_TCP0 R68884 *10K_1%_2 +3V
JHL8040R QURW VCC3V3_FLASH
F3
F5
G5

PIN.G9 PIN.E9 PIN.G3 PIN.E3 PIN.G6 PIN.F6 TCP0_RESET#:


C96829 C96832 C96830 C96833 C96831 C96834
For PD based systems,TCP0_RESET# should be output from PD.
47u/6.3V_6 2.2u/10V_4 2.2u/10V_4 2.2u/10V_4 2.2u/10V_4 2.2u/10V_4 For TCPC based systems,TCP0_RESET# should be output from SOC/EC.
R68638 R68637 R68639 C96901 C96837 R68636
VCC3V3_FLASH 3.32K_1%_2 2.2K_5%_2 2.2K_5%_2 2.2u/10V_4 0.1u/6.3V_2 3.32K_1%_2 TCP0_GPIO_6:
+VCC3V3_SX_TCP0 Indication to S0 state for Re-timer
TP13345 TCP0_FLASH_HOLD#
VCC3V3_FLASH TP13346 TCP0_FLASH_WP# TCP0_FLASH_CS#
TBT_FORCE_PWR:
+V3.3DX_RT_TCP0 TP13347 TCP0_FLASH_DI TCP0_FLASH_DO TCP0_FLASH_HOLD# Connect to EC/PCH for FW update
370mA
U6550 TP13348 TCP0_FLASH_DO TCP0_FLASH_WP# '0' - by default
+V3.3DX_RT_TCP0 TP13349 TCP0_FLASH_CS#
A2
VIN#1 VOUT#1
A1 L4002 1 2 BLM15PD121SN1D_1.3A
TP13350
'1' - for debug only/FW update
TCP0_FLASH_CLK
B2 B1 TP13351
VIN#2 VOUT#2 TCP0_FLASH_SHARE_EN (iPU):
R68634 C96835 C96836 C96902
'0' - Flash isn't shared, 1 Flash per Re-timer.
GND

10K_1%_2 47u/6.3V_6 C2 2.2u/10V_4 2.2u/10V_4 '1' - Flash is shared between 2 Re-timers


A ON VCC3V3_FLASH A
TCP0_FLASH_MSTR_SLV (iPU):
C1

[36] RT_PWR_EN_P1 TPS22924CYZPR R68880 *0_5%_6


C96814 10p/25V_2
+3VPCU Should be used only when TCP0_FLASH_SHARE_EN is High.
R68635 0_5%_6 +3V_S5
'0' - Set Re-timer to be Slave on shared flash SPI I/F.
U6551 '1' - Set Re-timer to be Master on shared flash SPI I/F
TCP0_FLASH_DI 5 8
DI(IO0) VCC
1
2

XTAL_TCP0_25MHZ_IN Y8 TCP0_FLASH_DO 2 3 TCP0_FLASH_WP#


TCP0_FLASH_CS# 1 DO(IO1) WP(IO2) 7 TCP0_FLASH_HOLD#
25MHZ/10ppm TCP0_FLASH_CLK 6 CS HOLD(IO3) 4
XTAL_TCP0_25MHZ_OUT CLK GND Quanta Computer Inc.
W25Q80DVSNIG I2C address set on NVM
3
4

F min 50MHz
PROJECT : Z8IA_ZAIA
C96815 10p/25V_2 Size Document Number Rev
Without Boss /WSON8 Socket:DG008000012 1A
Intel Burn side bridge
Date: Tuesday, October 06, 2020 Sheet 35 of 62
5 4 3 2 1
5 4 3 2 1

VDD_SUPPLY_1P
Width>15mils
VDD_SUPPLY_1P 31
U6555

CCG5 40-QFN
11
R68696

R68697
*100K_1%_2

100K_1%_2
TYPEC1_USB0

+5VPCU

CCG5_VBUS_P_CTRL_P1 [37]
36
VDDD VBUS_P_CTRL VCC3V3_FLASH
32 12
VDDIO VBUS_C_CTRL CCG5_VBUS_C_CTRL_P1 [48]
Width>15mils CCG5_VSYS 19
C96861 C96863 C96864 R69056 *Short_0603 R68721 2.2K_5%_2

2
+3VPCU VSYS VDD_SUPPLY_1P
1u/10V_2 0.1u/25V_2 0.1u/25V_2 R68720 2.2K_5%_2
VCCD_SP 33 20 Q6621 3 1 *2N7002KTB
VCCD SDA_3/VSEL_2/GPIO_P3.6 RT_I2C_SDA [35]
C96862 C96865 Width>15mils
1u/10V_2 0.1u/25V_2 21 R68887 *Short_0201
D SCL_3/VSEL_1/GPIO_P3.7 D
C96866
1u/10V_2
+3V_DEEP_SUS VCC3V3_FLASH

R68694 *0_6/S +VCONN_5V_3 8


+5VPCU VCONN_V5V

2
40mils 18 R68975 0_5%_4
HPD/GPIO_P3.0 FOST1 [37]
Q6622 1 3 2N7002KTB Q6623 3 1 *2N7002KTB
[9] SMB_ME1_DAT RT_I2C_SCL [35]
7
CC2 TBT1_CC2 [37]
R68732 *0_5%_4 R68888 *Short_0201
C96867

+3V_DEEP_SUS VDD_SUPPLY_1P 390p/50V_4 Width>15mils


R68733 2.2K_5%_2
9
CC1 TBT1_CC1 [37]
R68731 2.2K_5%_2
C96868
2

R68730 2.2K_5%_2 390p/50V_4


Q6624 1 3 2N7002KTB SMB_ME1_DAT_D 3
[9] SMB_ME1_CLK I2C_SDA_SCB2_TBT/GPIO_P1.1
R68729 *0_5%_4 SMB_ME1_CLK_D 4
I2C_SCL_SCB2_TBT/GPIO_P1.2 26
+3V_DEEP_SUS TBT_I2C_INT#_D DPLUS_BOT USBP2+_TPC_BOT [37] ADP_IN_CCG5
5 R68974 *Short_0402
I2C_INT_TBT/GPIO_P1.3 25
DMINUS_BOT USBP2-_TPC_BOT [37]

L<2" from CONN to CCG5


2

VCC3V3_FLASH
[13] TBT_I2C_INT# Q6625 1 3 2N7002KTB 28
DPLUS_TOP USBP2+_TPC_TOP [37]
R68984 *100K_1%_2
R68734 *0_5%_4 27
DMINUS_TOP USBP2-_TPC_TOP [37]
+3V_LDO_EC

2
R69011 *Short_0402 CCG5_SWD_IO_RST#_SP 6
C [33,37] TypeC_FAULT SWD_IO/TBT_RST#/GPIO_P1.6 C
23 Q6629 3 1 *2N7002KTB
CCG5_SWD_CLK_SP DPLUS_SYS USBP2+_TPC [11] RT_I2C_INT [35]
2
SWD_CLK/I2C_CFG_EC/GPIO_P1.0 24 RT_I2C_INT_C R68982 *0_5%_2
2

DMINUS_SYS USBP2-_TPC [11]


Q6626 1 3 *2N7002KTB EC_CCG1_I2C_INT_D 15 R68885 *10K_1%_2
[33] EC_CCG_I2C_INT# I2C_INT_EC/GPIO_P2.5 VDD_SUPPLY_1P
29 R68970 *0_5%_4
EC_CCG_I2C_SDA_D UART_TX/GPIO_P4.0 RT_RESET_P1 [35,36]
R68722 *Short_0402 16
I2C_SDA_SCB1_EC/GPIO_P6.0 30 R68712 *0_5%_4
+3V_LDO_EC EC_CCG_I2C_SCL_D UART_RX/GPIO_P4.1 H_PROCHOT#_CCG5 [14]
17
I2C_SCL_SCB1_EC/GPIO_P6.1 R69081 0_5%_4 ADP_IN_EN_CCG5
R68725 *2.2K_5%_2 VDD_SUPPLY_1P
R68726 *2.2K_5%_2 34
2

SBU2 TBTA_SBU2_CON_CCG5 [37]


R68727 *2.2K_5%_2
Q6627 1 3 *2N7002KTB 35
[33] EC_CCG_I2C_SDA SBU1 TBTA_SBU1_CON_CCG5 [37]
R68723 *Short_0402 36 TBTA_SBU1_CCG5_R R68715 *Short_0402
AUX_P/GPIO_P4.2 TBTA_SBU1_TX_BB [35]
TP13407 1
+3V_LDO_EC CSP 37 TBTA_SBU2_CCG5_R R68716 *Short_0402

https://vinafix.com/
AUX_N/GPIO_P4.3 TBTA_SBU2_RX_BB [35]
TP13408 40 38 TBTA_SBU1_CCG5_L R68713 *Short_0402
CSN LSTX/GPIO_P4.4
2

39 TBTA_SBU2_CCG5_L R68714 *Short_0402


Q6628 1 3 *2N7002KTB LSRX/GPIO_P4.5
[33] EC_CCG_I2C_SCL
CCG5_VBUS
Width>15mils 22
TYPEC1_USB0 R69057 *Short_0603
R68724 *Short_0402 VBUS
R68718 *Short_0402 TBT_FORCE_PWR [4,35]
VDD_SUPPLY_1P R68711 4.7K_1%_2
14
SDA_4/OVP_TRIP/GPIO_2.4 13 R68719 *0_5%_4
VDD_SUPPLY_1P CCG5_XRES_SP SCL_4/UV_OCP_TRIP/GPIO_P2.3 RT_PWR_EN_P1 [35,36]
10
XRES 41
EPAD
test points sequence and pitch.
B R68695
(2.54mm with PHY 1.02) B
C96869 CYPD5126-40LQXIT
(Rc) *1K_1%_2 Address 08H VDD_SUPPLY_1P 0.1u/25V_2 CCL = Y
VDD_SUPPLY_1P VDD_SUPPLY_1P

CCG5_SWD_CLK_SP
TP13360
Note:
R68700 CCG5’s I2C address is decided by the TP13361
SWD clock pin.
(Rd) *1K_1%_2 Don't mount (Rc) and (Rd) for the I2C
address 0x08. This is the default one.
TP13362 CCG5_XRES_SP
Mount only (Rc) )for the I2C address 0x42.
Mount only (Rd) for the I2C address 0x40. TP13363 CCG5_SWD_CLK_SP R68968
10K_1%_2 U6564

5
TP13364 CCG5_SWD_IO_RST#_SP
1
4 R68972 *Short_0402 RT_PWR_EN_P1 [35,36]
R68971 *Short_0402 RT_PWR_EN+RESET 2

3
MC74VHC1G08DFT2G

+3VPCU

1
D13160 R68976
RB500V-40 1K_1%_2
2

2
ADP_DET Q6602 1 3 2N7002KTB ADP_IN_CCG5
from Power [48] ADP_DET
to CCG5 R68969 *Short_0402
RT_RESET_P1 [35,36]

ADP Insert ADP_DET R68760 *0_5%_4


A
TYPE C_ADP_IN [33] to EC A
C96906
Y Hi
2.2u/10V_4
+3VPCU
N Low
R68761 *Short_0402
ADP_EN [48] to Power
2

ADP Switch
from CCG5 ADP_IN_EN_CCG5 Q6603 1 3 2N7002KTB R68759 *0_5%_4
ADP_EN (PQ8001) Quanta Computer Inc.
ADP_IN_EN_EC [33] to EC
Hi ON PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
Low OFF PD-CCG5
Date: Tuesday, October 06, 2020 Sheet 36 of 62
5 4 3 2 1
5 4 3 2 1

TypeC CONN
37
TYPEC1_USB0 TBTA_TX1_P R68666 221K_1%_2

CN10 TBTA_TX1_N R68667 221K_1%_2

TBTA_TX2_P R68668 221K_1%_2

TBTA_TX2_N R68669 221K_1%_2

TBTA_TX2_P A2 A4 D13096 1 2 P4SMAFJ20A TBTA_RX1_P R68670 221K_1%_2


[35] TBTA_TX2_P TBTA_TX2_N SSTXp1 VBUS_1
A3 B4
[35] TBTA_TX2_N TBTA_RX2_P SSTXn1 VBUS_3 TBTA_RX1_N
[35] TBTA_RX2_P B11 A9 R68671 221K_1%_2
TBTA_RX2_N SSRXp1 VBUS_2
[35] TBTA_RX2_N B10 B9
D SSRXn1 VBUS_4 TBTA_RX2_P D
R68672 221K_1%_2

TBTA_TX1_P B2 A1 TBTA_RX2_N R68673 221K_1%_2


[35] TBTA_TX1_P TBTA_TX1_N SSTXp2 GND_1
B3 GND_2 A12
[35] TBTA_TX1_N TBTA_RX1_P SSTXn2
[35] TBTA_RX1_P A11 GND_3 B1
TBTA_RX1_N SSRXp2
[35] TBTA_RX1_N A10 GND_4 B12
SSRXn2

USBP2+_TPC_BOT A6 1 TYPEC1_USB0
[36] USBP2+_TPC_BOT USBP2-_TPC_BOT Dp1 GND_5
A7 2
[36] USBP2-_TPC_BOT USBP2+_TPC_TOP Dn1 GND_6 TBT1_CC1
B6 3 D13118 1 2 PESD5V0F1BSF
[36] USBP2+_TPC_TOP Dp2 GND_7
USBP2-_TPC_TOP B7 4
[36] USBP2-_TPC_TOP Dn2 GND_8 TBT1_CC2
5 D13119 1 2 PESD5V0F1BSF
GND_9
6
TBT1_CC2 GND_10
[36] TBT1_CC2 A5 CC1
TBT1_CC1 B5 USBP2+_TPC_TOP D13142 1 2 PESD5V0F1BSF
[36] TBT1_CC1 CC2
C96856 C96857 C96858 C96859
TBTA_SBU2_CON_CCG5 A8 7 0.47u/25V_2 0.47u/25V_2 0.47u/25V_2 0.47u/25V_2 USBP2-_TPC_TOP D13143 1 2 PESD5V0F1BSF
[36] TBTA_SBU2_CON_CCG5 TBTA_SBU1_CON_CCG5 SBU1 NC_1
B8 8
[36] TBTA_SBU1_CON_CCG5 SBU2 NC_2 USBP2+_TPC_BOT D13144 1 2 PESD5V0F1BSF

USBP2-_TPC_BOT D13145 1 2 PESD5V0F1BSF

R68955 R68956 TBTA_SBU1_CON_CCG5 D13146 1 2 PESD5V0F1BSF


*2M_1%_2 *2M_1%_2 560Q10-010H
TBTA_SBU2_CON_CCG5 D13147 1 2 PESD5V0F1BSF

C C

Provider Path Control +5VPCU

C96851 47u/6.3V_6

+5VPCU C96852 47u/6.3V_6

https://vinafix.com/
TYPEC1_USB0
C96853 47u/6.3V_6
U6553
R68677
1M_1%_2 C96854 10u/6.3V_4 1 15 C96855 10u/25V_8
IN OUT

4 14 R69004 54.9K_1%_2
EN VLIM
RVLIM=54.9K for VIN OVP=6V_typ.
3

2 Q6593 R68680 5 13
B [36] CCG5_VBUS_P_CTRL_P1 FRS ILIM B
2N7002K *470K_5%_2

CCG5_VBUS_P_CTRL_P1= 0 (Provider Path ON) 18 12 C96909 6800p/50V_4


1

EPAD DV/DT
FAULTB
6
CCG5_VBUS_P_CTRL_P1= 1 (Provider Path OFF) GND
DISC1

DISC2
VREG

IMON
ACTIVE LOW PIN12=DV/DT, 6.8nF for VOUT 5V soft start=2.822mS.
R68681 R68902
DPS1113FIA-13
7

10

11

57.6K_1%_2 57.6K_1%_2
R1 R2

[36] FOST1 C96910


0.1u/25V_2 R69005
*100K_1%_2 C96908
R69006 *100p/50V_2

3
*Short_0402 2 Q6617
[33] TYPEC1_OUT_1-5A
2N7002K

R68903

1
100K_1%_2
R69008 1M_1%_2

+3VPCU

R69009 1M_1%_2
Low(1.5A / 57.6K) : ILIM range is 1.563~1.91A
A R69010 High(3A / 28.8K) : ILIM range is 3.125~3.819A A
10K_1%_2

[33,36] TypeC_FAULT

C96911
Quanta Computer Inc.
0.1u/25V_2 PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
TypeC CONN
Date: Tuesday, October 06, 2020 Sheet 37 of 62
5 4 3 2 1
1 2 3 4 5 6 7 8

DP TO VGA (CRT)
+3V

L4003 1 2 CRT@PBY160808T-600Y-N_3A
+CRT_AVCC_33
38
+CRT_VDDA33
+3V C20023
+CRT_VDDA33
*[email protected]/6.3V_2
L17 1 2 CRT@PBY160808T-600Y-N_3A

A C20010 R1616 A
*[email protected]/10V_4
*[email protected]_1%_2

R69051 *CRT@Short_0402 +3V

VGA_SDA C20011 [email protected]/6.3V_2 close IC


ESD3
VGA_SLK CRT_R1 1 10 CRT_R1
Line-1 NC#4
R61 *CRT@0_4/S DP_HPD_R VCCK_V12 CRT_G1 2 9 CRT_G1
[2] DP_HPD Line-2 NC#3
X5R 3
C20021 C20022 GND#1
R25534 [email protected]/6.3V_2 CRT_B1 4 7 CRT_B1
[email protected]/10V_4 Line-3 NC#2
CRT@100K_1%_2 close IC close IC CRT_VCC_R CRT_VCC_R
5 6
Line-4 NC#1

33

32

31

30

29

28

27

26

25
U67 [email protected]

EXT1.2V_CTRL

SMB_SCL

PVCC_33

VCCK_12
SMB_SDA

LDO_RSTB
EPAD

HPD

EXT_CLK_IN
+CRT_AVCC_33 ESD4
VGA_DDC_DAT_RT 1 10 VGA_DDC_DAT_RT
Line-1 NC#4
1 24 CRTHSYNC 2 9 CRTHSYNC
AVCC_33 GND Line-2 NC#3
C20015 [email protected]/6.3V_2 VGA_DDI2_AUXP_C 2 23 CRT_R 3
[2] DP_AUXP AUX_P RED_P GND#1
B C20014 [email protected]/6.3V_2 VGA_DDI2_AUXN_C 3 22 CRT_G CRTVSYNC 4 7 CRTVSYNC B
[2] DP_AUXN AUX_N GREEN_P +CRT_VDDA33 Line-3 NC#2
C20020 [email protected]/6.3V_2 close IC VCCK_V12 4 21 CRT_B VGA_DDC_CLK_RT 5 6 VGA_DDC_CLK_RT
AVCC_12 BLUE_P Line-4 NC#1
C20016 [email protected]/6.3V_2 VGA_DDI2_TXP0_C 5 20 [email protected]
[2] DP_D0P LANE0_P VDD_DAC_33
C20017 [email protected]/6.3V_2 VGA_DDI2_TXN0_C 6 19 CRTHSYNC_R R25532 CRT@47_1%_2 CRTHSYNC
[2] DP_D0N LANE0_N HSYNC
C20018 [email protected]/6.3V_2 VGA_DDI2_TXP1_C 7 18 CRTVSYNC_R R25535 CRT@47_1%_2 CRTVSYNC C20012
[2] DP_D1P LANE1_P VSYNC
[email protected]/6.3V_2
C20019 [email protected]/6.3V_2 VGA_DDI2_TXN1_C 8 17

POL1/SPI_CEB

GPI1/SPI_CLK
[2] DP_D1N LANE1_N HVSYNC_PWR CRT_VCC_R close IC

GPI3/SPI_SO
GPI2/SPI_SI

VGA_SDA
VGA_SCL
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VCC_33
C20013 C551 CRT_VCC_R C20009 [email protected]/6.3V_2
POL2
[email protected]/6.3V_2 [email protected]/6.3V_4
close IC close IC C20005 *CRT@220p/25V_2

C890 [email protected]/6.3V_2
9

10

11

12

13

14

15

16
CRT@RTD2166-CGT CRTVSYNC C20003 *CRT@2p/25V_2

CRTHSYNC C20008 *CRT@2p/25V_2


R25526 [email protected]_1%_2 VGA_DDC_DAT_RT
+3V VGA_DDC_CLK_RT *CRT@10p/25V_2
C20006
R25527 [email protected]_1%_2 VGA_DDC_CLK_RT
VGA_DDC_DAT_RT C20004 *CRT@10p/25V_2
TP2 TP9064
+3V
1

+5V +5V
TP9046
C C
R25528 R25529
+CRT_VDDA33 R458 *[email protected]_1%_2 [email protected]_5%_2 [email protected]_5%_2

R25530 *CRT@0_5%_4 VGA_SDA


[9,17,18] SMB_RUN_DAT
VGA_DDC_DAT_RT
+CRT_VDDA33 R25533 *[email protected]_1%_2
VGA_DDC_CLK_RT
R25531 *CRT@0_5%_4 VGA_SLK
[9,17,18] SMB_RUN_CLK CRT_VCC_R
Q6534

1
OUT
+5V 3
IN CRT_VCC_R
2
GND

16
C900 *[email protected]/6.3V_2
CRT@G5250Q1T73U CN21
6 TP9063
CRT_R L22 1 2 CRT@BLM15BB470SN1D_0.3A CRT_R1 1 11 CRT_11
7
CRT_G L27 1 2 CRT@BLM15BB470SN1D_0.3A CRT_G1 2 12 VGA_DDC_DAT_RT
8
CRT_B L31 1 2 CRT@BLM15BB470SN1D_0.3A CRT_B1 3 13 CRTHSYNC
9
4 14 CRTVSYNC
C856 C857 C858 10
R850 C859 C860 C861 5 15 VGA_DDC_CLK_RT
D R803 R849 CRT@75_1%_2 *CRT@10p/25V_2 *CRT@10p/25V_2 *CRT@10p/25V_2 D
CRT@75_1%_2 CRT@75_1%_2 CRT@10p/25V_2 CRT@10p/25V_2 CRT@10p/25V_2
CRT@DHR4U-15K1202

17
Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
CRT/DP2VGA(RTD2166)
Date: Tuesday, October 06, 2020 Sheet 38 of 62
1 2 3 4 5 6 7 8
5 4 3 2 1

USB HUB
(Pin22)
0: GL850G-50 is bus-powered
39 +3V_USB
(Pin27) 5V Power input. It TP13304 EEPROM_SDA 1: GL850G-50 is self-powered
need be NC if using
external TP13303 R69003 *HUB@10K_1%_2 PSELF R68556 HUB@10K_1%_2
D D
regulator

nOVRP1
nOVRP2
+3V_USB

PGANG
PSELF
nOVRP1 R68552 *HUB@10K_1%_2

nOVRP2 R68553 *HUB@10K_1%_2

U6544 +3V_USB

28
27
26
25
24
23
22
nOVRP3 R68554 *HUB@10K_1%_2
R69072 HUB@10K_1%_2

VCC

SELFPWR
OVR#[1]
OVR#[2]
I2C_SDA
VREG

GANG
52.4mA
R68564 *HUB@Short_0201 USBP6-_HUB_R 1 21 +3V_USB_D R68550 *HUB@Short_0402 +3V_USB
[11] USBP6-_HUB USBP6+_HUB_R DD-0 VCC_D
R68565 *HUB@Short_0201 2 20 nOVRP3
[11] USBP6+_HUB 3 DD+0 OVR#[3] 19 R69002 *HUB@10K_1%_2
nOVRP4
[25] USBP6-_HUB_TS DD-1 GL850G-OHY31OVR#[4]

2
4 18 EEPROM_SCL nOVRP4 R68557 HUB@10K_1%_2
[25] USBP6+_HUB_TS 5 DD+1 TEST 17 RESET#_USB
+3V_USB C96776
VCC_A_5 RESET#

VCC_A_14
6 16 [email protected]/6.3V_2

VCC_A_9
[40] USBP6-_HUB_SM

1
7 DD-2 DD+4 15
[40] USBP6+_HUB_SM DD+2 DD-4

XOUT
PGANG R68560 HUB@100K_1%_2

RREF

DD+3
DD-3

GND
XIN
QFN28 (Pin23) pull down for Individual
mode (only available for QFN28

8
9
10
11
12
13
14

29
C
HUB@GL850G-OHY50 package.) C
RREF_U2_HUB R68561 HUB@680_5%_2

XOUT
XIN
RREF_U2_HUB
EEPROM_SCL R68559 *HUB@Short_0402

(Pin18)
TEST: 0: Normal operation.
Y7 HUB@12MHz +3V_USB 1: test mode.
4 3 XOUT
+3V_USB

https://vinafix.com/
XIN 1 2

R68551
C96778 C96777 HUB@10K_1%_2

HUB@22p/25V_2 HUB@22p/25V_2
D13110 1 2 *HUB@SDM20U30-7 RESET#_USB
[13,19,28,30,32,33,45] PLTRST#
B B

C96779 R68558
HUB@1u/10V_2 *HUB@47K_1%_2

+3V_USB

+3V_S5

R68562 *HUB@Short_0603

+3V

R68563 *HUB@0_5%_4
2

2
C96780 C96781 C96782 C96783 C96784 C96785 C96786
A [email protected]/6.3V_2 [email protected]/6.3V_2 HUB@1u/10V_2 HUB@1u/10V_2 [email protected]/6.3V_2 HUB@10u/6.3V_4 [email protected]/6.3V_2 A
1

1
Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
USB HUB GL850G
Date: Tuesday, October 06, 2020 Sheet 39 of 62
5 4 3 2 1
5 4 3 2 1

SMART CARD PWRSV_SEL


+3V 40
"1" Normal mode <default> 24C02 or 24C04 SC_PWRSV# R67606 *SM@10K_1%_2
+PSWOUT "0" Power saving mode
D U6509 D
SCARDC8 1 28
R25554 Scard0C8 XO +3V_SM
SCARDC6 2 27
+5V_SmartCard [email protected]_1%_2 SCard0C6 XI
SCARDFCB 3 26 R25557 *SM@0_5%_4 SC_PWRSV# [12]
SCard0Fcb PWRSV_SEL
24mA
4 25 R25556 *SM@0_5%_4 R25555
SMIO_5VPWR LEDCRD SM@100K_1%_2
C20039 SCARDRST 5 24
SM@47p/25V_2 SCard0Rst LEDPWR
SCARDCLK 6 23
SCard0clk RESET
SCARDDATA R25558 SM@470_1%_2 7 22 C20040
SCard0Data EEPDATA SM@1u/25V_4
R25559 *SM@0_4/S USBP6-_HUB_SM_R 8 21
[39] USBP6-_HUB_SM DM EEPCLK
R25560 *SM@0_4/S USBP6+_HUB_SM_R 9 20
[39] USBP6+_HUB_SM DP P1_6
10 19 ICCINSERTN +3V_SM
+3V_SM AV33 ICCInsertN
C20041 11 18
+PSWOUT SCPWR0 VDDH
[email protected]/6.3V_2
C20042 SM@1u/25V_4 12 17
C 5VGND VDDP C
+1.8V_SM C20043
+5V_SmartCard 13 16 [email protected]/6.3V_2
5VInput VDD
14 15
C20044 C20045 V33OUT V18OUT
[email protected]/6.3V_2 SM@1u/25V_4
SM@AU9560B62-GBS-GR
C20046 C20047
[email protected]/6.3V_2 SM@1u/25V_4

+3V_SM
C20048 C20049
[email protected]/6.3V_2 SM@1u/25V_4

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B
+PSWOUT CN53 B
F2 12
1 2 SM@SMD0603P100SLR_1A_6V R68792
10
9

1
SCARDRST SM@10K_1%_2
C20050 C20051 SCARDFCB 8 Q6604
SCARDCLK 7 2
SM@1u/25V_4 SM@82p/25V_2 SCARDDATA 6
SCARDC6 5 SM@DMP2130L-7
4

3
SCARDC8

3
ICCINSERTN 3 Q6605
2 +5V_SmartCard
1 [33] SmartCard_ON 2

SM@DDTC144EUA-7-F
11

+5V_SmartCard_R R68791 *SM@Short_0603

1
SM@51653-0100N-V01
SCARDDATA

C96788 C96789 C96790


SM@470p/50V_4 [email protected]/6.3V_2 SM@22u/6.3V_6
C20053
*SM@47p/25V_2
A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
SMART CARD
Date: Tuesday, October 06, 2020 Sheet 40 of 62
5 4 3 2 1
5 4 3 2 1

+3V +SENSOR_POWER

+SENSOR_POWER +1.8V_SENSOR

C1
U6516

C5 SDA_HUB_TO_CPU
+3V_S5
R25625 *SPIN@0_5%_6 C20135

C20138
[email protected]/6.3V_2

[email protected]/6.3V_2
+SENSOR_POWER
41
VCCA I2CDAT0/GPB4

1
C2 A3 MODE1_HUB

1
R25622 *SPIN@Short_0603
C20140 [email protected]/6.3V_2 B3 VCCIO I2CDAT1/ADC1/GPC2 A1 R25633 D13093
VCCK I2CDAT2/SOUT1/GPC7 TP9067 SDA_GSENSOR
E4 SPIN_EXT@100K_1%_2 SPIN_EXT@RB500V-40
E2 I2CDAT3/PWM2/TACH1/GPB5 D1
TP9066 SIN0/JTMSC/ADC2/GPB0 I2CDAT5/RTS1#/GPA5 TP9068
E3
TP9069

2
SOUT0/JTCKC/ADC3/GPB1

SSCE0#/I2CINT6/GPD2
C4 SCL_HUB_TO_CPU +1.8V_SENSOR

SMISO/I2CINT4/GPC5
SMOSI/I2CINT5/GPC3
I2CCLK0/GPB3

SSCK/I2CINT7/GPA6
INT_HUB_TO_CPU A4 B2 MODE2_HUB +1.8V WRST#_8350
DB_GSENSOR_INT A5 I2CINT11/PWM4/FMOSI/SSCE2#/TACH0/I2SWS/GPD4 I2CCLK1/ADC0/GPC1 B1
I2CINT10/PWM5/FMISO/SSCE1#/TACH0/GPD5 I2CCLK2/SIN1/GPC6 TP9071 SCL_GSENSOR
TP9073 B4 E5 R68987 *SPIN_EXT@0_5%_6 C20141 [email protected]/6.3V_2
I2CINT13 B5 I2CINT12/PWM3/FSCE#/I2DAT/MICDAT/GPD3 I2CCLK3/PWM1/GPB2 E1 C20142
I2CINT13/PWM7/FSCK/I2SBCLK/MICCLK/GPD7 I2CCLK5/CTS1#/GPA4 TP9072 +1.8V_S5
D WRST#_8350 A2
close to Pin C1 SPIN_EXT@1u/10V_2
D
WRST# C3
GND R68988 *SPIN_EXT@Short_0603

D2
D3
D4
D5
[B5/GPD7; D4/GPD2; D3/GPC3] SPIN_EXT@IT8353VG-128/BX I2CINT13 R689891 2 *SPIN_EXT@100K_1%_2
DO NOT PU AT THESE PINS IT
IS H/W STRAP TP9070 MB_GSENSOR_INT

TP9074
GPD2 R689901 2 *SPIN_EXT@100K_1%_2

GPD2
+SENSOR_POWER

1
DB_GSENSOR_INT
R68992 R68993 R25635 R25636 R68994 R68995 R25634 R25631 R25629
[email protected]_1%_2 [email protected]_1%_2 SPIN_EXT@2K_1%_2 SPIN_EXT@2K_1%_2 SPIN_EXT@2K_1%_2 SPIN_EXT@2K_1%_2 [email protected]_1%_2 [email protected]_1%_2 [email protected]_1%_2
8

INT_HUB_TO_CPU 2

SCL_HUB_TO_CPU 2

SDA_HUB_TO_CPU 2
MB_GSENSOR_INT

DB_GSENSOR_INT
6 +SENSOR_POWER

SDA_GSENSOR

SCL_GSENSOR
5 SCL_GSENSOR

MODE1_HUB

MODE2_HUB
4 SDA_GSENSOR
3 DB_GSENSOR_INT
2
1
SDA_GSENSOR
7

C CN67 C
SPIN@50208-00601-V02
ADDR:0X18
FROM D/B

TO HUB
FOR EC FOR SENSOR FOR PCH

SCL_GSENSOR +SENSOR_POWER
S5 S5

2
Q6633 3 1 SPIN_EXT@2N7002K SDA_HUB_TO_CPU

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[6] I2C2_SDA_SEN_HUB
ADDR:0X19
FROM M/B

SDA_GSENSOR_MB R25637 SPIN_EXT@0_5%_4


R25630 *SPIN_EXT@0_5%_4

SCL_GSENSOR_MB R25638 SPIN_EXT@0_5%_4 +SENSOR_POWER

FROM HUB
TO CPU

2
INT1_GSENSOR_MB R25641 SPIN_EXT@0_5%_4 MB_GSENSOR_INT
Q6632 3 1 SPIN_EXT@2N7002K SCL_HUB_TO_CPU
[6] I2C2_SCL_SEN_HUB
To EXT_HUB@MB-Gsensor

R25632 *SPIN_EXT@0_5%_4

+SENSOR_POWER
+SENSOR_POWER

2
LDO S5
5

Q6540 3 1 SPIN_EXT@2N7002K INT_HUB_TO_CPU


3 4 MODE1_HUB [6] ACCEL_INTA
MODE1 Q6631A SPIN_EXT@2N7002KDW
B [33,34] MODE1 B
FROM HUB

R25639 *SPIN_EXT@0_5%_4
TO EC

+SENSOR_POWER
2

+SENSOR_POWER +SENSOR_POWER
MODE2 Q6631B 6 1 SPIN_EXT@2N7002KDW MODE2_HUB +SENSOR_POWER
[33,34] MODE2
U6515
ADDR_SEL 1 7
SDO VDD R25623
Internal Sensor HUB(Reserve) SDA_GSENSOR_MB 2
SDX SDA VDDIO
3 SPIN@0_5%_2

SCL_GSENSOR_MB 12 11 ADDR_SEL C96907 C20133 C20134


SCX SCL VDDIO PS 0: ADDR: 0X18
+SENSOR_POWER [email protected]/6.3V_2 [email protected]/6.3V_2 SPIN@10u/6.3V_4
INT1_GSENSOR_MB 5 8
1: ADDR: 0X19

DNC
GND
INT1 GNDIO
INT2_GSENSOR1 6 9
2

TP1310 R25624

CSB
INT2 NC GND *SPIN@0_5%_2
Q6653 3 1 **SPIN_INT@2N7002K DB_GSENSOR_INT
[6] GS_HUB_INT2#
SPIN@BMA253
4

10
R69082 *SPIN_INT@0_5%_4

+SENSOR_POWER

Vinafix.com
2

+3V_S5
R69016 1 2 *[email protected]_1%_2
+3V_S5
Q6637 3 1 **SPIN_INT@2N7002K INT1_GSENSOR_MB
[6] GS_HUB_INT1# LDO S5
5

R68998 *SPIN_INT@0_5%_4
MODE1 Q6638A 3 4 *SPIN_INT@2N7002KDW MODE1_ISH [6]
+SENSOR_POWER

FROM ISH
5

TO EC

A +3V_S5 A
Q6567A 3 4 **SPIN_INT@2N7002KDW SDA_GSENSOR_MB R69017 1 2 *[email protected]_1%_2
[6] ISH_I2C1_SDA +3V_S5
2

R67873 *SPIN_INT@0_5%_4

+SENSOR_POWER MODE2 Q6638B 6 1 *SPIN_INT@2N7002KDW MODE2_ISH [6]


2

Q6567B 6 1 **SPIN_INT@2N7002KDW SCL_GSENSOR_MB


[6] ISH_I2C1_SCL
R67875 *SPIN_INT@0_5%_4 Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
To INT_HUB@MB-Gsensor Size Document Number Rev
SENSOR HUB/G Sensor 1A

Date: Tuesday, October 06, 2020 Sheet 41 of 62


5 4 3 2 1
5 4 3 2 1

To GMR Board
CN4
GMR on MB
U6525
42
LID# 6 7 LID# R67864 SPIN@1K_1%_2 LID_OPEN_GMR 4 1 TABLET_MODE
[25,33] LID# 5 6 G1 8 OUT1 OUT2
4 5 G2 3 2
+3VPCU_GMR 4 +3VPCU_GMR VDD GND
3
D TABLET_MODE 2 3 D
[33,34] TABLET_MODE 1 2 C96343 SPIN@HGDEDM013A
1 [email protected]/6.3V_2

SPIN@50506-0060N-V01

+3VPCU R68985 *SPIN@Short_0603 +3VPCU_GMR

+3V_RTC R68986 *SPIN@0_5%_6

HOLE4 HOLE5 HOLE6


*H-TBC264IC146D146P2 *H-TBC264IC146D146P2 *H-TBC264IC146D146P2

C EMI click S1 S2
Hole C

*CLIP-39X35-100X18-3P *CLIP-39X35-100X18-3P

1
3 2 3 2 HOLE12
H-TBC236IC166D126P2
1

HOLE15 HOLE16 HOLE18


1 *O-Z8I-2P2 *O-Z8I-1P2 *H-TBC354IC158D118P2

WiFi Nut

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1
HOLE2
EV@H-TBC244IC166D126P2

HOLE14 HOLE17 HOLE22 HOLE27


B HOLE13 HOLE21 *h-z8ia-1p2 *h-z8ia-5p2 *O-Z8IA-B2P2 *O-Z8IA-B1P2 B
*H-TC354IC158BC315D118P2 *H-C354D177P2
1

1
VGA Nut

1
HOLE3
EV@H-TBC244IC166D126P2
HOLE23 HOLE24 HOLE32
*H-C315D118P2 *h-z8i-1p2 *O-ZI8-3P2
1

1
VGA Nut

A A

HOLE35 HOLE28 HOLE31 HOLE33 HOLE34


*H-S157D157N *H-C106X87D106X87N *H-C87D87N *2d-barcode-8x8-s *2D-BARCODE-8X8-S
Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1

1
1

1A
GMR Sensor Conn 15
Date: Tuesday, October 06, 2020 Sheet 42 of 62
5 4 3 2 1
5 4 3 2 1

NFC
+3V +5V
+3V

R67557
+3V +3V

R67561
43
*[email protected]_5%_2 *[email protected]_1%_2

2
R67560 R67565
Q6555 3 1 NFC@2N7002KTB NFC_INT
[12] IRQ_R
*NFC@Short_0603 *NFC@Short_0603
D D
CN58
17

R67555
+VDD_IO *NFC@10K_1%_2
15
14 NFC_SWP
13 +MOD_VUP TP13163
12 NFC_INT +3V +3V
11 +VDD_SIM
10 NFC_I2C_SDA
9 NFC_I2C_SCL
8 R67571
7 NFC_RST#_Q [email protected]_1%_2
6 NFC_DWL_REQ
5 SWP_PWR

2
4 TP13164
3 +VDD_SIM Q6559 3 1 NFC@2N7002KTB NFC_I2C_SDA
2 [6] I2C3_SDA_NFC
1
R67564 *NFC@0_5%_4
16

R67562
NFC@51619-01501-V03 *NFC@0_4/S

+VDD_IO

+3V +3V

C C

R67568
[email protected]_1%_2

2
Q6556 3 1 NFC@2N7002KTB NFC_I2C_SCL
[6] I2C3_SCL_NFC

R67570 *NFC@0_5%_4

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R67572 R67573
*[email protected]_1%_2
*[email protected]_5%_2

2
Q6557 3 1 NFC@2N7002KTB NFC_RST#_Q
[12] NFC_RST#

R67566 *NFC@0_5%_4
B B

+3V +3V +3V

R67556 R67563
*[email protected]_1%_2
*[email protected]_5%_2

2
Q6558 3 1 NFC@2N7002KTB NFC_DWL_REQ
[12] DWL_REQ

R67567 *NFC@0_5%_4

R67569
NFC@10K_1%_2

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
NFC
Date: Tuesday, October 06, 2020 Sheet 43 of 62
5 4 3 2 1
5 4 3 2 1

Card Reader (CRD) TP96 TP98 TP97


Short SD Card Conn 44

14

13

15
CN62

SD_D2/MS_D5
SD_D3/MS_D4

GND#2
C1649 1u/10V_2

Hole#2

Hole#1
XD_D7
D D

SP14

SP11
V18
R752 6.2K_1%_2

24
23
22
21
20
19
U40 SD_D2/MS_D5 R67895 22_5%_2 SD_D2/MS_D5_R 1
DAT2

V18
XD_D7
SP14
SP13
SP12
SP11
+3V SD_D3/MS_D4 R67896 22_5%_2 SD_D3/MS_D4_R 2
RREF 1 18 SD_CMD CD/DAT3
2 RREF SP10 17 GPIO0 SD_CMD R67899 22_5%_2 SD_CMD_R 3
[11] USBP1-_CR DM GPIO0
3 16 SP9 TP104 CMD
R753 *Short_0603 +3V_CR [11] USBP1+_CR 4 DP SP9 15 SD_CLK TP103 4
+VCC_XD 5 3V3_IN SP8 14 SP7 VSS#1
SDREG 6 CARD_3V3 SP7 13 SD_CDZ TP102 +VCC_XD F1 1 2 SMD0603P100SLR_1A_6V 5
SDREG SP6

XD_CD#
VDD
SD_CLK R67532 22_5%_2 SD_CLK_R 6
TAI - SOL

SP1
SP2
SP3
SP4
SP5
C1650 C1652 C1651 25 CLK
4.7u/6.3V_4 1u/10V_2 GND_PAD 7
0.1u/6.3V_2
RTS5170-GRT VSS#2

7
SD_WP/MS_D1 8
9
SD_D1/MS_D710
SD_D0/MS_D611
12
SD_D0/MS_D6 R67897 22_5%_2 SD_D0/MS_D6_R 8
DAT0
C1653 SD_D1/MS_D7 R67898 22_5%_2 SD_D1/MS_D7_R 9
DAT1

XD_CD#
0.1u/6.3V_2
SD_WP/MS_D1_R 10
C C

SP2

SP5
WP SW
SD_CDZ_R 11
CD SW

EMI TP99 TP100 TP101

SD_CLK_R

GND#1
SD_CMD_R +VCC_XD

SD_D0/MS_D6_R 156-1000302610
Normal Close

12
C96320 C96319
SD_D1/MS_D7_R 4.7u/6.3V_4 0.1u/6.3V_2

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SD_D2/MS_D5_R

SD_D3/MS_D4_R

C1648 C1647 C1643 C1644 C1645 C1646


5.6p/25V_2 5.6p/25V_2 5.6p/25V_2 5.6p/25V_2 5.6p/25V_2 5.6p/25V_2

B B

+3V +3V

R67865 R67888
10K_1%_2 10K_1%_2
SD_CDZ SD_WP/MS_D1
3

2 R67539 *0_4/S SD_CDZ_R 2 R67887 *0_4/S SD_WP/MS_D1_R

Q6565 Q6570
2N7002K 2N7002K
1

For Connector Normal Close

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
CardReader
Date: Tuesday, October 06, 2020 Sheet 44 of 62
5 4 3 2 1
5 4 3 2 1

USB3.0 DB (UB3)
+5V_S5
USB3.0 DB (UB3)
CN48
45
23
1 +USBPW RD2
+USBPW RD2 2
C524 U18
3
1u/10V_2 Close USB3.0 4
5 1
IN OUT 5
D 6 +3VPCU D
2 BATLED1#
GND 7 BATLED1# [30,33]
8 USBP9-_DB_USB USBP9-_DB
USBON# 4 3 C527 C528 C529 R67461 P2_P2SPIN@0_5%_4 USBP9-_DB [11]
[24,33] USBON# /EN /OC 9 USBP9+_DB_USB USBP9+_DB
470p/50V_4 0.1u/6.3V_2 *100u/6.3V_12 R67462 P2_P2SPIN@0_5%_4 USBP9+_DB [11]
10
11
G524B2T11U
12
[2] USB_OC2# 13 USB30_RX4- [11]
14 USB30_RX4+ [11]
Enable: Low Active 15
BCD:AL002822000 AP2822HKETR-G1 (2.5A) 16
17 USB30_TX4- [11]
GMT:AL000524007 G524B2T11U (2.5A) 18 USB30_TX4+ [11]
GMT:AL000524009 G524D2T11U (1.5A) 19
PW RLED#
20 PW RLED# [30,33]
SUSLED#
21 SUSLED# [30,33]
BATLED0#
22 BATLED0# [30,33]
24

P2_P2SPIN@51540-02201-V01

Place close
RS232 DB (UB2)
C CN55 C

17
1 +USBPW RD2
2
3
4
5 +3VPCU
6 USBP9-_DB_RS232 R69070 RS232@0_5%_4
7 USBP9+_DB_RS232 R69071 RS232@0_5%_4
8
9 PW RLED#

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10 SUSLED#
11 BATLED0#
12 BATLED1#
13
14
15
16

18
RS232@51619-01601-V01

MB to LTE
B B

CN49 +5VPCU
31

+3V_S5

Vinafix.com
1
2
3
4
5 R69065
6 DDR4_SUSON_2V5 [33,52]
7 EN_3V_DX_LTE [33] 10K_1%_2
8 PLTRST# [13,19,28,30,32,33,39]
9 PCIE_W AKE# [13,28,32]
10 LTE_OFF_ODL [33]
11 USIM_DET [33]
12 EC_SIM_DET [33]
13 EC_SIM_SW # [33]
14 LTE_BODY_SAR_ODL [33]
15
16 +1.8V_S5
17
18
19 USBP3+_LTE [11]
20 USBP3-_LTE [11]
21
22 2ND_MBCLK [33,34,46]
23 2ND_MBDATA [33,34,46]
24
25 BOARD_ID8_SIM_Type1 [13,15,33]
A 26 BOARD_ID9_SIM_Type2 [13,15,33] A
27
28
29 +3V
30
32

LTE@51540-03001-V01 Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
LTE DB
Date: Tuesday, October 06, 2020 Sheet 45 of 62
5 4 3 2 1
5 4 3 2 1

Thermal Sensor(THM)
+3V_THM
46
+3V_THM

D R67855 *Short_0603 C96269 0.1u/6.3V_2 D


+3V
Base: PIN 1
R67858 Emitter: PIN 2
2.2K_5%_2 Collector: PIN 3
U2

5
3 4 MBCLK_THM 8 1 3
[33,34,45] 2ND_MBCLK SMBCLK VCC H_THRMDA1 2 Q6544
Q6564A MBDATA_THM 7 2 METR3904-G
2N7002KDW SMBDATA DXP C96270 1
+3V_THM 6 3 2200p/25V_2 H_THRMDC1
ALERT DXN
4 5
THERM GND

G781P8
R67857
2.2K_5%_2
Address 98H
2

6 1
[33,34,45] 2ND_MBDATA

C
Q6564B C
2N7002KDW

+3V_THM

R69026 R69027
*10K_1%_2 *10K_1%_2
2

3 1 Thermal_SHDN#
[4,17,18] PM_THRMTRIP#
*METR3904-G

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Q6640

+3V_THM C96271 0.1u/6.3V_2


Base: PIN 1
Emitter: PIN 2
Collector: PIN 3
B U6517 B

MBCLK_THM 8 1
SMBCLK VCC
MBDATA_THM 7 2
SMBDATA DXP C96272
6 3 2200p/25V_2
ALERT DXN
Thermal_SHDN# R67422 *0_5%_2 4 5
THERM GND

G781-1P8

Address 9AH

A A

Quanta Computer Inc.


PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
Thermal Sensor(THM)
Date: Tuesday, October 06, 2020 Sheet 46 of 62
5 4 3 2 1
5 4 3 2 1

+VCCST GENERATION
47
+5V_TCSS

+VCC1.05_OUT_FET
Premium Segment
R68915 *0_5%_4 C96891
+VCCST: 0.75A
+5V_S5 +5V_TCSS
*[email protected]/6.3V_2 <= 10ms, full load ready
+5VPCU R68914 *Short_0402 R68949 *debug2@0_5%_2 C96892
[33,51,52,54] SUSON
22u/6.3V_6

3
+VCCST
MAINON R68841 *debug2@0_5%_2 VCCST_EN_2 1
[33,51,52,54,55] MAINON 4 +VCCST_EN VCCST_EN_1 2
R68840 *debug2@47K_1%_2
2
+3V_S5 R68916 *Short_0402 +3V_TCSS Q6609
D U6560 C96893 EMF11N02J R68842 D

1
+3VPCU R68917 *0_5%_4 *debug2@M74VHC1GT08DFT2G *1000p/25V_2
*Short_0805
+VCCST_S2
+3V_TCSS +3V_TCSS

+3V_TCSS R68844 *Short_0402


R68843 C96895 C96896
100K_1%_2 C96894 0.1u/6.3V_2 *10u/6.3V_4
0.1u/6.3V_2 +3V_TCSS

5
R68845 +VCCST
100K_1%_2 VCCST_OVERRIDE_EN 2
4 R68846 *Short_0201
1 +5V_TCSS

3
C96897
2 U6561 *0.1u/6.3V_2 R68847
74AUP1G32SE-7 *22_5%_8

3
3
Q6611 Q6610

5
2N7002K R68854

1
R68848 *Short_0201 2 DDTC144EUA-7-F 2 *1M_1%_2 VCCST_DIS2
[13] VCCST_OVERRIDE
4 R68853 *0_5%_4

3
R68850 *Short_0201 +3V_TCSS 1
[13] VCCST_PWRGD_TCSS
R68851 [13,33,53] SUSB# SUSB# R68849 *Short_0201 U6562 Q6597A

1
100K_1%_2 *74AUP1G32SE-7 VCCST_DIS1 5 *2N7002KDW

6
MAINON R68852 *0_5%_2 C96898 R68855

4
*0.1u/6.3V_2 2 *2M_1%_2

5
Q6598B
C VCCAUX_VID0 2 *2N7002KDW C
[14,54] VCCAUX_VID0

1
4 R68856 *0_5%_2 VCCAUX_VID
VCCAUX_VID1 1
[14,54] VCCAUX_VID1
U6563
*74AUP1G32SE-7

3
C96904
*0.1u/6.3V_2

+VCCSTG GENERATION +5V_TCSS


+VCC1.05_OUT_FET Premium Segment
Vcc_STG: 0.15A

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<= 10ms, full load ready
C96883
*0.1u/6.3V_2 C96882
22u/6.3V_6
Ramp up 10uS < TR < 65uS

3
+VCCSTG
R68953 *0_5%_2 R68828 *0_5%_2 VCCSTG_EN 1
[13,30,33] SLP_S0# 4 VCCSTG_EN_1 VCCSTG_EN_2 2
R68829 *866_1%_4 Q6607
SUSB# R68951 *0_5%_2 2 DMG3414U-7
C96884 R68830
MAINON R68950 *0_5%_2 *0.1u/6.3V_2 U6557

1
*M74VHC1GT08DFT2G C96885 C96886 *Short_0805
*1000p/25V_2 0.047u/25V_4
+VCCSTG_S2

B B

+3V_TCSS C96887 C96888


0.1u/6.3V_2 *10u/6.3V_4

R68831 866_1%_2

C96889
0.1u/6.3V_2 +3V_TCSS +VCCSTG
Volume : VccSTG gated by SLP_S3#i, t is recommended by CPU_C10_GATE#.
5

Premium : VccSTG gated by CPU_C10_GATE# VCCST_OVERRIDE_EN 2


4 R68832 *Short_0201 +5V_TCSS
R68952 *Short_0201 R68834 *Short_0201 1 C96890 R68833
[13] CPU_C10_GATE#
U6558 0.1u/6.3V_2 22_5%_8
74AUP1G32SE-7
3

R68835

5
1M_1%_2

3
2
4 R68857 *debug2@0_5%_4
VCCAUX_VID 1 VCCSTG_DIS1 5

U6559 Q6608A
3

*74AUP1G32SE-7 2N7002KDW

4
6
R68836
2M_1%_2
2

Q6608B
A VCCST_OVERRIDE_EN D13149 2 2N7002KDW A

1
3 *BAT54CW R68837 *debug2@0_5%_4
R68838 *0_5%_2 1

VCCAUX_VID0 D13150 2

VCCAUX_VID1 1
3 *BAT54CW Quanta Computer Inc.
PROJECT : Z8IA_ZAIA
Size Document Number Rev
1A
VCCST,VCCSTG
Date: Tuesday, October 06, 2020 Sheet 47 of 62
5 4 3 2 1
5 4 3 2 1

47
ADP=19V Type C PD=20V/15V
PQ8001 PQ8002
PJ8000 +VAC_IN ADP_EN : Hi -> Vg=19V AONS21357 VADPBL TYPEC1_USB0 AONS21357 TYPEC1_USB0_PD
ADP_EN : Lo -> Vg=6.3V
3
ADP_ID [50]

D
SIGNAL
3 1. Vs=20V 3
D 2. Vs=15V D
(+) PIN
1 Vs=19V 2 5 2 5
5 1 1

P4SMAFJ20A
4

G
1

1
PD8000
2
(-) SPRING & SHELL

4
SP@30738-11202-001 2 PQ8003 PC8003 PR8002 2 PQ8004 PC8000 PR8004
BSS84 0.1u/50V_6 220K_1%_2 BSS84 0.1u/50V_6 220K_1%_2

2
PR8001 PR8003
Double Check ADP-IN Connector with ME 20K_1%_2 20K_1%_2

3
PC8001 PC8002
0.1u/50V_4 2200p/50V_4
PR8005
10K_1%_2 PR8006 PR8007
DC Jack Contact Sequence ADP_EN : Hi -> Vg=9.5V 200K_1%_2 10K_1%_2 1. Type C=20V : 1. Type C=20V :
ADP_EN : Lo -> Vg=19V (1) CCG5_CTRL : Lo -> Vg=20V (1) CCG5_CTRL : Lo -> Vg=6.7V
(2) CCG5_CTRL : Hi-Z -> Vg=6.7V (2) CCG5_CTRL : Hi-Z -> Vg=20V
PR8008 PR8009
2. Type C=15V : 2. Type C=15V :
1. GND Pin (-) Contact 220K_1%_2 (1) CCG5_CTRL : Lo -> Vg=15V 110K_1%_2 (1) CCG5_CTRL : Lo -> Vg=5V
EC_VCC (2) CCG5_CTRL : Hi-Z -> Vg=5V (2) CCG5_CTRL : Hi-Z -> Vg=15V

3
2. PWR Pin (+) Contact PR8010 *Short_0201 2 PQ8000
+3V_LDO_EC
PJA138K PR9277
+3VPCU PR8011 *0_5%_4 *0_5%_4
3. Signal Pin Contact

1
PR8012
100K_1%_2 PQ8005A PQ8005B

6
PR8014 2N7002KDW 2N7002KDW PR8015
*Short_0201 *Short_0201
PR8013 *Short_0201 5 2 TP13384
[36] ADP_EN [36] CCG5_VBUS_C_CTRL_P1

1
C PR8016 PR8017 C

ADP Switch Type C Switch 300K_1%_2 100K_1%_2


ADP_EN (PQ8001) CCG5_CTRL (PQ8002)

Hi ON Low ON
1. Type C=20V :
Low OFF High-Z OFF (1) CCG5_CTRL : Lo -> Vg=0V
(2) CCG5_CTRL : Hi-Z -> Vg=12V 2020/03/25 :
2. Type C=15V : CCG5 DOESN'T NEED DISCHARGE
(1) CCG5_CTRL : Lo -> Vg=0V RESERVE IT
(2) CCG5_CTRL : Hi-Z -> Vg=9V

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+VAC_IN +3VPCU +3V_LDO_EC

to Charger

PR8020 PQ8006 PQ8007


PR8018 PR8019 *Short_0201 TYPEC1_USB0_PD AONS21357 PVADPTR AONS21357 VADPBL
549K_1%_4 *0_5%_4

D
3 3

S
5 2 2 5
1 1
1

B TYPEC1_USB0_PD VADPBL B

G
G
Vb=3.17V 2

1
4

4
PQ8008
3

PMBT3906 PD8001 PR9280


1

PR9281 PDZ5.1B *Short_0201


PR8021 2 PQ8011 *Short_0201

2
76.8K_1%_4 PMBT3906
PR8025
PR8026
3

3
*1M_5%_4
ADP_DET *Short_0201 ADP_DET [36]
PQ8009 2 2 PQ8010
PR8022 BSS84 BSS84 PR8024
47K_1%_2 47K_1%_2
PR8027 PR8029

1
33K_1%_4 PR8028 100K_1%_2 PR8023
ADP Insert ADP_DET

Q2
3 4 4 3

Q2
220K_1%_2 470K_1%_2

6 5 5 6
Y Hi
1 2 2 1
PVADPTR PVADPTR

Q1

Q1
PR8000 PR8030
N Low 100K_1%_2 PR9279 PQ8012 PQ8013 PR9278 100K_1%_2
*Short_0201 MMDT2907A-7-F MMDT2907A-7-F*Short_0201
PR8031 PR8032
470K_1%_2 470K_1%_2

A A

Vi compare Vo (=PVADPTR)

TYPEC1_USB0 > VADPBL TYPEC1_USB0

TYPEC1_USB0 < VADPBL VADPBL Quanta Computer Inc.


PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
ADP-IN & TYPE-C 1A

Date: Tuesday, October 06, 2020 Sheet 48 of 62


5 4 3 2 1
5 4 3 2 1

Dead Battery
+VAC_IN [48,50]
TYPEC1_USB0 [36,37,48]

V3A_VBYP [51]
+3V_LDO_EC [33,34,36,48,51]
49
+3VPCU [12,13,14,25,26,28,30,31,32,33,35,36,37,42,45,47,48,50,51]

+5VPCU [12,24,31,36,37,45,47,51,58]

D D

For EC
+VAC_IN TYPEC1_USB0

RT6256B, LDO=3.3V
3.56V
PD8002 PD8003
MMBD4148TS MMBD4148TS EC_VSTBY_FSPI +3V_LDO_EC PQ8014 V3A_VBYP
PJA3411
PD8004
PR8033 PU8000
1 5 2 1 1 3 PR8034
VIN OUT
*Short_0402 2 *Short_0402 +3VPCU
PC8005 GND PR8036 PC8006 RB521S30
R1

2
1u/25V_4 3 4 18.7K_1%_4 2.2u/10V_4 PR8037 *0_5%_4
PR8035 EN ADJ

IDEA_G_3VLDO
10K_1%_2 AP2204K-ADJTRG1
+3VPCU

PR8038 R2 PR8039
*10K_1%_2 10K_1%_4
PR8040 PC8007
3

PR8041 10K_1%_2 0.1u/25V_4


2 PQ8015
C [33,51] SYS_HWPG *Short_0201 PR8042 PR8044 PQ8016 +3V_LDO_EC C
2N7002K
1M_1%_2 510K_5%_2 MMDT2907A-7-F
VOUT = 1.24V(1+(R1/R2))

Q2
PR8043 3 4
1

1M_1%_2 =3.558V 6 5 PR8045 220K_5%_2

V3A_VBYP PR8046 1K_1%_21 2 PR8047 220K_5%_2

Q1
+3VPCU PR8048 *1K_1%_2

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+5VPCU +5V_PD

+VAC_IN TYPEC1_USB0 For CCG5 PD8005


PR8049 *0_5%_4 2 1

4.57V VL
*RB521S30
PD8006 PD8007 +4.6V_PD_C1 PR8050 *0_5%_4 PR8051
*MMBD4148TS *MMBD4148TS PQ8017 *0_5%_4
B RT6258C, LDO=5V *PJA3411 B
PR8052 PU8001
*0_5%_4 1 5 3 1
VIN OUT
2
PC8008 GND PC8009 PC8010
R1

IDEA_G_5VS5_PD_C1 2
*1u/25V_4 3 4 PR8053 *2.2u/10V_4 *2.2u/10V_4
PR8054 EN ADJ *27.4K_1%_4
*10K_1%_2 *AP2204K-ADJTRG1

+3VPCU

PR8055 +5V_PD
PR8058
R2 *10.2K_1%_4 PQ8018 PR8059 PR8056
*10K_1%_2 *MMDT2907A-7-F *1M_1%_2 *1M_1%_2
PR8057 PC8011 4 3

Q2
3

PR8060 *10K_1%_2 *0.1u/25V_4


SYS_HWPG *0_5%_4 2 PQ8019 PR8061 *220K_5%_2 5 6
*2N7002K
VOUT = 1.24V(1+(R1/R2)) PR8062 *220K_5%_2 2 1 PR8063 *1K_1%_2 +4.6V_PD_C1
=4.57V
Q1
PR8064
1

*1M_1%_2

A A

Quanta Computer Inc.


PROJECT :
Size Document Number Rev
1A
Dead Battery
Date: Tuesday, October 06, 2020 Sheet 49 of 62
5 4 3 2 1
5 4 3 2 1

PVADPTR PQ1
AONS32304S
VA2 PQ9054
AONS32304S PR3
0.01_1%_0612
+VIN PQ2
AONS32306 50

D
3 3 3

S
5 2 2 5 5 2
1 1

D
0.047u/50V_6

S
1

0.1u/50V_4

G
G
G

PC2

*0.01u/50V_4
24780_ACN

PC5
PC1 PR2 *Short_0201

PC17
1000p/50V_4 PC12 PC7
D 0.1u/50V_4 2200p/50V_4 D
PR1 *Short_0201 24780_ACP

PR29 PR28
4.02K_1%_4 4.02K_1%_4

PR4
0_5%_6
PR23 UMA DIS
20.5K Ohm 16.9K Ohm BAT-V
CS32052FB21 CS31692FB11 24780_ACP

78W 95W 24780_ACN

1
PD9002 PR7
BAT54CW PC36 PC25 PC35 10_1%_6
+VAC_IN 0.1u/50V_4 0.1u/50V_4 0.1u/50V_4

24780_CMSRC
3
PR9275
*Short_0201 24780_ACDET
PR235

1
1M_5%_4 PU1
PR16 3 18 24780_BATDRV

ACN
ACP
CMSRC BATDRV
3

PR9276 20_5%_12
*Short_0201 2 17 24780_BATSRC +VIN
[48] ADP_ID PQ17 BATSRC
C 2N7002KW 24780_ACDRV 4 REGN6V C
PR230 PR31 ACDRV
1

220K_1%_4 93.1K_1%_4 24780_VCC 28


REGN6V VCC 24 24780_REGN PC9
ACDET=10.5V REGN 2.2u/10V_4
PC16 PC172 PC170
0.47u/25V_6 2200p/50V_4 10u/25V_6
PR39 PR211 PR11
100K_1%_4 27.4K_1%_4 0_5%_6
24780_ACDET 6 25 24780_BST PQ30
ACDET BTST

5
AONR32320C
PR30 *Short_0201 5 PC15 D
[33] ACIN ACOK 0.047u/50V_6
MBDATA PR19 *Short_0201 11 26 24780_DH 4 G
PR40 SDA HIDRV S
100K_1%_4 MBCLK PR17 *Short_0201 12 PR209 BAT-V
SCL

1
2
3
PL5 0.01_1%_0612
ICMNT PR32 *Short_0201 7 6.8uH/4.5A_7x7x3
[33] ICMNT IADP 27 24780_LX 1 2 BAT-V
IDCHG_R PR26 *Short_0201 8 PHASE
[33] IDCHG_R IDCHG
(1) BQ24780S : 1 μA/W (default)
PMON PR25 *Short_0201 9 PQ29
(2) RT3612EB : PSYS = 1.6V PMON

5
https://vinafix.com/
[53] PMON 100p/50V_4 AONR32320C PR33

100p/50V_4
*100p/50V_4
PC18

PC73

PC37
D *4.7_5%_6
CS32052FB21 RES CHIP 20.5K 1/16W +-1%(0402) For 78W PR210 PR208
PR23 23 24780_DL 4 G 0_5%_2 0_5%_2
*[email protected]_1%_4 LODRV S
CS31692FB11 RES CHIP 16.9K 1/16W +-1% (0402) For 95W

1
2
3
CS31372FB11 RES CHIP 13.7K 1/16W +-1%(0402) For 116W 24780_BM# 16
+3VPCU TB_STAT 24780_SRP
PR9 10K_5%_4 PR5 PC6 PC19 PC165 PC164 PC166
PC167 24780_CMPOUT 14 *Short_0201 0.1u/25V_4 *680p/50V_6 2200p/50V_4 22u/25V_8 22u/25V_8
0.1u/50V_4 PR15 *10K_5%_4 CMPOUT 20 24780_SRP 24780_SRN
B 24780_ILIM 21 SRP B
ILIM PC3
PC168 PR204 24780_CMPIN 13 CMPIN PR6 0.1u/25V_4

PROCHOT
*100p/50V_4 316K_1%_4 *Short_0201

BATPRES
24780_SRN

GND#10
GND#11
19

GND#8
GND#9

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
PR206 PR207 SRN
100K_1%_4 100K_5%_4 PC4
BAT-V 0.1u/25V_4
BQ24780SRUYR

35
36
37
38
10

15

22
29
30
31
32
33
34
PJ1
10

BI [33]
PR10 *0_5%_2
8 Double Check if BI pin PU Low PC8
7 0.01u/50V_4
6 PR14 100_5%_4 TEMP_MBAT#

*Short_0201
5 TEMP_MBAT# [33]
4

PR205
*0_5%_2
3

PR8
2 +3VPCU
1 PR18

TEMP_MBAT#
1M_5%_4
9

50458-00801-V02

PR13 PR12
100_5%_4 100_5%_4
REGN MAX voltage 6.5V
Double Check BATT Connector with ME
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
H_PROCHOT#
MBCLK [22,33]
H_PROCHOT# [4,14,33,53] =0.793V for 3.965A current limit
A A
MBDATA [22,33]
ILIM=0.793V
PR22 Rsr = 0.01ohm
1

PC756 *100K_1%_2
*0.1u/16V_4
PC10 PC11
*47p/50V_4 *47p/50V_4

Quanta Computer Inc.


2

PD3 PD4 +VCCST


PDZ5.6B PDZ5.6B PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
1A
Charger (BQ24780S)
Date: Tuesday, October 06, 2020 Sheet 50 of 62
5 4 3 2 1
5 4 3 2 1

+VIN [25,50,52,53,54,55,56,57,58]

51
+3VPCU [12,13,14,25,26,28,30,31,32,33,35,36,37,42,45,47,48,49,50]
+5VPCU [12,24,31,36,37,45,47,49,58]
VL [49,55]

+5V [25,26,27,29,31,33,38,40,43,55]
+5V_S5 [13,24,45,47,52,53,54,56,57,58]
+3V [3,4,9,10,11,12,13,15,17,18,20,22,25,26,27,28,29,30,31,32,33,35,38,39,40,41,43,44,45,46,52,53,54,55,56,57,58]
+VIN PR6000 PC6001
+3V_S5 [3,4,6,8,10,13,14,28,29,30,31,32,33,35,39,41,45,47,52,54,55]
10_1%_6 0.1u/25V_4
V3A_BOOT_R

+3VPCU

2200p/50V_4
0.1u/25V_4

0.1u/25V_4
3.3 Volt +/- 5%

PC6000

PC6002

PC6003
PR6001
PC6004 PC6005 *4.7_5%_6
D
10u/25V_6 10u/25V_6 TDC : 6A D

V3A_BOOT +V3A_LX_R Width : 240mil


FSW : 500KHZ
PC6006
*680p/50V_6
To Thermal Protection (1) USM : 0.8V-1.7V
V3A_EN (2) Normal Mode : >2.3V PU6000

1
RT6256BGQUF +3VPCU
PR6002 +3VPCU +3VPCU
PL6000

VIN

BOOT
SYS_SHDN# PJ6001
*Short_0201 1uH/11A_7x7x3
[4,33,55] SYS_SHDN# +V3A_LX +V3A_OUT
6 2 1 2
PR6003 10K_1%_2 EN LX#1
+3VPCU

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

0.1u/16V_4
PR6005

*22u/6.3V_6

*22u/6.3V_6
SYS_HWPG PR6004 *Short_0201 V3A_PWRGD 7 3 *short3720

PC6008

PC6009

PC6014

PC6010

PC6011

PC6012

PC6013
*Short_0201
[33,49] SYS_HWPG PGOOD LX#2
PR6006 PC6007
10K_1%_2 0.1u/16V_4 PR6007 100K_1%_2 TDC : 4.03A TDC : 3.23A
11 10 V3A_VOUT PR6008
PEAK : 5.37A PEAK : 4.31A
LDO=3.3V/100mA
LDO3 VOUT *Short_0201 Width : 180mil Width : 140mil
PC6015 PC6016
PR9268 V3A_VOUT 8 4 1u/25V_4 1u/25V_4
AGND PGND

6
MAINON *0_5%_2

VCC
+3V_S5 +3V

FF

VIN1

VIN2
PR9244 PR9245
3

PR9269 PC6017
KL_NO_EC *0_5%_2 2 0.1u/16V_4 *Short_0805 *Short_0805
[33] KL_NO_EC

12

9
SYS_SHDN# V3A_VBYP PR6011 PR6010
PR9285
PQ6000 1K_1%_4 *1K_1%_4
SUSON *Short_0201 2N7002K PR6009 PC6018 PC6019 13 8 PC6020 PC6021
1

[33,47,52,54] SUSON +VCC_V3A VOUT1 OUT2


10K_1%_2 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 10u/6.3V_6
PC6023 PU6001
4.7u/6.3V_4 PC6022 AOZ1331ADI
PR6012 PC6024 1u/25V_4 +5VPCU PR6013 4 11
*100K_1%_4 10p/50V_4 PC6025 VBIAS GND1
*Short_0402 15
GND2
PR6015 PR6016
C 0.1u/16V_4 C
PR6014 S5_ON *Short_0201 3 5 *Short_0201 MAINON MAINON [33,47,52,54,55]
[33,55] S5_ON ON1 ON2

CT1

CT2
*10K_1%_4
Power Auto Recovery VCC=5V
High frequency noise eliminate circuit (Stuff on dead battery page) (DON'T Connect to External Load) PC6026 PC6027

12

10
*0.1u/16V_4 *0.1u/16V_4
V3A_VBYP
+3V_LDO_EC
PR6017
*0_5%_6
+3V_LDO_EC V3A_VBYP PC6028 PC6029
1000p/50V_4 1000p/50V_4

[33,34,36,48,49] +3V_LDO_EC

Soft-Start

+VIN

+5VPCU +5VPCU
PR6018 PC6035
2200p/50V_4
0.1u/25V_4

0.1u/25V_4

10_1%_6 0.1u/25V_4
V5P5A_BOOT_R
PC6030

PC6031

PC6034

PC6032 PC6033
10u/25V_6 10u/25V_6

PR6019 TDC : 4.13A TDC : 3.53A


*4.7_5%_6 +5VPCU PEAK : 5.5A PEAK : 4.7A
SYS_SHDN# PR6020
5 Volt +/- 5% Width : 180mil Width : 160mil
TDC : 8A

https://vinafix.com/
*Short_0201 +V5P5A_LX_R PC6036 PC6037
Width : 320mil 1u/25V_4 1u/25V_4

6
B PR6021 PC6039 PC6038 FSW : 750KHZ +5V_S5 +5V
B
10K_1%_2 0.1u/16V_4 *680p/50V_6

VIN1

VIN2
PR9248 PR9249
V5P5A_BOOT *Short_0805 *Short_0805
PR9270
MAINON *0_5%_2 PU6003 +5VPCU
5

(1) USM : 0.8V-1.7V RT6258CGQUF PC6040 PC6041 13 8 PC6042 PC6043


(2) Normal Mode : >2.3V VOUT1 OUT2
3

PR9271 PL6001 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 10u/6.3V_6


VIN

BOOT

KL_NO_EC 2 PJ6003
*0_5%_2 1uH/11A_7x7x3 PU6002
V5P5A_EN 6 2 +V5P5A_LX 1 2 +V5P5A_OUT AOZ1331ADI
PR9287 PQ6001 EN LX#1 4 11
PR6022 +5VPCU VBIAS GND1
SUSON *Short_0201 2N7002K 3

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

0.1u/16V_4
PR6023 PC6051

*22u/6.3V_6

*22u/6.3V_6
1

SYS_HWPG V5P5A_PWRGD LX#2 *short3720

PC6044

PC6045

PC6046

PC6047

PC6048

PC6049

PC6050
*Short_0201 7 15
PGOOD *Short_0402 GND2
PR6028
PR6025 PR6027 0.1u/16V_4
PR6024 *Short_0603 S5_ON *Short_0201 3 5 *Short_0201 MAINON
ON1 ON2

CT1

CT2
*100K_1%_4 VL 12 10 V5P5A_VOUT PR6026
VL LDO5 VOUT *Short_0201
PC6052 PC6053

12

10
8 4 *0.1u/16V_4 *0.1u/16V_4
AGND PGND
LDO=5V/100mA
VCC

PC6054 PC6055
FF

4.7u/10V_6 0.1u/16V_4
PC6056 PC6057
9

11

1000p/50V_4 1000p/50V_4
+VCC_V5P5A

V5P5A_VOUT

Soft-Start
PR6029 PR6030
1K_1%_4 *1K_1%_4 PC6058
1u/25V_4

A PC6059 A
10p/50V_4
VCC=5V
(DON'T Connect to External Load)
PR6031
*10K_1%_4

Quanta Computer Inc.


PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
1A
SYSTEM (RT6256B/RT6258C)
Date: Tuesday, October 06, 2020 Sheet 51 of 62
5 4 3 2 1
5 4 3 2 1

+3V
+VIN [25,50,51,53,54,55,56,57,58]
+1.2VSUS [3,5,7,17,18,58]

+VDDQ_VTT [17,18]
+VDDQ [17,18]
52
+5V_S5 [13,24,45,47,51,53,54,56,57,58]
+3V [3,4,9,10,11,12,13,15,17,18,20,22,25,26,27,28,29,30,31,32,33,35,38,39,40,41,43,44,45,46,51,53,54,55,56,57,58]
PR5001
100K_1%_2

PR5002 *Short_0201
[33] HWPG_VDDR

D *0_5%_2 D
[33,45] DDR4_SUSON_2V5 PR5003

PR5004 *Short_0201
[33,47,51,54] SUSON

OCP=11A
PC5001
*0.1u/50V_4
PR5005 +VIN
PR5006 316K_1%_4 +1.2VSUS
*0_5%_2 1.2 Volt +/- 5%

1P35V_PGOOD
PR5007
[33,47,51,54,55] MAINON
499K_1%_4
PJ5001 TDC : 6.22A

1P35V_CS
1P35V_S3

1P35V_S5
1P35V_TON +1.2VSUS_VIN
PC5000
PEAK : 8.3A
*0.1u/50V_4 Fsw=500KHz *short3720
OCP : 11A
PC5002 PC5003 PC5004 PC5005 PC5007 Width : 260mil
0.1u/50V_4 2200p/50V_4 0.1u/50V_4

10

13
10u/25V_6 10u/25V_6

9
TDC : 0.45A

S3

S5

PGOOD

TON
CS
+VDDQ_VTT PR9288 PQ5001 +1.2VSUS
PEAK : 0.6A *Short_0603 AONR32320C

5
20
Width : 20mil VTT 17 1P35V_UGATE D
2 UGATE PJ5002
PC5006 VTTSNS PR5008 PC5008 4 G
Isat=22A *short3720
10u/6.3V_4 18 1P35V_BOOT S
TDC : 0.38A 1
VTTGND
BOOT PL5000

1
2
3
+VDDQ 2.2_5%_6 0.1u/50V_4 1uH/11A_7x7x3
PEAK : 0.5A PR5009 PU5001 16 1P35V_PHASE 1 2 +1.2VSUS_TEMP

*330u/2V_7343H1.9
PHASE
Width : 20mil 100_5%_2 RT8231BGQW

0.1u/50V_4

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8
5
4 15 1P35V_LGATE

PC5009

PC5015

PC5010

PC5011

PC5012
VTTREF LGATE +

PC5016
D PR5010
19 12 1P35V_VDD *4.7_5%_6
VLDOIN VDD +5V_S5
PC5013 PC5014 4 G PR5012
0.1u/50V_4 0.047u/25V_4 PR5011 S *Short_0201
C C
PC5017 *Short_0402

1
2
3
*10u/6.3V_6 PC5019 PQ5000
PGND

VDDQ
1u/6.3V_2 AONR36326C PC5018
GND

PAD
VID

*680p/50V_6
FB
+1.2VSUS_TEMP
3

11

14

21
PR5013 PR5014
*0_5%_2 *Short_0201 2020/03/25 :
1P35V_S3 1P35V_S5
1P35V_VID

1P35V_FB

Rds(on)=15.9m ohm for HDMI re-timer IC


PR5015 PR5016
0_5%_2 *Short_0201 1P35V_VDDQ
1P35V_S3 +1.2VSUS
[3] DDR_VTTT_PG_CTRL +5V_S5 R1

https://vinafix.com/
PR5017 *0_5%_2 PR5018
8.2K_1%_2

VID Ref. Voltage Vo=0.675*(1+R1/R2)=1.2285V

3
PR5019
R2 10K_1%_2
MAIND 2
High 0.675V [55] MAIND
PQ9087
AOSS32334C
Low 0.75V

1
S3 S5 VDDQ VTTREF VTT +1.2V

OCP=11A
L ripple current S0 1 1 ON ON ON +1.2V [27,55]
=(19-1.2)*1.2/(1u*500k*19)
=2.248A S3 (mainon off) 0 1 ON ON OFF TDC : 0.22A
Vtrip=11-(2.248/2)*15.9mohm DDR=1.2285V
B
=157.028mV R1=8.2K/F_4 PEAK : 0.29A B

R2=10K/F_4 S4/S5 0 0 OFF OFF OFF Width : 20mil


Rlimit=157.028mV/5uA*10=314.06Kohm

+2.5VSUS Power Rail For DDR4


+3V_S5 [3,4,6,8,10,13,14,28,29,30,31,32,33,35,39,41,45,47,51,54,55]
+2.5V_SUS [17,18]
+2.5V_SUS
+3V_S5
PR5020
*Short_0603
2.5Volt +/- 5%
TDC : 0.75A
Vinafix.com
+3V_S5
PEAK : 1A
PC5020 Width : 40mil
10u/6.3V_4
PR5000
100K_1%_2
+2.5V_SUS
4

PR5021 PL5001
PJ5000
*Short_0201 2.2uH_2.5x2.0x1.2
VIN

[33] HWPG_2.5V 5 3 G5719LX2.5V1 2 *Short_0805


PG LX
PR5023 PR5024 PU5000
*0_5%_2 *Short_0201 G5719CTB1U PR5022
SUSON 1 2 *Short_0201
EN GND PC5021 PC5022 PC5023
VFB

PR5025 10u/6.3V_6 *10u/6.3V_6 0.1u/50V_4


*Short_0201 PC5024
DDR4_SUSON_2V5 *0.47u/6.3V_4
6

A PR5026 A
47.5K_1%_2

R1
PR5027
R2 15K_1%_2
Vo=(0.6(R1+R2)/R2)
=2.5V Quanta Computer Inc.
PROJECT : ZGI
Size Document Number Rev
1A
DDR4_+1.2VSUS (RT8231BGQW)
Date: Tuesday, October 06, 2020 Sheet 52 of 62
5 4 3 2 1
5 4 3 2 1

+VCCST +VIN [25,50,51,52,54,55,56,57,58]

53
+VCCIN [5]

+VCCST [4,5,13,47,50]
+5V_S5 [13,24,45,47,51,52,54,56,57,58]
PU7000 +3V [3,4,9,10,11,12,13,15,17,18,20,22,25,26,27,28,29,30,31,32,33,35,38,39,40,41,43,44,45,46,51,52,54,55,56,57,58]
PR7001 +5V_S5
0_5%_4 PR7002 PR7003
6.2_5%_6 2.2_5%_6
RT3612_VCC 10 22 RT3612_VIN
VCC VIN

PR7004 PR7005 PR7006 PR7007 PC7001 PC7002 PC7003


100_1%_2 *75_1%_2 45.3_1%_2 *10K_1%_2 0.1u/6.3V_2 4.7u/6.3V_4 0.22u/25V_4 +VIN_VCORE +VIN
PJ7000
D D
VR_SVID_DATA PR7008
RT3612EBGQW

10u/25V_6

10u/25V_6

10u/25V_6

10u/25V_6

0.1u/25V_4

0.1u/25V_4
2200p/50V_4
VR_SVID_ALERT# 2.2_5%_6

PC7004

PC7005

PC7006

PC7007

PC7008

PC7009

PC7010
*short3720

*15u/25V_3528H1.9
VR_SVID_CLK RT3612_PVCC 29 +

PC7000
H_PROCHOT# PVCC

3
4
9
PQ7000
PC7011 AOE6936 D1
2.2u/10V_4
PR7009
1_5%_6 DCR=1.19m-ohm+/-5%
26 RT3612_UG1 RT3612_UG1_R 1 G1
UGATE1
D2/S1 5 PL7001 +VCCIN
25 RT3612_BOOT1 PC7012 2 S1/D2 6 0.24uH/28A_7x7x3 Isat=35A
BOOT1 0.1u/25V_4 7 RT3612_PHASE1
Don't Connect Pin2 to Phase

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
27 RT3612_PHASE1

PC7013

PC7014

PC7015

PC7016

PC7017
+VREF06_RT3612 PHASE1 PR7011 PR7012
+VREF06_RT3612 PR7013 PR7010 *Short_2 *Short_2
3.9_5%_4 28 RT3612_LG1 8 G2 *2.2_5%_6
VREF_RC 12 LGATE1
VREF06 S2 SN_VCORE1
ISEN1P

10
PC7018 PC7019 ISEN1N
PR7014 PR7015 PR7016 PR7017 0.47u/6.3V_4 *2200p/25V_2
54.9K_1%_2 9.31K_1%_2 22.1K_1%_2 174K_1%_2

Close to Phase1 Mosfet +VIN_VCORE


SET1_1 SET2_1 SET3_1 TSEN_1
PR7022

10u/25V_6

10u/25V_6

10u/25V_6

10u/25V_6

0.1u/25V_4

0.1u/25V_4
2200p/50V_4
2 1

PC7020

PC7021

PC7022

PC7023

PC7024

PC7025

PC7026
3
4
9
C PR7018 PR7019 PR7020 PR7021 PQ7001 C
110_1%_2 182_1%_2 200_1%_2 1.91K_1%_2 100K_NTC_4_1% AOE6936 D1
For temp level adjust
PR7024
PINSET_TSEN PR7023 PR7025 RT3612_TSEN 21 1_5%_6 Recommand output cap:
TSEN RT3612_UG2 RT3612_UG2_R
DCR=1.19m-ohm+/-5%
10_1%_2 110K_1%_2 32 1 G1 a. 1pcs 330uF/2.5V_9m cap
RT3612_SET1 8 UGATE2 b. 13pcs 22uF/6.3V MLCC includ EE side
SET1 D2/S1 5 PL7000 c. Reserve 4pcs 22uF/6.3V MLCC
RT3612_SET2 7 1 RT3612_BOOT2 PC7027 2 S1/D2 6 0.24uH/28A_7x7x3 Isat=35A
SET2 BOOT2 0.1u/25V_4 7 RT3612_PHASE2
RT3612_SET3 6 Don't Connect Pin2 to Phase

22u/6.3V_6
SET3

330u/2.5V_7343H1.9
*330u/2.5V_7343H1.9

*330u/2.5V_7343H1.9

*330u/2.5V_7343H1.9
31 RT3612_PHASE2

PC7028

PC7029
PHASE2 PR7030 PR7031 + + + +

PC7030

PC7031

PC7032
PR7029 *Short_2 *Short_2
PR7026 PR7027 PR7000 PR7028 30 RT3612_LG2 8 G2 *2.2_5%_6
10K_1%_2 8.06K_1%_2 20K_1%_2 8.25K_1%_2 LGATE2
S2 SN_VCORE2
SET1_2 SET2_2 SET3_2 TSEN_2

10
PC7033

https://vinafix.com/
*2200p/25V_2
PR7032 PR7033 PR7034 PR7035
3.3K_1%_2 60.4_1%_2 301_1%_2 402_1%_2

PR7036 PR7037
2.43K_1%_4 3.32K_1%_4
20 RT3612_ISEN1P ISEN1P_1 ISEN1P
ISEN1P

PR7039 PR7038 PC7034


PR7040 680_1%_2 3.83K_1%_4 0.1u/25V_4 +VCCIN
10K_1%_2
ISEN1N
19 RT3612_ISEN1N ISEN1N TGL-UP3 Line 4+2 SKU(28W)
+3V
B PC7035 Performance B
PR7041 *Short_0201 RT3612_VR_READY 24 0.1u/25V_4
[4,13] IMVP_PWRGD VR_READY
PR7042 *Short_0201 RT3612_VRHOT 2 PR7044 PR7045
[4,14,33,50] H_PROCHOT# VRHOT 2.43K_1%_4 3.32K_1%_4
PR7043 *Short_0201 RT3612_VCLK 5 17 RT3612_ISEN2P ISEN2P_1 ISEN2P
TDC:43A
[5] VR_SVID_CLK VCLK ISEN2P ICCMAX:65A
[5] VR_SVID_DATA PR7046 *Short_0201 RT3612_VDIO 4
VDIO
LL=2m
PR7048 PR7047 PC7036 VBOOT= 0V
PR7049 *Short_0201 RT3612_ALERT# 3 680_1%_2 3.83K_1%_4 0.1u/25V_4
[5] VR_SVID_ALERT# ALERT RT3612_ISEN2N
18 ISEN2N
PR7050 *0_5%_2 RT3612_VRON 23 ISEN2N
[33] VRON VRON
PC9099 0.1u/6.3V_2 +3V PC7037
*0.1u/6.3V_2

0.1u/25V_4
PC7038
5

PU9006 PC7039
1 MC74VHC1G08DFT2G *100p/50V_4
4
2
[13,33,47] SUSB# RT3612_VSEN
PR9289 100K_1%_2 14
VSEN
3

PR7051 *Short_0201 RT3612_PSYS 9 PR7052


LL/IMON Compesation PSYS 15 RT3612_COMP PC7040 82p/50V_4 PC7041 390p/50V_4 100_1%_2
COMP
[50] PMON +VCCIN
PR7056
PR7053 PC7042 PR7054 23.2K_1%_4 PR7055 10K_1%_4 *Short_0201
VCCSENSE [5]
(1) RT3612EB : PSYS = 1.6V [email protected]_1%_4 *0.1u/6.3V_2
(2) Double Check PMON Setting for LL~2m@Imax=65A VSSSENSE [5]
PR7057
+VREF06_RT3612 with charger 16 RT3612_FB PC7043 *Short_0201
PR7061 FB *100p/50V_4
PR7060
18.2K_1%_4 PR7058
PR7059 IMONCPU_1 2 1 NTC1N_R RT3612_IMON 11 13 RT3612_RGND 100_1%_2
A 3.01K_1%_4 IMON RGND A
100K_NTC_4_1% for Imax~66A 33
EPAD PC7044
*100p/50V_4
Close to Phase1
Inductor PR7053 setting
PR7053 UMA DIS
PR7062
17.4K_1%_4
CS32052FB21 RES CHIP 20.5K 1/16W +-1%(0402) For 78W 20.5K Ohm 16.9K Ohm Quanta Computer Inc.
CS31692FB11 RES CHIP 16.9K 1/16W +-1% (0402) For 95W CS32052FB21 CS31692FB11
PROJECT :
CS31372FB11 RES CHIP 13.7K 1/16W +-1%(0402) For 116W Size Document Number Rev
78W 95W 3A
CPU VR IC (RT3612EBGQW-03)
Date: Tuesday, October 06, 2020 Sheet 53 of 62
5 4 3 2 1
5 4 3 2 1

+3V_S5

PR7063
*0_5%_4
+VIN [25,50,51,52,53,55,56,57,58]
+VCCIN_AUX [14]

+5V_S5 [13,24,45,47,51,52,53,56,57,58]
+3V_S5 [3,4,6,8,10,13,14,28,29,30,31,32,33,35,39,41,45,47,51,52,55]
+3V [3,4,9,10,11,12,13,15,17,18,20,22,25,26,27,28,29,30,31,32,33,35,38,39,40,41,43,44,45,46,51,52,53,55,56,57,58]
54
D D

PR7064 PR7065
*100K_1%_2 *100K_1%_2

+VIN_VCCIN_AUX +VIN
VCCAUX_VID0 VCCAUX_VID1 PR7066
PJ7001
2.2_5%_6
RT6543_VSYS

2200p/50V_4
10u/25V_6

10u/25V_6

10u/25V_6

10u/25V_6

0.1u/25V_4

0.1u/25V_4
PC7046

PC7047

PC7048

PC7049

PC7050

PC7051

PC7052
PR7067 PR7068
*100K_1%_2 *100K_1%_2 PC7045 *short3720
OCP~36A@LMOS=2.6m 0.1u/25V_4

PU7001 PQ7002

20

5
PR7070 RT6543AGQW AONS36380
158K_1%_4 D

VSYS
RT6543_CS_DSI 1 G
CS_DIS 11 RT6543_UG PR7071 4
UGATE 1_5%_6 S DCR=2.1m-ohm+/-7%
PR7072 PC7053 Recommand output cap:

1
2
3
C 5.1_1%_6 10 RT6543_BOOT a. 1pcs 330uF_2.5V_9m cap +VCCIN_AUX C
RT6543_VCC 15 BOOT PL7002 b. 4pcs 22uF/6.3V MLCC includ EE side
+5V_S5 PVCC c. Reserve 4pcs 22uF/6.3V MLCC
PC7054 0.1u/25V_4 0.22uH/23A_7x7x3 Isat=41A
RT6543_PH

330u/2.5V_7343H1.9
1u/6.3V_4 12
16 PH
VCC

0.1u/16V_4

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
+3V PR7073 10K_1%_2 PQ7003

5
RT6543_LG

PC7055

PC7058

PC7059

PC7060

PC7056

PC7057
13 AONS36312 PR7075 +
TP7000 AUX_PWRGD PR7074 *Short_0201 RT6543_PG 4 LGATE *2.2_5%_6
D
PGOOD
14 4 G
PR7076 *Short_0201 RT6543_VID1 17 PGND S
[14,47] VCCAUX_VID1 VID1

1
2
3
RT6543_VID0 RT6543_ISP

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
[14,47] VCCAUX_VID0 PR7077 *Short_0201 18 2 PC7061
VID0 ISENSEP

PC7062

PC7063

PC7064

PC7065
*2200p/25V_2
PR7079
PR7078 *10K_1%_4 RT6543_EN 19 3 RT6543_ISN 0_5%_4
[33,47,51,52] SUSON EN ISENSEN PR7081
LMOS(max)=2.6m 0_5%_4 +VCCIN_AUX

https://vinafix.com/
PR7080 *Short_0201 PC7066 8 RT6543_VOUT
[33,55] HWPG_1.8VS5 *0.1u/16V_4 VOUT
PC7067 PC7068
PR7082 *0_5%_2 5 RT6543_COMP PR7083 PR7084 PR7085
B [33,47,51,52,55] MAINON COMP B
10K_1%_4 *1.4K_1%_4 100_1%_2
RT6543_FSWSEL 9 2200p/50V_4 *470p/50V_4
+5V_S5 FSWSEL 6
PR7086 FB PC7069 PR7087 PR7088 *Short_0201
VCC_AUX_SENSE [14]
100K_1%_4 27p/50V_4 6.34K_1%_4
AGND

PR7089 7 PR7090 *Short_0201


RGND RT6543_FB VSS_AUX_SENSE [14]
100K_1%_4 PC7070
*0.1u/25V_4
PR7091
21

100_1%_2
RT6543_RGND

+VCCIN_AUX
TGL-UP3 Line 4+2 SKU(28W)
Performance
A A

TDC:16A
ICCMAX:27A Quanta Computer Inc.
DC_LL=3.3m PROJECT :
VBOOT=1.8V Size Document Number Rev
3A
VCCIN_AUX IC (RT6543AGQW)
Date: Tuesday, October 06, 2020 Sheet 54 of 62
5 4 3 2 1
5 4 3 2 1

+3V_S5 [3,4,6,8,10,13,14,28,29,30,31,32,33,35,39,41,45,47,51,52,54] +VIN [25,50,51,52,53,54,56,57,58]

55
+1.8V_S5 [14,33,34,41,45,58] +5V [25,26,27,29,31,33,38,40,43,51]
+1.8V [13,22,26,33,41]
+1.5V [26]
+3V [3,4,9,10,11,12,13,15,17,18,20,22,25,26,27,28,29,30,31,32,33,35,38,39,40,41,43,44,45,46,51,52,53,54,56,57,58]
VL [49,51]

+1.8V_S5
D 1.8Volt +/- 5% D

TDC : 3A +1.5V
PEAK : 4A 1.5Volt +/- 5%
Width : 120mil TDC : 0.39A
Double check PU high with HW +3V_S5
Double check PU high with HW PEAK : 0.52A
+3V_S5
+1.8V_S5 +1.8V_S5 +3V PC242
*4.7u/6.3V_4
Width : 20mil
PC551 PR551
*2200p/50V_6 *2.2_5%_6
PJ9005 +1.5V
*short3720 PR6416 PU3003 PJ3008

4
PR9255 PU3004 *100K_1%_2 PR284 *JW5222RSOTB_TRPBF PL14 *0.001_1%_3720

3
100K_1%_2 PL551 *0_5%_2 *2.2uH/1.67A_2.5x2.0x1.2

VIN
PR9256 [33] HWPG_1.5V 5 3 G5719LX1.5V 1 2
1uH/3.35A_2.5x2.0x1.2
*Short_0201 5213PG_1.8V 2 6 5213LX_1.8V 1 2 MAIND 2 PQ9 POK SW
[33,54] HWPG_1.8VS5 POK SW 5213FB_1.8V_S AOSS32334C PR6417

22u/6.3V_6

22u/6.3V_6
0.1u/6.3V_2

*22u/6.3V_6
PR569 *0_5%_2

PC561

PC562

PC563

PC9098

*10u/6.3V_6

*10u/6.3V_6

*0.1u/16V_4
3 5 *Short_0201 1 2 PR6414
+3V_S5

1
VIN NC [33,47,51,52,54] MAINON EN GND

PC6230

PC229

PC6231
*Short_0201
PC574 R1 PR568

FB
5213FB_1.8V
0.01u/50V_4

10u/6.3V_4

1 *22p/50V_4 20K_1%_4 PC6229


C FB +1.8V C
PC572

PC571

4 *0.47u/6.3V_4 PC9097

6
8 PGND *22p/50V_4
9 SGND 7 5213EN_1.8V
EPAD EN TDC : 0.3A

0.1u/6.3V_2
PEAK : 0.4A

PC581
PR567 R1
JW5213DFND_TRPBF R2 10K_1%_2 Vo=0.6*(R1+R2)/R2 Width : 20mil
=1.8V PR6418
*22.6K_1%_2
R2 PR283
PR566
*15K_1%_4 Vo=(0.6(R1+R2)/R2)
*Short_0201
=1.504V

+3V_S5

5
1
4 S5_ON [33,51]
2
SLP_SUS#_EC [13,33]
PU9005 +VIN +3V +5V +1.2V +1.8V +VIN

3
B *M74VHC1GT08DFT2G B

PR116 PR106 PR126 PR9286 PR9227 PR59


Thermal protection 1M_5%_6 *22_5%_8 *220_5%_8 22_5%_8 22_5%_8 1M_5%_6

MAINON_ON_G MAIND
(1) Need fine tune PQ16 MAIND [52]
PR3020 for thermal protect point DDTC144EUA-7-F

3
150_5%_4

3
PR118
VL (2) Note placement position MAINON 2 1M_5%_6 2 2 2 2 2
PC51
PC6228 TEMP=80C PQ12 PQ19 PQ9088 PQ9050 PQ6 2200p/50V_4
0.1u/16V_4 PR120 *2N7002K *2N7002K 2N7002K 2N7002K 2N7002K

1
1
https://vinafix.com/
*100K_1%_6
5

PR3022 ZAUI:Stuff
VCC

3 SYS_SHDN#
OT SYS_SHDN# [4,33,51]
PU3002
PR3021 TMP708AIDBVR *Short_0201
25.5K_1%_4
1
A SET A
HYST
GND

Rset(Kohm)=0.0012T*T-0.9308T+96.147
Quanta Computer Inc.
2

=29.4K ohm HYST=VCC for 10


degree Hys.
HYST=GND for 30 PROJECT : Z8I_ZAI_Z8J
degree Hys. Size Document Number Rev
1A
+1.8V_S5 /+1.5V/Thermal
Date: Tuesday, October 06, 2020 Sheet 55 of 62
5 4 3 2 1
5 4 3 2 1

VGPU_CORE +VIN [25,50,51,52,53,54,55,57,58]


+VGPU_CORE [19]

+5V_S5 [13,24,45,47,51,52,53,54,57,58]
+1V8_AON [19,21,22,58]
+1V8_GFX_MAIN [19,20,21,58]
56
D D

PU9000 EV@RT8813DGQW
+VIN_VGPU_CORE1 +VIN
PJ9008
PR9001 PR9006
EV@1_5%_6 EV@1_5%_6 *short3720

*EV@15u/25V_3528H1.9
8813PVCC 21 2 8813UGATE1 8813UGATE1_1

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

[email protected]/25V_4

EV@2200p/50V_4
+5V_S5 PVCC UGATE1

PC9001

PC9005

PC9002

PC9003

PC9006

PC9007
+

3
4
9
PC9000
[email protected]/10V_4 D1
Fsw: 300KHz
PR9000 PR9002 PC9008
EV@1_5%_6 EV@499K_1%_4 [email protected]/25V_6 +VGPU_CORE
+VIN_VGPU_CORE1 8813TON 9 1 8813BOOT1 1 G1
TON BOOT1 PL9001
D2/S1 5 [email protected]/23A_7x7x3
PR9085 24 2 S1/D2 6 1 2
PC9004 8813PHASE1 PQ9000 8813PHASE1
*Short_0402 EV@1u/25V_6 PHASE1 EV@AOE6936 7

EV@22u/6.3V_8

EV@330u/2V_7343H1.9

EV@330u/2V_7343H1.9
+1V8_GFX_MAIN

PC9009

PC9011

PC9010
Don't Connect Pin2 to Phase PR9004 + +
*[email protected]_5%_6 Isat=40A
PD1
*EV@RB500V-40 PR9008 *Short_0201 8813PG 16 23 8813LGAT1 8 G2 DCR(MAX)=2.8mohm
1 2 [20,22,58] GPU_PWR_GD PGOOD LGATE1
PR9009 EV@10K_1%_2 PR9011 S2
+3V
[email protected]_1%_4 PC9012

10
PR9284 *EV@2200p/50V_4
*EV@1K_1%_4
8813EN 3 15 8813ISEN1
[22,58] 1V8_MAIN_EN EN VCC/ISEN1
Rds(on)=3mohm(MAX) +VIN_VGPU_CORE2 +VIN
PR9013 +5V_S5
PC9013 PC9014 EV@10K_1%_4
PJ9010
[email protected]/10V_4 *[email protected]/10V_4

teknisi indonesia
C C

EV@10u/25V_6

EV@10u/25V_6

EV@10u/25V_6

[email protected]/25V_4

EV@2200p/50V_4
3
4
9
PR9016 17 8813UGATE2 8813UGATE2_1
UGATE2 *short3720

PC9015

PC9016

PC9017

PC9018

PC9019
*Short_0402 D1
8813PSI 4 PR9014
[22] DGPU_PSI PSI EV@1_5%_6
PR9015 *Short_0201 +VGPU_CORE
[22] PWM-VID 5 1 G1
PR9018 8813VID
*EV@12K_1%_4 PR9017 *Short_0201 VID PC9020 PL9000
TP9000 [email protected]/25V_6 D2/S1 5 [email protected]/23A_7x7x3
+1V8_AON 18 2 S1/D2 6 1 2
8813BOOT2 PQ9001 8813PHASE2

EV@330u/2V_7343H1.9
BOOT2 EV@AOE6936 7

EV@22u/6.3V_8
PR9022 8813VREF
19

PC9022

PC9021
*EV@10K_1%_4 VREF=2V 8813PHASE2 Don't Connect Pin2 to Phase PR9019 +
8813VREF 8 PHASE2 *[email protected]_5%_6
VREF Isat=40A
R2 8 G2 DCR(MAX)=2.8mohm
PR9021 PC9023
R1

https://vinafix.com/
[email protected]_1%_4 [email protected]/16V_4 S2
PR9023 20 8813LGAT2 PC9024

10
[email protected]_1%_4 LGATE2 *EV@2200p/50V_4
8813REFADJ 6
EV@4700p/25V_4

RT8813DGQW REFADJ PR9025 Rds(on)=3mohm(MAX)


PC9025

*EV@0_5%_2
PR9024
PSI Mode C R3 [email protected]_1%_4 14 8813ISEN2 GPU_CHOKE_THERMAL
TALERT/ISEN2 GPU_CHOKE_THERMAL [33,34]

1 Phase DCM PR9026


0V ~ 0.4V 8813REFIN 7 EV@100_1%_4
REFIN
EV@1500p/50V_4

+VGPU_CORE
11
PC9026

1 Phase CCM 8813VOUT1


0.8V ~ 1V PR9027 VSNS PC9027
R4 [email protected]_1%_4 PR9028 *Short_0201
VGA_VCCSENSE [19]
N17S-G0-A1(25W/GDDR5)
PC9028
B EV@56p/50V_4 *EV@100p/50V_4PR9029 *Short_0201
VGA_VSSSENSE [19]
=MX230 B

10 8813RGN
1.4V-5.5V 2 /3Phase CCM
PR9030 RGND PC9029 routing in parallel
OpenVreg Config : Type2+
R5 EV@309_1%_4 PR9031
EV@100_1%_4 Vboot : 0.8V
EV@56p/50V_4

PC9030
12 8813ILIM *EV@56p/50V_4 EDP-C:27.8A
SS
8813VREF EDP-P:42A
PR9032 [email protected]_1%_4 OCP=74A
OCP:74A
22 PR9034 *Short_0201
PR9033 PWM3 FSW:300KHz
EV@10K_1%_2

13 25
TSNS/ISEN3 GND

NV17 Config : Type2+


N17S-G3-A1(25W/GDDR5)
=MX330
1

R1 6.19K PR9274 OpenVreg Config : Type2+


20.5K
*EV@100K_NTC_4_1% Vboot : 0.8V
R2
2

R3 4.32K EDP-C:29.8A
16.5K
EDP-P:58.7A
A R4 A
OCP:74A
R5 0.309K FSW:300KHz
C 4.7nF

Quanta Computer Inc.


PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
1A
VGPU_CORE (RT8813D)
Date: Tuesday, October 06, 2020 Sheet 56 of 62
5 4 3 2 1
5 4 3 2 1

1.35V_GFX +VIN [25,50,51,52,53,54,55,56,58]


+1.35V_GFX [20,23]
+5V_S5 [13,24,45,47,51,52,53,54,56,58]
+3V [3,4,9,10,11,12,13,15,17,18,20,22,25,26,27,28,29,30,31,32,33,35,38,39,40,41,43,44,45,46,51,52,53,54,55,56,58]
57
D D

N17S-G0-A1(25W/GDDR5)
=MX230
Fsw=550KHz PC9074
*[email protected]/50V_4 +VIN
N17S-G3-A1(25W/GDDR5)
PR9086
EV@100K_1%_4
PJ9009 =MX330
G5335-TON-2

EV@2200p/50V_4

EV@10u/25V_8
*[email protected]/25V_4
*short3720

PC9076

PC9077

PC9078
PU9004
7 8 EDP-C:5.8A

TON
+5V_S5 PR9087 NC V+#1 9
EV@10_5%_6 V+#2 22
G5335-VCC-2 21
VCC
V+#3
V+#4
24 EDP-P:7.4A
Double check PU high with HW
PC9075
+3V EV@10u/6.3V_6

C PR9089 PC9079 C
[email protected]_5%_6 [email protected]/25V_4 Isat=25A
20 G5335-BST-2 +1.35V_GFX
PR9088 BST DCR(typ)=5mohm
EV@100K_1%_2 PR9090
EV@0_5%_2 10 PL9002
1 LX#2 11 PJ9002
[22] HWPG_1.35VGFX G5335-PWRGD-2 [email protected]/15.5A_7x7x3
PGOOD LX#3 16 G5335-LX-2 1 2
+5V_S5 PR9091 LX#4 17 PR9263
LX#5

EV@22u/6.3V_6

EV@22u/6.3V_6

EV@22u/6.3V_6

EV@22u/6.3V_6

EV@22u/6.3V_6

[email protected]/16V_4
18

*EV@22u/6.3V_6

*EV@22u/6.3V_6
*EV@0_5%_2
G5335-PFM-2 3 LX#6 25 PR9092 *short3720
PFM LX#1

PC9080

PC9081

PC9082

PC9083

PC9084

PC9085

PC9086

PC9087
*[email protected]_5%_6 *Short_0201
12
G5335-AGND-2 PGND#1
G5335-EN-2 2 13
PR9093 EN PGND#2 14
Pulse-Skipping Mode EV@0_5%_2 PGND#3 15 R1
PGND#4 19 PC9088 PR9094 PC9089
PGND#5 4 *EV@680p/50V_6 [email protected]_1%_4 *EV@1000p/50V_4
AGND G5335-AGND-2

PR9095 [email protected]_5%_4
[20] FBVDDQ_EN

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G5335-SS-2 23 5 G5335-FB-2
PR9096 *EV@0_5%_4 SS FB
[58] 1.03_GFX_PGD
R2
PC9091 EV@G5335QT2U PR9097 Vo=0.8*(R1+R2)/R2
B [email protected]/6.3V_2 [email protected]_1%_4 =1.357V B

PC9090 G5335-AGND-2
[email protected]/10V_4
G5335-AGND-2

G5335-AGND-2 PR9098 VFB=0.8V


EV@0_5%_4

G5335-AGND-2

+1.35V_GFX

+5V_S5

PR9099
EV@22_5%_8
PR9100
EV@100K_1%_4
3

2
A PQ9085 A
EV@2N7002K
1

3
PR9101
EV@1M_5%_4 2 G5335-EN-2

Quanta Computer Inc.


PQ9086
1 EV@DMG1012T-7
PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
1A
FBVDDQ_MEM (G5335QT2U)
Date: Tuesday, October 06, 2020 Sheet 57 of 62
5 4 3 2 1
1 2 3 4 5 6 7 8

+1.8V_S5 [14,33,34,41,45,55] +1.2VSUS [3,5,7,17,18,52]


+1V8_GFX_MAIN [19,20,21,56] +1.03_GFX [19]

58
+1V8_AON [19,21,22,56] +5V_S5 [13,24,45,47,51,52,53,54,56,57]
+5VPCU [12,24,31,36,37,45,47,49,51] +3V [3,4,9,10,11,12,13,15,17,18,20,22,25,26,27,28,29,30,31,32,33,35,38,39,40,41,43,44,45,46,51,52,53,54,55,56,57]
+VIN [25,50,51,52,53,54,55,56,57]

+1.8V_S5 +1.8V_S5

A A

PC9053 PC9054
EV@1u/25V_4 EV@1u/25V_4

6
+1V8_GFX_MAIN
N17S-G0 1V8_AON_S +1V8_AON N17S-G0

VIN1

VIN2
PR9067 PR9068
N17S-G3 N17S-G3
*Short_0805 *Short_0805

+1.8V_MAIN 13 8
+1.8V_AON
PC9055 PC9056 PC9057 PC9058
TDC : 0.9A EV@10u/6.3V_6 [email protected]/16V_4 VOUT1 OUT2 [email protected]/16V_4 EV@10u/6.3V_6 TDC : 0.75A
PEAK : 1.2A PU9002 PEAK : 1A
Width : 40mil EV@AOZ1331ADI Width : 40mil
+5VPCU PR9069 4 11
PC9059 VBIAS GND1
15
*Short_0402 GND2 PR9070
[email protected]/16V_4 EV@0_5%_2
3 5
ON1 ON2 DGPU_PWR_EN [9,20]

CT1

CT2
PR9072
EV@0_5%_2
[22,56] 1V8_MAIN_EN PC9060

12

10
[email protected]/16V_4

PC9064
*EV@820p/50V_4

PC9062 PC9063
+VIN +1V8_GFX_MAIN EV@1000p/50V_4 EV@1000p/50V_4

B PR9102 PR9103 B
EV@1M_5%_6 EV@22_5%_8

PQ9083 +1V8_MAIN_EN_G
EV@LTC044EUBFS8TL
N17S-G0
N17S-G3
3

1V8_MAIN_EN 2 2
PR9104 PQ9084 +1.03_GFX
EV@1M_5%_6 EV@2N7002KW
TDC : 0.9A
1
1

PR9105 PEAK : 1.1A


*EV@100K_1%_6 Width : 40mil

+1.2VSUS

https://vinafix.com/ +1.03_GFX

PJ9003
*short3720
PQ9008
EV@AONR32320C

3
D

5 2
1
[email protected]/16V_4

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

[email protected]/16V_4
+5V_S5
G
PC9065

PC9066

PC9067

PC9068

PC9069
PR9073
4

[email protected]_5%_8
9336DRV

PR9074
+3V EV@100K_1%_4
C C

3
Double check PU high with HW
2
PQ9010
+1V8_AON PR9075 PQ9009 EV@DMG1012T-7

EV@1M_5%_4

3
EV@10K_1%_4 EV@2N7002K

1
2

PR9077
PD9001
EV@1SS355
PR9076 1 2
EV@10K_1%_2

1
PU9003
EV@G9336ADJTP1U PQ9011
PR9078 PR9080 PC9071 EV@2N7002K
3
3

[57] 1.03_GFX_PGD EV@0_5%_2 EV@47_1%_4 [email protected]/50V_4


PGD 6 2
4 DRV
[20,22,56] GPU_PWR_GD EN PR9081
PR9079 EV@133_1%_4
1

EV@0_5%_2 1 5 9336ADJ
GND

+5VPCU VCC ADJ +1.03_GFX


PC9073 R1
*[email protected]/16V_4 PC9072 PR9082
2

[email protected]/16V_4 R2 EV@124_1%_4

N17S : Vo=(1+R1/R2)*0.5=1.03V

R1 R2

N17S 133 ohm 124 ohm


D D

Quanta Computer Inc.


PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
1A
+1.8V_AON/+1V_GFX
Date: Tuesday, October 06, 2020 Sheet 58 of 62
1 2 3 4 5 6 7 8
5 4 3 2 1

BQ24780SRUYR
PU1
+VIN
RT6256BGQUF
PU6000 +3VPCU TDC : 6A
34
OUT
OUT IN

+3VPCU JW7110DFNC_TRPBF
IN PU6002

TDC : 5.26A
S5_ON +3V_S5 +3V_S5 JW5213DFND_TRPBF
IN
SYS_SHDN# LDO
+3V_LDO_EC EN1 OUT1 PU3004
+1.8V_S5 TDC : 2.48A
D
EN OUT D
p51
S5_ON
EN p57
+1.8V_S5 AO3404
+1.8V TDC : 0.3A
IN PQ9
+3V_S5 JW5222RSOTB_TRPBF OUT
IN
PU3003 TDC : 0.39A MAIND
+1.5V EN p57
OUT
p50
MAINON
EN p57
+1.8V_S5 AOZ1331AADI
IN PU9002
+3V_S5 G5719CTB1U
IN 1V8_MAIN_EN +1V8_GFX_MAIN TDC : 0.9A
PU5000 +2.5V_SUS ON1 OUT1
OUT TDC : 0.75A
DGPU_PWR_EN +1V8_AON
S5/DDR4_SUSON_2V5 ON2 TDC : 0.75A
EN p57 p58 OUT2

TDC : 3.27A
MAINON +3V
EN2 EN2
p51

C C

RT6256BGQUF
+VIN PU6003 +5VPCU TDC : 8A JW7110DFNC_TRPBF
OUT
IN IN PU6002

TDC : 4.13A
S5_ON +5V_S5
EN1 OUT1

TDC : 3.53A
SYS_SHDN# VL MAINON +5V
LDO EN2 EN2
EN
p51 p51

+VIN RT6543AGQW TDC : 16A


+VCCIN_AUX
IN OUT
PU7001

https://vinafix.com/
+1V_S5_ON
EN p54

+VIN +1.2VSUS TDC : 6.22A +1.2VSUS


RT8231BGQW
IN
G9336ADJTP1U
IN OUT
PU5001 PU9003 TDC : 0.9A
+1.03_GFX
OUT
B B
GPU_PWR_G0
EN
S3/MAINON p60
VTT_CNTL VTT +VDDQ_VTT TDC : 0.45A

S5/DDR4_SUSON_2V5
SLP_S4 p53
VTTREF +VDDQ
AP2204K-ADJTRG1
+VAC_IN PQ8004
IN +3V_LDO_EC PJA3411 V3A_VBYP
+VIN TGL-UP3 28W TDC:43A
IN
RT3612EBGQW OUT PQ8014
p48
PU7000
+VCCIN TYPEC1_USB0
OUT IN
VRON
EN
p54,p55 SYS_HWPG
EN p48

+VIN
IN
RT8813DGQW
PU9000 EDP-P:58.7A
+VGPU_CORE BSS84
OUT +VAC_IN PU8001
+1V8_GFX_MAIN IN +4.6V_PD_C1
EN OUT
p58
TYPEC1_USB0
+VIN IN
IN
G5335QT2U
PU9004 EDP-P:7.4A SYS_HWPG
+1.35V_GFX
OUT EN p48
FBVDDQ_EN
EN
p59

A A

Quanta Computer Inc.


PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
Power tree 1A
Date: Tuesday, October 06, 2020 Sheet 59 of 62
5 4 3 2 1
5 4 3 2 1

Stage Date CHANGE LIST


C 7/1 Reserve PCH [TOP_SWAP] pin to EC by Acer request "GPG6"

7/1 Adjust EC GPIO pin to let Spin function gpio all come out from extension IO IC "GPF2, GPH2, GPJ0, GPD0, GPH0"

7/1 Change CCG5 power source from [+3V_S5] to [+3V_PCU]


D D

7/1 Change BBR power enable [CCG5-GPIO P2.3] PU power from [+VCC3V3_SX_TCP0] to [VDD_SUPPLY_1P]

MP
9/22 Change 0 ohm to shortpad

C
Vinafix.com C

https://vinafix.com/
B B

A A

Quanta Computer Inc.


PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
Change List 1A
Date: Tuesday, October 06, 2020 Sheet 60 of 62
5 4 3 2 1
5 4 3 2 1

D D

C C

https://vinafix.com/

B B

A
Quanta Computer Inc. A

PROJECT : Z8I_ZAI_Z8J
Size Document Number Rev
Voltage Rails 1A

Date: Tuesday, October 06, 2020 Sheet 61 of 62


5 4 3 2 1
5 4 3 2 1

ACIN

VCCRTC [PLATFORM]
76
RTCRST# [PLATFORM]

V3A_VBYP/VL/+3VPCU EC_PWROK (SYS_PWROK) [EC]


+5VPCU/+3V_LDO_EC [PLATFORM]

PLTRST# [PCH]
NBSWON# TO EC [PLATFORM]

[PLATFORM]
CPU_SVID
S5_ON FROM EC [EC]
D D

[PLATFORM]
+3 V_S5/ +3V_DEEP_SUS [PLATFORM] - tPCH06 [PCH] - tPCH31
CPU_SVID_ALERT#
VCCPRIM_3P3
[PLATFORM] - tPCH02 [PLATFORM]

SPI Signal
+5 V_S5 [PLATFORM]
1. Strap ME/BIOS Active
2. MAC PHY
+1.8V_S5/ +1.8V_DEEP_SUS 3. ME
4. Clock Inital
VCCPRIM_1P8 [PLATFORM]

VCCIN_AUX [PLATFORM] - TtPCH03

VCC1P05_OUT_PCH [PCH]

[EC]
DNBSWON#

DSW_PWROK [EC] Note. [DSWPWROK must low once VccDSW low and keep Hi if VccDSW Hi]

RSMRST# [EC] - tPCH07


[PCH] - tPCH18

ESPI_RESET# [PCH]

SUSCLK
C C

SLP_S5# [PCH]

SLP_S4#/ (SUSC#) [PCH]

SLP_S3#/ (SUSB#) [PCH]

SLP_S0# [PCH]

CPU_C10_GATE# [PCH]

DDR4_SUSON_2V5

SUSON
[EC]

[EC]
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MAINON [EC]

+VCCST [PLATFORM]

[PLATFORM] - tCPU00
+VCCSTG

+2.5VSUS/ (DDR_VPP) [PLATFORM]


B B

+1.2VSUS /(DDR_VDDQ) [PLATFORM] - tCPU01

VTT [PLATFORM]

+3V/ +5V [PLATFORM]

+1.5V [PLATFORM]

+1.8V [PLATFORM]

HWPG [PLATFORM] TO [EC]


(ALL_SYS_PWRGD)

VCCST_PWRGD [PLATFORM]

VRON [EC]

+VCCIN [PLATFORM]

IMVP_PWRGD [PLATFORM]

A A

PCH_PWROK [EC]

PROCPWRGD [PCH]

EC_PWROK (SYS_PWROK) [EC] 120ms after HWPG

Quanta Computer Inc.


PROJECT : Z8IA/ZAIA
Size Document Number Rev
1A
Power Sequence
Date: Tuesday, October 06, 2020 Sheet 62 of 62
5 4 3 2 1

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