uSA BOOT RCJv1
ML\NJAL..
'JERSIttt 1.3
Rich Castro
24 February 1984
341-o175-H ~LE a::tRJTER ~flDENTIAL
This doctnent replaces all previously written versions of the Lisa Boot
ROM ~anual. It discusses the operation of the Lisa ROM contained on the
system CPU board. This ROM contains a variety of diagnostic, setup and
boot rout1nes which are perrormed automatically upon power-up or a L1sa
system. The ve:rious routines are outlined in the order they ere
performed, the RON boot procedures ere discussed, and the operation or
tho IU1 monitor is explained. Also attached are separate appendices
that cover error messaoes output by the RD1, miscellaneous information
saved by the RCJ1 on power-up, interfaces for Ra1 routines use.ble by
external software, details on a special power-cycl1nO mode provided ror
nanuracturing use, and the procedure fOr creatin; a RCI1 "aster tram 1ts
source code t11es~ ".
..
The infOI'1h8t1on contained in this menual corresponds to the latest
release or the Lisa boot ROM, revision H.
LISA EOJT RCI1 -1- iPPLE a:tRJTER cx:IiFlDENTI AL
The latest changes made to the boot R01 have been done to correct errors
dealino with the hard disk interrace.
1) The boot fU1 rDI always initializes the hard disk interface reset and
parity reset lines as inactive outputs prior to atternptin~ any interaction
with a hard disk. Previously these lines were left initialized as inputs
which r8sult8d in a "floating" level on each line.
2) The herd disk interface reset routine now works properly for both Sea~ate
and Widoet type disk drives. Previously, reset of a Widget drive could
result in a tigeout error because of its longer delay in responding to a
reset s1 gnal .
Ninor changes have also been made to this document to correct erroneous
statements and supply new information. These chenges are noted by a vertical
bar in the left hand margin of the changed page.
LISA BCXJT IU1 -2- fFPLE CCtRlTER Cll'4F I DENT I AL
1.0 I~I~ .................................................... 4
2.0 STARTUP TESTSIPROCEDURES ........................................ ,
3 .0 B:XlT ~S................................................. 13
4 .0 tDiIT~ (J)ERATICI'i •.•••••••.••••••••••....•••••.•........•...•... l'
, .0 ~ »P T,:eLE................................................ . . 20
~ICES
~IX A : ERROR HESSAGESITONES .................................... 21
~IX B : ROM DATA SAVE AREAS ••••••••••••••••••••••••...•.•••••... 23
~IX C : EXTERNAL INTERFACES ..................................... 27
~IX D : roa.ER CYCLII'G ••••••••••••••••••••••••..•••..••.•..••.... 43
~IX E : BOOT ROM CHECKSUM/ASSEMBLY PROCEDURE .................... 45
LISA BOOT RD1 -3- FPPLE CCtPUTER ~FlDENTIAL
The boot Rl1 on the CRJ boeI'd acts as the first test of the LISA system
end enables bootino fran a variety or devices. It contains diagnostics
that are executed each time the system is turned on, and elso contains
routines that enable startup frcn a floppy drive, an attached or buil tin
Profile type hard diSk, or an "intelligent" 110 card.
As a general. rule, any errors encountered terminate operation and the
ROM attempts to output an error indication to the operator. The
appendices contain a list or possible errors, as well as other
niscellaneous information about the boot ROM. The following sections
give details on the tests and procedures eiecuted by the boot RCI1 in the
order that they are actually run.
Note: Throughout this docllftent hexadecimal nU'ftbers are denoted by a 1$1
prefix.
LISA EOJT F01 APPLE a:H"u'TER ~flDENTI AL
2.1) Reset Check
For normal power-up, or "COld-starts", the R01 executes its full set of
internal diagnostics and boots from the selected device. However, since
the system can be reset in other ways, such as via the reset button or a
double bus fault, the ROM has two provisions far differentiating
"warm-starts" from "cold-starts". Both use settings of the t11.J
registers as the key.
The first provision is for inmediate resetting of the contrast level to
avoid "screen flash". This is done by checking the setting of t11J
register 127, context 0, n~ally set far access to special 110 space.
If both limit and base registers retain their starting value, the RCI1
will inmediately reset the contrast latch. The base register is
initially set to 0, and the limit is set to $FOO.
The second special provision in the ro1 is for preservino memory on
reset to facilitate debuQginQ. This is done by checking MNU reQ1ster
126, context 0, base and limit contents to see if they have changed.
These registers ere normally used for 110 space with the base set to 0
and the limit set to $900. They should remain constant unless the user
wants to enable the reset feature. Enabling is e.cccnplished by changing
the limit register to $901 instead'of its default value of $900, and
leaving the base register set to O. The ROM will then preserve as much
of memory as possible on reset, and branch to its internal "monitor"
that allows the user to examine the machine state or reboot as desired.
2 2) R01
t ChecksU!l
This, test computes a 16 bit ehecks~ of the entire ROM contents to check
its validity. It the result is not zero as expected, testino is halted
end the test loops indefinitely at a fixed address since further
pro;re~s is probably not possible. The fixed loop address is $fEOOCe.
If a hang occurs, the LISA screen may be blank or come on very bright
with 8 random pattern, since the contrast control defaults to on and
~emory is uninitialized. The determining factor is the initial state of
the video address latch, which is random at power-up time and thus may
cause the system to.access installed or uninstalled memory. The only
definite means to determine that this has happened is to use a scope to
see if the processor is continually reading the R()1 at the loop address .
LISA EOJT RCJ1 -5- tlJPLE CCWUTER CCNfI DENT I AL
but has not yet started to access the ttlJ registers (whiCh is the next
test).
2.) MHU Reaister Test
A read/write and address test is executed on the static RAM's that
canprise the r11J registers. If an error is encountered in the cri tical
supervisor reOisters, a sinole or double system reset signal is
generated and the system hangs in an t11J exercise loop with the external
indication being a blank screen. As with the ROM test, a scope must
eQain be used to see if this is happening by checking the reset and t11J
select sionels~ A s1nole reset pulse indicates a readlWrite error was
detected, while a double reset indicates an addressing error. Following
the reset 'pulse(s), the ROM enters a loop that attempts to toggle every
data and address line going to the I11.J registers as an aid in
determinino the fault. '
If no errors ere encountered with the supervisor registers, the other
context registers are tested and results are saved. If errors are
detected here, a CPU error icon is displayed, along with error code '40'
...,der the icon at the end of the power-up sequence. The results are
saved at the follow1nO locations in memory for exem1nat1on by the user
(e.g., via the ROM monitor):
$180-$181 : The context in error and an "error flask" are saved at
these locations. The context is saved as hex code 01,
02 or 03. The remaining three nibbles contain a bit
pattern with each four bits corresponding to one of the
t11J RFfi chi ps. A • l' bi t .. eans an error at that bi t
location has been detected.
BIT: 15 12 11 8 7 o
I A10 I A9 I AS I
a:tm:XT1~1=r1~1
180 181
High 4 bits at location $lBO contains the context setting
Low 4 bits at location $~ is tor chip at A10 on CPU board
High 4 bits at location $181 is for chip at A9 on CPU board
Low 4 bits at location $181 is for chip at AS on CPU board
If an error is encountered when trying to SWitch contexts, the ROM will
LISA a:x:rr RCJ1 -6- tl'PLE CCtRJTER ~FIOCNTIAL
record the context that it tried to set and then abort the testing,
returning the tt1.J to context 0 10 further tests can proceed.
2 .4) Memory 51 z1no and tttJ Rem aPDi na
The memory 1s s1 zed by a ree.dlwri t e t est end the 1 ~ and hi gh pf'¥si cal
~ernary addresses ere saved. If no memory is detected, a second test is
lIade to see it an 110 board is installed. It the 110 board is also
lIissin~ the ROM restarts the diagnostics, continually looping on the
ROM checksum, NMU register and memory sizing tests as a means of burnin
for the CPU board. At the end or each loop, the MSB of the video latch
is also tOQgled such that an LED connected to this line will blink about
ten times a second. The remaining bits or the video latch are set to
S2f.
If memory cannot be accessed at all, but an lID board 1s installed, an
attempt is made to beep the speaker once, and the RON then goes into a
readlWrite loop at address one megabyte - 2 ($OffffE - long word address
that spans both memory slots), using the pattern $AA'5A5'A. The video
latch is also loaded with the default value S2F.
If a readlwrite error is detected, but some valid memory is round, an
ir.ternal error indicator is set and the error bits ere saved, but
testing continues. The results ere saved at location $184-1e~, as a
containing a '1' bit for each bit found in error (t1SB at $184).
'-'ford
The tt1.J is then rewritten so that II\StI\OIy appears to start at address 0
end continue cont1ouously tor the emount of memory contained in the
system. All other t11J registers are set for invalid access except for
registers 126 and 127 of context 0, which are set for 110 space and
special 1Al space (RCJ1 and t11J access), respectively. The exact
settings are as follows:
Context Register Base Contents Limit Contents
o . 0-7 Naps lIemory to start $700
at 0 in 12E1< intervals
8-1' Set if system has $700 for memory ) 1024K
>1024< of memo:ry in $COO far no memory
12ft< intezvals
16-12' o $CC()
126 o $9:()
127 o SFOO
1 0-127 o $COO
2 0-127 o $COO
3 0-127 o $COO
LISA a:xrr ~ -7- fFPLE CCtAJTER ~FlDENTIAL
2,') Preliminary Memory test
The first 2048 bytes of memory are tested next to ensure that sane
nemory is functional and ervailable for saving test resul ts.If any
error~ occur, testinQ is aborted, the speaker is beeped twice with a low
tone, and the ROM hangs in a readlWrite test loop at address 0 (on board
in slot 2 1f system has 2 memory boards), usino the pattern $A~'A. The
video page 1s set to display this memory area by setting it to the first
video page (0-321<).
If successful, low memory is initialized with interrupt and exception
vectors and previous tests
.. results (rt1.J and memory) are saved .
2,6) Perallel Dort VIA test
The Rl1 checks to see 1f the lID boerd cen be accessed, end 1f so, does
a partial test of the VIA controlling the parelle1 port and contrast
latch so that the contrast can be set. If all is OK, the contrast is
tl.a'ned off so that the follOWing screen memory test is hidden fran the
user •
If the 110 bosrd cannot be accessed, the RCJ1 will abort further 110
board setup end testint;L but continue with CPU and memory testino. The
bad 110 board should result in either an lID boerd error icon, with
error code '58', or a CPU board rtrior icon, with error code '41'. If
the perallel port VIA 1s bad, the 110 boerd icon is d1splayed alono with
error code •51' .
2.7) Screen Memory Test
A test of screen memory is done next (last 32K of memory) so that it can
be u~ed to display information to the user. The contrast is turned off
dur1nQ th1s time so that the test is not v1sible on the screen. If any
error occurs, the RCI1 starts sesrchino for another area of memory for
screen use, beQinninQ fran the top of memory down at 321< increments. If
a oood area is round, the video p8Qe is chanoed to that portion of
nemory, otherwise the standard default 1s used (last 32K of memory) and
testing continues. Location $110 in low memory is written with the base
address of the screen.
LISA fDJT RCJ1 -8- ~LE CCJ'FUTER ~fIt£NTIAL
2.8)· Continued 110 boord testina and setup
At this point, the screen display is used to notify the user what test
is in pro;ress. The revision id of the boot ROM is also displayed in
the upper right corner of the Lisa screen. The contrast is set to a
mid-range default of SBO, and the VIA controlling the keyboard and mouse
interfaces is tested. If all is OK, a reset signal is sent to the
keyboard and mouse interfaces, and a scan is then done to determine if
either the keyboard or mouse ere disconnected. (Note: Mouse disconnect
check requires special settino of parameter memory to indicate that
~ouse should be attached). If either is disconnecte~ an error flag is
set but testing continues.
Followino the interface check the speaker is "clicked". This "click"
serves two purposes: 1} it signals the user that all tests to this point
have been executed, and 2) it indicates that the keyboard is now
"operational" (if connected) and may be used to input "alternate
bootino" corrmands. At the serne time, the speaker volline is set to a
defaul t mid-range value of 4.
2.9) cpu Boord Test Completion
The remainder of the (]lU board tests are executed to partially test the
video and write wrong perity circuitry on the board. The video test
checks to ensure that the verticel retrace signel is toggling, and then
verifies that the system serial ntnber can be read frcn the video prem.
The parity test ensures that wrong parity can be forced and detected.
If either of these tests fail, testing is aborted with a CPU bosrd icon
displayed alono with one of the following error codes:
4112 - Video logic error
~3 - Psrity logic error
2. 10) Memory Test
Next a full read/write and address test is perrormed on all or system
RFt1, minus the memory already tested (screen and first 2K). The default
raemory test from a "cold-start" consists of a pseudo random testing
algorithm that is run with parity disabled and enabled. An optional
mode, called extended memory testing, causes the same test to be run
twice. This mode is invoked by setting of a special indicator bit in
parerneter memory, and is done automatically when in power-cycling mode.
For "warm-starts" (e.g., after a reboot coomand fran software or
pressing of' the reset button), only one pass of the test is run, with
parity enabled, to minimize boot time.
LISA ocm Rtt1 -9- FF'PLE CCtFUTER CCl'tF I DENT I AL
The default cold-start test currently takes about 18 seconds for a full
megabyte, with the extended mode approxiraately doubling this time to 36
seconds. The warm-start test reduces this time to about 8 seconds.
~hile the tests ere running, a display is shown on the screen indicating
that memory is being tested.
If errors are detected, the results are saved in low memory and an icon
for the memory boerd in error is displayed on the LISA screen at the end
or the power-up sequence. A second line under the icon displays the
error code as •70' for readlwri te errors, or •71' tor peri ty errors.
~hen a parity error is detected, the ROM automatically goes into a
"seerch mode" to try and tind the exact location in error down to the
bi t or parity chip level. The follOWing memory locations save the
results: •
$186-$187 : bit pattern for lIemory at logical address 0 - 12ff( (row E).
As with the t11J test, a • l' means an error in the
corresponding memory chip. The results ere saved as a word
in memory with each bit corresponding to the memory chip tor
that bit as follows:
BIT: 8 7 o
~ MASK EFR:R MASK
FCR RA1 OiIPS FCR RFI1 OiIPS
AT COLS 8-1 AT COLS 15-22
AXA::ss: 186 187
$188-$189 bit pattern for logical addresses l2E1< - 256K (row D).
$l8A-SllE bit pattern tor logical addresses 2561< - 384K (row C).
SlEe-SlED : b1 t pattern tor logical addresses 384K - 512K (row B).
Sl8E-$l95 : reserved tor second 512K or lIemory (located on second board)
Sl96-S1A' : reserved for future use
$lA6;-$lA9 : parity error address (if error during memory test)
SlAA-SlAB : lIemory error address latch contents (physical address)-
$268-$268 : suspected (logical) error address tor parity error
S26C-'26F data written to suspected error address
$270-$~73 : actual (logical) error address found during pari ty error search
$274-$277 : data read on peri ty error during search
$278-$278 : (physical) address read from parity error address latch
$27C : error row (0-7) if perity chip failure, where 0 • first 128K
memory row (board 2, row E), 7 • last l28K rlemory row (board 1,
row E)
$270 : error column (9 or 14) ir parity chip failure
$294-$297 : Maximllft memory address ... 1
USA EOJT RCJ1 -10- FFPLE c:o-FUTER ~FlOENTIAL
$2A4-$2A7 : Ni nimLln memory address
$2A8-$2~ : Tot al emount of memory
$200 : Boerd II in error it lIemory error detected
*Note: The memory error address saved must be shi fted left by , to
convert to the corresponding Lisa memory address. The low order 5 bits
can be assuned to be zero.
2.11) 110 Board Test Completion
A test of the disk controller is performed to check the state of the
DSKDIAG bit ensuring that the disk controller is ready. Then a read of
shared memory is done to retrieve the results of the disk controller
self-test, which is left in location $FCOOO3. If the resultinQ code is
zero (no errors), a write test of shared memory is also done, followed
by the issuing of a command to disable interrupts from both drives. If
any errors ere detected, an error '57' will be displayed. During this
testin~ the disk controller ROM 1d is also read end displayed next to
the boot ROM id in the upper right corner of the Lisa screen. The id is
also decoded and saved as a system type id et location $2Af.
A test of the 2iloO sec chip is tried next, usinQ the internal loopback
feature of this chip to check read/write of data for port B. Before
doing this test, a check is also made to ensure reed/wri te cap8bil1 ty
to/from the sec interrupt vector register via channel A, and then the
chip is set up to do asynchronous data transmission at its max baud
rate. If arttJ errors ere round, an 110 board error icon is displayed
81ono wi th error code ",. tor port A errors or '56' tor port B errors.
In addition, the specific error is s~ored at memory location $2AC as
follows:
SOl - Interrupt vector register readMr1te error (port A error)
$02 - Channel B transmi t buffer timeout error
$04 - Channel B receive bufrer full timeout error
$08 - Channel B dat a compare error
Finally a double "click" of the speaker is done to indicate that the
keybQard is about to be scanned. The RCt1 does the scan to read 8nI
keyboard input that might have been input from the user (such as an
al ternate boot convnand). Next a read clock coomand is attempted, and
the time and date information returned ere saved. If any errors are
encounfered, an I/O board error icon is displayed elon~ with one of the
following error codes:
"2' - 110 board aps error
, ~' - Clock error
LISA BOOT RD1 -11- FFPLE CD1=\JTER ~FlDEHTIAL
2.12) lIP slot Confiauration Check
Each 110 slot is scanned for the presence 0:( an installed card and, if
found, the card 1d is read and saved in memory, The card 1d is a 16 bi t
nunber with the following format:
bsit nnnn nnnn nnnn
where
b • 1 if the card is bootable
s • 1 if' the card has a status proorem
1 • 1 if' the card has an icon(s) to be displayed in the boot menu
t • 1 if' the cstd is a test card
n • 12 bit card specific id number
If the card id indicates it has a status routine, a scen of its required
onboerd RCI1 is done to ensure that it can be read properly and the
status routine is then executed. If any errors ere encountered, they
ere displayed with an lID slot card error icon, indicating which slot is
in error, end en error code '92' for a RCl1 checksun error, or 193' for a
board status routine error. In addition, the error code returned frcrn
the card's status routine is saved at menaOIy location $18',
LISA EO)T RCI1 -12- ~LE CCtR1TER ~flDENTIAl
As mentioned previously, the ROM supports bootinQ from a variety of
devices, with the current version supporting either an 871 or SONY
rloppy drive, a Profile type herd disk builtin or attached to the
parallel port (default), or any I/lJ slot cerd containing its own "boot
ROM". The RON checks to see if an alternate boot is desired by checking
to see if valid keyboerd input was detected. The following keyboard
sequences ere supported:
fPPLEll - boot fran upper builtin drive (871 floppy or h8I'd diSk)
*PPLE12 - boot from l~er builtin drive (871 or SONY floppy)
APPUE13 - boot from Profile attached to perallel port or builtin hard
disk (default)
FFPLE/4 - boot fran 110 slot III (farthest trom loOic cards), lower port
*PPl.EI5 - boot trom 110 slot 111, upper port
APPLE/6 - boot fran 110 slot #2, lower port
APPUE17 - boot trom 110 slot 112, upper port
APPLE18 - boot fran 110 slot '3, lower port
APPLE/9 - boot fran 110 slot 113, upper port
fFPLEIENTER (on nuner1 c keypad) - abort boot, 00 to RCt1 Itmoni t or
II
~l.E/SHIFT/P - abort boot, 00 into power-cycling mode
This input is done by holding the •FFPLE' key down while depressing the
other keyes) in the sequence. This must be done between the first and
second clicks or the speaker durinO power-up, a window that lasts from
8-36 seconds (depends on snount of system memory and memory test mode).
11' one of the boot sequences ere detected, a "wait" icon is displayed
and the FD1 starts the booting process. For the floppy or hard disk this
entails reading or block 0 from the boot device and then checking to see
it the block has a valid "boot rile id" of $AAAA. If invalid, a boot
error icon is displayed along with the drive in error as appropriate
(see.Appendix A far details). Otherwise, the RON transfers control to
the loaded progrem (at address 12BK) which then has responsibility to
complete the booting process .
.
For 110 slot booting, the boot ROM checks tor a valid boot ROM on the
selected 110 cerd (see Har~ere manual for details) and executes a
status routine if one is present. If all is OK, the card's boot routine
is executed by first loading it stertino at address 128Kand then
junping to 1 t.
Direct access to the RON monitor is provided with the APPUEIENTER key
sequence primarily for debuoginO purposes. Details of its operation are
LISA EDJT FD1 -13- fFPLE a::tfJUTER ~flDENTI AL
explained in section 4.0.
Power-cycling mode is intended for manufacturing use to aid in burn-in
testing of new systems. It is described in Appendix C.
If no alternate keyboard commands are detected, the ROM next scans to
see if any key other than the alpha-lock or mouse button was depressed.
If yes, a "boot menu" is displayed to the user containing choices for
all of the valid boot devices. This includes a builtin floppy or herd
disk drive, a Profile if attached end ready, and any 110 slot card that
(lay be present. To check for a herd diSk, the R(J1 tries a handshake
OJeT the parallel port. If a hard disk is attached, but in its
'~8I11t-UP mode, a wai t icon is di spl ayed for a max imt.rn of 100 seconds
II
before the full handshake is attempted.
The left side of the boot Menu shows the device, and the right side
d1spl~s a keyboerd se.Auence that can be used to make the selection (the
"apple' shOwtln in the menu refers to the ffJPLE key on the keyboerd). The
boot device can then be selected in the standerd LISA user interface
fashion with the mouse, or via an alternate keyboard sequence which is
displayed in the menu alongside the boot icon.
If no keyboard input was detected, the ROM does a check of peremeter
nemory for a valid boot device id. If found, the boot takes place from
the specified device. If not, a final alternate boot check is done by
scanning the 110 slots. If both a test card (with 1d in the renge hex
o-7ff) and an Applenet cerd ere installed, the RCtI boots frcrn the
Applenet card. If only the test card is installed, the RCJ1 boots from
it if it is bootable. Otherwise, the ROM assumes booting will take
place from a Profile type hard disk attached to the parallel port (or
but 1tin) and proceeds with an attempt to boot from there. for Lisa 2
systems (no internal hard disk), if no hard disk is connected, the ROM
will next try the Sony floppy drive, and if no diskette is inserted will
beep the speaker once and request a diskette. Otherwise, the "boot
menu" is displayed accompanied by a speaker beep to alert the user.
It' invalid keyboerd input is detected, or the p8l'emeter memory sett1no
is invalid, the RCI1 beeps the speaker and displf!lls the "boot menu".
LISA BOOT RCI1 -14- iVJPLE a:tRITER a:t4FlDENTI AL
-4.0 tIoni tar Operation
If any errors ere encountered dur1no power-up testino, or an APPLElENTER
key sequence is detected, the RD1 enters what is called its "monitor"
mode. This actually consists of two parts as explained below.
:4 • 11 Cust tner mode
In this preliminary mode, the error icon end code, if any, ere displayed
on the screen in an "alert bOX", along with "buttons" labeled as
follows:
RESTART
CCMIrt.E
STMTlP f1U1 ...
The "buttons" also contain an alternate keyboard sequence that can be
used to activate them, which is displayed as an "apple" icon (standinQ
tor the ~LE key), followed by the nunber 1, 2 or 3. A selection can
then be made by uSino the mouse and "clicking" once on the button, or by
entering the alternate keyboard sequence. Invalid input causes a speaker
"beep" end redisplay of the alert box.
Note: The RCJ1 contains french and German translations tor Custaner mode
and boot menu phrases. The language displayed depends on the id or the
keyboard attached to the system. for other countries, such as Italy end
Spain, all three languages are displayed.
4.1.11 Restart
This option is provided as a means or resettin; the system tran the
keyb~ard to restart the power-up tests. It causes the R()1 to do a
"cold-start" of the system.
4.1.2) Continue
This option provides a means of continuing frorn a non-fatal ~l'ror. It
is displayed only when the error is of this type. The followinO errors
ere considered "non-fatal":
LISA a:xrr RCJ1 -1~ ~LE et:tAJTER ~FIDENTIAL
8!bMHU error not in context 0
Seri al nunber read error
c Seri al port error
d C10ck error
e) ReadlWrite memory error not in the first 2K or the boot area
(128<-2561<)
f) I/O s10t card errors
g) Host boot errors
Note: The CCliTItt.E button is also -not displ,ayed when the monitor is
invoked directly from the keyboerd by the APPUEIENTER key seQuence.
4.1.) Ste;rtup From., ,.
In the csse of a boot failure, this option provides the means of easily
ret~ing the boot from the same or another'device. When it is selected,
the boot menu" is displeyed as described in section ),0 .. A selection
can then be made from this menu to try the desired boot device.
LISA EDJT RCJ1 -16- tl='PLE mA.JTER ~flOENTIAL
4.21 Service Node
A fourth, unlisted option, is actually also evaileble to the user from
custaner mode, It is invoked by entering a APPLEJS key sequence which
causes the RD1 to enter "Service mode",
This mode is provided primerily far enoineerinw, manufacturing end field
service use, It provides basic "peek and poke capabili ties, along wi th
several additional d1aonostic aids to help in debugging system failures.
When invoked, the screen is cleared and a new "pull-down" menu is
displayed with the following choices:
DISPLAY tEN
SET t£tmY
CALL ~fr1
I1XP ~ TEST
fDlJST VltE:O
PCl£R CYCLE
....WIT .
Also displayed is a "window" labeled "Service Mode", which is used as an
output area for those options that need it. As with the boot menu,
these options have asSOCiated alternate keyboerd sequences that can be
used to activate them. In this case, however, the input does not need
to be preceeded by the APPLE key, only the number displayed 81ono side
the desired option need be input. The options are described in the
- following peragraphs.
Invalid input causes a speaker "beep" and the message 'WHAT?' displeyed
in a dialog box on the screen. In most cases, hitting just the return
key in response to a prompt will return control to the menu.
A.2.1) Display Hem
This 'option gives the user the capability of displaying the contents of
system memory. Upon invoking, two additional prompts are sequentially
displayed to request the starting address to display and a hex count of
the num~er of bytes to display. The address must be input as 1-6 hex
characters followed by ei ther the "space" or "return" key, If the space
key is hit, the count data can then be entered~ otherwise the system
will prompt for it if the return key is hit, The count must also be in
.DeX and only the first four characters input ere used. This oives a
~8Xi~um display capability of 64K bytes, and the ROM rounds out the
count to the next 16 byte boundery. The detaul t 1s to di spl ey 16 byt es,.
which can be requested by simply hittino the return key in response to
the "ca.trr ?" prompt.
LISA ElXlT FU1 -17- A='PLE CCtFUTER ~flDENTIAL
4.2.2) Set Memory
Setting or lIemory is enabled via this selection. AQe.1n, pranpts ere
displayed to request a starting address and the data to write to that
address. As with the display option, the address must be 1-8 hex
characters and the address and data input can be separated by ei ther a
space or the return key. If the return key is hi t, the system will
display the pranpt -CATA ?... The data must also be input as hex, but
can be entered as more than Just one "strino". By separatino input
strings with spaces, the ROM will write to successive addresses with the
data entered. In addi tion, the set operations performed can be byte,
word or long operations, with the type determined by the length of the
input string. for e~ple, the" input string 12 34 5678 9ABCDEFO in
response to the ~ATA 1" prompt would cause a write of bytes at hex
addresses 100 and 101, a word wri te at address 102, and a long wri te at
address 104.
4.2.3) Call Program
This option provides the ability to invoke a routine at a speci fic
address. An address value is requested as with the previous options,
and the ROM then executes a JSR to the address entered. If the celled
routine properly executes an RTS when done, control is returned to ROM
service mode which seves the contents or the registers and then returns
to the service mode menu display ..
Before doing the JSR to the input address, the RON first initializes
data registers 00-07 and address regsi ters AO-A5 by loading them fran
the "register seve area" which is located at the following addresses:
SlCO-SlDF: Registers 00-07 (one long word for each register)
SlEo-S1f7: Registers ~A' (" " " .... .. )
following a return from the celled prOgI'Sl, the registers are also saved
in this area.
1.2.4) LOOD on Test
This option allows 8nI of the RCt1 diaonostics: to be invclked. Wtlen
invoked, it displays the lists of tests available and pranpts for a
selection. When the desired test is entered, the ROM displeys a
"testing window" showing which part 9f the system is being tested and
then goes into an infinite loop on that test. The loop can only be
LISA EDJT IU1 -18- APPLE Cll'PUTER ~rlDENTIAL
terminated by either h1tt1no the reset button or powerino the system on
end off. An exception to this is the memory test which will terminate
on a peri ty error.
4.2.'1 Adjust Video
This option displays a "crosshatch" pattern on the screen ror use in
edjustino the video board circuitry for proper display. Hittin~ any
key, or the mouse button, will terminate the display and return to the
Service mode menu.
4.2.6} Power Cycle
This option provides a means of invoking power-cycling from service
mode. It is described in detail in Appendfx C.
4.2.71 Quit
This option will cause a return to the Customer mode.
LISA axrr RD1 -19- flJPLE CCl"FUTER C(J-4f I DENT I AL
'.0 1Dt.1tF TfB..E
A veriety of ROM routines can be used by other softwere through a jump
table located at address $0084 in the RCl1 space. The following is a
list or the routines available:
Address Routine
$XXOOB4 RCJ1 Monitor
$XXOO88 Displtf:tJ rlessage
$XXOOfC Write to NNU registers
$XXOO~ Read hard disk block (via polling)
$XX0094 Read floppy sector (via polling)
$)0(0098 Basic pseudo-randcn memory test
$XX009C Reserved
$X>(OOAO Reserved
$XXOOA4 Read MHU registers
$XXOOA8 Send CCPS coomand
$XXOO~ Read clock/calender setting (via polling)
$XXOOBO Display hex error code in decimal
$XXOOB4 Set Contrast level
SXX0C68 Beep speaker
$XXOO8C Veri fy ChecksUl
$XXOOCO Write ChecksUl
$)OCOCC1 Read system serial nUiber
Note that ·xx· in the ROM address depends on what NNU register is used
to enable access to ROM space. The ROM sets up register 127 tor this,
which gives XX.FE. Refer to appendix C for details on the specific
routine interfaces.
LISA EO)T RCJ1 -20- t1=PLf CCtRJTER ~flDENTIAL
The RD1 outputs three types or error indicetors: 1) a general icon
indicating the 'global' nature of the error, 2) a more specific error
code attemptinQ to pinpoint the error, and 3) an error tone also
identifying the error type. The general icons include the followino:
mJ board.
110 board
Memory board
110 slot card
Entire LISA system
Diskette
Keyboard
Mouse
Prorile
The error codes implemented are as follows:
EIBE COOE t£f!iltii
23 Unable to read diskette
~ Unable to unclemp diskette
38 No boot file on diskette
39 Disk controller timeout error
«> tt1J error
41 mJ selection logic error
42 Video circuitry error
43 Parity circuitry error
44 Unexpected NMI interrupt
4'46 Bus error
Address error
.
47 Other unexpected exception
48 Illegal instruction error
49 Line 1010 or 1111 trap
~ ctPS VIA error
~l Parallel port VIA error
52 110 board ctPS error
~3 Keyboard ctPS error
~ Clock error
RS232 port A error
"'7
56 RS232 port B error
Floppy disk controller error
USA fDJT RCI1 -21- ~LE C01'UTER ~flrorrIAL
58 lID board access error
59 110 board CCPS code error
60 lID or keyboard error
61 Unable to initialize clock (power-cycling mode only)
62 Unable to set alarm (power-cycling mode only)
70 Memory readlwr1te error
71 Memory pari ty error
75 Boot failure (boot file on device probably bad)
EK) Hard disk not attached
81 Herd disk not ready
82 Bad response from hard disk
83 No~zero status bytes returned from herd disk
84 Invalid boot file on herd disk
~ Herd disk timeout error
90 No lID slot card i nst all ed
91 110 slot card not boot able
92 Bad checksum on 110 slot cerd
93 Bad status returned from IAl slot card
The enOI' tones possible are as follows:
ERRQ3 T(1£ tE~Itf3
Lo No memory detected
Hi Derault boot device not available
Lo, Lo Error in first 2K memory test
Lo,Hi General system error (e.g., bus error)
Lo, Lo, Hi CPU boerd error
Lo,Hi, Lo IAl board error
Hi, Lo, Hi Keyboard error
Lo, ~i, Hi General memory error
Hi, Lo, Lo 110 slot error
Hi, Hi, Lo Keyboard or ~ouse disconnected
LISA EDJT FD1 -22- fFPLE c:ctPUTER ~flOENTIAL
fq!e!Mfix Bi JIJt DATA SA\f KAS·
This section gives a complete listing of information seved by the boot
A:I1 in LISA lIemory:
flX)RESS
$180-183 Power-up status (0 • ok, any bit • '1' indicates
error)
B1 t 0 - tttJ error
1 - CPU selection logic error
2 - Video error
3 - Parity logic error
4 - Unexpected NNI interrupt
, - Bus error
6 - Address error
7 - Miscellaneous exception (e.g., divide-by zero)
8 - Illegal instruction error
9 - Line 1010 or 1111 error
10 - Keyboard VIA error
11 - Parallel port VIA error
12 - IAJ board a:PS error
13 - Keyboard a:PS err.or
14 - Clock error (can't read)
l' - RS232 port A error
16 - RS232 part B error
17 - floppy disk interface error
18 - 110 card access error (bus error occurred)
19 - a:PS reset code error
20 - 110 or keyboard error (can't determine which)
21 - Memory RI\tI error
22 - Memory pari ty enor
23 - Keyboard disconnected
24 - House disconnected
~ - 110 slot 1 error
26 - 110 slot 2 error
27 - 110 slot 3 error
$184-18~ Memory sizing error results
$186-$196 Resul ts of ",emory read/wri te tests (1 word/12BK of ",emory)
$196-$lA5 Reserved for second megabyte of memory
$lA6-$lA9 Parity error memory address
$lAA-$lfe Memory error address latch
LISA EmT RCI1 -23- if'PLE cnAJTER ~flDENTIAL
Slfe-S1Af Seve ot reg 07 on exception errors
$180-$181 Results ot MNU tests (context/data bits)
$182 Keyboard 1d
$183 Boot devi ce 10
S(X) - Upper 871 floppy or built1n herd disk drive
SOl - Lower 871 or SONY floppy drive
$02 - Profile attached to parallel port or builtin herd
en sk (defaul t )
*>3 - 110 slot 1, port 1
~ - 110 clot 1, port 2
$06 - 110 slot 2, port I
$07 - 110 slot 2, port 2
$09 - 110 slot 3, port 1
SOA - 1A) clot 3, port 2
$Of - Power cycli ng
$10 - Abort to ROM Monitor
$184 Device dependent error code
Floppy. Hard Disk
01 - Invalid cornand eo - Not attached
02 - Imlalid drive 81 - Not ready
03 - Invalid side 82 - Unexpected response
04 - Invalid sector 83 - Nonzero status bytes
05 - Invalid track 84 - Bad Header (for boot)
06 - Invalid aask byte 8' - Timeout error
07 - Disk not clamped
08 - Drive disabled
09 - Interrupts pending ItO Slot
10 - Invalid rormat perm ~ - Card not installed or
11 - RJ1 test enor can't access
12 - Randan mJ, Nil or ER< 91 - Invalid boot id
20 - ~sk write protected 92 ~ Bad checksum
21 - Unable to verify data 93 - Bad status
22 - Unable to clamp
23 - 01 sk read error
24 - Disk write error
25 - Unable to unclemp
26 - Unable to adjust d1sk speed
(no speed marks on disk)
27 - Unable to adjust disk speed
within timeout (found marks)
28 - Unable to write speed track
29-37 - Reserved
38 - Bad Header (tor boot)
39 - Timeout error (tor boot)
LISA EDlT FD1 -24- APPLE (l)oFUTER CCl'IFlDENT I AL
$18:)-S159 Device dependent error data
871 floPDY Hord Disk I/O Slot
$185 Addr checksum errors Error byte #1 Reserved
SlB6 Data checksum errors Error byt e #2 Reserved
$187 Retry count Error byte 113 Reserved
$188 Reserved Error byt e #4 Reserved
$189 Reserved Reserved Reserved
$1BA-$1BF Clock setting (Ey/dddlh~ss/t format)
$ lCO-$lC3 Register DO
$lC4-$1C7 Register 01
$1C8-$lCB Register 02
$ 1CC-$ 1CF Register.• 03
$100-$103 Register D4
$104-$107 Register 05
$108-$ lOB Register 06
$lOC-$lDF Register 07 - Overall test result ~ndicator ('1' bit is
error). Bi ts seme as power-up status value.
$lEo-$1E3 Register AO
$1£4-$1£7 Reg,ister Al
$lE8-$lEB Register A2
$lEC-SlEf Register A3
$lFo-$lF3 Register A4
SlF4-S1f7 Register A'
$lF8-$lF'B Register A6
SlfC-Slff Register A7 (User st~ck pointer)
$240-$2'F System serial nUlber (format varies)
$260-$267 Scratch area
$268-$268 Suspected (logical) error address for per1ty error
S26C-S26F Oata written to suspected error address
$270-$273 . Actual (logical) error address found during parity error search
S27~-$277 I)ata read on parity error during search
$278-$278 (Physical) address read frOl'A pari ty error address latch
$27C. Error row (0-7) it parity chip failure, where 0 • first 12BK
lIemo!y row (board 2, row E), 7 • last 128K memory row (board 1,
raw E)
$270 Error coll.l'An (9 or 14) 1 r pari ty chi p rail ure
$280-S28F Exception data save area
$280-$281 Function code
$282-$28' Exception address
$286-$287 Instruction register
$288-$289 Status register contents
$28A-$28D PC at time of exception
$28E-$28F Reserved
LISA fD)T FU1 -2~ FPPLE et:tA.JTER ~flDENTI AL
$290-$293 Supervisor stack pOinter
$294-$297 Hi Oh physi cal lIemory address + 1
$298-$299 110 slot 1 card id
$29A-$29B 110 slot 2 card id
$2OC-$20C> 110 slot J card id
$29E-$2AO Reserved
$2A1 Save of disk controller ROM id
$2A2-$2A3 Reserved
$2A4-$2A7 Low physi cal address
$2A8-$2~ Total emount of memory
$2f!C sec test results
$2fO Memory board in error
$2(£ Results of disk controller self-test (O=no error)
$2Af System type: 0 • Lisa 1
1 • lisa 2 with Sony, old 110 board (slow timers)
2 • lisa 2 with Sony, new 110 board (fast timers)
3 • lisa 2110 with Sony, new lID, internal disk
$2BO-$2BF CCPS reset codes and keybo8.Td input
$2C0-$400 RON scratchpadlstack area
In addition, the ROM uses the following areas of parameter memory:
$ fCC 189 Boot device id (upper ~ bits)
$FCClED Mouse onlExtended Memory test indicators
(bit 7 • 1 means mouse should be connected)
(bit 6 • 1 means test all of memory)
$fCClFD Paremeter lDemory validity checksll'R byte #1
$FCClFF Parameter merraory validi ty checkstJ'ft byte 112
LISA BOOT RCJ1 -26- ~LE CDflUTER CCtlfIDENTIAL
fApend1x Cj Externol Intcrtcps
These paoes give details on the various ROM routines available for use
by external sottwere. Unless specitied otherwise, all reQ1sters ere
preserved. Addresses ere Qiven with 'XX' prefix since the exact address
depends on the system t11J setting for RD1 access. The boot RCl1 defaul t
is XX • SFE.
LISA EmT RCI1 -27- fl='PLE ro1="u'TER al'~FIDENTI AL
NR'E : F01 "Mon1 tor"
FUCrICI'i: This is an entry point into the "Customer mode" of the R()1
nonitor. It is intended to be used as an exit point for
fatal errors dur1nQ boot1nQ or other cases where LISABUG is
not available. Registers are saved upon entry and display
is possible for icons, error codes, and messaQes to the
screen. Assumes stack pointer set to area that won't
conflict with ROM low memory usaQe (SO - $600), and MHU set
to allow FU1 readlwrite access to that area.
IH=\JTS REWIRED: 00· error code, or 0 for no error code
(lower word displayed, leading O's suppressed)
A2 • ptr to icon·, or 0 for no icon
.• (MSS. 1 1r 1con not canpressed)
A3 • ptr to message for display, 0 for no messa~e
(must rollow guidelines of d1spley message
routine)
Memory location $110 • base address of screen in
logical range of 0 - 1tf3
·Standerd lisa icon is a 6 byte (48 bit) wide by
4 byte (32 bit) high bitmap. ROM uses a
proprietary algori ttm to canpress these icons in
order to save RD1 space. Software not using this
algorittm should set the address MSB • 1 to
indicate an untompressed icon.
CJJTPUTS: Icon, message and/or error code displayed. Video paQ! set
according to $110 setting, moni tor "Customer mode" entered.
CALLlt(j SEc:tEH:E: JUip to address $XX0084, no return to celler.
USA a:xrr RCJ1 -28- FFPLE ClJ'AJTER ~FlDENTIAL
NfV'E : 01 spl tty lIessage
F'LtCTICli: Enabl es d1 spl f!II of Inessaoes to Li sa screen usi no RCI1
character font. The video page must be preset by the
call1no progrem 1 r not already· set. The supported che.recter
set includes all upper case alpha cheracters, diOi ts 0-9,
space, carriage return, period, minus sion and I.
Itt=\JTS REQJIRED: A3. address or ASCII message terminated by a 0 byte.
~ • column tor left ~sroin if message includes a CR
0' • displtty row (0 - 31 decimal)
06 • displtty column (0 - BB decimal)
Nerft.ory location $110 • base address of screen in
1001cal adddress ranoe 0 - $F8(X)().
DJTPUTS: 0', 06 updated to new display pOisit1on according to message.
CALLIt«i SECl.Et£E: JSR to address $>0(0066.
LISA EDJT RD1 -29- f!FPLE CCtRJTER cn~flDENTI AL
NftE: w.r1te r11J Registers
Fl..tCTI~: This routine provides the ability to set two t1tJ registers
at a time followed by updating. of the register addresses if
desired. The context must be preset by the celling proQI'etn.
ItFUTS REWIRED: A2· address of' 1st t11.J regi st er
A3 • address of 2nd HHU register
A4 • return Address
A' • address increment for tttJ addresses
00 • data value f'or 1st t1tJ register
01 • data value for 2nd tttJ register
(JJTPlJTS: A2, A3 updated
.• by address increment .
CALLIN:; SECtEta: Load A4 wi th return address, then jtnp to address
$XXOOBC.
LISA EDJT RCJ1 -30- i4'PLE a:tFt..1TER al'If I DENT I AL
NR£ : Read Hard di sk Block
FUCTICJ'i: Thi s rout i ne enabl es readi no of 1 block from a Profi 1e type
hard disk attached via a parallel port. Uses polling to do
read, disables interrupts durino operation.
Itf'UTS REWIRED: 01. block to read
02 • timeout count for hard disk ready (1 count •
10.6us)
03 • retry count
D4 • threshold count
A1 • address to load header (20 bytes)
A2 • address to load data ('12 bytes)
aJTPUTS: Cany bi t set 1 f error.
00 • error code as toll ows :
00 • no error
eo • Hard disk not attached
81 • Hard disk not ready
82 • Unexpected response
83 • Nonzero status bytes
85 • Timeout error
01 • error bytes (see Protile spec tor format)
CALLltti SEQ.Et£E: JSR to address $)0(0090.
[£STROYS : DO, Oland AO.
USA a:x:rr RCI1 -31- FFPLE CD1'l.JTER m~flDENTl AL
Nft£: Read Floppy Sector
FUNCTION: Reads one sector from specified floppy drive via polling.
Disables interrupts during operation.
ItfJUTS REC.lJIRED: 00. speed
01 • drive/side/sector/track
02 • read ti~eout (each count • 9.5us)
AO • base address or d1,sk shared memory
A1 • address to load header
A2 • address to load data
OUTPUTs: Carry bit set it error.
00 • error code as follows:
00 • no error
XX • standard Floppy error codes (see Appendix A)
39 • timeout error
CALLllil SEClEa: JSR to address $)0<0094.
[ESlROYS: AO and DO.
LISA BOOT RQ1 -32- APPLE 0l1?UTER m~fIDENTIAL
NfV"E: Basi c Memory Test
FltCTIcri: Tests memory using a pseudo-randan pattern. Memory range is
completely written with pattern, then read back and verified
starting from first address.
ItflUTS REWIRED: AO· starting address to test
Al • ending address (range must be multiple of 4 bytes)
A4 • return address
OUTPUTs: Zero condition code bit set if no error.
03 • CR mask or errors, 0 if no error.
CALLltG SEClEH:E: Load A4 wi th ret urn addI'ess, jlJnP to address $XXOO98.
LISA BOOT RD1 -33- ~LE cnFUTER C()iflDENTIAL
NFtE: Read tttJ Registers
FltCTI~: Enables reading of a pair of I11J registers in an
'·auto-increment II rashion.
ItPUTS REQ,JlFE>: 02. cont ex t to read (0 - 3)
A2 • address of 1st MNU register
A3 • address of 2nd MHU register
A4 • return address
A5 • Increment ror tt1.J addresses
ClJTPUTS: DO. cont ent s or 1st tttJ regi st er
01 • contents of 2nd MMU register
A2, A3 updat ed by A5 val ue
.•
CALLlt(J SEtlEta: Load A4 wi th return address, then jlRP to address
$XXOOA4. '
r£STROYS: 03
LISA BOOT RD1 -34- ~LE aH=1.JTER m~FlDENTIAL
NR'£: Send a:PS ccrnand
fl.tCTlai: Sends ccmnsnd byte to a:PS that controls keyboard and mouse
interfaces. Disables interrupts during operation.
ItRlTS F£WIRED: DO. ccmnand to send.
OUTPUTS: Carry bit set it ti~eout error.
CALLlf'C SECXBCE: JSR to address $XXOOAB.
LISA BOOT RCt1 -3~ iPPLE CCtA.JTER ~flDENTIAl
NFf'E : Read Cl ockltal ender
Fl..tCTI~: Reads settino of a:PS clock/calender vie pollino. Disables
interrupts during operetion.
ItRJTS REWIRED: None.
OUTPUTs: Saves settino at followino addresses:
S1BA • SEy
SlBB • dd
$1BC • dh
$180 • tn
$1BE • liS
$1Bf • rot
where y • year, ddd • days, hh • hours, mm • minutes, ss K
seconds, and t • tenths.
CALLIt(; SE(l.DCE: JSR to address $)O«)O,:c.
DESTROYS: AO-A2,DO,Ol
LISA BOOT RD1 -36- APPLE OlPUTER m~FlOENTIAL
NFtE: Display hex error code in decimal.
F1..tCTICIi: Di spl ays error code as decimal val ue on Li sa screen.
Assunes screen posi tion set accordino to value in memory
location '110.
ItFUTS REWIRED: 00· code to display (lower word displayed)
05 • pixel row tor display (0 - 310 decimal)
06 • byte col tor display (0 - 88 decimal)
DJTPUTS: D' updated to display row + 10.
06 set for col tlftn 1.
CALLlt-li SEQ...Eta: JSR
.• to add%' ess $)O(OOBO •
LISA EOJT RCJ1 -37- FFPLE CCtFUTER ~FlDENTIAL
tW'E: Set Contrast.
f1.JCTICJi: Sets screen contrast with input value.
Itt=\JTS REWIRED: DO. contrast value (00 - Sff, 00 • full on)
A4 • return address
CVTPUTS: None.
CAllltIi SEQ..Eta: Set return address in register A4, then junp to
address $XXOOO4.
IESTROYS: AO
LISA BOJT RCJ1 -38- . ~LE CCtR1TER ~flDENTIAl
NA£ : Beep Speaker
Fl.KTICIi: Produces squere wave fran speaker according to input
parsneters.
ItfJUTS FalJlRED: DO. desired frequency (00 - $AA, $AA • 333 hz)
01 • duration (0 • .5 ms, each additional count • .~s)
02 • voltae (0, 2,4, ... , $E; O.lowest)
aJTFIUTS: Tone from speaker.
CALLlt(; SEO.£t£E: JSR to address ~B.
USA BOOT RCJ1 -39- ~LE ca-AJTER ~flDENTIAL
NftE:- Ver-rtyCnecKslII'
f1..H:TICIi: Canputes checks"" of memory or shared memory contents and
comperes to expected result which is assumed to be last word
of the memory area read.
ItfJUTS REOJlRED: ~. ste.rt1nQ address to veri ty
00 • nlJ'ftber of words - 1
01 • 0 tor regular ~emory (uses MDVE.W for access)
• nonzero tor shared memory (uses t1JVEP tor access)
D.JTPUTS: Carry bi t set it error.
02 • expected checksum (last word read)
03 • c~puted checksum
..
CALlltIi SEQ.&CE: JSR to address $XX(X:EC.
LISA 801T RCI1
tiM: Wr1 t e CheckslIn
FUNCTION: Computes checksum of shered memory contents (with MOVEP
instruction) using a 16 bit add and rotate algorithm, and
then writes inverse of result to last word of specified
shared memory area.
IKlUTS RECUIRED: AO. sh8I'ed memory address (e.o., base address of
par snet er memory)
00 • nunber or words - 2 of shared memory area (e. g.,
30 tor parsneter memory)
aJTPUTS: None, resul t wr1 t ten in shared memory area
CALLIN:J SEQ.DCE: JSR to address $XXOOCO.
LISA fOJT RCJ1 -41- ,:ppLE a:H=tJTER ~fIOCNTI AL
tw£ : Read syst era ser1 al nUiber
fLtCTI~: Reads Lisa system serial nunber stored in video pran.
ItflUTS REWIRED: ~. address for save of seri al nunber
OJTPUTS: Carry bit set it read 0<. Serial nllnber saved in low nibbles
of 32 consecutive byte rield. Format varies according to
date of system.
CALLIH:i SEQ..eCE: JSR to location SXXOOC4.
tESTROYS: 00-06, Al-A6
..
Note: RCI1 also autcnat1ca.lly saves system serial nl.l1lber during power-up •
in memory locations $240-$25F.
LISA EDJT RD1 -42- ,:ppLE CD-RJTER m~FlDENTI AL
This mode is provided as an aid f'or lIanufacturing in doing system
testino. Invoked by using the fFPLElSHlfTlP key sequence, it causes the
ROM to continually cycle through its various power-up diagnostics,
resetting the system after each pass to begin a new cycle. In addition,
the JU1 causes the system to power down after a speci fied time interval,
with the CCPS initialized so that the systen will also "wake-up" after
the same selected interval. The default f'or this is 1 hour (60
lIinutes), but this can also be "toggled" to a f'aster interval of 3
minutes on/3 minutes of'f' by simply hitting the mouse button between the
two speaker clicks. Hitting the mouse button during a later pass of the
diagnostics will toggle the interval back to the 60 minute default.
A variety or messages are displayed in the power-cycling mode. At the
end of each pass, the system will pause for about' seconds with the
following messages on the screen in an "alert box":
PatER CYClIt-G AT XX
T1t'E IS A EB CC 00
where XX • the power on/off' minute interval in decimal, and the time is
shown u A-day, BBshours, CCsminutes, and OOsseconds. On the f'irst pass
of' power cycling the clock is set as day 1, time 00:00:00, so the run
time message gives an indication or how long the test has been in
prooress.
A test of the floppy dr1ve(s) is also performed during power-cycling,
end requires a formatted diskette inserted in the drive. The ROM
attempts to Simulate expected normal system operation by exercising each
drive for approximately 10 seconds fNery 2 minutes. This is done by
checking the run time after each pass, and if 2 or more minutes have
elapsed, the ROM executes a test that reads the first sector of fNery
track on the top side of each disk. If any errors occur, the test is
tm:minated and the message "flCPPY TEST fAILED" is displayed. In
addition, the messaoe
flCPPY ERFm
. CQ..NT IS XXXX
is always displayed at the end of this te'st, where XXXX s a running hex
count of floppy t est errors.
Power-cycling mode ~ust be terminated by inputting the APPUEIENTER key
sequence, and will result in entry to ROM Customer monitor mode with the
following messages displayed on the screen:
LISA fO)T RCt1
UXP CClM IS XXXX
TItE IS A EI3 CC DO
flCFPY EFIm CClM IS YYYY
Also displayed ere the Customer mode option "buttons" since control is
returned to the RCI1 at this point. As before, XXXX is a running hex
count of the nunber of passes executed, t:he run time is expressed as
days, hours, minutes .and seconds elapsed since the testing was first
started, end YYYY is the running hex count of floppy test errors.
Note: It the APP~ method is not used to terminate power cycling,
the paremeter memory indicator for power cycling will not be erased and
the system will start cycling again the next time it is powered up .
.•
The followin; areas ot paremeter memory ere used by the FU1 when doing •
power cycling:
$FCC189 power cycling indicator • sex, X • don't cere
$FCCleo lIerAorytest indicator (bi t 6 • 1 f'or test all memory)
srCC191 first pass rlag (01 • no)
$FCC193 save or 1ast hour val ue read
SFCC195 loop count high byte
SfCCl97 loop count low byte
$FCC199 hour save needed flag (01 • no)
$FCCl9B awe of' 1ast mi nut e val ue read
SFCC1~ floppy error count high byte
$fCCl9f floppy error count low byte
SFCCIAI-IA7 save or 1ut clock val ues read
SfCClBl save of' last alarm value sent to CXPS
$FCC1C1 minute counter for power cycling
SfCC1C3 cycling interval (in minutes)
SFCC1C5 .inute counter tor floppy testing
USA EDJT RCI1 -44- FFPLE a:J1'UTER a:l'tflDENT I AL
Appendix E; fDJT fD1 O£DCSltV8SSE)flY AUt,jJ£
The latest boot JU1's have the ro110.-1ing Data 110 reported checkStDs:
Part' Check.",
341-o17~ (high bytes) 7042
341-o176-H (low bytes) DA32
The boot IU1 source code is contained in a series of 60000 assembly
langu80e text files. These files have the following names:
RNXXX.E.TEXT - comments and equates
RNXXX.K.TEXT - kernel diagnostic tests
RNXXX.S.TEXT - secondary diagnostic tests
RNXXX.B.TEXT - boot routines
RNXXX.M.TEXT - RON mo~tor routines
RNXXX.G.TEXT - graphics routines
.... here XXX • internal Rl1 id (e.o., 248 for version 2, rfN H (ASCII
'~8' )) .
To create a master RD1 fran these files, do the following;
1) A)ssemble the r11e RNXXX.E.TEXT to create a .CODE r1le celled
RNXXX.COOE, where)OO( 1s defined as above. A list file can also be
created 1r desired 1n the usual manner.
2) X)ecute the program 0£0<SlI1 to compute the checksUR ror the RD1.
Respond wi th the RNXXX nerAe to both progr8l1 prcnpts to create a .COOE
f1l e wi t h the correct checksun. .
Ir uslng an Apple] [ - Data lit) System 19 Prom Burner canblnatlon do the
following:
3) Transfer the resulting RNXXX.COOE rile t:o an Apple ] [ diskette and
place 1n the second drive or the Apple ][ connected to the Data lID
System 19 Prom Burner.
-4) Turn on the Data 110 i,. not already on, -and press "SELECT", "Fl"
(fran the keyboerd), and 'asTMT". The DATA 110 display should shOetl ~
rows of horizontal lines. Note that the Data 110 l.tiIPfl( lIodu1e must
elso be inst81led if not already done.
') On the Apple ] [, X)ecute the proorefn BLOFC£R, and enter ":RNXXX to
the source file prompt.
LISA EDJT RD1 -45- fAlLE a:HlUTER ~FIOENTIAL
6) Enter "N" to the fUTO ~ft1? prompt.
7) Enter -ri" to the SPLIT Tt£ BYTES? pranpt.
8) Enter "3fff" to the Et()It'lI ~SS[t£X): prompt.
9) The loadinQ of the ROM code file is shown by rapidly chanQing digits
on the display ot the Data 110. Wait until fully loaded (Apple ][
screen will s~ "[)(J£").
10) On the Data lit), press ''SELECT''" "A'" '~rTr'n"
~.nlU"\, "2O(X)" , "STff<T" •
This will split the loaded code file into high and low byte groups.
High bytes will reside at locations Q---$lffF or the Data 110 memory, with
low bytes at $2000-$3fFf.
11) Press the ''RU:;'' key, and enter "35" to the F pranpt on the Data I/O
display, and "33" to· the P prompt.
12) Insert a blank 2764 EPROM into the socket indicated by the lit UED
end then press "START".
13) When the Data 110 signals canplete label the Rl1 with version
nunber, letter "H" tor high bytes, and the checksun as shown on the Data
110 di spl til. Remove and set esi de t hi s EPROM.
14) Press ''SLOO< LIMITS", .. 2O(X)", ''ENTER'', .. 2O(X)", ''ENTER" "0" ''ENTER'',
''SELECT'', "A7", "STfRT". This sequence moves the low byte group to
G-$lFFF memory area co it can be burned into an EPROM.
15) Press the ''RU:;'' key, insert a blank 2764, and then press tlSTfm"tI.
16) When this burn is done, label the RCI1 with version nunber, "L" for
low bytes, and the checksun value fran the Data 110 display.
Steps 3-16 can also be done using a Lisa - Data 110 System 29A Prom
Burner combination as tollows:
3).Transfer the resultino RHXXX.CODE tile to a Lisa diskette and place
in the Lisa connected to a Data 110 System 29A Prom Burner.
~) Turn on the Data 110 1t not already on, and press "SELECT", "F1"
(fran the keyboard), "STfRT", "STFmIt. The DATA I/O display should shOll
''REJ1JTE ti:[£ 0". Note that the Data 110 LNIPFf< 2 module must elso be
installed 1f not alre8dy done.
!) On the L1s~ X)ecute the program BLOID:R, which will give the 1ni tial
LISA EOJT FU1 -46- AJPLE CD"FUTER aJiflOENTI AL
prompt "(D)ownload, (U)pload, (T)a1k, Ex1t[CR)? ". Enter "0" for
download.
6) Enter the appropriate "A1XXX" code file nerne to the "Enter
fileneme[.code)" prompt.
7) Enter "16384" to the "Enter nunber or bytes (in decimal) to transfer"
11
prompt. The Lisa will return the message "Romsize in hex • 4000 •
8) The loading of the ROM code file is shown by a rapidly changing
"clock" symbol on the display of the Data lID. Wait until fully loaded
(Lisa screen will redisplay initial prompt).
9) Hit "return" key on Lisa. Data lID display should say "REFDY".
10) On the Data lit), press "SELECT"""A~" 1-sT1RT"
" .'2(X)()It .. "STFRT"
.
This will split the lO8ded code file into high end l~ byte groups.
~gh bytes will reside at locations o-$lFFF of the Data 110 memory, with
low bytes at $2000-$3fff.
11) Enter the kev sequence ''(lPY'', "R,:t1", 1t()(XX)", "STFfU", "2(X)()",
"STfRT", 'ttvlcE f., "()(XX)", "STMT". This instructs the Data lID to copy
the data loaded into Rft1 from address o-lf'f'f hex into a prom device. The
Data 110 display will then ask tor a t~ily/pinout code for the device
to be used. for ftI) p'8I'ts, enter the sequence "79", "33". for Hitachi
parts enter "AF", "33'. For 8frtJ other parts, reter to the Data lID
documentation for the correct codes to use.
12) Insert a blank 2764 EPROM into the socket indicated by the lit ~
end then press "START".
13) When the Data 1)0 signals complete label the ROM with version
letter "H" for high bytes, and the checksun as shown on the Data
I'llJnber,
110 display. Remove end set aside this EPROM.
14) Press 1'(lPY", "R~", 112(X)()", '-sTMTu, 112(X)()", uSTFRT", uCEVlCE",
''0000'', "STFRT", followed by the fenily/p'inout codes if using a
different EPROM then the initial one used. This sequence copies the
data from memory address 2000-3ff'f' hex 1n'to the prom.
1') Insert a blank 2764 EPROM into the socket indicated by the lit LED
end tht!n press "STIRT".
16) When this burn is done, label the FU1 with version nunber, "L" for
low bytes, and the checksun value fran the Data 110 display.
LISA oo)T RCI1 -47- ~LE a::wuTER CCI'IFlDENTIAL