A B C D E

ZZZ

PCB
Part Number = DAZ0J200100

1 1

Compal Confidential
2 2

K73 Schematics Document

AMD APU Zacate-FT1 + FCH Hudson-M1 + GPU Seymour XT-M2

3
2010-02-22 3

REV:0.22

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P01-Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 1 of 47
A B C D E
 A B C D E

Compal confidential
LA-7323P

1 1

Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2

AMD Brazos APU Single Channel BANK 0, 1, 2, 3 page 8,9
1.5V DDRIII
FT1
LVDS Conn. HDMI Conn. CRT Conn. BGA 413-Ball
page 10 page 11 page 10
19mm x 19mm Port 0
SATA HDD Conn.
page 28
page 5,6,7
Port 1
LVDS(DIS) HDMI(DIS) CRT(DIS) UMI Gen.1 x4 SATA ODD Conn.
page 28
2.5GT/s per lane
SATA Port 2
SATA HDD Conn.
page 28

2
AMD Seymour-XT 2
PCI-E GPP x4 GEN2 2Channel Speaker
page 17 ~ 23 Hudson M1
page 25
BGA 605-Ball
23mm x 23mm AZALIA Audio Codec Audio Jacks X 2
ALC269 (Headphone,page
MIC)25
VRAM 64*16/ page 25

VRAM 128*16 PCI-E 2.0 x1

USB2.0 DMIC
page 12 ~ 16 page 10
DDR3*4
page 22
Port 1 Port 0
Port 0
LPC BUS USB Conn.
page 31

Port 1
Mini Card-1 WLAN LAN(GbE) USB Conn.
page 31
3
(With Bluetooth) RTL8111E ENE KB930 3

Port 5
USB Conn.
page 27 page 24 page 29
(LS-7323P) page 25

Port 2
Camera
page 10
RJ45 Int.KBD
Port 3
page 24 page 30 Mini Card WLAN
RTC CKT (With Bluetooth)
page 27
Touch Pad SPI ROM
page 12 Sub-Board page 30 page 29 Port 4
Card Reader
RTS5137 page 26
Power On/Off CKT LS-7324P Thermal Sensor
HDD/B
page 33 page 28 page 18 Port 6 USB Conn.
(LS-7323P) page 25
4
DC/DC CKT LS-7325P 4

PWR/B
page 23,34 page 33

LS-7323P Security Classification Compal Secret Data Compal Electronics, Inc.

Power Circuit Audio Jack & USB Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title

page 35 ~ 44 page 25 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P02-Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 2 of 47
A B C D E
 A B C D E

Voltage Rails FCH Hudson-M1 Brazos FCH Hudson-M1

Power Plane Description S1 S3 S5 USB Port List PCIE Port List SATA Port List
VIN Adapter power supply (19V) N/A N/A N/A USB1.1 PCIE0 SATA0 HDD
B+ AC or battery power rail for power circuit. N/A N/A N/A
Port0 NC PCIE1 SATA1 ODD

APU
+APU_CORE Core voltage for CPU (0.7-1.2V) ON OFF OFF GPU
+APU_CORE_NB 1.0V switched power rail ON OFF OFF Port1 NC PCIE2 PCIE x4 SATA2 NC
1 1
+1.5V 1.5V power rail for CPU VDDIO and DDRIII ON ON OFF
+0.75VS 0.75VS switched power rail for DDR terminator ON OFF OFF
USB2.0 PCIE3 SATA3 NC
+1.0VS 1.0V switched power rail for NB VDDC & VGA ON OFF OFF Port0 JUSB1 PCIE0 LAN SATA4 NC
+1.1VS 1.1VS switched power rail ON OFF OFF
Port1 JUSB2 PCIE1 WLAN SATA5 NC

FCH
+1.8VS 1.8V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON* Port2 Camera PCIE2 NC
+3V_LAN 3.3V power rail for LAN ON ON(WOL) OFF
Port3 JMINI(WLAN) PCIE3 NC
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON* Port4 Card Reader
+5VS 5V switched power rail ON OFF OFF
Port5 JUSB3
+VSB VSB always on power rail ON ON ON*
+RTCVCC RTC power ON ON ON Port6 NC
+1.1VALW 1.1V always on power rail ON ON ON*
Port7 NC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Port8 NC

2 Port9 NC 2

SMBUS Control Table

Port10 NC

SOURCE MIINI1 BATT APU FCH SODIMM VRAM

Port11 NC
Port12 NC
EC_SMB_CK1
EC_SMB_DA1
KB930 X V X X X X Port13 NC
EC_SMB_CK2
EC_SMB_DA2
KB930 X X V V X V
FCH_SMCLK0
FCH_SMDAT0 PCH
V X X X V X SCL0,
SCL1,
SDA0
SDA1
(Primary SMBUS in the S0 domain)
(Secondary SMBUS supporting ASF)
SCL2, SDA2 (Primary SMBUS in the S5 domain)
SCL3, SDA3 (Primary low-voltage SBMBUS for Processor TSI)
FCH_SMCLK3
FCH_SMDAT3 PCH
X X V X X X SCL4, SDA4 (Primary SMBUS in the S5 domain)

3 3

Symbol Note :

BOM Structure : means Digital Ground

15@ : E240 1.5GHz
16@ :E350 1.6GHz
X76@ : VRAM second source : means Analog Ground
LS@ : Level Shift
4 NLS@ :non Level Shift 4

USB30@ :USB3.0

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P03-Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 3 of 47
A B C D E
 5 4 3 2 1

Without BACO option :

Power-Up/Down Sequence PE_GPIO0 : Low -> Reset dGPU ; High ->Normal operation
1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-up PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON
sequence, though a shorter ramp-up duration is preferred.
BACO option :
2. VDDR3 should ramp-up before or simultaneously with VDDC. PE_GPIO0 : High ->Normal operation (dGPU is not reseton BACO mode)
PE_GPIO1 : Low -> dGPU Power OFF ; High -> dGPU Power ON (always High)
3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin before
D DPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10. dGPU Power Pins Voltage PX 3.0 BACO Mode Max current
D

4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC and PCIE_PVDD, PCIE_VDDR, TSVDD, VDDR4, VDD_CT, 1.8V OFF ON 1679mA
VDD_CT have ramped up. DPE_PVDD, DP[F:E]_VDD18, DP[D:A]_PVDD,
DP[D:A]_VDD18, AVDD, VDD1DI, A2VDDQ, VDD2DI,
5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts to
DPLL_PVDD, MPV18, and SPV18
ramp-up (or vice versa).)
DP[F:E]_VDD10, DP[D:A]_VDD10, DPLL_VDDC, and 1.0V OFF ON 575mA
SPV10
PCIE_VDDC 1.0V OFF ON 2A
VDDR3(3.3VSG) Note: Do not drive any IOs before VDDR3 is ramped up.
VDDR3 , and A2VDD 3.3V OFF ON 190mA
BIF_VDDC (current consumption = [email protected], in Same as OFF ON 70mA
PCIE_VDDC(1.0V) BACO mode) VDDC Same as
PCIE_VDDC
VDDR1 1.5V OFF OFF 2.8A
C
VDDR1(1.5VSG) VDDC/VDDCI 1.12V OFF OFF 12.9A C

VDDC/VDDCI(1.12V)

VDD_CT(1.8V)
PE_GPIO0 PE_EN BACO Switch
iGPU dGPU
PERSTb BIF_VDDC

PE_GPIO1

REFCLK PX_mode

B +3.3VALW MOS
+3.3VSG B

Straps Reset 1
+1.5V SI4800
+1.5VSG
Straps Valid +1.0V +1.0VSG
Regulator
2 3

Global ASIC Reset

+B Regulator
+VGA_CORE
+1.8V +1.8VSG
T4+16clock
SI4800
5 4
PWRGOOD

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P04-dGPU Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 4 of 47
5 4 3 2 1
 5 4 3 2 1

U22

ZACATE ZM161032B2238 1.6G BGA 413P

+1.8VS U22B
Part Number = SA00004KG70
16@ A8 H3 R398 1 2 150_0402_1%

DISPLAYPORT 1
B8 TDP1_TXP0 DP_ZVSS

DP MISC
TDP1_TXN0 G2
R399 1 2 1K_0402_5% APU_SVC B9 DP_BLON H2
R400 1 2 1K_0402_5% APU_SVD U22 A9 TDP1_TXP1 DP_DIGON H1
D R142 2 1 300_0402_5% APU_RST# TDP1_TXN1 DP_VARY_BL D
R401 2 1 300_0402_5% APU_PWRGD D10
R402 1 2 510_0402_1% TEST_25_L C10 TDP1_TXP2 B2
R141 1 2 1K_0402_5% TEST36 TDP1_TXN2 TDP1_AUXP C2
A10 TDP1_AUXN
B10 TDP1_TXP3 C1
ONTARIO CMC50AFPB22GT 1G BGA TDP1_TXN3 TDP1_HPD
C237 0.01U_0402_25V7K Part Number = SA00004KD70 B5 A3
1 2 @ APU_RST# C50@ A5 LTDP0_TXP0 LTDP0_AUXP B3

DISPLAYPORT 0
C238 0.01U_0402_25V7K LTDP0_TXN0 LTDP0_AUXN
1 2 @ APU_PWRGD D6 D3 R406 1 2 100K_0402_5%
C6 LTDP0_TXP1 LTDP0_HPD
LTDP0_TXN1 C12
A6 DAC_RED D13
B6 LTDP0_TXP2 DAC_REDB A12
+3VS LTDP0_TXN2 DAC_GREEN B12
D8 DAC_GREENB A13

VGA DAC
R410 1 2 1K_0402_5% APU_PROCHOT# C8 LTDP0_TXP3 DAC_BLUE B13
LTDP0_TXN3 DAC_BLUEB
V2 E1
12 APU_CLKP V1 CLKIN_H DAC_HSYNC E2
12 APU_CLKN CLKIN_L DAC_VSYNC
D2 F2

CLK
12 APU_DISP_CLKP DISP_CLKIN_H DAC_SCL
R411 1 2 1K_0402_5% APU_ALERT#_R D1 D4
12 APU_DISP_CLKN DISP_CLKIN_L DAC_SDA
R143 1 2 1K_0402_5% APU_SIC J1 D12 R144 1 2 499_0402_1%
43 APU_SVC J2 SVC DAC_ZVSS
43 APU_SVD SVD
R414 1 2 1K_0402_5% R1

SER
APU_SID PAD T66
APU_SIC P3 TEST4 R2
SIC TEST5 PAD T67
APU_SID P4 R6
SID TEST6 T5
TEST14 PAD T68
T3 E4 TEST15 R415 1 @ 2 1K_0402_5%
C 12 APU_RST# T4 RESET_L TEST15 K4 C
12 APU_PWRGD

CTRL
PWROK TEST16 L1
R169 1 2 0_0402_5% APU_PROCHOT# U1 TEST17 L2 TEST18 R416 1 2 1K_0402_5%
29 EC_THERM# PROCHOT_L TEST18
R168 1 @ 2 0_0402_5% APU_THERMTRIP# U2 M2 TEST19 R417 1 2 1K_0402_5%

TEST
12 FCH_PROCHOT# T2 THERMTRIP_L TEST19 K1
APU_ALERT#_R TEST25_H R418 1 2 510_0402_1%
ALERT_L TEST25_H K2 TEST_25_L
APU_TDI N2 TEST25_L L5
APU_TDO N1 TDI TEST28_H M5
APU_TCK P1 TDO TEST28_L M21 TEST31
TCK TEST31 PAD T73

JTAG
APU_TMS P2 J18 TEST33_H C516 1 2 0.1U_0402_16V4Z R420 1 2 51_0402_1%
APU_TRST# M4 TMS TEST33_H J19 TEST33_L C517 1 2 0.1U_0402_16V4Z R421 1 2 51_0402_1%
T93PAD TRST_L TEST33_L
APU_DBRDY M3 U15 Delete Test point for layout limitation
T94PAD DBRDY TEST34_H
Close to APU APU_DBREQ# M1 T15 20100917
DBREQ_L TEST34_L H4 TEST35 R422 1 @ 2 1K_0402_5%
F4 TEST35 N5 TEST36
43 APU_VDDNB_RUN_FB_H G1 VDDCR_NB_SENSE TEST36 R5 TEST37 PAD T76 R958 1 2 1K_0402_5%
+1.8VS
43 APU_VDD0_RUN_FB_H F3 VDDCR_CPU_SENSE TEST37
T77PAD VDDIO_MEM_S_SENSE
F1
43 APU_VDD0_RUN_FB_L VSS_SENSE K3
B4 TEST38 T1
W11 RSVD_1 DMAACTIVE_L ALLOW_STOP# 12
V5 RSVD_2 R423 1 2 1K_0402_5%
RSVD_3 +1.8VS
+3VS ZACATE ZM151032B1238 1.5G BGA 413P
15@ C639 1 2 0.1U_0402_16V4Z
@
1

R424
10K_0402_5%
2

B @ B
R425
2

1K_0402_5%
2
B

AMD Debug
1

@ Q79
E

APU_THERMTRIP# 3 1
H_THERMTRIP# 13
C

MMBT3904_NL_SOT23-3 +1.8VS +1.8VS

1 2 JHDT1
R427 0_0402_5% 1 2 APU_TCK R843 2 1 1K_0402_5%
1 2

1K_0402_5%
If FCH internal pull-up disabled, level-shifter could be deleted. 3 4 APU_TMS R840 2 1 1K_0402_5%
3 4
2
Need BIOS to disable internal pull-up!!
R842

5 6 APU_TDI R798 2 1 1K_0402_5%

5 6
7 8 APU_TDO
7 8
CPU TSI interface level shift
1

APU_TRST# R846 1 2 APU_TRST#_R 9 10 APU_PWRGD

0_0402_5% 9 10 +1.8VS
@ BSH111, the Vgs is: FDV301N, the Vgs is: R847 2 1 10K_0402_5% 11 12 APU_RST#
C236 1 2 0.1U_0402_10V7K 11 12
min = 0.4V min = 0.65V
R176 2 1 10K_0402_5% 13 14 APU_DBRDY
@ @ Typ = 1.0V Typ = 0.85V 13 14

+3VS
1 R428 2 1 R160 2 Max = 1.3V Max = 1.5V R177 2 1 10K_0402_5% 15 16 APU_DBREQ# R178 1 2 300_0402_5%
15 16
31.6K_0402_1% 30K_0402_1% 17 18 J108_PLLTST0 R799 1 2 0_0402_5% TEST19
17 18
1.607V for Gate If use level shift, EC_SMB need pull up
(pop R747 & R748) 19 20 J108_PLLTST1 R863 1 2 0_0402_5% TEST18
19 20
2
G

Please be noted about TEST_18 and TEST_19

APU_SID 3 1 EC_SMB_DA 1 @ 2 FCH_SID T0 FCH
A FCH_SID 13 A
S

@ R429 0_0402_5% SAMTE_ASP-136446-07-B

Q22 1 2 EC_SMB_DA2 TO EC CONN@
EC_SMB_DA2 18,29
BSH111 1N_SOT23-3 R430 0_0402_5%

1 2
R431 0_0402_5%
2
G

APU_SIC 3 1 EC_SMB_CK 1 @ 2 FCH_SIC

FCH_SIC 13 T0 FCH
Security Classification Compal Secret Data Compal Electronics, Inc.
S

@ R432 0_0402_5% 2010/08/20 2012/06/30 Title

1 2 EC_SMB_CK2
Issued Date Deciphered Date
Q23 TO EC
BSH111 1N_SOT23-3 R433 0_0402_5%
EC_SMB_CK2 18,29
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P05-FT1 CTRL/DP/CRT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1 2 Custom 0.22
R434 0_0402_5%
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 5 of 47
5 4 3 2 1
 A B C D E

U22E
DDR_A_MA0 R17 B14 DDR_A_D0
DDR_A_MA1 H19 M_ADD0 M_DATA0 A15 DDR_A_D1
DDR_A_MA2 J17 M_ADD1 M_DATA1 A17 DDR_A_D2
DDR_A_MA3 H18 M_ADD2 M_DATA2 D18 DDR_A_D3 DDR_A_D[0..63]
DDR_A_MA4 H17 M_ADD3 M_DATA3 A14 DDR_A_D4 DDR_A_D[0..63] 8,9
DDR_A_MA5 G17 M_ADD4 M_DATA4 C14 DDR_A_D5 DDR_A_MA[0..15]
M_ADD5 M_DATA5 DDR_A_MA[0..15] 8,9
DDR_A_MA6 H15 C16 DDR_A_D6
DDR_A_MA7 G18 M_ADD6 M_DATA6 D16 DDR_A_D7 DDR_A_DM[0..7]
4 M_ADD7 M_DATA7 DDR_A_DM[0..7] 8,9 4
DDR_A_MA8 F19
DDR_A_MA9 E19 M_ADD8 C18 DDR_A_D8
DDR_A_MA10 T19 M_ADD9 M_DATA8 A19 DDR_A_D9
DDR_A_MA11 F17 M_ADD10 M_DATA9 B21 DDR_A_D10
DDR_A_MA12 E18 M_ADD11 M_DATA10 D20 DDR_A_D11
DDR_A_MA13 W17 M_ADD12 M_DATA11 A18 DDR_A_D12
DDR_A_MA14 E16 M_ADD13 M_DATA12 B18 DDR_A_D13
DDR_A_MA15 G15 M_ADD14 M_DATA13 A21 DDR_A_D14
M_ADD15 M_DATA14

DDR SYSTEM MEMORY

C20 DDR_A_D15
R18 M_DATA15
8,9 DDR_A_BS0 M_BANK0
T18 C23 DDR_A_D16
8,9 DDR_A_BS1 M_BANK1 M_DATA16
F16 D23 DDR_A_D17
8,9 DDR_A_BS2 M_BANK2 M_DATA17 F23 DDR_A_D18
DDR_A_DM0 D15 M_DATA18 F22 DDR_A_D19
DDR_A_DM1 B19 M_DM0 M_DATA19 C22 DDR_A_D20
DDR_A_DM2 D21 M_DM1 M_DATA20 D22 DDR_A_D21
DDR_A_DM3 H22 M_DM2 M_DATA21 F20 DDR_A_D22
DDR_A_DM4 P23 M_DM3 M_DATA22 F21 DDR_A_D23
DDR_A_DM5 V23 M_DM4 M_DATA23
DDR_A_DM6 AB20 M_DM5 H21 DDR_A_D24
DDR_A_DM7 AA16 M_DM6 M_DATA24 H23 DDR_A_D25
M_DM7 M_DATA25 K22 DDR_A_D26 U22A
DDR_A_DQS0 A16 M_DATA26 K21 DDR_A_D27 PCIE_GTX_C_FRX_P0 AA6 AB6 PCIE_FTX_GRX_P0 C518 1 2 0.1U_0402_16V7K
8,9 DDR_A_DQS0 M_DQS_H0 M_DATA27 17 PCIE_GTX_C_FRX_P0 P_GPP_RXP0 P_GPP_TXP0 PCIE_FTX_C_GRX_P0 17
DDR_A_DQS#0 B16 G23 DDR_A_D28 17 PCIE_GTX_C_FRX_N0 PCIE_GTX_C_FRX_N0 Y6 AC6 PCIE_FTX_GRX_N0 C519 1 2 0.1U_0402_16V7K
8,9 DDR_A_DQS#0 M_DQS_L0 M_DATA28 P_GPP_RXN0 P_GPP_TXN0 PCIE_FTX_C_GRX_N0 17
DDR_A_DQS1 B20 H20 DDR_A_D29
8,9 DDR_A_DQS1 M_DQS_H1 M_DATA29
DDR_A_DQS#1 A20 K20 DDR_A_D30 17 PCIE_GTX_C_FRX_P1 PCIE_GTX_C_FRX_P1 AB4 AB3 PCIE_FTX_GRX_P1 C520 1 2 0.1U_0402_16V7K
8,9 DDR_A_DQS#1 PCIE_FTX_C_GRX_P1 17

PCIE I/F
DDR_A_DQS2 E23 M_DQS_L1 M_DATA30 K23 DDR_A_D31 PCIE_GTX_C_FRX_N1 AC4 P_GPP_RXP1 P_GPP_TXP1 AC3 PCIE_FTX_GRX_N1 C521 1 2 0.1U_0402_16V7K
8,9 DDR_A_DQS2 M_DQS_H2 M_DATA31 17 PCIE_GTX_C_FRX_N1 P_GPP_RXN1 P_GPP_TXN1 PCIE_FTX_C_GRX_N1 17
DDR_A_DQS#2 E22
8,9 DDR_A_DQS#2 M_DQS_L2
DDR_A_DQS3 J22 N23 DDR_A_D32 17 PCIE_GTX_C_FRX_P2 PCIE_GTX_C_FRX_P2 AA1 Y1 PCIE_FTX_GRX_P2 C522 1 2 0.1U_0402_16V7K
8,9 DDR_A_DQS3 M_DQS_H3 M_DATA32 P_GPP_RXP2 P_GPP_TXP2 PCIE_FTX_C_GRX_P2 17
DDR_A_DQS#3 J23 P21 DDR_A_D33 17 PCIE_GTX_C_FRX_N2 PCIE_GTX_C_FRX_N2 AA2 Y2 PCIE_FTX_GRX_N2 C523 1 2 0.1U_0402_16V7K
8,9 DDR_A_DQS#3 M_DQS_L3 M_DATA33 P_GPP_RXN2 P_GPP_TXN2 PCIE_FTX_C_GRX_N2 17
DDR_A_DQS4 R22 T20 DDR_A_D34
8,9 DDR_A_DQS4 M_DQS_H4 M_DATA34
DDR_A_DQS#4 P22 T23 DDR_A_D35 17 PCIE_GTX_C_FRX_P3 PCIE_GTX_C_FRX_P3 Y4 V3 PCIE_FTX_GRX_P3 C524 1 2 0.1U_0402_16V7K
3 8,9 DDR_A_DQS#4 M_DQS_L4 M_DATA35 P_GPP_RXP3 P_GPP_TXP3 PCIE_FTX_C_GRX_P3 17 3
DDR_A_DQS5 W22 M20 DDR_A_D36 17 PCIE_GTX_C_FRX_N3 PCIE_GTX_C_FRX_N3 Y3 V4 PCIE_FTX_GRX_N3 C525 1 2 0.1U_0402_16V7K
8,9 DDR_A_DQS5 M_DQS_H5 M_DATA36 P_GPP_RXN3 P_GPP_TXN3 PCIE_FTX_C_GRX_N3 17
DDR_A_DQS#5 V22 P20 DDR_A_D37
8,9 DDR_A_DQS#5 M_DQS_L5 M_DATA37
DDR_A_DQS6 AC20 R23 DDR_A_D38 +1.05VS 1 2 P_ZVDD_10 Y14 AA14 P_ZVSS R436 1 2 1.27K_0402_1%
8,9 DDR_A_DQS6 M_DQS_H6 M_DATA38 P_ZVDD_10 P_ZVSS
DDR_A_DQS#6 AC21 T22 DDR_A_D39 R435 2K_0402_1%
8,9 DDR_A_DQS#6 M_DQS_L6 M_DATA39
DDR_A_DQS7 AB16 Less than 1"
8,9 DDR_A_DQS7 M_DQS_H7
DDR_A_DQS#7 AC16 V20 DDR_A_D40 Less than 1"
8,9 DDR_A_DQS#7 M_DQS_L7 M_DATA40 V21 DDR_A_D41 12 UMI_RX0P AA12 AB12 UMI_TX0P_C C526 1 2 0.1U_0402_16V7K
M_DATA41 P_UMI_RXP0 P_UMI_TXP0 UMI_TX0P 12
DDR_A_CLK0 M17 Y23 DDR_A_D42 12 UMI_RX0N Y12 AC12 UMI_TX0N_C C527 1 2 0.1U_0402_16V7K
9 DDR_A_CLK0 M_CLK_H0 M_DATA42 P_UMI_RXN0 P_UMI_TXN0 UMI_TX0N 12
DDR_A_CLK#0 M16 Y22 DDR_A_D43
9 DDR_A_CLK#0 M_CLK_L0 M_DATA43
DDR_A_CLK1 M19 T21 DDR_A_D44 12 UMI_RX1P AA10 AC11 UMI_TX1P_C C528 1 2 0.1U_0402_16V7K
9 DDR_A_CLK1 M_CLK_H1 M_DATA44 P_UMI_RXP1 P_UMI_TXP1 UMI_TX1P 12
DDR_A_CLK#1 M18 U23 DDR_A_D45 Y10 AB11 UMI_TX1N_C C529 1 2 0.1U_0402_16V7K

UMI I/F
9 DDR_A_CLK#1 M_CLK_L1 M_DATA45 12 UMI_RX1N P_UMI_RXN1 P_UMI_TXN1 UMI_TX1N 12
DDR_B_CLK2 N18 W23 DDR_A_D46
8 DDR_B_CLK2 M_CLK_H2 M_DATA46
DDR_B_CLK#2 N19 Y21 DDR_A_D47 12 UMI_RX2P AB10 AA8 UMI_TX2P_C C530 1 2 0.1U_0402_16V7K
8 DDR_B_CLK#2 M_CLK_L2 M_DATA47 P_UMI_RXP2 P_UMI_TXP2 UMI_TX2P 12
DDR_B_CLK3 L18 12 UMI_RX2N AC10 Y8 UMI_TX2N_C C531 1 2 0.1U_0402_16V7K
8 DDR_B_CLK3 M_CLK_H3 P_UMI_RXN2 P_UMI_TXN2 UMI_TX2N 12
DDR_B_CLK#3 L17 Y20 DDR_A_D48
8 DDR_B_CLK#3 M_CLK_L3 M_DATA48 AB22 DDR_A_D49 12 UMI_RX3P AC7 AB8 UMI_TX3P_C C532 1 2 0.1U_0402_16V7K
M_DATA49 P_UMI_RXP3 P_UMI_TXP3 UMI_TX3P 12
DDR_RST# L23 AC19 DDR_A_D50 12 UMI_RX3N AB7 AC8 UMI_TX3N_C C533 1 2 0.1U_0402_16V7K
8,9 DDR_RST# M_RESET_L M_DATA50 P_UMI_RXN3 P_UMI_TXN3 UMI_TX3N 12
DDR_EVENT# N17 AA18 DDR_A_D51
8,9 DDR_EVENT# M_EVENT_L M_DATA51 AA23 DDR_A_D52 ZACATE ZM151032B1238 1.5G BGA 413P
M_DATA52 AA20 DDR_A_D53 15@
DDR_CKE0 F15 M_DATA53 AB19 DDR_A_D54
8,9 DDR_CKE0 M_CKE0 M_DATA54
DDR_CKE1 E15 Y18 DDR_A_D55
8,9 DDR_CKE1 M_CKE1 M_DATA55
AC17 DDR_A_D56
M_DATA56 Y16 DDR_A_D57
DDR_A_ODT0 W19 M_DATA57 AB14 DDR_A_D58
9 DDR_A_ODT0 M0_ODT0 M_DATA58
DDR_A_ODT1 V15 AC14 DDR_A_D59
9 DDR_A_ODT1 M0_ODT1 M_DATA59
DDR_B_ODT0 U19 AC18 DDR_A_D60
8 DDR_B_ODT0 M1_ODT0 M_DATA60
DDR_B_ODT1 W15 AB18 DDR_A_D61
8 DDR_B_ODT1 M1_ODT1 M_DATA61 AB15 DDR_A_D62
DDR_CS0_DIMMA# T17 M_DATA62 AC15 DDR_A_D63
9 DDR_CS0_DIMMA# M0_CS_L0 M_DATA63
DDR_CS1_DIMMA# W16
2 9 DDR_CS1_DIMMA# M0_CS_L1 2
DDR_CS0_DIMMB# U17
8 DDR_CS0_DIMMB# M1_CS_L0
DDR_CS1_DIMMB# V16 M23 +MEM_VREF 15 mils
8 DDR_CS1_DIMMB# M1_CS_L1 M_VREF
DDR_A_RAS# U18
8,9 DDR_A_RAS# M_RAS_L
DDR_A_CAS# V19
8,9 DDR_A_CAS# M_CAS_L
DDR_A_WE# V17 M22 R437 2 1 +1.5V
8,9 DDR_A_WE# M_WE_L M_ZVDDIO_MEM_S
ZACATE ZM151032B1238 1.5G BGA 413P 39.2_0402_1%
15@

Close JDIMM1 and JDIMM2

DDR_CKE0 DDR_CKE1

+1.5V
1

R1790 R1791
68_0402_5% 68_0402_5% R438
1K_0402_1%
2

+MEM_VREF
2

1 1
R439 C534 C535
1 1K_0402_1% 1
For AMD Errata S3 resume issue . 01/28 1000P_0402_50V7K 0.1U_0402_16V4Z
2 2
1

+1.5V

R149 1 2 DDR_EVENT# Place within 1000 mils to APU

1K_0402_5% 20100526 Security Classification
Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P06-FT1 DDRIII/UMI/PCIE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 6 of 47
A B C D E
 5 4 3 2 1

+APU_CORE

+1.8VS

11A U22C 2A L29

+APU_CORE +VDD_18 2 1 U22D

TSense/PLL/DP/PCIE/IO
E5 U8 FBMA-L11-201209-221LMA30T_0805 A7 N13

10U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
180P_0402_50V8J

0.1U_0402_16V7K
E6 VDDCR_CPU_1 VDD_18_1 W8 B7 VSS_1 VSS_50 N20
1 1 1 1 1 1 1 VDDCR_CPU_2 VDD_18_2 1 1 1 1 1 1 1 VSS_2 VSS_51
C539 C536 C541 C542 C543 C544 C540 F5 U6 B11 N22

C545

C537

C546

C538

C547

C548

C549
D
F7 VDDCR_CPU_3 VDD_18_3 U9 Change from SM010014520 to SD002000080 B17 VSS_3 VSS_52 P10 D

10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M G6 VDDCR_CPU_4 VDD_18_4 W6 20100816 B22 VSS_4 VSS_53 P14
2 2 2 2 2 2 2 G8 VDDCR_CPU_5 VDD_18_5 T7 2 2 2 2 2 2 2 C4 VSS_5 VSS_54 R4
10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M H5 VDDCR_CPU_6 VDD_18_6 V7 D5 VSS_6 VSS_55 R7
VDDCR_CPU_7 VDD_18_7 VSS_7 VSS_56

CPU CORE
H7 D7 R20
J6 VDDCR_CPU_8 D9 VSS_8 VSS_57 T6
J8 VDDCR_CPU_9 D11 VSS_9 VSS_58 T9
L7 VDDCR_CPU_10 D14 VSS_10 VSS_59 T11
M6 VDDCR_CPU_11 B15 VSS_11 VSS_60 T13
M8 VDDCR_CPU_12 D17 VSS_12 VSS_61 U4
1 1 1 1 1 1 VDDCR_CPU_13 VSS_13 VSS_62
C550 C551 C552 C553 C554 C555 N7 D19 U5
R8 VDDCR_CPU_14 +1.8VS E7 VSS_14 VSS_63 U7
VDDCR_CPU_15 VSS_15 VSS_64

GND
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 180P_0402_50V8J 180P_0402_50V8J 0.15A E9 U12
2 2 2 2 2 2 +APU_CORE_NB L30 E12 VSS_16 VSS_65 U20
10A VSS_17 VSS_66

DAC
1U_0402_6.3V6K E8 W9 +VDD_18_DAC 2 1 E20 U22
E11 VDDCR_NB_1 VDD_18_DAC F8 VSS_18 VSS_67 V8

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
180P_0402_50V8J
E13 VDDCR_NB_2 FBMA-L11-201209-221LMA30T_0805 F11 VSS_19 VSS_68 V9
1 1 1 1 1

1U_0402_6.3V6K
F9 VDDCR_NB_3 @ F13 VSS_20 VSS_69 V11

C556

C557

C558

C604

C684
F12 VDDCR_NB_4 Change from SM010014520 to SD002000080 G4 VSS_21 VSS_70 V13
VDDCR_NB_5 VSS_22 VSS_71

GPU AND NB CORE

G11 20100816 G5 W1
G13 VDDCR_NB_6
VDDCR_NB_7
POWER 2 2 2 2 2 G7 VSS_23
VSS_24
VSS_72
VSS_73
W2
H9 +1.05VS G9 W4
H12 VDDCR_NB_8 G12 VSS_25 VSS_74 W5
1 1 1 1 1 VDDCR_NB_9 VSS_26 VSS_75
C559 C560 C561 C562 C563 K11 0.2A G20 W7
K13 VDDCR_NB_10 L31 G22 VSS_27 VSS_76 W12
VDDCR_NB_11 VSS_28 VSS_77

DIS PLL
0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K L10 U11 +VDDL_10 2 1 H6 W20
2 2 2 2 2 L12 VDDCR_NB_12 VDDPL_10 H11 VSS_29 VSS_78 Y5

1U_0402_6.3V6K
180P_0402_50V8J

10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K L14 VDDCR_NB_13 FBMA-L11-201209-221LMA30T_0805 H13 VSS_30 VSS_79 Y7
VDDCR_NB_14 1 1 1 1 VSS_31 VSS_80
M11 J4 Y9

C564

C565

C566

C567
M12 VDDCR_NB_15 J5 VSS_32 VSS_81 Y11
M13 VDDCR_NB_16 J7 VSS_33 VSS_82 Y13
N10 VDDCR_NB_17 2 2 2 2 J20 VSS_34 VSS_83 Y15
N12 VDDCR_NB_18 K10 VSS_35 VSS_84 Y17
+APU_CORE_NB N14 VDDCR_NB_19 L32 K14 VSS_36 VSS_85 Y19
VDDCR_NB_20 4A VSS_37 VSS_86

PCIE/IO/DDR3 Phy
P11 +VDD_10 2 1 L4 AA4
P13 VDDCR_NB_21 U13 L6 VSS_38 VSS_87 AA22

10U_0603_6.3V6M

10U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K
180P_0402_50V8J

0.1U_0402_16V7K

0.1U_0402_16V7K
VDDCR_NB_22 VDD_10_1 W13 FBMA-L11-201209-221LMA30T_0805 L8 VSS_39 VSS_88 AB2
VDD_10_2 1 1 1 1 1 1 1 VSS_40 VSS_89
+1.5V V12 L11 AB5

C568

C569

C570

C571

C572

C573

C574
C 2A G16 VDD_10_3 T12 Change from SM010014520 to SD002000080 L13 VSS_41 VSS_90 AB9
C

G19 VDDIO_MEM_S_1 VDD_10_4 20100816 L20 VSS_42 VSS_91 AB13

E17 VDDIO_MEM_S_2 2 2 2 2 2 2 2 L22 VSS_43 VSS_92 AB17
1 1 1 1 1 VDDIO_MEM_S_3 VSS_44 VSS_93
C575 C576 C577 C578 C579 J16 M7 AB21
VDDIO_MEM_S_4 VSS_45 VSS_94

DDR3
L16 N4 AC5
10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M L19 VDDIO_MEM_S_5 N6 VSS_46 VSS_95 AC9
2 2 2 2 2 N16 VDDIO_MEM_S_6 N8 VSS_47 VSS_96 AC13
R16 VDDIO_MEM_S_7 N11 VSS_48 VSS_97 A11

DP Phy/IO
R19 VDDIO_MEM_S_8 VSS_49 VSSBG_DAC
W18 VDDIO_MEM_S_9 0.5A +3VS
U16 VDDIO_MEM_S_10 A4 ZACATE ZM151032B1238 1.5G BGA 413P
VDDIO_MEM_S_11 VDD_33

1U_0402_6.3V6K
0.1U_0402_16V7K
1 1 15@
ZACATE ZM151032B1238 1.5G BGA 413P

C580

C581
Power Cap. Summary
C582
1
C583
1
C584
1
C585
1
C586
1
C587
1
C588
1 15@ 2 2 APU
S POLY C 330U 2.5V M D2E TPE LESR9M H1.8 --->+APU_CORE(Qty : 3) Unpop:2
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 180P_0402_50V8J 180P_0402_50V8J +APU_CORE
2 2 2 2 2 2 2
+1.5V
S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+APU_CORE(Qty : 2)

S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->+APU_CORE_NB(Qty : 1)

+APU_CORE_NB
S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU--->+APU_CORE_NB(Qty : 1)
1 1
C589 C590
S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.5V(Qty : 1) +1.5V
1 1 1 1 10U_0603_6.3V6M 10U_0603_6.3V6M
C591 C592 C593 C594 2 2
S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->1.05VS(Qty : 1) +1.05VS
0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K
2 2 2 2
S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.8VS(Qty : 1) +1.8VS
1 1 1 1
C595 C596 C597 C598
B DDR3 Socket B

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K S POLY C 330U 2V M X LESR6M SX H1.9 --->1.5V(Qty : 1)

POWER +1.05VS
2 2 2 2 +1.5V

FCH
S POLY C 330U 2.5V Y D2 LESR9M EEFS H1.9 --->1.1VS(Qty : 1) UMA unpop +1.1VS
1
C620
1
C621 + C599
1
C600
1
C601
1
C602
1
C603
1 GPU
@ @ S POLY C 330U 2V M X LESR6M SX H1.9 --->VGA_CORE(Qty : 2) Unpop:1
10U_0603_6.3V6M 390U_2.5V_10M 0.1U_0402_16V7K 0.1U_0402_16V7K 0.1U_0402_16V7K 180P_0402_50V8J 180P_0402_50V8J +GPU_CORE
2 2 2 2 2 2 2
S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+VGA_CORE(Qty : 1)

S_A-P_CAP 390U 2.5V M 6.3X5.7 LESR10M VU --->+1.5VSG(Qty : 1) +1.5VSG

180PF Qt'y follow the distance between
+1.5V CPU socket and DIMM0. <2.5inch> USB
+APU_CORE POWER S_A-P_CAP 220U 6.3V M C45 R17M SVPE H4.4 --->+USB_VCCA(Qty : 1) +USB_VCCA
2 2 1 1
330U_D2E_2.5VM_R9M C101 C102 C103 C104
C606 0.1U_0402_16V7K 0.1U_0402_16V7K 180P_0402_50V8J 180P_0402_50V8J
10U_0603_6.3V6M
1 1 1 1
390U_2.5V_10M 390U_2.5V_10M
1 1 1 2 2 By case (Along split)
1
C605 + +@ C607 + C1104+ C1105+ C616
@ @ +1.5V
330U_D2E_2.5VM_R9M 390U_2.5V_10M
2 2 2 2 2 2

+1.5V POWER +1.8VS POWER

Near CPU Socket

180P_0402_50V8J

180P_0402_50V8J

180P_0402_50V8J

180P_0402_50V8J
0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
1 1 1 1 1 1 1 1
+APU_CORE_NB

C608

C609

C610

C611

C612

C613

C614

C615
A 1 A
1 1 1 1 2 2 2 2 2 2 2 2
C623 C685 C624 + C625
1 1 C622 + @
@ 1 10U_0603_6.3V6M 390U_2.5V_10M 10U_0603_6.3V6M
C617 + C618 + C619 390U_2.5V_10M 2 2 2 2
2 10U_0603_6.3V6M
390U_2.5V_10M 390U_2.5V_10M 10U_0603_6.3V6M
2 2 2

Near CPU Socket Near CPU Socket Near CPU Socket

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P07-FT1 PWR/VSS
Size Document Number Rev
(390uF_2.5V_6.3x5.7_ESR10m)*1=(SF000002O00) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 7 of 47
5 4 3 2 1
 5 4 3 2 1

+1.5V +1.5V

JDIMM1
1 2
+VREF_DQ VREF_DQ VSS1 +1.5V +1.5V
3 4 DDR_A_D4
DDR_A_D0 5 VSS2 DQ4 6 DDR_A_D5 DDR_A_D[0..63]
DDR_A_D1 7 DQ0 DQ5 8 DDR_A_D[0..63] 6,9
1 1 DQ1 VSS3

2
C626 C627 9 10 DDR_A_MA[0..15]
VSS4 DQS#0 DDR_A_DQS#0 6,9 DDR_A_MA[0..15] 6,9
DDR_A_DM0 11 12 R145 R146
13 DM0 DQS0 14 DDR_A_DQS0 6,9 DDR_A_DM[0..7]
0.1U_0402_16V4Z 1000P_0402_50V7K DDR_A_DM[0..7] 6,9 1K_0402_1% 1K_0402_1%
2 2 DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6
DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7
15mil 15mil

1
19 DQ3 DQ7 20
D VSS7 VSS8 +VREF_DQ +VREF_CA D
DDR_A_D8 21 22 DDR_A_D12
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
DQ9 DQ13

2
25 26
27 VSS9 VSS10 28 DDR_A_DM1 R147 R148
6,9 DDR_A_DQS#1 29 DQS#1 DM1 30 1K_0402_1% 1K_0402_1%
6,9 DDR_A_DQS1 31 DQS1 RESET# 32 DDR_RST# 6,9
DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14

1
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
37 DQ11 DQ15 38
DDR_A_D16 39 VSS13 VSS14 40 DDR_A_D20
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21
43 DQ17 DQ21 44
45 VSS15 VSS16 46 DDR_A_DM2
6,9 DDR_A_DQS#2 47 DQS#2 DM2 48
6,9 DDR_A_DQS2 49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_A_D28
DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29
DDR_A_D25 59 DQ24 DQ29 60
61 DQ25 VSS21 62
DDR_A_DM3 63 VSS22 DQS#3 64 DDR_A_DQS#3 6,9
65 DM3 DQS3 66 DDR_A_DQS3 6,9
DDR_A_D26 67 VSS23 VSS24 68 DDR_A_D30
DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
71 DQ27 DQ31 72
VSS25 VSS26

+1.5V
73 74
C 6,9 DDR_CKE0 75 CKE0 CKE1 76 DDR_CKE1 6,9 C
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
77 VDD1 VDD2 78 DDR_A_MA15
NC1 A15 2 2 2 2 2 2 2 2 2 2 2 2
79 80 DDR_A_MA14
6,9 DDR_A_BS2 81 BA2 A14 82 C628 C629 C630 C631 C632 C633 C634 C635 C636 C637 C638 C110
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 1 1 1 1 1 1 1 1 1 1 1 1
87 A9 A7 88 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
101 VDD9 VDD10 102
6 DDR_B_CLK2 103 CK0 CK1 104 DDR_B_CLK3 6
6 DDR_B_CLK#2 105 CK0# CK1# 106 DDR_B_CLK#3 6
DDR_A_MA10 107 VDD11 VDD12 108
109 A10/AP BA1 110 DDR_A_BS1 6,9
6,9 DDR_A_BS0 111 BA0 RAS# 112 DDR_A_RAS# 6,9
113 VDD13 VDD14 114
6,9 DDR_A_WE# 115 WE# S0# 116 DDR_CS0_DIMMB# 6 CRB 0.1u X1 4.7u X1 CRB 100U X2
6,9 DDR_A_CAS# 117 CAS# ODT0 118 DDR_B_ODT0 6
DDR_A_MA13 119 VDD15 VDD16 120
121 A13 ODT1 122 DDR_B_ODT1 6
+0.75VS
6 DDR_CS1_DIMMB# 123 S1# NC2 124
125 VDD17 VDD18 126 +1.5V
NCTEST VREF_CA +VREF_CA
127 128
DDR_A_D32 129 VSS27 VSS28 130 DDR_A_D36
DQ32 DQ36 2 2 1 1
DDR_A_D33 131 132 DDR_A_D37 1 1 C640 C641 C642
133 DQ33 DQ37 134 C645 C644 @ + C1102
B 135 VSS29 VSS30 136 DDR_A_DM4 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4.7U_0603_6.3V6K 330U_D2E_2.5VM_R9M B
6,9 DDR_A_DQS#4 137 DQS#4 DM4 138 1 1 2
1000P_0402_50V7K 0.1U_0402_16V4Z
6,9 DDR_A_DQS4 139 DQS4 VSS31 140 DDR_A_D38 2 2 2
DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_A_D44
DDR_A_D40 147 VSS34 DQ44 148 DDR_A_D45
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152
153 VSS36 DQS#5 154 DDR_A_DQS#5 6,9
DDR_A_DM5 Place near JDIMM1 330U ESR:9m H:2
155 DM5 DQS5 156 DDR_A_DQS5 6,9
DDR_A_D42 157 VSS37 VSS38 158 DDR_A_D46 P/N:SGA20331E10
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
DDR_A_D48 163 VSS39 VSS40 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
169 VSS41 VSS42 170 DDR_A_DM6
6,9 DDR_A_DQS#6 171 DQS#6 DM6 172
6,9 DDR_A_DQS6 173 DQS6 VSS43 174 DDR_A_D54
DDR_A_D50 175 VSS44 DQ54 176 DDR_A_D55
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_A_D60
DDR_A_D56 181 VSS46 DQ60 182 DDR_A_D61 +1.5V
DDR_A_D57 183 DQ56 DQ61 184 0.1U_0402_16V4Z 0.1U_0402_16V4Z
185 DQ57 VSS47 186 0.1U_0402_16V4Z 0.1U_0402_16V4Z
187 VSS48 DQS#7 188 DDR_A_DQS#7 6,9
DDR_A_DM7 2 2 2 2
189 DM7 DQS7 190 DDR_A_DQS7 6,9
DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62 C643 C675 C676 C678
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
A R152 1 2 10K_0402_5% 195 DQ59 DQ63 196 1 1 1 1 A
1 @ 2 197 VSS51 VSS52 198
199 SA0 EVENT# 200 DDR_EVENT# 6,9
R150 10K_0402_5%
+3VS 1 2 10K_0402_5% 201 VDDSPD SDA 202 FCH_SMDAT0 9,13,27
203 SA1 SCL 204 FCH_SMCLK0 9,13,27
1 1 R155 @ +0.75VS
VTT1 VTT2
1

C646 C647
R151 205 206
2.2U_0603_6.3V4Z
2
0.1U_0402_16V4Z
2 10K_0402_5%
G1
TYCO_2-2013289-1
G2
DDR3 SO-DIMM A H:5.2mm
Security Classification Compal Secret Data Compal Electronics, Inc.
Standard Typ Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title
CONN@
P08-DDR3 SODIMM-I Socket
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SA0:SA1=10 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA7323P 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 8 of 47
5 4 3 2 1
 5 4 3 2 1

+1.5V +1.5V

JDIMM2
1 2
+VREF_DQ VREF_DQ VSS1
3 4 DDR_A_D4
DDR_A_D0 5 VSS2 DQ4 6 DDR_A_D5
DDR_A_D1 7 DQ0 DQ5 8
1 1 DQ1 VSS3
C680 C681 9 10
DDR_A_DM0 11 VSS4 DQS#0 12 DDR_A_DQS#0 6,8 DDR_A_D[0..63]
13 DM0 DQS0 14 DDR_A_DQS0 6,8 DDR_A_D[0..63] 6,8
0.1U_0402_16V4Z 1000P_0402_50V7K
2 2 DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6 DDR_A_MA[0..15]
D DQ2 DQ6 DDR_A_MA[0..15] 6,8 D
DDR_A_D3 17 18 DDR_A_D7
19 DQ3 DQ7 20 DDR_A_DM[0..7]
VSS7 VSS8 DDR_A_DM[0..7] 6,8
DDR_A_D8 21 22 DDR_A_D12
DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
25 DQ9 DQ13 26
27 VSS9 VSS10 28 DDR_A_DM1
6,8 DDR_A_DQS#1 29 DQS#1 DM1 30
6,8 DDR_A_DQS1 31 DQS1 RESET# 32 DDR_RST# 6,8
DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
37 DQ11 DQ15 38
DDR_A_D16 39 VSS13 VSS14 40 DDR_A_D20
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21
43 DQ17 DQ21 44
45 VSS15 VSS16 46 DDR_A_DM2
6,8 DDR_A_DQS#2 47 DQS#2 DM2 48
6,8 DDR_A_DQS2 49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_A_D28
DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29
DDR_A_D25 59 DQ24 DQ29 60
61 DQ25 VSS21 62
63 VSS22 DQS#3 64 DDR_A_DQS#3 6,8
DDR_A_DM3
65 DM3 DQS3 66 DDR_A_DQS3 6,8 +1.5V
DDR_A_D26 67 VSS23 VSS24 68 DDR_A_D30
DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
71 DQ27 DQ31 72
VSS25 VSS26 2 2 2 2 2 2 2 2 2 2 2 2
C44 C45 C652 C653 C654 C655 C682 C46 C683 C47 C48 C49
0.1U_0402_16V4Z
73 74 1 1 1 1 1 1 1 1 1 1 1 1
C 6,8 DDR_CKE0 75 CKE0 CKE1 76 DDR_CKE1 6,8 C
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
77 VDD1 VDD2 78 DDR_A_MA15
79 NC1 A15 80 DDR_A_MA14
6,8 DDR_A_BS2 81 BA2 A14 82
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
87 A9 A7 88
DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94 CRB 0.1u X1 4,7uX1
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100 +0.75VS
101 VDD9 VDD10 102
6 DDR_A_CLK0 103 CK0 CK1 104 DDR_A_CLK1 6
6 DDR_A_CLK#0 105 CK0# CK1# 106 DDR_A_CLK#1 6
VDD11 VDD12 2 2 1
DDR_A_MA10 107 108 C50 C51 C664
109 A10/AP BA1 110 DDR_A_BS1 6,8
@
6,8 DDR_A_BS0 111 BA0 RAS# 112 DDR_A_RAS# 6,8
0.1U_0402_16V4Z 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
113 VDD13 VDD14 114 1 1 2
6,8 DDR_A_WE# 115 WE# S0# 116 DDR_CS0_DIMMA# 6
6,8 DDR_A_CAS# 117 CAS# ODT0 118 DDR_A_ODT0 6
DDR_A_MA13 119 VDD15 VDD16 120
121 A13 ODT1 122 DDR_A_ODT1 6
6 DDR_CS1_DIMMA# 123 S1# NC2 124
125 VDD17 VDD18 126
NCTEST VREF_CA +VREF_CA
127 128 Place near JDIMM2
DDR_A_D32 129 VSS27 VSS28 130 DDR_A_D36
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37
DQ33 DQ37 1 1
133 134 C665 C666
135 VSS29 VSS30 136 DDR_A_DM4
6,8 DDR_A_DQS#4 137 DQS#4 DM4 138 0.1U_0402_16V4Z 1000P_0402_50V7K
B 6,8 DDR_A_DQS4 139 DQS4 VSS31 140 2 2 B
DDR_A_D38
DDR_A_D34 141 VSS32 DQ38 142 DDR_A_D39
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_A_D44
DDR_A_D40 147 VSS34 DQ44 148 DDR_A_D45
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152
DDR_A_DM5 153 VSS36 DQS#5 154 DDR_A_DQS#5 6,8
155 DM5 DQS5 156 DDR_A_DQS5 6,8
DDR_A_D42 157 VSS37 VSS38 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
DDR_A_D48 163 VSS39 VSS40 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
169 VSS41 VSS42 170 DDR_A_DM6
6,8 DDR_A_DQS#6 171 DQS#6 DM6 172
6,8 DDR_A_DQS6 173 DQS6 VSS43 174 DDR_A_D54
DDR_A_D50 175 VSS44 DQ54 176 DDR_A_D55
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_A_D60
DDR_A_D56 181 VSS46 DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS47 186
DDR_A_DM7 187 VSS48 DQS#7 188 DDR_A_DQS#7 6,8
For DRAM strap pin reservation 189 DM7 DQS7 190 DDR_A_DQS7 6,8
20100817 DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
R961 1 @ 2 10K_0402_5% 195 DQ59 DQ63 196
R153 1 2 10K_0402_5% 197 VSS51 VSS52 198
199 SA0 EVENT# 200 DDR_EVENT# 6,8
+3VS 1 2 201 VDDSPD SDA 202 FCH_SMDAT0 8,13,27
@
A 203 SA1 SCL 204 FCH_SMCLK0 8,13,27 A
1 1 VTT1 VTT2 +0.75VS
C667 C668 R154
10K_0402_5% 205 206
2.2U_0603_6.3V4Z 0.1U_0402_16V4Z G1 G2
2 2 TYCO_2-2013310-1
2

CONN@
R962
CRB only one 4.7k 10K_0402_5%
FOX_AS0A626-J8SG-7H_204P-T Security Classification Compal Secret Data Compal Electronics, Inc.
0214 DDR3 SO-DIMM B H:9.2mm Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title
1

For DRAM strap pin reservation Standard Type

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P09-DDR3 SODIMM-II Socket
20100817 SA0:SA1=00 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 9 of 47
5 4 3 2 1
 5 4 3 2 1

D1
BLUE 2 Q92
1
GREEN 3 1 3

GND
VIN VOUT

YSDA0502C 3P C/A SOT-23 @

2
AP2230_SOT23-3

CRT RED 2
D2

1 +5VS W=40mils
+CRT_VCC

3 L115 W=40mils
+CRT_VCC
2 1+5VS_CRTVCC 1 2
YSDA0502C 3P C/A SOT-23 D4 SMD1812P075TF .75A 13.2V

0.1U_0402_16V4Z
RB491D_SOT23-3 1 1

0.1U_0402_16V4Z
D D
C1570 C1571
D15
@
HSYNC_L 2
R1634 1 2 0_0402_5% CRT_R_R L116 1 2 FCM2012CF-800T06_2P RED 1 2 2
18 VGA_CRT_R
VSYNC_L 3

R1635 1 2 0_0402_5% CRT_G_R L117 1 2 FCM2012CF-800T06_2P GREEN

18 VGA_CRT_G YSDA0502C 3P C/A SOT-23

R1636 1 2 0_0402_5% CRT_B_R L118 1 2 FCM2012CF-800T06_2P BLUE

18 VGA_CRT_B D16
1 1 1 VGA_DDC_DATA_C 2
For EMI C1575 C1576 C1577 1

150_0402_1%

150_0402_1%

150_0402_1%
1 1 1

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J
1

1
R1637 R1638 R1639 C1572 C1573 C1574 VGA_DDC_CLK_C 3

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J
2 2 2
2 2 2 YSDA0502C 3P C/A SOT-23
+CRT_VCC

ESD
2

2
JCRT1
6
T9 CRTTEST 11
RED 1
7
12
GREEN 2
+CRT_VCC 8 16
G
C1578 +3VS +CRT_VCC HSYNC_L 13 17
G
1 2 R1640 1 2 BLUE 3
0.1U_0402_16V4Z 1K_0402_5% 9
VSYNC_L 14
5
1

1
4

2.2K_0402_5%
1

1
R1642 10
OE#

2.2K_0402_5%

2.2K_0402_5%
P

2 4 CRT_HSYNC_D R1643 1 2 0_0603_5% HSYNC_L R1645 R1644 15

18 VGA_CRT_HSYNC_R

1
A Y 5

2.2K_0402_5%
G

U87 R1646

2
74AHCT1G125GW_SOT353-5 SUYIN_070546FR015S297ZR
3

2
CONN@
C C

100P_0402_50V8J
2
R1647 1 20_0402_5% CRT_DATA 1 6 VGA_DDC_DATA_C 1 VGA_DDC_DATA_C
+CRT_VCC 18 VGA_CRT_DATA
C1579 C1580
1 2 R1648 1 2 Q2A DMN66D0LDW-7_SOT363-6

100P_0402_50V8J
0.1U_0402_16V4Z 1K_0402_5%
2
1
5
1

C1581 VGA_DDC_CLK_C
@
OE#
P

2 4 CRT_VSYNC_D R1650 1 2 0_0603_5% VSYNC_L 1

100P_0402_50V8J
18 VGA_CRT_VSYNC_R

5
A Y 2 C1582
G

U88 1 @
74AHCT1G125GW_SOT353-5 C1583 C1584 1 R1649 1 20_0402_5% CRT_CLK 4 3 VGA_DDC_CLK_C

15P_0402_50V8J

15P_0402_50V8J
18 VGA_CRT_CLK
3

2
Q2B
2 DMN66D0LDW-7_SOT363-6
2

680P_0402_50V7K
LCD POWER CIRCUIT

C131
+LCDVDD +LCDVDD +3VS

2
+5VALW Q93 @
SI2301BDS-T1-E3_SOT23-3
1

+LCDVDD 1 3 JLVDS1
S
D

R1653 1 W=80mils 41 42 W=80mils

4.7U_0805_10V4Z

R1652 L123 1 2 39 GMD GND 40

47K_0402_5% W=60mils B+
37 39 40 38
+LCDVDD
100_0805_5% C1585 1 FBMA-L11-201209-221LMA30T_0805
G
2

4.7U_0805_10V4Z 35 37 38 36
6 2

2 C1586 33 35 36 34
1 1 33 34
C1587 C1588 31 32
2 +3VS 31 32
29 30 VGA2_TXOUT0+
VGA2_TXOUT0+ 17
0.1U_0402_16V4Z

B
0.1U_0402_16V4Z 0.1U_0402_16V4Z R1656 @ 1 VGA_TXOUT0+ 27 29 30 28 VGA2_TXOUT0- B
2 2 2 2 1 17 VGA_TXOUT0+ 25 27 28 26 VGA2_TXOUT0- 17
0.047U_0402_16V7K C1590 VGA_TXOUT0-
17 VGA_TXOUT0- 25 26
220K_0402_1% 23 24 VGA2_TXOUT1-
21 23 24 22 VGA2_TXOUT1- 17
2N7002DW-7-F_SOT363-6 C1589 VGA_TXOUT1- VGA2_TXOUT1+
17 VGA_TXOUT1- VGA2_TXOUT1+ 17
1

21 22
3

2 VGA_TXOUT1+ 19 20
Q99A 17 VGA_TXOUT1+ 19 20
17 18 VGA2_TXOUT2+
15 17 18 16 VGA2_TXOUT2+ 17
Q99B VGA_TXOUT2+ VGA2_TXOUT2-
17 VGA_TXOUT2+ 15 16 VGA2_TXOUT2- 17
5 2N7002DW-7-F_SOT363-6 VGA_TXOUT2- 13 14
17 VGA_TXOUT2- 11 13 14 12 VGA2_TXCLK-
11 12 VGA2_TXCLK- 17
VGA_TXCLK+ 9 10 VGA2_TXCLK+
17 VGA_TXCLK+ VGA2_TXCLK+ 17
4

VGA_TXCLK- 7 9 10 8
17 VGA_ENVDD 17 VGA_TXCLK- 7 8
DMIC_CLK 5 6 VGA_LCD_CLK 18
INVTPWM 3 5 6 4
3 4 VGA_LCD_DAT 18
DISPOFF# 1 2
1 2
ACES_87242-4001-09 Camera
22P_0402_50V8J

2 @ CONN@
JCM1
1
C132

+3VS 1
13 USB20_N2 USB20_N2 2
R1654 1 2 1 USB20_P2 3 2
17 VGA_INVT_PWM 13 USB20_P2 3
0_0402_5% DMIC_CLK 4
25 DMIC_CLK 4
R1655 1 @ 2 INVTPWM DMIC_DATA 5 7
29 INVT_PWM 25 DMIC_DATA 6 5 G1 8
0_0402_5%
6 G2
1

R1657 ACES_87213-0600G
10K_0402_5% CONN@
D28
6 3

EMI
2

I/O4 I/O2

+3VS 5 2
+5VS VDD GND
1

@ R1670 4 1
10K_0402_5% I/O3 I/O1
A A
AZC099-04S.R7G_SOT23-6
@

ESD
2

R1672 1 2 0_0402_5% VGA_ENBKL R1663 1 2 0_0402_5%

ENBKL 29
18 VGA_ENBKL
2

R1664
BKOFF# 1 2 DISPOFF# 100K_0402_1%
29 BKOFF#
@ D5 RB751V40_SC76-2
1

Security Classification Compal Secret Data Compal Electronics, Inc.

1

R1677 2010/06/30 2012/06/30 Title

Issued Date Deciphered Date
10K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P10-LVDS/CRT CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
2

C 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 10 of 47
5 4 3 2 1
 5 4 3 2 1

Q94 +5VS Q95

D
1 3 6 +HDMI_5V_OUT

S
GND
+5VS VIN VOUT +HDMI_5V_OUT
4 5 F2
+3VS +3VS +HDMI_5V_OUT @ 2 +HDMI_5V 1 2
1
@ C1591 1 W=40mils0.5A 15VDC_FUSE

1U_0603_10V6K

1U_0603_10V4Z
2
AP2230_SOT23-3

G
1
C1592

3
R200 R201 2 SI3456BDV-T1-E3 1N TSOP6

1
+VSB

2.2K_0402_5%

2.2K_0402_5%
2

470K_0402_5%
1
D R202 R1678 D
2.2K_0402_5%

2
5
2
1 2 HDMICLK 4 3 SCLK R200, R201 place near JHDMI connect
18 VGA_HDMI_SCLK

2
R203 0_0402_5% EN_HDMI
Q100B

1
DMN66D0LDW-7_SOT363-6 D R1679 C1601 1

1.5M_0402_5%

0.1U_0402_16V7K
2 Q96
34,41 SUSP

1
G SSM3K7002FU_SC70-3
R205 S

3
2
2.2K_0402_5%

2
2
2
1 2 HDMIDAT 1 6 SDATA
18 VGA_HDMI_SDATA
R206 0_0402_5%
Q100A DMN66D0LDW-7_SOT363-6
5V PULL UP IN CONNECTOR SIDE
+HDMI_5V_OUT

JHDMI1
HDMI_HPD_R 19
18 HP_DET
17 +5V
SDATA 16 DDC/CEC_GND
SCLK 15 SDA
14 SCL
C 13 Reserved C
HDMI_R_CLK# 12 CEC 20
@ 11 CK- GND 21
1 2 HDMI_R_CLK 10 CK_shield GND 22
HDMI_CLK 1 2 R208 0_0402_5% HDMI_R_TX0# 9 CK+ GND 23
C1602 1 2 0.1U_0402_16V7K HDMI_CLK R1690 499_0402_1% 8 D0- GND
18 VGA_HDMI_TXC+ D0_shield
18 VGA_HDMI_TXC- C1603 1 2 0.1U_0402_16V7K HDMI_CLK# HDMI_CLK# 1 2 L11 HDMI_R_TX0 7
R1691 499_0402_1% HDMI_CLK 4 3 HDMI_R_CLK HDMI_R_TX1# 6 D0+
C1604 1 2 0.1U_0402_16V7K HDMI_TX0 HDMI_TX0 1 2 4 3 5 D1-
18 VGA_HDMI_TXD0+ D1_shield
18 VGA_HDMI_TXD0- C1605 1 2 0.1U_0402_16V7K HDMI_TX0# R1693 499_0402_1% HDMI_R_TX1 4
HDMI_TX0# 1 2 HDMI_CLK# 1 2 HDMI_R_CLK# HDMI_R_TX2# 3 D1+
C1606 1 2 0.1U_0402_16V7K HDMI_TX1 R1695 499_0402_1% 1 2 2 D2-
18 VGA_HDMI_TXD1+ D2_shield
18 VGA_HDMI_TXD1- C1607 1 2 0.1U_0402_16V7K HDMI_TX1# HDMI_TX1 1 2 WCM-2012-670T_4P HDMI_R_TX2 1
R1696 499_0402_1% D2+

18 VGA_HDMI_TXD2+ C1608 1 2 0.1U_0402_16V7K HDMI_TX2 HDMI_TX1# 1 2 1 2 SUYIN_100042GR019M23DZL

18 VGA_HDMI_TXD2- C1609 1 2 0.1U_0402_16V7K HDMI_TX2# R1697 499_0402_1% R210 @ 0_0402_5% CONN@
HDMI_TX2 1 2
R1698 499_0402_1%
HDMI_TX2# 1 2 1 2
R1699 499_0402_1% R211 @ 0_0402_5%
D7
L12 HDMI_HPD_R 6 3 SDATA
I/O4 I/O2

1
SSM3K7002FU_SC70-3 D Q97 HDMI_TX0# 1 2 HDMI_R_TX0#
2 1 2
+5VS
G
1

S HDMI_TX0 4 3 HDMI_R_TX0 +5VS 5 2

3
4 3 VDD GND
R1700 WCM-2012-670T_4P
100K_0402_5%
1 2 4 1 SCLK
+HDMI_5V_OUT
2

R213 @ 0_0402_5% I/O3 I/O1

AZC099-04S.R7G_SOT23-6
B B
NEAR CONNECTOR 1 2

HDMI_TX1# 1
R214

L13
@ 0_0402_5%

2 HDMI_R_TX1#
ESD
1 2

D3 D6 HDMI_TX1 4 3 HDMI_R_TX1 VGA_HDMI_DET 2 R1702 1 HDMI_HPD_R

1 1 4 3
HDMI_TX0# 10 9 HDMI_TX0# HDMI_TX2# 1 1 10 9 HDMI_TX2# 0_0402_5%
WCM-2012-670T_4P @
HDMI_TX0 2 2 9 8 HDMI_TX0 HDMI_TX2 2 2 9 8 HDMI_TX2 @ +3VS
1 2
HDMI_TX1# 4 4 7 7 HDMI_TX1# HDMI_CLK# 4 4 7 7 HDMI_CLK# R220 0_0402_5%

2
1 2
HDMI_TX1 5 5 6 6 HDMI_TX1 HDMI_CLK 5 5 6 6 HDMI_CLK R223 @ 0_0402_5% R1792
2.2K_0402_5%
3 3 3 3 L14
HDMI_TX2# 1 2 HDMI_R_TX2#

ESD

1
8 8 1 2

1
HDMI_TX2 4 3 HDMI_R_TX2
L15ESDL5V0NA-4 SLP2510P8 L15ESDL5V0NA-4 SLP2510P8 4 3 2 HDMI_HPD_R
WCM-2012-670T_4P G
S

1
1 2 Q114
R226 0_0402_5% 18 VGA_HDMI_DET VGA_HDMI_DET SSM3K7002FU_SC70-3 R1794
@ 100K_0402_5%
BOT SIDE NEAR CONNECTOR

2
A A

reserve Level shifter

Security Classification
Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P11-HDMI CONN
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 11 of 47
5 4 3 2 1
 A B C D E

For PCIE device reset on FS1 (GFX,GLAN,WLAN,LVDS Travis)

U31E
PCIE_RST# P1 W2 PAD T96
PCIE_RST_L PCICLK0

PCI CLKS
A_RST# L1 W1
29 A_RST# A_RST_L PCICLK1/GPO36 W3 PCI_CLK1 16
1 2 UMI_RX0P_C AD26 PCICLK2/GPO37 W4 PCI_CLK2 16
C53 0.1U_0402_16V7K
6 UMI_RX0P 1 2 UMI_RX0N_C AD27 UMI_TX0P PCICLK3/GPO38 Y1 PCI_CLK3 16
C54 0.1U_0402_16V7K
6 UMI_RX0N 1 2 AC28 UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 16
C55 0.1U_0402_16V7K UMI_RX1P_C
6 UMI_RX1P 1 2 AC29 UMI_TX1P V2
C56 0.1U_0402_16V7K UMI_RX1N_C
1 6 UMI_RX1N 1 2 UMI_RX2P_C AB29 UMI_TX1N PCIRST_L +3VALW 1
C57 0.1U_0402_16V7K PAD T92
6 UMI_RX2P 1 2 UMI_RX2N_C AB28 UMI_TX2P
C58 0.1U_0402_16V7K C1234
6 UMI_RX2N 1 2 UMI_RX3P_C AB26 UMI_TX2N AA1 1 2
C59 0.1U_0402_16V7K
6 UMI_RX3P 1 2 AB27 UMI_TX3P AD0/GPIO0 AA4
C60 0.1U_0402_16V7K UMI_RX3N_C
6 UMI_RX3N UMI_TX3N AD1/GPIO1

PCI EXPRESS I/F

AA3 0.1U_0402_16V4Z
AD2/GPIO2

5
6 UMI_TX0P AE24 AB1
AE23 UMI_RX0P AD3/GPIO3 AA5 2
6 UMI_TX0N

P
AD25 UMI_RX0N AD4/GPIO4 AB2 A_RST# R175 1 2 33_0402_5% 4 B
6 UMI_TX1P UMI_RX1P AD5/GPIO5 Y PLT_RST# 17,24,27,32
6 UMI_TX1N AD24 AB6 1
UMI_RX1N AD6/GPIO6 A

G
2
6 UMI_TX2P AC24 AB5 1 1 @ 2 PCIE_RST#
AC25 UMI_RX2P AD7/GPIO7 AA6 R174 R582 0_0402_5%
6 UMI_TX2N

3
AB25 UMI_RX2N AD8/GPIO8 AC2 C1233 @ 8.2K_0402_5% U28
6 UMI_TX3P UMI_RX3P AD9/GPIO9
6 UMI_TX3N AB24 AC3 150P_0402_50V8J NC7SZ08P5X_NL_SC70-5
UMI_RX3N AD10/GPIO10 AC4 2

1
R560 2 1 590_0402_1% AD29 AD11/GPIO11 AC1
R561 2 1 2K_0402_1% AD28 PCIE_CALRP AD12/GPIO12 AD1
+PCIE_VDDAN PCIE_CALRN AD13/GPIO13 AD2
1 2 PCIE_FTX_DRX_P0 AA28 AD14/GPIO14 AC6
LAN 24 PCIE_FTX_C_DRX_P0
C61
C62 1 2
0.1U_0402_16V7K
0.1U_0402_16V7K PCIE_FTX_DRX_N0 AA29 GPP_TX0P AD15/GPIO15 AE2
Need to check material?
24 PCIE_FTX_C_DRX_N0 1 2 Y29 GPP_TX0N AD16/GPIO16 AE1 +1.8VS +3VS
PCIE_FTX_DRX_P1
WLAN 27 PCIE_FTX_C_DRX_P1
C717
C63 1 2
0.1U_0402_16V7K
0.1U_0402_16V7K PCIE_FTX_DRX_N1 Y28 GPP_TX1P AD17/GPIO17 AF8
27 PCIE_FTX_C_DRX_N1 GPP_TX1N AD18/GPIO18

1
1 2 PCIE_FTX_DRX_P2 Y26 AE3
USB3.0 32 PCIE_PTX_C_USBRX_P2 C736
C122 1 2
0.1U_0402_16V7K
0.1U_0402_16V7K PCIE_FTX_DRX_N2 Y27 GPP_TX2P AD19/GPIO19 AF1 R164
32 PCIE_PTX_C_USBRX_N2 GPP_TX2N AD20/GPIO20
W28 AG1 10K_0402_5%
W29 GPP_TX3P AD21/GPIO21 AF2
GPP_TX3N AD22/GPIO22

2
G
AE9

2
AA22 AD23/GPIO23 AD9 PCI_AD23 16
24 PCIE_FRX_DTX_P0 GPP_RX0P AD24/GPIO24 PCI_AD24 16

PCI I/F
Y21 AC11 APU_PWRGD 3 1
24 PCIE_FRX_DTX_N0 AA25 GPP_RX0N AD25/GPIO25 AF6 PCI_AD25 16 H_PWRGD_L 43

D
27 PCIE_FRX_DTX_P1 AA24 GPP_RX1P AD26/GPIO26 AF4 PCI_AD26 16
27 PCIE_FRX_DTX_N1 W23 GPP_RX1N AD27/GPIO27 AF3 VGA_PWRGD_R PCI_AD27 16
32 PCIE_PRX_C_USBTX_P2 FDV301N_NL_SOT23-3
V24 GPP_RX2P AD28/GPIO28 AH2 Q90
2
32 PCIE_PRX_C_USBTX_N2 GPP_RX2N AD29/GPIO29 2
W24 AG2
W25 GPP_RX3P AD30/GPIO30 AH3
GPP_RX3N AD31/GPIO31 AA8
CBE0_L AD5
CBE1_L AD8 +3VALW
CBE2_L AA10 C1199 @
CBE3_L AE8 1 2
FRAME_L AB9
M23 DEVSEL_L AJ3
close to FCH within 1" PCIE_RCLKP/NB_LNK_CLKP IRDY_L
@ 0.1U_0402_16V4Z

5
P23 AE7 U33
PCIE_RCLKN/NB_LNK_CLKN TRDY_L AC5 2

P
R564 1 2 0_0402_5% APU_DISP_CLKP_R U29 PAR AF5 VGA_PWRGD B 4 1 @ 2 VGA_PWRGD_R
5 APU_DISP_CLKP NB_DISP_CLKP STOP_L 41,42,44 VGA_PWRGD Y
R565 1 2 0_0402_5% APU_DISP_CLKN_R U28 AE6 1 R830 0_0402_5%
5 APU_DISP_CLKN NB_DISP_CLKN PERR_L A

G
AE4
T26 SERR_L AE11 NC7SZ08P5X_NL_SC70-5

3
T27 NB_HT_CLKP REQ0_L AH5 1 @ 2
NB_HT_CLKN REQ1_L/GPIO40 AH4 R838 100K_0402_5%
R162 1 2 0_0402_5% APU_CLKP_R V21 REQ2_L/CLK_REQ8_L/GPIO41 AC12
5 APU_CLKP CPU_HT_CLKP REQ3_L/CLK_REQ5_L/GPIO42 PAD T95
R163 1 2 0_0402_5% APU_CLKN_R T21 AD12 R839 1 2 0_0402_5%
5 APU_CLKN CPU_HT_CLKN GNT0_L AJ5
R569 1 2 0_0402_5% CLK_PCIE_VGA_R V23 GNT1_L/GPO44 AH6
17 CLK_PCIE_VGA SLT_GFX_CLKP GNT2_L/GPO45 PAD T97
R570 1 2 0_0402_5% CLK_PCIE_VGA#_R T23 AB12
17 CLK_PCIE_VGA# SLT_GFX_CLKN GNT3_L/CLK_REQ7_L/GPIO46 AB11 1 2
R571 1 2 0_0402_5% CLK_PCIE_LAN_R L29 CLKRUN_L AD7 R99 10K_0402_5%
24 CLK_PCIE_LAN GPP_CLK0P LOCK_L
LAN R572 1 2 0_0402_5% CLK_PCIE_LAN#_R L28
24 CLK_PCIE_LAN# GPP_CLK0N
CLOCK GENERATOR

AJ6
R573 1 2 0_0402_5% CLK_PCIE_MINI1_R N29 INTE_L/GPIO32 AG6
27 CLK_PCIE_MINI1 GPP_CLK1P INTF_L/GPIO33
WLAN R574 1 2 0_0402_5% CLK_PCIE_MINI1#_R N28 AG4
27 CLK_PCIE_MINI1# GPP_CLK1N INTG_L/GPIO34 AJ4 RTC BATT Conn.
R595 1 USB30@2 0_0402_5% CLK_PCIE_USB30_R M29 INTH_L/GPIO35
USB3.0 32 CLK_USB30
R585 1 USB30@2 0_0402_5% CLK_PCIE_USB30#_R M28 GPP_CLK2P
+RTCBATT
32 CLK_USB30# GPP_CLK2N

1
R854 1 2 0_0402_5%
3 T25 1 2 LPC_CLK1 16 3
R853 0_0402_5%

+
V25 GPP_CLK3P H24 LPCCLK0R575 1 2 LPC_CLK0 16
22_0402_5%
GPP_CLK3N LPCCLK0 LPC_CLK0_EC 29
LPC
H25 LPCCLK1R577 1 2 22_0402_5%
L24 LPCCLK1 J27 CLK_PCI_DB 27
L23 GPP_CLK4P LAD0 J26 LPC_AD0 27,29
CONN@
GPP_CLK4N LAD1 H29 LPC_AD1 27,29
P25 LAD2 H28 LPC_AD2 27,29
M25 GPP_CLK5P LAD3 G28 LPC_AD3 27,29
GPP_CLK5N LFRAME_L J25 LPC_FRAME# 27,29
P29 LDRQ0_L AA18 JRTC1
P28 GPP_CLK6P LDRQ1_L/CLK_REQ6_L/GPIO49 AB19
GPP_CLK6N SERIRQ/GPIO48 SERIRQ 29
LOTES_AAA-BAT-054-K01

-
N26

2
N27 GPP_CLK7P
GPP_CLK7N G21
ALLOW_LDTSTP/DMA_ACTIVE_L ALLOW_STOP# 5
CPU

T29 H21
GPP_CLK8P PROCHOT_L FCH_PROCHOT# 5
T28 K19
GPP_CLK8N LDT_PG APU_PWRGD 5
G22 +RTCBATT
EMI 22_0402_5% LDT_STP_L J24
LDT_RST_L APU_RST# 5
R170 1 2 L25
2 26 CLK_SD_48M 14M_25M_48M_OSC

1
C66 1
C1 RTC_32KHI R179
32K_X1
1

10P_0402_50V8J 1K_0402_5%
RTC

1M_0603_5% 25M_CLK_X1 L26 C2 RTC_32KHO

Y3 R576 25M_X1 32K_X2 +RTCVCC

2
D2 D23
2

RTCCLK B2 RTC_CLK 16,29 2 +RTCBATT_R

C67 1 2 25M_CLK_X2 L27 INTRUDER_ALERT_L B1 1 2 1
25M_X2 VDDBT_RTC_G R864 510_0402_5% 3
25MHZ 12PF 5XFA2500012CIF50Q3 +CHGRTC

0.1U_0402_16V4Z
12P_0402_50V8J 21807-A11-HUDSON-M1_FCBGA605 C1272 1 1 C1271 W=20mils
0.1U_0402_16V4Z

1U_0402_6.3V4Z

1 DAN202UT106_SC70-3

2
FCH : SA000046H60 (S IC 218-0792001 A12 HUDSON-M1 FCBGA 605P) C1270
4 4
Close to FCH 2 2
JOPEN1
FCH : SA000046H70 (S IC 218-0792006 A13 HUDSON-M1 FCBGA 605P) for Clear CMOS @

1
C64 1 2 RTC_32KHI 2

10P_0402_50V8J Y4
1

4 3
R563 OSC NC
20M_0603_5% 1 2
OSC NC
32.768KHZ_12.5PF_Q13MC1461000100_10PPM
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title
2

C65 1 2 RTC_32KHO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P12-FCH PCIE/PCI/ACPI/LPC/RTC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
10P_0402_50V8J Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 12 of 47
A B C D E
 A B C D E

+3VALW

U31A
1 2 USB_OC1# 1 2 EC_LID_OUT#

USB MISC
R871 10K_0402_5% R930 10K_0402_5%
1 2 USB_OC0# J2 PCI_PME# A10
PCI_PME_L/GEVENT4_L USBCLK/14M_25M_48M_OSC

ACPI/WAKE UP EVENTS
R872 10K_0402_5% K1 R578
1 2 FCH_SIC D3 RI_L/GEVENT22_L G19 USB_RCOMP 1 2
R603 10K_0402_5% 1 2 PCI_PME# F1 SPI_CS3_L/GBE_STAT1/GEVENT21_L USB_RCOMP 11.8K_0402_1%
1 2 FCH_SID 29 SLP_S3# H1 SLP_S3_L
R932 10K_0402_5%
29 SLP_S5# F2 SLP_S5_L
R604 10K_0402_5%
29 PBTN_OUT# PWR_BTN_L
10mils and <1"
1 2 FCH_PCIE_WAKE_R# FCH_PWROK H5
PWR_GOOD

USB 1.1
R605 10K_0402_5% G6 J10
1 1 2 LAN_CLKREQ# B3 SUS_STAT_L USB_FSD1P/GPIO186 H11 1
T82 PAD TEST0 USB_FSD1N
R817 10K_0402_5% C4
T83 PAD TEST1/TMS
F6 H9 USB_HSD[13:0]P/N:
+3VS T84 PAD TEST2 USB_FSD0P/GPIO185
AD21 J8
29 EC_GA20 AE21 GA20IN/GEVENT0_L USB_FSD0N USB P/N pairs with trace lengths up to
29 EC_KBRST# K2 KBRST_L/GEVENT1_L B12 10" and have a decoupling 5.6-pF capacitor
29 EC_SCI# J29 LPC_PME_L/GEVENT3_L USB_HSD13P A12 footprint placed near the USB connector or device.
1 2 MINI1_CLKREQ# 29 EC_SMI# H2 LPC_SMI_L/GEVENT23_L USB_HSD13N
R818 10K_0402_5% R579 1 @ 2 10K_0402_5% J1 GEVENT5_L F11
+3VALW SYS_RESET_L/GEVENT19_L USB_HSD12P
1 2 NB_PWRGD R628 2 1 FCH_PCIE_WAKE_R# H6 E11
R597 4.7K_0402_5% 24,27,29,32 FCH_PCIE_WAKE# 0_0402_5% F3 WAKE_L/GEVENT8_L USB_HSD12N
1 2 FCH_SMCLK0
5 H_THERMTRIP#
J6 IR_RX1/GEVENT20_L
THRMTRIP_L/SMBALERT_L/GEVENT2_L USB_HSD11P
E14 Root
R598 2.2K_0402_5% NB_PWRGD AC19 E12
1 2 FCH_SMDAT0 NB_PWRGD USB_HSD11N
R599 2.2K_0402_5% G1 J12
29 EC_RSMRST# RSMRST_L USB_HSD10P J14
R580 2 @ 1 0_0402_5% AD19 USB_HSD10N
AA16 CLK_REQ4_L/SATA_IS0_L/GPIO64 A13
R581 2 1 0_0402_5% AB21 CLK_REQ3_L/SATA_IS1_L/GPIO63 USB_HSD9P B13
AC18 SMARTVOLT1/SATA_IS2_L/GPIO50 USB_HSD9N
+3VS @ 24 LAN_CLKREQ# AF20 CLK_REQ0_L/SATA_IS3_L/GPIO60 D13
C111 0.1U_0402_16V7K AE19 SATA_IS4_L/FANOUT3/GPIO55 USB_HSD8P C13
1 2 AF19 SATA_IS5_L/FANIN3/GPIO59 USB_HSD8N
SPKR_GPIO66

GPIO

USB 2.0
AD22 G12
8,9,27 FCH_SMCLK0 SCL0_GPIO43 USB_HSD7P
5

AE22 G14
2 8,9,27 FCH_SMDAT0
FCH_SMCLK1 F5 SDA0_GPIO47 USB_HSD7N Root
P

4 B EC_PWROK 29 FCH_SMDAT1 F4 SCL1_GPIO227 G16 EHCI CTL

43 FCH_PWROK Y
A
1
VGATE 29,43
AH21 SDA1_GPIO228
CLK_REQ2_L/FANIN4_GPIO62
USB_HSD6P
USB_HSD6N
G18 USB20_P6 25
USB20_N6 25
USB4 DEV 19, Fn 2
G

2 AB18
27 MINI1_CLKREQ# E1 CLK_REQ1_L/FANOUT4_GPIO61 D16
@ NC7SZ08P5X_NL_SC70-5
USB3
3

AJ21 IR_LED_L/LLB_L/GPIO184 USB_HSD5P C16 USB20_P5 25

C112 U30 @
H4 SMARTVOLT2/SHUTDOWN_L/GPIO51 USB_HSD5N USB20_N5 25
0.1U_0402_16V7K
2 1 VRAM_SEL D5 DDR3_RST_L/GEVENT7_L B14 2
D7 GBE_LED0/GPIO183
GBE_LED1/GEVENT9_L
USB_HSD4P
USB_HSD4N
A14 USB20_P4 26
USB20_N4 26
CardReder
G5
K3 GBE_LED2/GEVENT10_L E18
VGA_CLKREQ#_R AA20 GBE_STAT0/GEVENT11_L
CLK_REQG_L/GPIO65_OSCIN
USB_HSD3P
USB_HSD3N
E16 USB20_P3 27
USB20_N3 27
WLAN(BT)
1 @ 2 VRAM_SEL
+3VS
R626 2.2K_0402_5% VRAM_Freq : 1->900Hz J16
1 @ 2 0-> 800Hz* H3
BLINK/USB_OC7_L/GEVENT18_L
USB_HSD2P
USB_HSD2N
J18 USB20_P2 10
USB20_N2 10 CMOS Root

USB OC
R404 100K_0402_5% D1
29 EC_LID_OUT# E4 USB_OC6_L/IR_TX1/GEVENT6_L B17
USB_OC5_L/IR_TX0/GEVENT17_L USB_HSD1P USB20_P1 31 EHCI CTL
D4 A17 DEV 18, Fn 2
E8 USB_OC4_L/IR_RX0/GEVENT16_L
USB_OC3_L/AC_PRES/TDO/GEVENT15_L
USB_HSD1N USB20_N1 31 USB2
1 @ 2 VGA_CLKREQ#_R F7 A16
E7 USB_OC2_L/TCK/GEVENT14_L USB_HSD0P B16 USB20_P0 31
R173 10K_0402_5% USB_OC1#
1 2 FCH_SMCLK1 25 USB_OC1#
31 USB_OC0#
USB_OC0# F8 USB_OC1_L/TDI/GEVENT13_L
USB_OC0_L/TRST_L/GEVENT12_L
USB_HSD0N USB20_N0 31 USB1
R587 10K_0402_5%
1 2 FCH_SMDAT1
R588 10K_0402_5% pulse

HD AUDIO
1 2 EC_RSMRST# R583 1 2 33_0402_5% HDA_BITCLK M3 D25 GPIO193 R584 2 1 10K_0402_5%
25 HDA_BITCLK_AUDIO AZ_BITCLK SCL2/GPIO193
R606 2.2K_0402_5% R165 1 2 33_0402_5% HDA_SDOUT N1 F23 GPIO194 R586 2 1 10K_0402_5%
1 2 HDA_BITCLK 25 HDA_SDOUT_AUDIO HDA_SDIN0 L2 AZ_SDOUT SDA2/GPIO194 B26
@
25 HDA_SDIN0 M2 AZ_SDIN0/GPIO167 SCL3_LV/GPIO195 E26 FCH_SIC 5
R607 10K_0402_5%
1 2 M1 AZ_SDIN1/GPIO168 SDA3_LV/GPIO196 F25 FCH_SID 5
@ HDA_SDIN0
R608 10K_0402_5% M4 AZ_SDIN2/GPIO169 EC_PWM0/EC_TIMER0/GPIO197 E22
1 2 HDA_SDOUT R589 1 2 33_0402_5% HDA_SYNC N2 AZ_SDIN3/GPIO170 EC_PWM1/EC_TIMER1/GPIO198 F22 EC_PWM2
25 HDA_SYNC_AUDIO AZ_SYNC EC_PWM2/EC_TIMER2/GPIO199 EC_PWM2 16
R609 10K_0402_5% R590 1 2 33_0402_5% HDA_RST# P2 E21 EC_PWM3
25 HDA_RST_AUDIO# AZ_RST_L EC_PWM3/EC_TIMER3/GPIO200 EC_PWM3 16
Pull-down for enable high performance mode
20100527 (required for M1) G24
R5911 2 10K_0402_5% T1 KSI_0/GPIO201 G25
R5921 2 10K_0402_5% T4 GBE_COL KSI_1/GPIO202 E28
GBE_CRS KSI_2/GPIO203

EMBEDDED CTRL
L6 E29
R593 1 2 10K_0402_5% L5 GBE_MDCK KSI_3/GPIO204 D29
3 +3VALW GBE_MDIO KSI_4/GPIO205 3
T9 D28
GBE_RXCLK KSI_5/GPIO206

GBE LAN
U1 C29
U3 GBE_RXD3 KSI_6/GPIO207 C28
T2 GBE_RXD2 KSI_7/GPIO208
U2 GBE_RXD1 B28
T5 GBE_RXD0 KSO_0/GPIO209 A27
R596 1 2 10K_0402_5% V5 GBE_RXCTL/RXDV KSO_1/GPIO210 B27
P5 GBE_RXERR KSO_2/GPIO211 D26
M5 GBE_TXCLK KSO_3/GPIO212 A26
P9 GBE_TXD3 KSO_4/GPIO213 C26
T7 GBE_TXD2 KSO_5/GPIO214 A24
P7 GBE_TXD1 KSO_6/GPIO215 B25
M7 GBE_TXD0 KSO_7/GPIO216 A25
P4 GBE_TXCTL/TXEN KSO_8/GPIO217 D24
M9 GBE_PHY_PD KSO_9/GPIO218 B24
R600 1 2 10K_0402_5% V7 GBE_PHY_RST_L KSO_10/GPIO219 C24
+3VALW GBE_PHY_INTR KSO_11/GPIO220 B23
GPIO187 E23 KSO_12/GPIO221 A23
T85 PAD PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222
GPIO188 E24 D22
T86 PAD PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223
F21 C22
G29 SPI_CS2_L/GBE_STAT2/GPIO166 KSO_15/GPIO224 A22
FC_RST_L/GPO160 KSO_16/GPIO225 B22
R627 1 2 10K_0402_5% GPIO189 D27 KSO_17/GPIO226
+3VALW PS2KB_DAT/GPIO189
GPIO190 F28
T88 PAD PS2KB_CLK/GPIO190
@ GPIO191 F29
T89 PAD PS2M_DAT/GPIO191
E27
PS2M_CLK/GPIO192
21807-A11-HUDSON-M1_FCBGA605

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P13-FCH HDA/USB/ACPI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 13 of 47
A B C D E
 A B C D E

1 1

U31B
AH9 AH28
28 SATA_ITX_DRX_P0 AJ9 SATA_TX0P FC_CLK AG28
28 SATA_ITX_DRX_N0 SATA_TX0N FC_FBCLKOUT AF26
HDD1 FC_FBCLKIN
AJ8
28 SATA_DTX_IRX_N0 AH8 SATA_RX0N AF28
28 SATA_DTX_IRX_P0 SATA_RX0P FC_OE_L/GPIOD145 AG29
AH10 FC_AVD_L/GPIOD146 AG26
28 SATA_ITX_C_DRX_P1 AJ10 SATA_TX1P FC_WE_L/GPIOD148 AF27 T8
28 SATA_ITX_C_DRX_N1 SATA_TX1N FC_CE1_L/GPIOD149 AE29
ODD GPIOD150
AG10 FC_CE2_L/GPIOD150 AF29
28 SATA_DTX_C_IRX_N1 AF10 SATA_RX1N FC_INT1/GPIOD144 AH27
28 SATA_DTX_C_IRX_P1 SATA_RX1P FC_INT2/GPIOD147

GPIOD
AG12 AJ27
28 SATA_ITX_DRX_P2 AF12 SATA_TX2P FC_ADQ0/GPIOD128 AJ26
28 SATA_ITX_DRX_N2 SATA_TX2N FC_ADQ1/GPIOD129 AH25
HDD2 FC_ADQ2/GPIOD130
AJ12 AH24
28 SATA_DTX_IRX_N2 SATA_RX2N FC_ADQ3/GPIOD131

SERIAL ATA
2 AH12 AG23 2
28 SATA_DTX_IRX_P2 SATA_RX2P FC_ADQ4/GPIOD132 AH23
AH14 FC_ADQ5/GPIOD133 AJ22
AJ14 SATA_TX3P FC_ADQ6/GPIOD134 AG21
SATA_TX3N FC_ADQ7/GPIOD135 AF21
AG14 FC_ADQ8/GPIOD136 AH22
AF14 SATA_RX3N FC_ADQ9/GPIOD137 AJ23
SATA_RX3P FC_ADQ10/GPIOD138 AF23
AG17 FC_ADQ11/GPIOD139 AJ24
AF17 SATA_TX4P FC_ADQ12/GPIOD140 AJ25
SATA_TX4N FC_ADQ13/GPIOD141 AG25
AJ17 FC_ADQ14/GPIOD142 AH26
AH17 SATA_RX4N FC_ADQ15/GPIOD143
SATA_RX4P
AJ18
SATA_TX5P

HW MONITOR
AH18 W5 USB30_SMI#
SATA_TX5N FANOUT0/GPIO52 W6 USB30_SMI# 32
AH19 FANOUT1/GPIO53 Y9
AJ19 SATA_RX5N FANOUT2/GPIO54 BT_ON 27
SATA_RX5P W7
10 mils and < 1" FANIN0/GPIO56 V9
FANIN1/GPIO57 WL_OFF# 27
R610 1 2 1K_0402_1% SATA_CALRP AB14 W8
R611 1 2 931_0402_1% SATA_CALRN AA14 SATA_CALRP FANIN2/GPIO58
+AVDD_SATA SATA_CALRN B6 TEMPIN0 R612 2 1 10K_0402_5%
TEMPIN0/GPIO171 A6 TEMPIN1 R613 2 1 10K_0402_5%
AD11 TEMPIN1/GPIO172 A5 TEMPIN2 R614 2 1 10K_0402_5%
27 SATA_LED# SATA_ACT_L/GPIO67 TEMPIN2/GPIO173 B5
@ R615 2 1 10K_0402_5%
R616 1 2 10K_0402_5% TEMPIN3/TALERT_L/GPIO174 C7
+3VS TEMP_COMM
A3 GPIO175 R617 2 1 10K_0402_5%
C107 1 2 25M_SATA_X1 AD16 VIN0/GPIO175 B4 GPIO176 R618 2 1 10K_0402_5%
SATA_X1 VIN1/GPIO176 A4 GPIO177 R619 2 1 10K_0402_5%
VIN2/GPIO177
1

3 12P_0402_50V8J C5 GPIO178 R620 2 1 10K_0402_5% 3

@ VIN3/GPIO178
@ 1M_0603_5% A7 GPIO179 R621 2 1 10K_0402_5% VIN6/GBE_STAT3/GPIO181
Y7 R861 VIN4/GPIO179 B7 GPIO180 R622 2 1 10K_0402_5%
VIN5/GPIO180 Enable integrated pull-down/up and leave unconnected
@ B8 GPIO181 R623 2 @ 1 10K_0402_5%
2

@ 25M_SATA_X2 AC16 VIN6/GBE_STAT3/GPIO181 A8 GPIO182 R624 2 1 10K_0402_5%

C106 1 2 SATA_X2 VIN7/GBE_LED3/GPIO182
25MHZ_20PF_7A25000012
SPI ROM

10P_0402_50V8J

FCH_SI_SPI_SO_R J5 G27
FCH_SO_SPI_SI_R E2 SPI_DI/GPIO164 NC1 Y2
FCH_SPICLK R510 1 @ 2 0_0402_5% FCH_SPICLK_R K4 SPI_DO/GPIO163 NC2
FCH_SPICS#/FSEL#_R K9 SPI_CLK/GPIO162
G2 SPI_CS1_L/GPIO165
T78PAD ROM_RST_L/GPIO161 +3VALW
21807-A11-HUDSON-M1_FCBGA605 +3V_SPI
U11
1
4 VDD 12 EC_ON
+3VALW VDD SEL EC_ON 29,33
9
+3VALW 19 VDD 2
VDD YA 5 FCH_SPICS#/FSEL#
@ @ 24 YB 6 FCH_SPICLK
A0 YC
2
1 2 C784 1 2 0.1U_0402_16V4Z KSI4 22
+3V_SPI 29,30 KSI4 B0
R504 0_0603_5% R257 KSI5 18 8 FCH_SO_SPI_SI
29,30 KSI5 C0 YD
0_0402_5% KSI6 17 11 FCH_SI_SPI_SO
29,30 KSI6 D0 YE
FCH_+SPI_VCC KSI7 14
@ 29,30 KSI7 E0
1

U32 23 3
@ FCH_SPICS#/FSEL# 1 8 FCH_SPICS#/FSEL#_R 21 A1 GND 7
R507 1 2 4.7K_0402_5% FCH_SPI_WP# 3 CS# VCC 6 FCH_SPICLK FCH_SPICLK_R 16 B1 GND 10
R491 1 2 4.7K_0402_5% FCH_SPI_HOLD# 7 WP# SCLK 5 FCH_SO_SPI_SI FCH_SO_SPI_SI_R 15 C1 GND 20
4 +3V_SPI HOLD# SI D1 GND 4
4 2 FCH_SI_SPI_SO FCH_SI_SPI_SO_R 13
@ GND SO E1
MX25L1606EM2I-12G SOP 8P PI3V512QE_QSOP24
SA000041N00 @
@

FCH_SPICLK_R R31 1 2 0_0402_5% C126 1 2 0.1U_0402_16V4Z Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title
@ @
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P14-FCH-SATA/SPI
Size Document Number Rev
EMI AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 14 of 47
A B C D E
 A B C D E

+3VS
42mAAH1 U31C POWER 979.4mA

10U_0603_6.3V6M
0.1U_0402_16V7K

0.1U_0402_16V7K

1U_0402_6.3V6K

1U_0402_6.3V6K
N13
VDDIO_33_PCIGP_1 VDDCR_11_1 +1.1VS +1.1VS

CORE S0
10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
2 2 2 2 2 V6 R15 1 1 1 1 1
VDDIO_33_PCIGP_2 VDDCR_11_2

PCI/GPIO I/O
C121

C113

C114

C115

C116

C738

C70

C117

C118

C71
Y19 N17
AE5 VDDIO_33_PCIGP_3 VDDCR_11_3 U13
AC21 VDDIO_33_PCIGP_4 VDDCR_11_4 U17
1 1 1 1 1 AA2 VDDIO_33_PCIGP_5 VDDCR_11_5 V12 2 2 2 2 2

330U_D2_2.5VY_R9M
VDDIO_33_PCIGP_6 VDDCR_11_6

10U_0603_6.3V6M
AB4 V18 1
AC8 VDDIO_33_PCIGP_7 VDDCR_11_7 W12
VDDIO_33_PCIGP_8 VDDCR_11_8 1
+

C119

C68
AA7 W18
AA9 VDDIO_33_PCIGP_9 VDDCR_11_9
AF7 VDDIO_33_PCIGP_10
GPIO I/F implemented: tied to +1.8V_S0 VDDIO_33_PCIGP_11 382.9mA 2 2

CLKGEN I/O
1 GPIO I/F not implemented: tied to AA19 K28 +VDDAN_11_CLK L43 2 1 1
+1.8VS VDDIO_33_PCIGP_12 VDDAN_11_CLK_1 +1.1VS

10U_0603_6.3V6M

10U_0603_6.3V6M
0.1U_0402_16V7K

0.1U_0402_16V7K

1U_0402_6.3V6K

1U_0402_6.3V6K
R632 +1.8V_S0 or 0 ohm to ground K29 1 1 1 1 1 1
VDDAN_11_CLK_2

C72

C73

C74

C75

C743

C109
1 2 +VDDIO_18_FC J28 FBMA-L11-201209-221LMA30T_0805
VDDAN_11_CLK_3 K26
0.16mA VDDAN_11_CLK_4
1

0_0402_5%

FLASH I/O
0.1U_0402_16V7K

0.1U_0402_16V7K
J21

4.7U_0603_6.3V6K
0_0603_5% 2 2 2 VDDAN_11_CLK_5 2 2 2 2 2 2
R633

C744

C69

C746
AF22 J20
AE25 VDDIO_18_FC_1 VDDAN_11_CLK_6 K21
AF24 VDDIO_18_FC_2 VDDAN_11_CLK_7 J22
@ 1 1 1 AC22 VDDIO_18_FC_3 VDDAN_11_CLK_8
2

VDDIO_18_FC_4
V1
VDDRF_GBE_S
22.5mA M10
VDDIO_33_GBE_S

2.2U_0603_6.3V6K
L44

PCI EXPRESS
2 1 +VDDPL33_PCIE AE28
+3VS VDDPL_33_PCIE
FBMA-L11-160808-221LMT_2P 1

GBE LAN
C76
1115.6mA U26 L7
V22 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L9
2 V26 VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2
+1.1VS L45 +PCIE_VDDAN V27 VDDAN_11_PCIE_3
VDDAN_11_PCIE_4 +3VALW
10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K
2 1 V28 M6
VDDAN_11_PCIE_5 VDDIO_GBE_S_1
1U_0402_6.3V6K

FBMA-L11-201209-221LMA30T_0805 V29 P8 @
W22 VDDAN_11_PCIE_6 VDDIO_GBE_S_2 U85
1 1 1 2 2 VDDAN_11_PCIE_7 +VDDCR_11_USB
C105

C77

C78

C79

C80

W26 @ 1
VDDAN_11_PCIE_8 L107 VIN
2 1 5 1U_0402_6.3V6K
2 2 2 1 1 15.5mA VOUT 2 1 2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K
FBMA-L11-160808-221LMT 0603
GND

SERIAL ATA

3.3V_S5 I/O
+VDDPL_33_SATA AD14 49.5mA
VDDPL_33_SATA A21 4 C989
VDDIO_33_S_1 +3VALW FB
+AVDD_SATA AJ20 D21 1 1 3 @
VDDAN_11_SATA_1 VDDIO_33_S_2 EN

C81

C82
AF18 B21
2 AH20 VDDAN_11_SATA_4 VDDIO_33_S_3 K10 2
1345.2mA AG19 VDDAN_11_SATA_2 VDDIO_33_S_4 L10 APL5317
AE18 VDDAN_11_SATA_3 VDDIO_33_S_5 J9 2 2
AD18 VDDAN_11_SATA_5 VDDIO_33_S_6 T6
AE16 VDDAN_11_SATA_6 VDDIO_33_S_7 T8
VDDAN_11_SATA_7 VDDIO_33_S_8
Reserve

1U_0402_6.3V6K

1U_0402_6.3V6K
+1.1VALW
1 1

CORE S5

C83

C84
L46 F26 165.2mA
2 1 +AVDD_USB A18 VDDCR_11_S_1 G26
+3VALW VDDAN_33_USB_S_1 VDDCR_11_S_2
A19 15.3mA
VDDAN_33_USB_S_2 2 2
10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V7K

FBMA-L11-201209-221LMA30T_0805 534.5mA A20 M8

VDDAN_33_USB_S_3 VDDIO_AZ_S +VDDIO_AZ
1 1 1 1 1 B18 58mA
VDDAN_33_USB_S_4

USB I/O

10U_0603_6.3V6M
C85

C86

C87

C88

C89

0.1U_0402_16V7K

0.1U_0402_16V7K
B19 A11 L47
B20 VDDAN_33_USB_S_5 VDDCR_11_USB_S_1 B11 +VDDCR_11_USB 2 1
VDDAN_33_USB_S_6 VDDCR_11_USB_S_2 +1.1VALW
C18 1 1 1 FBMA-L11-201209-221LMA30T_0805
2 2 2 2 2 VDDAN_33_USB_S_7

C90

C91

C92
C20 46.5mA
D18 VDDAN_33_USB_S_8 M21
VDDAN_33_USB_S_9 VDDPL_33_SYS +VDDPL33
D19 65.3mA
VDDAN_33_USB_S_10 2 2 2

PLL
D20 L22
VDDAN_33_USB_S_11 VDDPL_11_SYS_S +VDDPL11
E19 16.1mA
VDDAN_33_USB_S_12 F19
VDDPL_33_USB_S +AVDD_USB
L48 11.4mA
0.1U_0402_16V7K

2 1 C11 D6
2.2U_0603_6.3V6K

+VDDAN_11_USB
+1.1VALW VDDAN_11_USB_S_1 VDDAN_33_HWM_S +VDDAN33_HWM
D11 L49
FBMA-L11-160808-221LMT_2P VDDAN_11_USB_S_2 L20 +VDDXL_33_S 2 1
1 2 88.6mA VDDXL_33_S +3VS
C93

C94

2.2U_0603_6.3V6K
5mA 1

C95
21807-A11-HUDSON-M1_FCBGA605 FBMA-L11-160808-221LMT_2P
2 1
2

3 3

+AVDD_SATA +VDDIO_AZ +3VALW

+VDDPL_33_SATA L50
10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K

L51 2 1 1 @ 2
+1.1VS
1U_0402_6.3V6K

1U_0402_6.3V6K

2 1 FBMA-L11-201209-221LMA30T_0805 R634 0_0603_5%

+3VS
FBMA-L11-160808-221LMT_2P 1 1 1 1 1 1 1 2
+3VS
C108

C96

C97

C778

C775

C776

R635 0_0603_5%
1
C777 1 2 2.2U_0603_6.3V6K
2 2 2 2 2 2 C98
2.2U_0603_6.3V6K
2

+VDDPL11 +VDDAN33_HWM
For 3V AZ device
L52 L53
2 1 2 1
+1.1VALW +3VALW
FBMA-L11-160808-221LMT_2P FBMA-L11-160808-221LMT_2P
0.1U_0402_16V7K
2.2U_0603_6.3V6K

C99 1 2 2.2U_0603_6.3V6K
1 2
C100

C782

4 4

2 1

+VDDPL33
L55
2 1
+3VS
FBMA-L11-160808-221LMT_2P Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title
C120 1 2 2.2U_0603_6.3V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P15-FCH PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 15 of 47
A B C D E
 5 4 3 2 1

U31D
Y14
Y16
AB16
VSSIO_SATA_1
VSSIO_SATA_2
VSS_1
VSS_2
AJ2
A28
A2
REQUIRED STRAPS Check Internal PU/PD
AC14 VSSIO_SATA_3 VSS_3 E5
AE12 VSSIO_SATA_4 VSS_4 D23
VSSIO_SATA_5 VSS_5 PCI_CLK2 PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 RTC_CLK EC_PWM2 EC_PWM3
AE14 E25
AF9 VSSIO_SATA_6 VSS_6 E6
AF11 VSSIO_SATA_7 VSS_7 F24
VSSIO_SATA_8 VSS_8 PULL WATCHDOG ALLOW PCIE USE NON Fusion internal EC Internal S5 PLUS LPC ROM (H.L)
AF13 N15
HIGH TIMER GEN2 DEBUG CLOCK ENABLE CLKGEN MODE
*
D AF16 VSSIO_SATA_9 VSS_9 R13 D
AG8 VSSIO_SATA_10 VSS_10 R17 ENABLE STRAP Mode Mode DISABLED
AH7 VSSIO_SATA_11 VSS_11 T10 DEFAULT DEFAULT
AH11 VSSIO_SATA_12 VSS_12 P10 DEFAULT
AH13 VSSIO_SATA_13 VSS_13 V11
VSSIO_SATA_14 VSS_14 IGNORE Fusion
AH16 U15 PULL WATCHDOG FORCE PCIE internal EC External S5 PLUS SPI ROM(L,H)
AJ7 VSSIO_SATA_15 VSS_15 M18 DEBUG CLOCK
AJ11 VSSIO_SATA_16 VSS_16 V19 LOW TIMER GEN1 STRAP Mode DISABLE CLKGEN MODE
AJ13 VSSIO_SATA_17 VSS_17 M11 DISABLE Mode ENABLED
AJ16 VSSIO_SATA_18 VSS_18 L12 DEFAULT
VSSIO_SATA_19 VSS_19

GND
L18 DEFAULT DEFAULT DEFAULT
A9 VSS_20 J7
B10 VSSIO_USB_1 VSS_21 P3
K11 VSSIO_USB_2 VSS_22 V4
B9 VSSIO_USB_3 VSS_23 AD6
D10 VSSIO_USB_4 VSS_24 AD4 +3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW
D12 VSSIO_USB_5 VSS_25 AB7
D14 VSSIO_USB_6 VSS_26 AC9
D17 VSSIO_USB_7 VSS_27 V8
VSSIO_USB_8 VSS_28

1
E9 W9
F9 VSSIO_USB_9 VSS_29 W10 R649 R636 R637 R638 R639 R166 R594 R550 R551
F12 VSSIO_USB_10 VSS_30 AJ28 @ @ @ @ @
F14 VSSIO_USB_11 VSS_31 B29 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
F16 VSSIO_USB_12 VSS_32 U4 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

2
C VSSIO_USB_13 VSS_33 C
C9 Y18
G11 VSSIO_USB_14 VSS_34 Y10
F18 VSSIO_USB_15 VSS_35 Y12
D9 VSSIO_USB_16 VSS_36 Y11
VSSIO_USB_17 VSS_37 12 PCI_CLK2
H12 AA11
H14 VSSIO_USB_18 VSS_38 AA12 12 PCI_CLK1
VSSIO_USB_19 VSS_39 12 PCI_CLK3
H16 G4
H18 VSSIO_USB_20 VSS_40 J4 12 PCI_CLK4
J11 VSSIO_USB_21 VSS_41 G8 12 LPC_CLK0
VSSIO_USB_22 VSS_42 12 LPC_CLK1
J19 G9
K12 VSSIO_USB_23 VSS_43 M12 13 EC_PWM2
VSSIO_USB_24 VSS_44 13 EC_PWM3
K14 AF25
K16 VSSIO_USB_25 VSS_45 H7 12,29 RTC_CLK
K18 VSSIO_USB_26 VSS_46 AH29
H19 VSSIO_USB_27 VSS_47 V10
VSSIO_USB_28 VSS_48

1
P6
VSS_49 N4 R650 R640 R641 R642 R643 R167 R601 R602 R625
Y4 VSS_50 L4 @ @ @ @
EFUSE VSS_51 L8 10K_0402_5% 10K_0402_5% 10K_0402_5% 2.2K_0402_5%
D8 VSS_52 10K_0402_5% 10K_0402_5% 10K_0402_5% 2.2K_0402_5% 2.2K_0402_5%

2
VSSAN_HWM
M19 M20
VSSXL VSSPL_SYS
B B
P21 H23
P20
M22
M24
VSSIO_PCIECLK_1
VSSIO_PCIECLK_2
VSSIO_PCIECLK_3
VSSIO_PCIECLK_14
VSSIO_PCIECLK_15
VSSIO_PCIECLK_16
H26
AA21
AA23
DEBUG STRAPS
M26 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17 AB23 FCH M1 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
P22 VSSIO_PCIECLK_5 VSSIO_PCIECLK_18 AD23
VSSIO_PCIECLK_6 VSSIO_PCIECLK_19 PCI_AD23
P24 AA26 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24
P26 VSSIO_PCIECLK_7 VSSIO_PCIECLK_20 AC26 Enable ROM Straps
T20 VSSIO_PCIECLK_8 VSSIO_PCIECLK_21 Y20
VSSIO_PCIECLK_9 VSSIO_PCIECLK_22 USE internal 12 PCI_AD27
T22 W21 ILA AUTORUN Selects Disable I2C Required Setting
T24 VSSIO_PCIECLK_10 VSSIO_PCIECLK_23 W20 PLL generated 12 PCI_AD26
VSSIO_PCIECLK_11 VSSIO_PCIECLK_24 PULL Disabled FC PLL ROM 12 PCI_AD25
V20 AE26 PLL CLK
J23 VSSIO_PCIECLK_12 VSSIO_PCIECLK_25 L21 HIGH 12 PCI_AD24
VSSIO_PCIECLK_13 VSSIO_PCIECLK_26 K20 12 PCI_AD23
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
VSSIO_PCIECLK_27

1
21807-A11-HUDSON-M1_FCBGA605
PULL BYPASS ILA FC PLL Getting Value R644 R645 R646 R647 R648
Reserved @ @ @ @ @
LOW PCI PLL AUTORUN bypassed from I2C EPROM 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
Enabled 2.2K_0402_5% 2.2K_0402_5%

2
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P16-FCH-VSS/Strap
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 16 of 47
5 4 3 2 1
 5 4 3 2 1

GFX PCIE LANE REVERSAL

D U2G R1 D
U2A 10K_0402_5%
PCIE_FTX_C_GRX_P[0..3] PCIE_GTX_C_FRX_P[0..3] 1 2
6 PCIE_FTX_C_GRX_P[0..3] PCIE_GTX_C_FRX_P[0..3] 6
PCIE_FTX_C_GRX_N[0..3] PCIE_GTX_C_FRX_N[0..3] LVDS CONTROL AK27
6 PCIE_FTX_C_GRX_N[0..3] PCIE_GTX_C_FRX_N[0..3] 6 VARY_BL AJ27 VGA_INVT_PWM 10
DIGON VGA_ENVDD 10
R2
1 2
PCIE_FTX_C_GRX_P0 AA38 Y33 PCIE_GTX_FRX_P0 C1 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P0 10K_0402_5%
PCIE_FTX_C_GRX_N0 Y37 PCIE_RX0P PCIE_TX0P Y32 PCIE_GTX_FRX_N0 C2 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_N0
PCIE_RX0N PCIE_TX0N AK35 VGA2_TXCLK+
TXCLK_UP_DPF3P AL36 VGA2_TXCLK- VGA2_TXCLK+ 10
PCIE_FTX_C_GRX_P1 Y35 W33 PCIE_GTX_FRX_P1 1 2 TXCLK_UN_DPF3N VGA2_TXCLK- 10
C3 0.1U_0402_16V7K PCIE_GTX_C_FRX_P1
PCIE_FTX_C_GRX_N1 W36 PCIE_RX1P PCIE_TX1P W32 PCIE_GTX_FRX_N1 C4 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_N1 AJ38 VGA2_TXOUT0+
PCIE_RX1N PCIE_TX1N TXOUT_U0P_DPF2P AK37 VGA2_TXOUT0+ 10
VGA2_TXOUT0-
TXOUT_U0N_DPF2N VGA2_TXOUT0- 10
PCIE_FTX_C_GRX_P2 W38 U33 PCIE_GTX_FRX_P2 C5 1 2 0.1U_0402_16V7K PCIE_GTX_C_FRX_P2 AH35 VGA2_TXOUT1+
PCIE_FTX_C_GRX_N2 V37 PCIE_RX2P PCIE_TX2P U32 PCIE_GTX_FRX_N2 1 2 TXOUT_U1P_DPF1P AJ36 VGA2_TXOUT1+ 10
C6 0.1U_0402_16V7K PCIE_GTX_C_FRX_N2 VGA2_TXOUT1-
PCIE_RX2N PCIE_TX2N TXOUT_U1N_DPF1N VGA2_TXOUT1- 10
AG38 VGA2_TXOUT2+
PCIE_FTX_C_GRX_P3 V35 U30 PCIE_GTX_FRX_P3 1 2 TXOUT_U2P_DPF0P AH37 VGA2_TXOUT2+ 10
C7 0.1U_0402_16V7K PCIE_GTX_C_FRX_P3 VGA2_TXOUT2-
PCIE_FTX_C_GRX_N3 U36 PCIE_RX3P PCIE_TX3P U29 PCIE_GTX_FRX_N3 1 2 TXOUT_U2N_DPF0N VGA2_TXOUT2- 10
C8 0.1U_0402_16V7K PCIE_GTX_C_FRX_N3
PCIE_RX3N PCIE_TX3N AF35
TXOUT_U3P AG36
U38 T33 TXOUT_U3N
T37 PCIE_RX4P PCIE_TX4P T32
PCIE_RX4N PCIE_TX4N

PCI EXPRESS INTERFACE

LVTMDP

T35 T30 AP34 VGA_TXCLK+

R36 PCIE_RX5P PCIE_TX5P T29 TXCLK_LP_DPE3P AR34 VGA_TXCLK+ 10
VGA_TXCLK-
PCIE_RX5N PCIE_TX5N TXCLK_LN_DPE3N VGA_TXCLK- 10
AW37 VGA_TXOUT0+
C R38 P33 TXOUT_L0P_DPE2P AU35 VGA_TXOUT0- VGA_TXOUT0+ 10 C
P37 PCIE_RX6P PCIE_TX6P P32 TXOUT_L0N_DPE2N VGA_TXOUT0- 10
PCIE_RX6N PCIE_TX6N AR37 VGA_TXOUT1+
TXOUT_L1P_DPE1P AU39 VGA_TXOUT1+ 10
VGA_TXOUT1-
P35 P30 TXOUT_L1N_DPE1N VGA_TXOUT1- 10
N36 PCIE_RX7P PCIE_TX7P P29 AP35 VGA_TXOUT2+
PCIE_RX7N PCIE_TX7N TXOUT_L2P_DPE0P AR35 VGA_TXOUT2+ 10
VGA_TXOUT2-
TXOUT_L2N_DPE0N VGA_TXOUT2- 10
N38 N33 AN36
M37 PCIE_RX8P PCIE_TX8P N32 TXOUT_L3P AP37
PCIE_RX8N PCIE_TX8N TXOUT_L3N

M35 N30
L36 PCIE_RX9P PCIE_TX9P N29
PCIE_RX9N PCIE_TX9N
2160809000A11SEYMOU_FCBGA962
L38 L33
K37 PCIE_RX10P PCIE_TX10P L32
PCIE_RX10N PCIE_TX10N

K35 L30
J36 PCIE_RX11P PCIE_TX11P L29
PCIE_RX11N PCIE_TX11N

J38 K33
H37 PCIE_RX12P PCIE_TX12P K32
PCIE_RX12N PCIE_TX12N

H35 J33
G36 PCIE_RX13P PCIE_TX13P J32
PCIE_RX13N PCIE_TX13N

B G38 K30 B
F37 PCIE_RX14P PCIE_TX14P K29
PCIE_RX14N PCIE_TX14N

F35 H33
E37 PCIE_RX15P PCIE_TX15P H32
PCIE_RX15N PCIE_TX15N

CLOCK
AB35
12 CLK_PCIE_VGA AA36 PCIE_REFCLKP
12 CLK_PCIE_VGA# PCIE_REFCLKN
AH16
CALIBRATION
Accessiable for "Test Purposes" Y30 1 2
Connect to GND for "Normal Operation" PCIE_CALRP R3 1.27K_0402_1%
2 1 AH16 Y29 1 2
+1.0VSG
R5 10K_0402_5% PWRGOOD PCIE_CALRN R6 2K_0402_1%

1 2 VGA_RST# AA30
12,24,27,32 PLT_RST# PERSTB
R159 0_0402_5%

2160809000A11SEYMOU_FCBGA962

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P17-Vancouver_ PCIE / LVDS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 17 of 47
5 4 3 2 1
 5 4 3 2 1

U2B

Strap Name Pin Straps description <all internal PD> Setting External VGA Thermal Sensor
VGA Disable determines AU24 +3VSG
TXCAP_DPA3P VGA_HDMI_TXC+ 11
VGA_DIS GPIO9 0: VGA Controller capacity enabled 0 AV23
TXCAM_DPA3N VGA_HDMI_TXC- 11
1: The device will not be recognized as the systemˇs VGA controller
AT25 1
TX0P_DPA2P VGA_HDMI_TXD0+ 11

0.1U_0402_16V4Z
Transmitter Power Saving Enable MUTI GFX AR24
DPA TX0M_DPA2N VGA_HDMI_TXD0- 11
TX_PWRS_ENB GPIO0 0: 50% Tx output swing for mobile mode 1 C10
1: full Tx output swing (Default setting for Desktop) AU26
TX1P_DPA1P AV25 VGA_HDMI_TXD1+ 11 2
TX1M_DPA1N VGA_HDMI_TXD1- 11
PCI Express Transmitter De-emphasis Enable U4
TX_DEEMPH_EN GPIO1 0: Tx de-emphasis diabled for mobile mode 1 AR8 AT27 1 8 VGA_SMB_CK2
AU8 NC_DVPCNTL_MVP_0 TX2P_DPA0P AR26 VGA_HDMI_TXD2+ 11 VDD SCLK
1: Tx de-emphasis enabled (Defailt setting for desktop) NC_DVPCNTL_MVP_1 TX2M_DPA0N VGA_HDMI_TXD2- 11
AP8 GPU_THERM_D+ 2 7 VGA_SMB_DA2
AW8 NC_DVPCNTL_0 AR30 2200P_0402_50V7K D+ SDATA R7
GPIO13,12,11 (config 2,1,0) : memory apertures NC_DVPCNTL_1 TXCBP_DPB3P
CONFIG[2] GPIO13 a) If BIOS_ROM_EN = 1, then Config[2:0] defines AR3 AT29 1 2 3 6 2 1 THM_ALERT#
D CONFIG[3:0] AR1 NC_DVPCNTL_2 TXCBM_DPB3N D- ALERT# D
CONFIG[1] GPIO12 the ROM type. C11 0_0402_5%
128 MB 000 VRAM_ID0 AU1 NC_DVPCLK AV31 GPU_THERM_D- 4 5
CONFIG[0] GPIO11 001 DVPDATA_0 TX3P_DPB2P THERM# GND
b) If BIOS_ROM_EN = 0, then Config[2:0] defines 256 MB 001 * VRAM_ID1 AU3
DVPDATA_1 TX3M_DPB2N
AU30 1 2 +3VSG
64 MB 010 VRAM_ID2 AW3 DPB R8 4.7K_0402_5%
the primary memory aperture size. AP6 DVPDATA_2 AR32
VRAM_ID3 ADM1032ARMZ-2REEL_MSOP8
AW5 DVPDATA_3 TX4P_DPB1P AT31
BIOS_ROM_EN GPIO22 Enable external BIOS ROM device DVPDATA_4 TX4M_DPB1N
0: Diable, 1: Enable 0 AU5 Address 1001 101X b
AR6 DVPDATA_5 AT33
AW6 DVPDATA_6 TX5P_DPB0P AU32
00: No audio function; 10: Audio for DisplayPort only; DVPDATA_7 TX5M_DPB0N
AUD[1] HSYNC 11 AU6
01: Audio for DisplayPort and HDMI if adapter is detected; AT7 DVPDATA_8 AU14 +3VSG
AUD(0) VSYNC DVPDATA_9 TXCCP_DPC3P
11: Audio for both DisplayPort and HDMI AV7 AV13
AN7 DVPDATA_10 TXCCM_DPC3N +3VSG
0= Advertises the PCI-E device as 2.5 GT/s capable at power-on DVPDATA_11
BIF_GEN2_EN GPIO2 1= Advertises the PCI-E device as 5.0 GT/s capable at power-on 1 AV9 AT15
DVPDATA_12 TX0P_DPC2P

2
5.0 GT/s capability will be controlled by software AT9 AR14
AR10 DVPDATA_13 TX0M_DPC2N R9 R10
AW10 DVPDATA_14 DPC AU16 4.7K_0402_5% 4.7K_0402_5%
H2SYNC Internal use only. THIS PAD HAS AN INTERNAL DVPDATA_15 TX1P_DPC1P

5
RESERVED (GENLK_CLK) PULL-DOWN AND MUST BE 0 V AT RESET. The AU10 AV15
AP10 DVPDATA_16 TX1M_DPC1N

1
pad may be left unconnected AV11 NC_DVPDATA_17 AT17 VGA_SMB_CK2 4 3 EC_SMB_CK2
GPIO8 DNI NC_DVPDATA_18 TX2P_DPC0P EC_SMB_CK2 5,29
GPIO21 AT11 AR16
AR12 NC_DVPDATA_19 TX2M_DPC0N Q1B
GENERICC NC_DVPDATA_20

2
GPIO5 AW12 AU20 DMN66D0LDW-7_SOT363-6
AU12 NC_DVPDATA_21 NC_TXCDP_DPD3P AT19
AP12 NC_DVPDATA_22 NC_TXCDM_DPD3N VGA_SMB_DA2 1 6 EC_SMB_DA2
NC_DVPDATA_23 EC_SMB_DA2 5,29
AT21
AJ21 NC_TX3P_DPD2P AR20 Q1A DMN66D0LDW-7_SOT363-6
AK21 SWAPLOCKA NC_TX3M_DPD2N
+3VSG +3VSG SWAPLOCKB DPD AU22
NC_TX4P_DPD1P AV21
R11 1 2 10K_0402_5% VGA_GPIO0 R12 1 2 4.7K_0402_5% NC_TX4M_DPD1N VGA_CRT_R
R13 1 2 10K_0402_5% VGA_GPIO1 R14 1 2 4.7K_0402_5% I2C AT23
R15 1 2 10K_0402_5% VGA_GPIO2 NC_TX5P_DPD0P AR22 VGA_CRT_G
@ R16 1 2 10K_0402_5% SOUT_GPIO8 VGA_LCD_CLK AK26 NC_TX5M_DPD0N
10 VGA_LCD_CLK SCL
@ R17 1 2 10K_0402_5% SIN_GPIO9 VGA_LCD_DAT AJ26 Not share via for other GND VGA_CRT_B
10 VGA_LCD_DAT SDA
R18 1 2 10K_0402_5% VGA_GPIO11
@ R19 1 2 10K_0402_5% VGA_GPIO12 AD39 VGA_CRT_R

150_0402_1%

150_0402_1%

150_0402_1%
R VGA_CRT_R 10

1
C @ R20 1 2 10K_0402_5% VGA_GPIO13 GPIO_0 will use to control GENERAL PURPOSE I/O AD37 R1665 R1660 R1659 C
R22 1 2 10K_0402_5% VGA_CRT_HSYNC VGA_GPIO0 AH20 RB
PSI in the future product GPIO_0
R75 1 2 10K_0402_5% VGA_CRT_VSYNC VGA_GPIO1 AH18 AE36 VGA_CRT_G
GPIO_1 G VGA_CRT_G 10
@ R23 1 2 10K_0402_5% GENERICC VGA_GPIO2 AN16 AD35
@ R24 1 2 10K_0402_5% V2SYNC AH23 GPIO_2 GB

2
@ R25 1 2 10K_0402_5% H2SYNC AJ23 GPIO_3_SMBDATA AF37 VGA_CRT_B
1 2 AH17 GPIO_4_SMBCLK B AE38 VGA_CRT_B 10
@ R26 10K_0402_5% BB_EN_GPIO21 VGA_GPIO5
@ R27 1 2 10K_0402_5% ROMSE_GPIO22 AJ17 GPIO_5_AC_BATT DAC1 BB
@ R28 1 2 10K_0402_5% VGA_GPIO5 VGA_ENBKL AK17 GPIO_6 AC36 VGA_CRT_HSYNC R1641 2 1 0_0402_5%
10 VGA_ENBKL AJ13 GPIO_7_BLON HSYNC AC38 VGA_CRT_HSYNC_R 10
SOUT_GPIO8 VGA_CRT_VSYNC R1651 2 1 0_0402_5%
GPIO_8_ROMSO VSYNC VGA_CRT_VSYNC_R 10
10K_0402_5% 2 1 SIN_GPIO9 AH15
R29 CLK_GPIO10 2 @ 1 AJ16 GPIO_9_ROMSI
Seymour(XT) R53 0_0402_5% VGA_GPIO11 AK16 GPIO_10_ROMSCK AB34 R30 1 2 499_0402_1% L78
GPIO_11 RSET Close to GPU
VGA_GPIO12 AL16 10mil BLM18AG121SN1D_0603
GPIO_12

0.1U_0402_16V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M
Location VRAM_ID3 VRAM_ID2 VRAM_ID1 VRAM_ID0 VGA_GPIO13 AM16 70mA AD34 +AVDD 2 1
GPIO_13 AVDD +1.8VSG

1U_0402_6.3V4Z
VRAM AM14 AE34
GPU_VID0 AM13 GPIO_14_HPD2 AVSSQ
44 GPU_VID0
T1 AK14 GPIO_15_PWRCNTL_0 AC33 +VDD1DI
10mil 120ohm/0.3A
Samsung GPIO_16 45mA VDD1DI 1 1 1 1

C12

C13

C14

C52
SA00004GS30 64M16 0 0 0 0 THM_ALERT# AG30 AC34
AN14 GPIO_17_THERMAL_INT VSS1DI
K4W1G1646G-BC11 GPIO_18_HPD3
AM17
GPU_VID1 AL13 GPIO_19_CTF AC30 2 2 2 2
Samsung 44 GPU_VID1 GPIO_20_PWRCNTL_1 R2/NC
SA000047QA0 128M16 0 0 0 1 BB_EN_GPIO21 AJ14 AC31
ROMSE_GPIO22 AK13 GPIO_21_BB_EN R2B/NC L79 BLM18AG121SN1D_0603
K4W2G1646C-HC11 GPIO_22_ROMCSB

0.1U_0402_16V4Z

10U_0603_6.3V6M
T2 AN13 AD30 2 1
GPIO_23_CLKREQB G2/NC +1.8VSG

1U_0402_6.3V4Z
Hynix T3 AM23 AD31
AN23 JTAG_TRSTB G2B/NC
SA000041S60 64M16 0 1 0 0 T4
JTAG_TDI 120ohm/0.3A
H5TQ1G63DFR-11C T5 AK23 AF30 1 1 1
JTAG_TCK B2/NC

C15

C16

C17
T6 AL24 AF31
T7 AM24 JTAG_TMS B2B/NC
Hynix JTAG_TDO
SA00003YO30 128M16 0 1 0 1 AJ19
AK19 GENERICA AC32 2 2 2
H5TQ2G63BFR-11C GENERICB C/NC
GENERICC AJ20 AD32
AK20 GENERICC Y/NC AF32
AJ24 GENERICD COMP/NC
GENERICE_HPD4

0.1U_0402_16V4Z

10U_0603_6.3V6M
AH26 DAC2
NC_GENERICF_HPD5 +3VSG

1U_0402_6.3V4Z
AH24 AD29 H2SYNC
B +1.8VSG EMI NC_GENERICG_HPD6 H2SYNC/GENLK_CLK
V2SYNC/GENLK_VSYNC
AC29 V2SYNC
1 1 1
B
1

1
10K_0402_5%
R38

10K_0402_5%
R39

10K_0402_5%
R40

10K_0402_5%
R41

C18

C19

C20
VGA_HDMI_DET AK24 10mil
11 VGA_HDMI_DET HPD1
CLK_GPIO10 100mAVDD2DI/NC AG31 +VDD1DI
AG32
@ @ @ @ VSS2DI/NC 2 2 2
0_0402_5%

R42 1 2 499_0402_1% 10mil

+1.8VSG
2

VRAM_ID0 Internal PD 130mAA2VDD/NC AG33

VRAM_ID1 R77 R43 1 2 249_0402_1% 15mil 10mil
VRAM_ID2 PD-Reset @ 2mAA2VDDQ/NC AD33
+1.8VSG
VRAM_ID3 1 2 +VGA_VREF AH13 1 1 1
VREFG

1U_0402_6.3V4Z
C22

0.1U_0402_16V4Z
C24

10U_0603_6.3V6M
C23
C21 0.1U_0402_16V4Z AF33
22P_0402_50V8J
2
1

A2VSSQ/TSVSSQ
10K_0402_5%
R44

10K_0402_5%
R45

10K_0402_5%
R46

10K_0402_5%
R47

1 R48
+1.8VSG L3 715_0402_1%
C130
10mil AA29 1 2 2 2 2
BLM18AG121SN1D_0603
@ @ @ @ 2 1 +DPLL_PVDD AM32 R2SET/NC
2 DPLL_PVDD
10U_0603_6.3V6M

0.1U_0402_16V4Z

1U_0402_6.3V4Z

@ AN32
1 1 1 DPLL_PVSS 75mA
2

C25

C26

C27

470ohm/1A DDC/AUX AM26 VGA_HDMI_SCLK

10mil AN31 PLL/CLOCK DDC1CLK AN26 VGA_HDMI_SDATA
VGA_HDMI_SCLK 11
2 2 2 DPLL_VDDC DDC1DATA VGA_HDMI_SDATA 11 HDMI
FLASH ROM 125mA AM27
U5 +1.0VSG L4 27MCLK AV33 AUX1P AL27
SIN_GPIO9 5 2 SOUT_GPIO8 BLM18AG121SN1D_0603 XTALOUT AU34 XTALIN AUX1N
D Q 2 1 +DPLL_VDDC XTALOUT AM19
DDC2CLK
10U_0603_6.3V6M

0.1U_0402_16V4Z

1U_0402_6.3V4Z

CLK_GPIO10 6 1 1 1 AL19
C DDC2DATA
C28

C29

C30

470ohm/1A 1 2 AW34
ROMSE_GPIO22 1 R49 @ 0_0402_5% XO_IN AN20
S TYPE 1 1 2 AW35 AUX2P AM20
7 2 2 2 R50 @ 0_0402_5% XO_IN2 AUX2N
+3VSG HOLD
R51 0_0402_5% AL30
2 @ 1 3 DDCCLK_AUX3P AM30
W DDCDATA_AUX3N
2 @ 1 8 4 AL29
R52 0_0402_5% 2 VCC VSS GPU_THERM_D+ AF29 NC_DDCCLK_AUX4P AM29
M25P10-AVMN6P GPU_THERM_D- AG29 DPLUS THERMAL NC_DDCDATA_AUX4N
C31 @ DMINUS AN21 VGA_CRT_CLK
DDCCLK_AUX5P AM21 VGA_CRT_CLK 10
@ 0.1U_0402_16V4Z R1795 1M_0603_5% VGA_CRT_DATA CRT
1 DDCDATA_AUX5N VGA_CRT_DATA 10
A AK32 A
0216 TS_FDO AJ30
AL31 DDC6CLK AJ31
+1.8VSG L5 TS_A/NC DDC6DATA
Y1 BLM18AG121SN1D_0603 10mil AK30
27MCLK 1 3 XTALOUT 2 1 +TSVDD AJ32 NC_DDCCLK_AUX7P AK29
IN OUT AJ33 TSVDD NC_DDCDATA_AUX7N
1 1 1 TSVSS 20mA
10U_0603_6.3V6M
C32

1U_0402_6.3V4Z
C33

0.1U_0402_16V4Z
C34

4 2 120ohm/0.3A
GND GND
27MHZ_16PF_X7S027000BG1H-U
2 2 2 2160809000A11SEYMOU_FCBGA962
C35
1 1 Security Classification Compal Secret Data Compal Electronics, Inc.
C36 2010/08/20 2012/06/30 Title
18P_0402_50V8 Issued Date Deciphered Date
18P_0402_50V8
2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P18-Vancouver_Strape/DP/HDMI//CRT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 18 of 47
5 4 3 2 1
 5 4 3 2 1

Robson,Seymour only support single channel

memory (channel B only)
D D

U2D
DDR2 DDR2
U2C GDDR3/GDDR5 GDDR5/GDDR3 MAB[0..12]
DDR2 DDR2 MDB[0..63] DDR3 DDR3 MAB[0..12] 22
GDDR3/GDDR5 GDDR5/GDDR3 22 MDB[0..63]
MDB0 C5 P8 MAB0
DDR3 DDR3 MDB1 C3 DQB0_0/DQB_0 MAB0_0/MAB_0 T9 MAB1
C37 G24 MDB2 E3 DQB0_1/DQB_1 MAB0_1/MAB_1 P9 MAB2
C35 NC_DQA0_0/DQA_0 NC_MAA0_0/MAA_0 J23 MDB3 E1 DQB0_2/DQB_2 MAB0_2/MAB_2 N7 MAB3
A35 NC_DQA0_1/DQA_1 NC_MAA0_1/MAA_1 H24 MDB4 F1 DQB0_3/DQB_3 MAB0_3/MAB_3 N8 MAB4
E34 NC_DQA0_2/DQA_2 NC_MAA0_2/MAA_2 J24 F3 DQB0_4/DQB_4 MAB0_4/MAB_4 N9

MEMORY INTERFACE B
MDB5 MAB5
G32 NC_DQA0_3/DQA_3 NC_MAA0_3/MAA_3 H26 F5 DQB0_5/DQB_5 MAB0_5/MAB_5 U9

MEMORY INTERFACE A
MDB6 MAB6
D33 NC_DQA0_4/DQA_4 NC_MAA0_4/MAA_4 J26 MDB7 G4 DQB0_6/DQB_6 MAB0_6/MAB_6 U8 MAB7
F32 NC_DQA0_5/DQA_5 NC_MAA0_5/MAA_5 H21 MDB8 H5 DQB0_7/DQB_7 MAB0_7/MAB_7 Y9 MAB8
E32 NC_DQA0_6/DQA_6 NC_MAA0_6/MAA_6 G21 MDB9 H6 DQB0_8/DQB_8 MAB1_0/MAB_8 W9 MAB9
D31 NC_DQA0_7/DQA_7 NC_MAA0_7/MAA_7 H19 MDB10 J4 DQB0_9/DQB_9 MAB1_1/MAB_9 AC8 MAB10
F30 NC_DQA0_8/DQA_8 NC_MAA1_0/MAA_8 H20 MDB11 K6 DQB0_10/DQB_10 MAB1_2/MAB_10 AC9 MAB11
C30 NC_DQA0_9/DQA_9 NC_MAA1_1/MAA_9 L13 MDB12 K5 DQB0_11/DQB_11 MAB1_3/MAB_11 AA7 MAB12 B_BA[0..2]
NC_DQA0_10/DQA_10 NC_MAA1_2/MAA_10 DQB0_12/DQB_12 MAB1_4/MAB_12 B_BA[0..2] 22
A30 G16 MDB13 L4 AA8 B_BA2
F28 NC_DQA0_11/DQA_11 NC_MAA1_3/MAA_11 J16 MDB14 M6 DQB0_13/DQB_13 MAB1_5/BA2 Y8 B_BA0
C28 NC_DQA0_12/DQA_12 NC_MAA1_4/MAA_12 H16 MDB15 M1 DQB0_14/DQB_14 MAB1_6/BA0 AA9 B_BA1
A28 NC_DQA0_13/DQA_13 NC_MAA1_5/MAA_13_BA2 J17 MDB16 M3 DQB0_15/DQB_15 MAB1_7/BA1 DQMB#[0..7]
NC_DQA0_14/DQA_14 NC_MAA1_6/MAA_14_BA0 DQB0_16/DQB_16 DQMB#[0..7] 22
E28 H17 MDB17 M5 H3 DQMB#0
+1.5VSG D27 NC_DQA0_15/DQA_15 NC_MAA1_7/MAA_A15_BA1 MDB18 N4 DQB0_17/DQB_17 WCKB0_0/DQMB_0 H1 DQMB#1
F26 NC_DQA0_16/DQA_16 A32 MDB19 P6 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 T3 DQMB#2
C26 NC_DQA0_17/DQA_17 NC_WCKA0_0/DQMA_0 C32 MDB20 P5 DQB0_19/DQB_19 WCKB0_1/DQMB_2 T5 DQMB#3
A26 NC_DQA0_18/DQA_18 NC_WCKA0B_0/DQMA_1 D23 MDB21 R4 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 AE4 DQMB#4
NC_DQA0_19/DQA_19 NC_WCKA0_1/DQMA_2 DQB0_21/DQB_21 WCKB1_0/DQMB_4
1

F24 E22 MDB22 T6 AF5 DQMB#5

R54 C24 NC_DQA0_20/DQA_20 NC_WCKA0B_1/DQMA_3 C14 MDB23 T1 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 AK6 DQMB#6
A24 NC_DQA0_21/DQA_21 NC_WCKA1_0/DQMA_4 A14 +1.5VSG MDB24 U4 DQB0_23/DQB_23 WCKB1_1/DQMB_6 AK5 DQMB#7
40.2_0402_1% E24 NC_DQA0_22/DQA_22 NC_WCKA1B_0/DQMA_5 E10 MDB25 V6 DQB0_24/DQB_24 WCKB1B_1/DQMB_7 QSB[0..7]
C NC_DQA0_23/DQA_23 NC_WCKA1_1/DQMA_6 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 QSB[0..7] 22 C
C22 D9 MDB26 V1 F6 QSB0
2

MVREFDA A22 NC_DQA0_24/DQA_24 NC_WCKA1B_1/DQMA_7 MDB27 V3 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 K3 QSB1

NC_DQA0_25/DQA_25 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1

1
F22 GDDR5/DDR2/GDDR3 C34 MDB28 Y6 P3 QSB2
NC_DQA0_26/DQA_26 NC_EDCA0_0/QSA_0/RDQSA_0 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2
1

1 D21 D29 R56 MDB29 Y1 V5 QSB3

NC_DQA0_27/DQA_27 NC_EDCA0_1/QSA_1/RDQSA_1 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3
0.1U_0402_16V4Z

R55 C37 A20 D25 MDB30 Y3 AB5 QSB4

F20 NC_DQA0_28/DQA_28 NC_EDCA0_2/QSA_2/RDQSA_2 E20 40.2_0402_1% MDB31 Y5 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 AH1 QSB5
100_0402_1% D19 NC_DQA0_29/DQA_29 NC_EDCA0_3/QSA_3/RDQSA_3 E16 MDB32 AA4 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 AJ9 QSB6

2
2 E18 NC_DQA0_30/DQA_30 NC_EDCA1_0/QSA_4/RDQSA_4 E12 MVREFDB MDB33 AB6 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 AM5 QSB7
2

C18 NC_DQA0_31/DQA_31 NC_EDCA1_1/QSA_5/RDQSA_5 J10 MDB34 AB1 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 QSB#[0..7]

NC_DQA1_0/DQA_32 NC_EDCA1_2/QSA_6/RDQSA_6 DQB1_2/DQB_34 QSB#[0..7] 22

0.1U_0402_16V4Z
A18 D7 MDB35 AB3 G7 QSB#0
F18 NC_DQA1_1/DQA_33 NC_EDCA1_3/QSA_7/RDQSA_7 R57 MDB36 AD6 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 K1 QSB#1
NC_DQA1_2/DQA_34 1 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1
D17 A34 C38 MDB37 AD1 P1 QSB#2
A16 NC_DQA1_3/DQA_35 NC_DDBIA0_0/QSA_0B/WDQSA_0 E30 100_0402_1% MDB38 AD3 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 W4 QSB#3
+1.5VSG F16 NC_DQA1_4/DQA_36 NC_DDBIA0_1/QSA_1B/WDQSA_1 E26 MDB39 AD5 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 AC4 QSB#4

2
D15 NC_DQA1_5/DQA_37 NC_DDBIA0_2/QSA_2B/WDQSA_2 C20 2 MDB40 AF1 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4 AH3 QSB#5
E14 NC_DQA1_6/DQA_38 NC_DDBIA0_3/QSA_3B/WDQSA_3 C16 MDB41 AF3 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 AJ8 QSB#6
F14 NC_DQA1_7/DQA_39 NC_DDBIA1_0/QSA_4B/WDQSA_4 C12 MDB42 AF6 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 AM3 QSB#7
NC_DQA1_8/DQA_40 NC_DDBIA1_1/QSA_5B/WDQSA_5 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
1

D13 J11 MDB43 AG4

R58 F12 NC_DQA1_9/DQA_41 NC_DDBIA1_2/QSA_6B/WDQSA_6 F8 MDB44 AH5 DQB1_11/DQB_43 T7 ODTB0
NC_DQA1_10/DQA_42 NC_DDBIA1_3/QSA_7B/WDQSA_7 +1.5VSG DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB0 22
A12 MDB45 AH6 W7 ODTB1
NC_DQA1_11/DQA_43 DQB1_13/DQB_45 ADBIB1/ODTB1 ODTB1 22
40.2_0402_1% D11 J21 MDB46 AJ4
F10 NC_DQA1_12/DQA_44 NC_ADBIA0/ODTA0 G19 MDB47 AK3 DQB1_14/DQB_46 L9 CLKB0
CLKB0 22
2

MVREFSA A10 NC_DQA1_13/DQA_45 NC_ADBIA1/ODTA1 MDB48 AF8 DQB1_15/DQB_47 CLKB0 L8 CLKB0#

NC_DQA1_14/DQA_46 DQB1_16/DQB_48 CLKB0B CLKB0# 22

1
C10 H27 MDB49 AF9
NC_DQA1_15/DQA_47 NC_CLKA0 DQB1_17/DQB_49
1

1 G13 G27 R60 MDB50 AG8 AD8 CLKB1

NC_DQA1_16/DQA_48 NC_CLKA0B DQB1_18/DQB_50 CLKB1 CLKB1 22
0.1U_0402_16V4Z
C39

R59 H13 MDB51 AG7 AD7 CLKB1#

NC_DQA1_17/DQA_49 DQB1_19/DQB_51 CLKB1B CLKB1# 22
J13 J14 40.2_0402_1% MDB52 AK9
100_0402_1% H11 NC_DQA1_18/DQA_50 NC_CLKA1 H14 MDB53 AL7 DQB1_20/DQB_52 T10 RASB0#
RASB0# 22

2
2 G10 NC_DQA1_19/DQA_51 NC_CLKA1B MVREFSB MDB54 AM8 DQB1_21/DQB_53 RASB0B Y10 RASB1#
RASB1# 22
2

G8 NC_DQA1_20/DQA_52 K23 MDB55 AM7 DQB1_22/DQB_54 RASB1B

NC_DQA1_21/DQA_53 NC_RASA0B DQB1_23/DQB_55

1
K9 K19 1 MDB56 AK1 W10 CASB0#
NC_DQA1_22/DQA_54 NC_RASA1B DQB1_24/DQB_56 CASB0B CASB0# 22

0.1U_0402_16V4Z
K10 R61 C40 MDB57 AL4 AA10 CASB1#
B NC_DQA1_23/DQA_55 DQB1_25/DQB_57 CASB1B CASB1# 22 B
G9 K20 MDB58 AM6
A8 NC_DQA1_24/DQA_56 NC_CASA0B K17 100_0402_1% MDB59 AM1 DQB1_26/DQB_58 P10 CSB0#_0
NC_DQA1_25/DQA_57 NC_CASA1B 2 DQB1_27/DQB_59 CSB0B_0 CSB0#_0 22
C8 MDB60 AN4 L10

2
E8 NC_DQA1_26/DQA_58 K24 MDB61 AP3 DQB1_28/DQB_60 CSB0B_1
A6 NC_DQA1_27/DQA_59 NC_CSA0B_0 K27 MDB62 AP1 DQB1_29/DQB_61 AD10 CSB1#_0
NC_DQA1_28/DQA_60 NC_CSA0B_1 DQB1_30/DQB_62 CSB1B_0 CSB1#_0 22
C6 MDB63 AP5 AC10
E6 NC_DQA1_29/DQA_61 M13 DQB1_31/DQB_63 CSB1B_1
A5 NC_DQA1_30/DQA_62 NC_CSA1B_0 K16 U10 CKEB0
NC_DQA1_31/DQA_63 NC_CSA1B_1 CKEB0 CKEB0 22
MVREFDB Y12 AA11 CKEB1
MVREFDB CKEB1 CKEB1 22
MVREFDA L18 K21 MVREFSB AA12
+1.5VSG MVREFSA L20 NC_MVREFDA NC_CKEA0 J20 MVREFSB N10 WEB0#
NC_MVREFSA NC_CKEA1 WEB0B WEB0# 22
AB11 WEB1#
WEB1B WEB1# 22
R62 2 1 243_0402_1% L27 K26
R63 2 1 243_0402_1% N12 NC_MEM_CALRN0 NC_WEA0B L15
R64 2 1 243_0402_1% AG12 MEM_CALRN1 NC_WEA1B 2 1 TESTEN AD28 T8
NC_MEM_CALRN2 TESTEN MAB0_8 MAB13 22 MAB13 is for 128M*16 VRAM
R65 5.11K_0402_1% W8
R66 2 1 243_0402_1% M12 H23 TEST_MCLK AK10 MAB1_8 R68 R70

GDDR5
R67 2 1 243_0402_1% M27 MEM_CALRP1 NC_MAA0_8 J19 TEST_YCLK AL10 CLKTESTA AH11 1 2 1 2
NC_MEM_CALRP0 NC_MAA1_8 CLKTESTB DRAM_RST VRAM_RST# 22
R69 2 1 243_0402_1% AH12
NC_MEM_CALRP2
GDDR5

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5.11K_0402_1%
R71

120P_0402_50V8
10_0402_5% 51.1_0402_1%

C43
@ 2 @ 2 1

C41

C42
1 1 2
2160809000A11SEYMOU_FCBGA962

2
1

1
2160809000A11SEYMOU_FCBGA962
@ @

R72 R73
2

51.1_0402_1% 2 51.1_0402_1%
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P19-Vancouver_Memory
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 19 of 47
5 4 3 2 1
 5 4 3 2 1

U2E

MEM I/O
PCIE FBMA-L11-201209-221LMA30T_0805
2800mA AC7 AA31
504mA +PCIE_VDDR 2 1
+1.5VSG VDDR1#1 PCIE_VDDR#1 +1.8VSG
1 AD11 AA32 L34
VDDR1#2 PCIE_VDDR#2

1U_0402_6.3V4Z
C323

1U_0402_6.3V4Z
C338

1U_0402_6.3V4Z
C339

1U_0402_6.3V4Z
C324

1U_0402_6.3V4Z
C340

1U_0402_6.3V4Z
C325

1U_0402_6.3V4Z
C341

1U_0402_6.3V4Z
C342

0.1U_0402_16V4Z
C326

0.1U_0402_16V4Z
C343

1U_0402_6.3V4Z
C327

1U_0402_6.3V4Z
C328

1U_0402_6.3V4Z
C344

1U_0402_6.3V4Z
C345

1U_0402_6.3V4Z
C346

10U_0603_6.3V6M
C347
1 1 1 1 1 1 1 1 AF7 AA33 1 1 1 1 1 1 1 1 220ohm/2A
C322 + AG10 VDDR1#3 PCIE_VDDR#3 AA34
AJ7 VDDR1#4 PCIE_VDDR#4 V28
390U_2.5V_10M AK8 VDDR1#5 PCIE_VDDR#5 W29
2 2 2 2 2 2 2 2 2 AL9 VDDR1#6 PCIE_VDDR#6 W30 2 2 2 2 2 2 2 2
D G11 VDDR1#7 PCIE_VDDR#7 Y31 D
G14 VDDR1#8 PCIE_VDDR#8 AB37
G17 VDDR1#9 PCIE_VDDR/PCIE_PVDD
G20 VDDR1#10 G30
2A
390U ESR:10m H:5.7 VDDR1#11 PCIE_VDDC#1 +1.0VSG

1U_0402_6.3V4Z
C348

1U_0402_6.3V4Z
C349

1U_0402_6.3V4Z
C329

1U_0402_6.3V4Z
C330

1U_0402_6.3V4Z
C331

1U_0402_6.3V4Z
C350

1U_0402_6.3V4Z
C351

1U_0402_6.3V4Z
C352
1 1 1 1 1 1 1 1 G23 G31 1
P/N:SF000002O00 VDDR1#12 PCIE_VDDC#2

1U_0402_6.3V4Z
C353

1U_0402_6.3V4Z
C332

1U_0402_6.3V4Z
C354

1U_0402_6.3V4Z
C333

1U_0402_6.3V4Z
C334

1U_0402_6.3V4Z
C355

1U_0402_6.3V4Z
C356

10U_0603_6.3V6M
C357
G26 H29 1 1 1 1 1 1 1 1
G29 VDDR1#13 PCIE_VDDC#3 H30 C686 +
H10 VDDR1#14 PCIE_VDDC#4 J29
2 2 2 2 2 2 2 2 J7 VDDR1#15 PCIE_VDDC#5 J30 390U_2.5V_10M
J9 VDDR1#16 PCIE_VDDC#6 L28 2 2 2 2 2 2 2 2 2
K11 VDDR1#17 PCIE_VDDC#7 M28
K13 VDDR1#18 PCIE_VDDC#8 N28
K8 VDDR1#19 PCIE_VDDC#9 R28
VDDR1#20 PCIE_VDDC#10

10U_0603_6.3V6M
C358

10U_0603_6.3V6M
C336

10U_0603_6.3V6M
C359

10U_0603_6.3V6M
C360

1U_0402_6.3V4Z
C361

1U_0402_6.3V4Z
C337

1U_0402_6.3V4Z
C362

1U_0402_6.3V4Z
C363
1 1 1 1 1 1 1 1 L12 T28
L16 VDDR1#21 PCIE_VDDC#11 U28
L21 VDDR1#22 PCIE_VDDC#12

2 2 2 2 2 2 2 2
L23
L26
VDDR1#23
VDDR1#24 AA15
FOR XT DDR3 13 A (RMS)/14.2 A(Peak)
VDDR1#25 VDDC#1 +VGA_CORE

1U_0402_6.3V4Z
C364

1U_0402_6.3V4Z
C365

1U_0402_6.3V4Z
C366

1U_0402_6.3V4Z
C367

1U_0402_6.3V4Z
C368

1U_0402_6.3V4Z
C369

1U_0402_6.3V4Z
C370

1U_0402_6.3V4Z
C371

1U_0402_6.3V4Z
C372

1U_0402_6.3V4Z
C373
L7 CORE AA17 1 1 1 1 1 1 1 1 1 1
M11 VDDR1#26 VDDC#2 AA20
N11 VDDR1#27 VDDC#3 AA22
P7 VDDR1#28 VDDC#4 AA24
R11 VDDR1#29 VDDC#5 AA27 2 2 2 2 2 2 2 2 2 2
U11 VDDR1#30 VDDC#6 AB16
U7 VDDR1#31 VDDC#7 AB18
Y11 VDDR1#32 VDDC#8 AB21
Y7 VDDR1#33 VDDC#9 AB23
VDDR1#34 VDDC#10

1U_0402_6.3V4Z
C374

1U_0402_6.3V4Z
C375

1U_0402_6.3V4Z
C376

1U_0402_6.3V4Z
C377

1U_0402_6.3V4Z
C378

1U_0402_6.3V4Z
C379

1U_0402_6.3V4Z
C380

1U_0402_6.3V4Z
C381

1U_0402_6.3V4Z
C382

1U_0402_6.3V4Z
C383
AB26 1 1 1 1 1 1 1 1 1 1
VDDC#11 AB28
2 1 +VDD_CT VDDC#12 AC17
+1.8VSG VDDC#13
L35 1 1 1 AC20
10U_0603_6.3V6M VDDC#14 2 2 2 2 2 2 2 2 2 2
C384

1U_0402_6.3V4Z
C385

0.1U_0402_16V4Z
C386
BLM18AG121SN1D_0603 LEVEL AC22
C TRANSLATION VDDC#15 AC24 C
120ohm/0.3A 219mAAF26 VDDC#16

POWER
AC27
2 2 2 AF27 VDD_CT#1 VDDC#17 AD18
VDD_CT#2 VDDC#18

10U_0603_6.3V6M
C387

10U_0603_6.3V6M
C388

10U_0603_6.3V6M
C389

10U_0603_6.3V6M
C390

10U_0603_6.3V6M
C391

10U_0603_6.3V6M
C392

10U_0603_6.3V6M
C393
AG26 AD21 1 1 1 1 1 1 1 1 1 1 1
AG27 VDD_CT#3 VDDC#19 AD23
VDD_CT#4 VDDC#20 AD26 + C394 + C395 + C396 + C447
VDDC#21 AF17 @
I/O VDDC#22 AF20 2 2 2 2 2 2 2 390U_2.5V_10M 330U_D2_2V_Y330U_D2_2V_Y 330U_D2_2V_Y
60mA AF23 VDDC#23 AF22 2 2 2 2
+3VSG VDDR3#1 VDDC#24
1 1 1 AF24 AG16
VDDR3#2 VDDC#25
10U_0603_6.3V6M
C397

1U_0402_6.3V4Z
C398

0.1U_0402_16V4Z
C399

Removed bead on ref137-12 AG23 AG18

AG24 VDDR3#3 VDDC#26 AG21
VDDR3#4 VDDC#27 AH22
2 2 2 VDDC#28 330U ESR:10m H:5.7
AH27
AF13 VDDC#29 AH28 P/N:SF000002O00
AF15 VDDR4#4 VDDC#30 M26
AG13 VDDR4#5 VDDC#31 N24
AG15 VDDR4#7 VDDC#32 N27
L36
170mA VDDR4#8 VDDC/BIF_VDDC#33 R18
2 1 +VDDR4 VDDC#34 R21
+1.8VSG VDDC#35
AD12 R23
VDDR4#1 VDDC#36
10U_0603_6.3V6M
C400

1U_0402_6.3V4Z
C401

0.1U_0402_16V4Z
C402

BLM18AG601SN1D_2P 1 1 1 AF11 R26

AF12 VDDR4#2 VDDC#37 T17
120ohm/0.3A AG11 VDDR4#3 VDDC#38 T20
VDDR4#6 VDDC#39 T22
2 2 2 VDDC#40 T24
VDDC#41 T27
VDDC/BIF_VDDC#42 U16
M20 VDDC#43 U18
M21 NC_VDDRHA VDDC#44 U21
NC_VSSRHA VDDC#45 U23
BLM18AG121SN1D_0603 VDDC#46 U26
B 2 1 V12 VDDC#47 V17 B
+1.8VSG NC_VDDRHB VDDC#48
L37 U12 V20
NC_VSSRHB VDDC#49 V22
470ohm/1A 1 1 1 1 1 VDDC#50
10U_0603_6.3V6M
C403

1U_0402_6.3V4Z
C404

0.1U_0402_16V4Z
C405

1U_0402_6.3V4Z
C406

0.1U_0402_16V4Z
C407

V24
VDDC#51 V27
VDDC#52 Y16
2 2 2 2 2 PLL VDDC#53 Y18
VDDC#54 Y21
VDDC#55 Y23
H7 VDDC#56 Y26
+MPV_18
75mA H8 MPV18#1 VDDC#57 Y28
MPV18#2 VDDC#58
BLM18AG121SN1D_0603 75mA 4A
+1.8VSG 2 1 +SPV_18 AM10 L39 J7
L38 SPV18 AA13 +VDDCI 2 1 2 1
120mA VDDCI#1 2 1 +VGA_CORE

0.1U_0402_16V4Z
120ohm/0.3A 1 1 1 +1.0VSG 2 1 +SPV10 AN9 AB13 FBMA-L11-201209-121LMA50T_0805
SPV10 VDDCI#2
10U_0603_6.3V6M
C409

1U_0402_6.3V4Z
C410

0.1U_0402_16V4Z
C411

1U_0402_6.3V4Z

1U_0402_6.3V4Z
C416

1U_0402_6.3V4Z
C417

1U_0402_6.3V4Z
C418

1U_0402_6.3V4Z
C419

1U_0402_6.3V4Z
C420
L40 AC12 1 1 1 1 1 1 1 @ JUMP_43X118
VDDCI#3
10U_0603_6.3V6M
C408

1U_0402_6.3V4Z
C412

0.1U_0402_16V4Z
C413

C414

C415
BLM18AG121SN1D_0603 1 1 1 AN10 AC15 L41
SPVSS VDDCI#4 AD13 2 1
2 2 2 470ohm/1A VDDCI#5 AD16 FBMA-L11-201209-121LMA50T_0805
VDDCI#6 M15 2 2 2 2 2 2 2
2 2 2 VDDCI#7 M16
VOLTAGE VDDCI#8 M18
SENESE VDDCI#9 M23
VDDCI#10 N13
GCORE_SEN AF28 VDDCI#11 N15
44 GCORE_SEN FB_VDDC VDDCI#12 N17
VDDCI#13 N20
VDDCI#14
1U_0402_6.3V4Z
C422

1U_0402_6.3V4Z
C423

1U_0402_6.3V4Z
C424

1U_0402_6.3V4Z
C425

1U_0402_6.3V4Z
C426

10U_0603_6.3V6M
C421

10U_0603_6.3V6M
C427

10U_0603_6.3V6M
C428
AG28 N22 1 1 1 1 1 1 1 1
FB_VDDCI ISOLATED VDDCI#15 R12
CORE I/O VDDCI#16 R13
1 2 FB_GND AH29 VDDCI#17 R16
A R375 0_0402_5% FB_GND VDDCI#18 T12 2 2 2 2 2 2 2 2 A
VDDCI#19 T15
VDDCI#20 V15
VDDCI#21 Y13
VDDCI#22

2160809000A11SEYMOU_FCBGA962
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P20-Vancouver_Power/GND
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 20 of 47
5 4 3 2 1
 5 4 3 2 1

U2F

AB39 A3
E39 PCIE_VSS#1 GND#1 A37
F34 PCIE_VSS#2 GND#2 AA16
F39 PCIE_VSS#3 GND#3 AA18
G33 PCIE_VSS#4 GND#4 AA2
G34 PCIE_VSS#5 GND#5 AA21
H31 PCIE_VSS#6 GND#6 AA23
H34 PCIE_VSS#7 GND#7 AA26
H39 PCIE_VSS#8 GND#8 AA28 U2H
J31 PCIE_VSS#9 GND#9 AA6
D J34 PCIE_VSS#10 GND#10 AB12 DP C/D POWER DP A/B POWER D
K31 PCIE_VSS#11 GND#11 AB15 L42 L63
K34 PCIE_VSS#12 GND#12 AB17 BLM18AG121SN1D_0603 AP20 AN24 BLM18AG121SN1D_0603
K39 PCIE_VSS#13 GND#13 AB20 2 1
150mA +DPCD_VDD18 AP21 DPCD/DPC_VDD18#1 DPAB/DPA_VDD18#1 AP24 +DPAB_VDD18
300mA 2 1
PCIE_VSS#14 GND#14 +1.8VSG DPCD/DPC_VDD18#2 DPAB/DPA_VDD18#2 +1.8VSG
L31 AB22 470ohm/1A 470ohm/1A
L34 PCIE_VSS#15 GND#15 AB24
PCIE_VSS#16 GND#16 1 1 1 1 1 1

10U_0603_6.3V6M
C429

0.1U_0402_16V4Z
C430

1U_0402_6.3V4Z
C431

10U_0603_6.3V6M
C432

0.1U_0402_16V4Z
C433

1U_0402_6.3V4Z
C434
M34 AB27
M39 PCIE_VSS#17 GND#17 AC11 AP13 AP31
N31 PCIE_VSS#18 GND#18 AC13 +DPCD_VDD10 AT13 DPCD/DPC_VDD10#1 DPAB/DPA_VDD10#1 AP32 +DPAB_VDD10
N34 PCIE_VSS#19 GND#19 AC16 2 2 2 DPCD/DPC_VDD10#2 DPAB/DPA_VDD10#2 2 2 2
P31 PCIE_VSS#20 GND#20 AC18
P34 PCIE_VSS#21 GND#21 AC2 AN17 AN27
P39 PCIE_VSS#22 GND#22 AC21 AP16 DP/DPC_VSSR#1 DP/DPA_VSSR#1 AP27
R34 PCIE_VSS#23 GND#23 AC23 AP17 DP/DPC_VSSR#2 DP/DPA_VSSR#2 AP28
T31 PCIE_VSS#24 GND#24 AC26 AW14 DP/DPC_VSSR#3 DP/DPA_VSSR#3 AW24
T34 PCIE_VSS#25 GND#25 AC28 AW16 DP/DPC_VSSR#4 DP/DPA_VSSR#4 AW26
T39 PCIE_VSS#26 GND#26 AC6 DP/DPC_VSSR#5 DP/DPA_VSSR#5
U31 PCIE_VSS#27 GND#27 AD15
U34 PCIE_VSS#28 GND#28 AD17
V34 PCIE_VSS#29 GND#29 AD20 AP22 AP25
V39 PCIE_VSS#30 GND#30 AD22 +DPCD_VDD18 AP23 DPCD/DPD_VDD18#1 DPAB/DPB_VDD18#1 AP26 +DPAB_VDD18
W31 PCIE_VSS#31 GND#31 AD24 DPCD/DPD_VDD18#2 DPAB/DPB_VDD18#2
W34 PCIE_VSS#32 GND#32 AD27 L64 L66
Y34 PCIE_VSS#33 GND#33 AD9 BLM18AG121SN1D_0603 BLM18AG121SN1D_0603
Y39 PCIE_VSS#34 GND#34 AE2 2 1
110mA +DPCD_VDD10 AP14 AN33 +DPAB_VDD10
220mA 2 1
PCIE_VSS#35 GND#35 +1.0VSG DPCD/DPD_VDD10#1 DPAB/DPB_VDD10#1 +1.0VSG
AE6 470ohm/1A AP15 AP33 470ohm/1A
GND#36 DPCD/DPD_VDD10#2 DPAB/DPB_VDD10#2

0.1U_0402_16V4Z
C438

1U_0402_6.3V4Z
C439

10U_0603_6.3V6M
C440
AF10 1 1 1
GND#37

10U_0603_6.3V6M
C435

0.1U_0402_16V4Z
C436

1U_0402_6.3V4Z
C437
AF16 1 1 1
GND#38 AF18
GND#39 AF21 AN19 AN29

F15
GND#100
GND GND#40
GND#41
GND#42
AG17
AG2
2 2 2 AP18
AP19
DP/DPD_VSSR#1
DP/DPD_VSSR#2
DP/DPD_VSSR#3
DP/DPB_VSSR#1
DP/DPB_VSSR#2
DP/DPB_VSSR#3
AP29
AP30 2 2 2
C F17 AG20 AW20 AW30 C
F19 GND#101 GND#43 AG22 AW22 DP/DPD_VSSR#4 DP/DPB_VSSR#4 AW32
F21 GND#102 GND#44 AG6 DP/DPD_VSSR#5 DP/DPB_VSSR#5
F23 GND#103 GND#45 AG9 R376 R377
F25 GND#104 GND#46 AH21 150_0402_1% 150_0402_1%
F27 GND#105 GND#47 AJ10 2 1 AW18 AW28 1 2
F29 GND#106 GND#48 AJ11 DPCD_CALR DPAB_CALR
F31 GND#107 GND#49 AJ2 L67
F33 GND#108 GND#50 AJ28 BLM18AG121SN1D_0603
F7 GND#109 GND#51 AJ6 2 1
440mA +DPEF_VDD18 AH34
DP E/F POWER DP PLL POWER
AU28 +DPAB_VDD18
GND#110 GND#52 +1.8VSG DPEF/DPE_VDD18#1 DPAB_VDD18/DPA_PVDD
F9 AK11 470ohm/1A AJ34 AV27
G2 GND#111 GND#53 AK31 DPEF/DPE_VDD18#2 DP_VSSR/DPA_PVSS
GND#112 GND#54 1 1 1

10U_0603_6.3V6M
C441

0.1U_0402_16V4Z
C442

1U_0402_6.3V4Z
C443
G6 AK7
H9 GND#113 GND#55 AL11
J2 GND#114 GND#56 AL14 +DPEF_VDD10 AL33 AV29 +DPAB_VDD18
J27 GND#115 GND#57 AL17 2 2 2 AM33 DPEF/DPE_VDD10#1 DPAB_VDD18/DPB_PVDD AR28
J6 GND#116 GND#58 AL2 DPEF/DPE_VDD10#2 DP_VSSR/DPB_PVSS
J8 GND#117 GND#59 AL20
K14 GND#118 GND#60 AL21
K7 GND#119 GND/PX_EN#61 AL23 AN34 AU18 +DPCD_VDD18
L11 GND#120 GND#62 AL26 AP39 DP/DPE_VSSR#1 DPCD_VDD18/DPC_PVDD AV17
L17 GND#121 GND#63 AL32 AR39 DP/DPE_VSSR#2 DP_VSSR/DPC_PVSS
L2 GND#122 GND#64 AL6 AU37 DP/DPE_VSSR#3
L22 GND#123 GND#65 AL8 DP/DPE_VSSR#4
L24 GND#124 GND#66 AM11 AV19 +DPCD_VDD18
L6 GND#125 GND#67 AM31 DPCD_VDD18/DPD_PVDD AR18
M17 GND#126 GND#68 AM9 DP_VSSR/DPD_PVSS
M22 GND#127 GND#69 AN11 AF34
M24 GND#128 GND#70 AN2 +DPEF_VDD18 AG34 DPEF/DPF_VDD18#1
N16 GND#129 GND#71 AN30 DPEF/DPF_VDD18#2 AM37 +DPEF_VDD18
N18 GND#130 GND#72 AN6 L80 DPEF_VDD18/DPE_PVDD AN38
N2 GND#131 GND#73 AN8 BLM18AG121SN1D_0603 DP_VSSR/DPE_PVSS
B N21 GND#132 GND#74 AP11 2 1
240mA +DPEF_VDD10 AK33 B
GND#133 GND#75 +1.0VSG DPEF/DPF_VDD10#1
N23 AP7 470ohm/1A AK34
N26 GND#134 GND#76 AP9 DPEF/DPF_VDD10#2 AL38 +DPEF_VDD18
GND#135 GND#77 1 1 1 DPEF_VDD18/DPF_PVDD
10U_0603_6.3V6M
C444

0.1U_0402_16V4Z
C445

1U_0402_6.3V4Z
C446

N6 AR5 AM35
R15 GND#136 GND#78 B11 DP_VSSR/DPF_PVSS
R17 GND#137 GND#79 B13 AF39
R2 GND#138 GND#80 B15 2 2 2 AH39 DP/DPF_VSSR#1
R20 GND#139 GND#81 B17 AK39 DP/DPF_VSSR#2
R22 GND#140 GND#82 B19 AL34 DP/DPF_VSSR#3
R24 GND#141 GND#83 B21 AM34 DP/DPF_VSSR#4
R27 GND#142 GND#84 B23 DP/DPF_VSSR#5
R6 GND#143 GND#85 B25
T11 GND#144 GND#86 B27 R379
T13 GND#145 GND#87 B29 2 1 AM39
T16 GND#146 GND#88 B31 DPEF_CALR
T18 GND#147 GND#89 B33 150_0402_1%
T21 GND#148 GND#90 B7
T23 GND#149 GND#91 B9 2160809000A11SEYMOU_FCBGA962
T26 GND#150 GND#92 C1
U15 GND#151 GND#93 C39
U17 GND#153 GND#94 E35
U2 GND#154 GND#95 E5
U20 GND#155 GND#96 F11
U22 GND#156 GND#97 F13
U24 GND#157 GND#98
U27 GND#158
U6 GND#159
V11 GND#160
V16 GND#161
V18 GND#163
V21 GND#164
V23 GND#165
A V26 GND#166 A
W2 GND#167
W6 GND#168
Y15 GND#169
Y17 GND#170
Y20 GND#171
Y22 GND#172 A39
Y24 GND#173 VSS_MECH#1 AW1
Y27 GND#174
GND#175
VSS_MECH#2
VSS_MECH#3
AW39 Security Classification Compal Secret Data Compal Electronics, Inc.
U13 2010/08/20 2012/06/30 Title
1 2 V13 GND#152 Issued Date Deciphered Date
@
R455 0_0603_5% GND#162
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P21-Vancouver_Power/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
2160809000A11SEYMOU_FCBGA962 Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 21 of 47
5 4 3 2 1
 5 4 3 2 1

ZZZ2 X76L01@ ZZZ3 X76L02@ U6 U7 U8 U9

VREFCB_A1 M8 E3 MDB26 VREFCB_A2 M8 E3 MDB22 VREFCB_A3 M8 E3 MDB35 VREFCB_A4 M8 E3 MDB55

VREFDB_Q1 H1 VREFCA DQL0 F7 MDB28 VREFDB_Q2 H1 VREFCA DQL0 F7 MDB20 VREFDB_Q3 H1 VREFCA DQL0 F7 MDB37 VREFDB_Q4 H1 VREFCA DQL0 F7 MDB49
VREFDQ DQL1 F2 MDB27 VREFDQ DQL1 F2 MDB21 VREFDQ DQL1 F2 MDB34 VREFDQ DQL1 F2 MDB52
MAB0 N3 DQL2 F8 MDB31 MAB0 N3 DQL2 F8 MDB18 MAB0 N3 DQL2 F8 MDB39 MAB0 N3 DQL2 F8 MDB50
MAB1 P7 A0 DQL3 H3 MDB25 MAB1 P7 A0 DQL3 H3 MDB19 MAB1 P7 A0 DQL3 H3 MDB33 MAB1 P7 A0 DQL3 H3 MDB53
1G SAM A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
1G HYNIX MAB2 P3 H8 MDB30 MAB2 P3 H8 MDB17 MAB2 P3 H8 MDB38 MAB2 P3 H8 MDB48
MAB3 N2 A2 DQL5 G2 MDB24 MAB3 N2 A2 DQL5 G2 MDB23 MAB3 N2 A2 DQL5 G2 MDB32 MAB3 N2 A2 DQL5 G2 MDB54
MAB4 P8 A3 DQL6 H7 MDB29 MAB4 P8 A3 DQL6 H7 MDB16 MAB4 P8 A3 DQL6 H7 MDB36 MAB4 P8 A3 DQL6 H7 MDB51
ZZZ4 X76L03@ ZZZ5 X76L04@ MAB5 P2 A4 DQL7 MAB5 P2 A4 DQL7 MAB5 P2 A4 DQL7 MAB5 P2 A4 DQL7
MAB6 R8 A5 MAB6 R8 A5 MAB6 R8 A5 MAB6 R8 A5
MAB7 R2 A6 D7 MDB15 MAB7 R2 A6 D7 MDB1 MAB7 R2 A6 D7 MDB44 MAB7 R2 A6 D7 MDB56
MAB8 T8 A7 DQU0 C3 MDB10 MAB8 T8 A7 DQU0 C3 MDB6 MAB8 T8 A7 DQU0 C3 MDB43 MAB8 T8 A7 DQU0 C3 MDB59
MAB9 R3 A8 DQU1 C8 MDB12 MAB9 R3 A8 DQU1 C8 MDB0 MAB9 R3 A8 DQU1 C8 MDB47 MAB9 R3 A8 DQU1 C8 MDB63
D MAB10 L7 A9 DQU2 C2 MDB11 MAB10 L7 A9 DQU2 C2 MDB4 MAB10 L7 A9 DQU2 C2 MDB41 MAB10 L7 A9 DQU2 C2 MDB62 D
MAB11 R7 A10/AP DQU3 A7 MDB13 MAB11 R7 A10/AP DQU3 A7 MDB3 MAB11 R7 A10/AP DQU3 A7 MDB45 MAB11 R7 A10/AP DQU3 A7 MDB57
512M SAM A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
512M HYNIX MAB12 N7 A2 MDB9 MAB12 N7 A2 MDB7 MAB12 N7 A2 MDB40 MAB12 N7 A2 MDB61
MAB13 T3 A12 DQU5 B8 MDB14 MAB13 T3 A12 DQU5 B8 MDB2 MAB13 T3 A12 DQU5 B8 MDB46 MAB13 T3 A12 DQU5 B8 MDB58
T7 A13 DQU6 A3 MDB8 T7 A13 DQU6 A3 MDB5 T7 A13 DQU6 A3 MDB42 T7 A13 DQU6 A3 MDB60
M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7
A15/BA3 +1.5VSG A15/BA3 +1.5VSG A15/BA3 +1.5VSG A15/BA3 +1.5VSG

M2 B2 B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2

19 B_BA0 N8 BA0 VDD D9 N8 BA0 VDD D9 N8 BA0 VDD D9 N8 BA0 VDD D9
B_BA1 B_BA1 B_BA1
19 B_BA1 M3 BA1 VDD G7 M3 BA1 VDD G7 M3 BA1 VDD G7 M3 BA1 VDD G7
B_BA2 B_BA2 B_BA2
19 B_BA2 BA2 VDD K2 BA2 VDD K2 BA2 VDD K2 BA2 VDD K2
MDB[0..63] VDD K8 VDD K8 VDD K8 VDD K8
19 MDB[0..63] VDD N1 VDD N1 VDD N1 VDD N1
CLKB0 J7 VDD N9 CLKB0 J7 VDD N9 CLKB1 J7 VDD N9 CLKB1 J7 VDD N9
CLKB0# K7 CK VDD R1 CLKB0# K7 CK VDD R1 CLKB1# K7 CK VDD R1 CLKB1# K7 CK VDD R1
K9 CK VDD R9 CKEB0 K9 CK VDD R9 K9 CK VDD R9 CKEB1 K9 CK VDD R9
19 CKEB0 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG 19 CKEB1 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG
19 MAB[13..0] K1 A1 K1 A1 K1 A1 K1 A1
ODTB0 ODTB0 ODTB1 ODTB1
19 ODTB0 L2 ODT/ODT0 VDDQ A8 19 ODTB0 CSB0#_0 L2 ODT/ODT0 VDDQ A8 19 ODTB1 L2 ODT/ODT0 VDDQ A8 19 ODTB1 CSB1#_0 L2 ODT/ODT0 VDDQ A8
19 CSB0#_0 J3 CS/CS0 VDDQ C1 RASB0# J3 CS/CS0 VDDQ C1 19 CSB1#_0 J3 CS/CS0 VDDQ C1 RASB1# J3 CS/CS0 VDDQ C1
19 RASB0# K3 RAS VDDQ C9 CASB0# K3 RAS VDDQ C9 19 RASB1# K3 RAS VDDQ C9 CASB1# K3 RAS VDDQ C9
19 CASB0# L3 CAS VDDQ D2 L3 CAS VDDQ D2 19 CASB1# L3 CAS VDDQ D2 L3 CAS VDDQ D2
WEB0# WEB1#
19 DQMB#[7..0] 19 WEB0# WE VDDQ E9 WE VDDQ E9 19 WEB1# WE VDDQ E9 WE VDDQ E9
VDDQ F1 VDDQ F1 VDDQ F1 VDDQ F1
QSB3 F3 VDDQ H2 QSB2 F3 VDDQ H2 QSB4 F3 VDDQ H2 QSB6 F3 VDDQ H2
QSB1 C7 DQSL VDDQ H9 QSB0 C7 DQSL VDDQ H9 QSB5 C7 DQSL VDDQ H9 QSB7 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
19 QSB[7..0]
DQMB#3 E7 A9 DQMB#2 E7 A9 DQMB#4 E7 A9 DQMB#6 E7 A9
DQMB#1 D3 DML VSS B3 DQMB#0 D3 DML VSS B3 DQMB#5 D3 DML VSS B3 DQMB#7 D3 DML VSS B3
C DMU VSS E1 DMU VSS E1 DMU VSS E1 DMU VSS E1 C
VSS G8 VSS G8 VSS G8 VSS G8
19 QSB#[7..0] G3 VSS J2 G3 VSS J2 G3 VSS J2 G3 VSS J2
QSB#3 QSB#2 QSB#4 QSB#6
QSB#1 B7 DQSL VSS J8 QSB#0 B7 DQSL VSS J8 QSB#5 B7 DQSL VSS J8 QSB#7 B7 DQSL VSS J8
DQSU VSS M1 DQSU VSS M1 DQSU VSS M1 DQSU VSS M1
VSS M9 VSS M9 VSS M9 VSS M9
VSS P1 VSS P1 VSS P1 VSS P1
VRAM_RST# T2 VSS P9 VRAM_RST# T2 VSS P9 VRAM_RST# T2 VSS P9 VRAM_RST# T2 VSS P9
19 VRAM_RST# RESET VSS T1 RESET VSS T1 RESET VSS T1 RESET VSS T1
L8 VSS T9 L8 VSS T9 L8 VSS T9 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1

1
J1 B1 J1 B1 J1 B1 J1 B1
R79 L1 NC/ODT1 VSSQ B9 R80 L1 NC/ODT1 VSSQ B9 R81 L1 NC/ODT1 VSSQ B9 R82 L1 NC/ODT1 VSSQ B9
J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1
243_0402_1% L9 NC/CE1 VSSQ D8 243_0402_1% L9 NC/CE1 VSSQ D8 243_0402_1% L9 NC/CE1 VSSQ D8 243_0402_1% L9 NC/CE1 VSSQ D8
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
2

2
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9 VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1 VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9 VSSQ G9 VSSQ G9
VSSQ VSSQ VSSQ VSSQ
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W1G1646G-BC11 FBGA 96P K4W1G1646G-BC11 FBGA 96P K4W1G1646G-BC11 FBGA 96P K4W1G1646G-BC11 FBGA 96P
@ @ @ @
+1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG
+1.5VSG +1.5VSG +1.5VSG +1.5VSG
1

1
R84 R85 R86
R92 R83 R87 R88 R89 R90
B @ 56_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% B
ODTB0 1 2 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
2

2
VREFCB_A1 VREFDB_Q1 VREFCB_A2 VREFDB_Q2
R94 1 1 1 1 VREFCB_A3 VREFDB_Q3 VREFCB_A4 VREFDB_Q4
1

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
@ 56_0402_1% 1 1 1 1

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
ODTB1 1 2 C169 R96 C170 R97 C171 R98 C172
R95 R78 C173 R100 C174 R101 C175 R102 C176
2 4.99K_0402_1% 2 4.99K_0402_1% 2 4.99K_0402_1% 2
4.99K_0402_1% 4.99K_0402_1% 2 4.99K_0402_1% 2 4.99K_0402_1% 2 4.99K_0402_1% 2
2

2
R103
56_0402_1%
1 2 +1.5VSG +1.5VSG
19 CLKB0
+1.5VSG
R104 +1.5VSG
56_0402_1%
1U_0402_6.3V6K
C178

1U_0402_6.3V6K
C179

1U_0402_6.3V6K
C180

1U_0402_6.3V6K
C181

1U_0402_6.3V6K
C182

1U_0402_6.3V6K
C183

1U_0402_6.3V6K
C184

1U_0402_6.3V6K
C185

1U_0402_6.3V6K
C186

1U_0402_6.3V6K
C187

1 2 1 1 1 1 1 1 1 1 1 1
19 CLKB0#
0.01U_0402_25V7K
C177

1U_0402_6.3V6K
C188

1U_0402_6.3V6K
C189

1U_0402_6.3V6K
C190

1U_0402_6.3V6K
C191

1U_0402_6.3V6K
C192
1 1 1 1 1 1

1U_0402_6.3V6K
C193

1U_0402_6.3V6K
C194

1U_0402_6.3V6K
C195

1U_0402_6.3V6K
C196

1U_0402_6.3V6K
C197
1 1 1 1 1
2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2
2 2 2 2 2
R105
56_0402_1% +1.5VSG
1 2 +1.5VSG
19 CLKB1
R106
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
56_0402_1% 1 1 1 1
C203

C204

C205

C206
1 2 1 1 1 1
19 CLKB1#
0.01U_0402_25V7K
C198

10U_0603_6.3V6M
C199

10U_0603_6.3V6M
C200

10U_0603_6.3V6M
C201

10U_0603_6.3V6M
C202

A A
1
2 2 2 2
2 2 2 2
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P22-VRAM_DDR3 / Channel B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 22 of 47
5 4 3 2 1
 5 4 3 2 1

+3.3VS TO +3.3VSG
+3VS +3VSG

R124 1 2 0_0805_5%

D D

Delay SUSP# 10ms

R111 1 2 0_0402_5%
29 VGA_ON VGA_PWR_ON 34,41,44

C C

+1.5V TO +1.5VSG +1.8VS TO +1.8VSG Change P/N SB00000GV00

+1.8VS +1.8VSG
U15
+1.5V +1.5VSG AO4478L 1N SO8
U14 8 1
AO4478L 1N SO8 7 2

2
8 1 6 3 1 1
7 2 1 1 5 C227 R134

2
6 3 1 1 C226 C229
1 1 5 C224 C225 R133 10U_0603_6.3V6M C228 470_0603_5%

4
C230 C231 2 2

1
10U_0603_6.3V6M 1U_0402_6.3V4Z 470_0603_5% 2 2 1U_0402_6.3V4Z +1.8VSG_DISC
4

2 2 10U_0603_6.3V6M 10U_0603_6.3V6M

1
D

1
2 2 +1.5VSG_DISC
10U_0603_6.3V6M 10U_0603_6.3V6M SSM3K7002FU_SC70-3 2 VGA_PWR_ON#
D
1 Q16 G
SSM3K7002FU_SC70-3 2 VGA_PWR_ON# 2 1 1.8VSG_GATE
VGA_PWR_ON# 34 +VSB S

3
Q17 G R135 100K_0402_5%
+VSB 1 2 1.5VSG_GATE S
3

R136 100K_0402_5% 1
D

1
C232
B VGA_PWR_ON# 2 1 2 SSM3K7002FU_SC70-3 B
D 1
1

C233 R137 100K_0402_5% G Q18 0.1U_0603_25V7K

VGA_PWR_ON# 2 1 2 SSM3K7002FU_SC70-3 2
1 S

3
R139 47K_0402_5% G Q19 0.1U_0603_25V7K
S 2 C234
3

1
C235 0.1U_0603_25V7K2

0.1U_0603_25V7K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P23-VGA DC Interface
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 23 of 47
5 4 3 2 1
 5 4 3 2 1

J8
2 1
2 1 +LAN_IO +LAN_VDD
W=60mils W=60mils
@ JUMP_43X118

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
+3VALW
+LAN_IO 1.5A R1788 1 1 1 1 1 1 1
Q29 470_0603_5%

D
3 1 W=20mils C1617 C1618 C1619 C1620 C1621 C1622 C1623

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
1

1
C1610 +LAN_IO_DISC 2 2 2 2 2 2 2
1 1 1 1 1 1
1U_0402_6.3V6K AO3413_SOT23-3

G
2

1
C1611 C1612 C1613 C1614 C1615 C1616 D
+5VALW 2 2 EN_WOL#
D 2 2 2 2 2 2 G D
S SSM3K7002FU_SC70-3 These caps close to Pin 3,6,9,13,29,41,45

3
2
Q113
R533
100K_0402_5%

R534 These caps close to Pin 12,27,39,42,47,48

1

1 2 EN_WOL#
220K_0402_5%~N +LAN_IO W=40mils W=20mils
1

D R535 +LAN_VDD
1 R536
2 Q30 C1624 +LAN_IO 1 2 +LAN_VDDREG
29 EN_WOL

0.1U_0402_16V7K
1 2 +LAN_EVDD10

4.7U_0603_6.3V6K
G SSM3K7002FU_SC70-3 0.1U_0603_25V7K

0.1U_0402_16V7K

1U_0402_6.3V6K
S 0_0603_5% 1 1
3
2

2
0_0603_5%

2
R1789 C1625 C1626 1 1
10K_0402_5% R1658
10K_0402_5% 2 2 C1627 C1628
1

2
2 2

1
1 3 LAN_WAKE#
13,27,29,32 FCH_PCIE_WAKE#

S
U49 SSM3K7002FU_SC70-3
Q98
C1629 1 20.1U_0402_16V7K PCIE_FRX_C_DTX_P0 22 31
12 PCIE_FRX_DTX_P0 HSOP LED3/EEDO 37
C1630 1 20.1U_0402_16V7K PCIE_FRX_C_DTX_N0 23 LED1/EESK 40
12 PCIE_FRX_DTX_N0 HSON LED0
17 30 R5371 2 10K_0402_5%
12 PCIE_FTX_C_DRX_P0 18 HSIP EECS/SCL 32 R5381 2 10K_0402_5% +LAN_VDD
12 PCIE_FTX_C_DRX_N0 HSIN EEDI/SDA L120
C +LAN_SROUT1.05 1 2 C
W=60mils W=60mils

0.1U_0402_16V7K
16 1 LAN_MDIP0

4.7U_0603_6.3V6K
13 LAN_CLKREQ# CLKREQB MDIP0 2 R539
LAN_MDIN0 2.2UH +-5% NLC252018T-2R2J-N 1 1
25 MDIN0 4 LAN_MDIP1 10P_0402_50V8J 1 2 C1633 2 1 XTLI
12,17,27,32 PLT_RST# PERSTB MDIP1 5 LAN_MDIN1 C1631 C1632
MDIN1

2
19 7 LAN_MDIP2 0_0402_5%
12 CLK_PCIE_LAN 20 REFCLK_P NC/MDIP2 8 2 2
LAN_MDIN2 Y6
12 CLK_PCIE_LAN# REFCLK_N NC/MDIN2 10 LAN_MDIP3 25MHZ_12PF_X5H025000FC1H-H
NC/MDIP3 11 LAN_MDIN3

1
XTLO 43 NC/MDIN3 1 2 XTLO
CKXTAL1 12P_0402_50V8J C1634
XTLI 44 13 These components close to Pin 36
CKXTAL2 DVDD10 +LAN_VDD
29 ( Should be place within 200 mils )
DVDD10 41
LAN_WAKE# 28 DVDD10
R540 LANWAKEB
1 2 ISOLATEB 26 27
+3VS ISOLATEB DVDD33 39
1K_0402_5% DVDD33
14 12
NC/SMBCLK AVDD33 +LAN_IO
2

R542 1 2 10K_0402_5% 15 42
R541 R543 1 2 1K_0402_5% 38 NC/SMBDATA AVDD33 47
+LAN_IO GPO/SMBALERT AVDD33
15K_0402_5% 48
AVDD33
2 1 33
+LAN_IO
1

R544 0_0402_5% ENSWREG 21 +LAN_EVDD10

3.3V : Enable switching regulator 34 EVDD10 JLAN1
0V : Disable switching regulator +LAN_VDDREG 35 VDDREG 3
VDDREG AVDD10 +LAN_VDD
6 12
AVDD10 9 RJ45_TX3- 8 SHLD4
R547 1 2 2.49K_0402_1% 46 AVDD10 45 D34 @ LSE-200NX3216TRLF_1206-2 PR4- 11
RSET AVDD10 RJ45_TX0+ 1 2 RJ45_TX0- RJ45_TX3+ 7 SHLD3
B 24 36 +LAN_SROUT1.05 PR4+ B
49 GND REGOUT D35 @ LSE-200NX3216TRLF_1206-2 RJ45_RX1- 6
PGND RJ45_RX1+ 1 2 RJ45_RX1- PR2-
RJ45_TX2- 5
RTL8111E-VL-GR_QFN48_6X6 D36 @ LSE-200NX3216TRLF_1206-2 PR3-
RJ45_TX2+ 1 2 RJ45_TX2- RJ45_TX2+ 4
TS1 PR3+
D37 @ LSE-200NX3216TRLF_1206-2 RJ45_RX1+ 3
+V_DAC 1 24 R549 1 2 75_0402_5% RJ45_TX3+ 1 2 RJ45_TX3- PR2+
LAN_MDIP0 2 TCT1 MCT1 23 RJ45_TX0+ R1529 1 2 75_0402_5% RJ45_TX0- 2
LAN_MDIN0 3 TD1+ MX1+ 22 RJ45_TX0- R1530 1 2 75_0402_5% PR1- 10
TD1- MX1- R552 1 2 75_0402_5% RJ45_TX0+ 1 SHLD2
+V_DAC 4 21 PR1+ 9
LAN_MDIP1 5 TCT2 MCT2 20 RJ45_RX1+ SHLD1
C1635 1 2

0.01U_0402_16V7K
LAN_MDIN1

+V_DAC
6

7
TD2+
TD2-

TCT3
MX2+
MX2-

MCT3
19

18
RJ45_RX1- 2
C1636
1000P_1206_2KV7K
ESD SANTA_130451-Y
CONN@
LAN_MDIP2 8 17 RJ45_TX2+
LAN_MDIN2 9 TD3+ MX3+ 16 RJ45_TX2- 1
TD3- MX3-
+V_DAC
LAN_MDIP3
LAN_MDIN3
10
11
12
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
15
14
13
RJ45_TX3+
RJ45_TX3- LAN_MDIP1 6
D11
I/O4 I/O2
3 LAN_MDIP0
ESD LAN_MDIP3 6
D13
I/O4 I/O2
3 LAN_MDIP2

TAIMAG_IH-160 D18 @ LSE-200NX3216TRLF_1206-2 5 2 5 2

+LAN_IO VDD GND +LAN_IO VDD GND
SP050006F00 1 2

D19 @ LSE-200NX3216TRLF_1206-2
1 2 LAN_MDIN1 4 1 LAN_MDIN0 LAN_MDIN3 4 1 LAN_MDIN2
I/O3 I/O1 I/O3 I/O1
A 2 1 LANGAN D29 @ LSE-200NX3216TRLF_1206-2 AZC099-04S.R7G_SOT23-6 AZC099-04S.R7G_SOT23-6 A
R34 0_0603_5% 1 2
@
D31 @ LSE-200NX3216TRLF_1206-2
1 2

2 1 LANGAN
R76 0_0603_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
@
ESD Issued Date 2010/3/31 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
2012/06/30 Title
P24-LAN RTL8111E
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA7323P 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 24 of 47
5 4 3 2 1
 A B C D E F G H

+5VS_PVDD
EMI close to JSPK1

SPKOUT_L1 R1532 1 2 0_0603_5% SPK_L1 1 2

R1531
1 C1473 0.22U_0603_16V7K
2 1 @
+5VS

10U_0805_10V6K

0.1U_0402_16V7K

0.1U_0402_16V7K
@ C1474 1U_0603_10V6K
0_0805_5% 1 1 1 2
SPKOUT_L2 R1533 1 2 0_0603_5% SPK_L2 1 2
C1475 C1476 C1477 C1478 0.22U_0603_16V7K
@
2 2 2 JSPK1
SPK_R1 1
1 R1534 SPKOUT_R1 R1535 1 2 0_0603_5% SPK_R1 1 2 SPK_R2 2 1 1
2 1 +3VS_DVDD_R SPK_L1 3 2 5
+3VS_DVDD 1 C1480 0.22U_0603_16V7K
3 G1

10U_0603_6.3V6M
0_0603_5% @ SPK_L2 4 6
4 G2

0.1U_0402_16V7K
1 1 @ C1483 1U_0603_10V6K
ACES_88266-04001
C1481 C1482 SPKOUT_R2 R1536 1 2 0_0603_5% SPK_R2 2 1 2 CONN@
C1484 0.22U_0603_16V7K
2 2
@
+5VS_PVDD +VDDA
L108
2 1
+5VS

2
+3VS_DVDD

10U_0805_10V6K
0.1U_0402_16V7K

0.1U_0402_16V7K
R1537 1 1 1 MBK1608800YZF 0603
2 1 D9 D10
+3VS
10U_0603_6.3V6M

0.1U_0402_16V7K
0_0603_5% C1485 C1486 C1487
1 1 2 2 2
C1488 C1489

1
YSDA0502C 3P C/A SOT-23 YSDA0502C 3P C/A SOT-23
2 2

10P_0402_50V8J
39

46

25

38
1

9
U50 HDA_SDOUT_AUDIO HDA_BITCLK_AUDIO
2
ESD @ @

DVDD_IO

PVDD1

PVDD2

AVDD1

AVDD2
DVDD

0_0402_5%
C1491

1
@ 1 R1538
23 40 SPKOUT_L1 @
24 LINE1_L SPK_OUT_L+ 41 SPKOUT_L2
LINE1_R SPK_OUT_L- EMI

22P_0402_50V8J
14 45 SPKOUT_R1
LINE2_L SPK_OUT_R+

10P_0402_50V8J
15 44 SPKOUT_R2 1
LINE2_R SPK_OUT_R- HDA_SYNC_AUDIO
MIC1 1 R1539 2 MIC1_R 1 2 C1490 4.7U_0603_6.3V6K MIC1_C 21 32 HP_OUTL 2 C1492
2 1K_0402_5% MIC2_C 22 MIC1_L HP_OUT_L 33 HP_OUTR 2
MIC2 1 R1540 2 MIC2_R 1 2 C1493 4.7U_0603_6.3V6K MIC1_R HP_OUT_R C1494 @ 2
1K_0402_5% 16
17 MIC2_L @ 1
MIC2_R 10 HDA_SYNC_AUDIO R1541 1 2
2.2K_0402_1%
SYNC HDA_SYNC_AUDIO 13 +MIC1_VREFO_R
R1542 1 2
2.2K_0402_1%
+MIC1_VREFO_L
DMIC_DATA R1543 1 2 0_0402_5% DMIC_DATA_CODEC 2 6 HDA_BITCLK_AUDIO
10 DMIC_DATA GPIO0/DMIC_DATA BCLK HDA_BITCLK_AUDIO 13
DMIC_CLK 1 2 DMIC_CLK_CODEC 3
10 DMIC_CLK GPIO1/DMIC_CLK
L124 FBMA-L10-160808-301LMT_2P 5 HDA_SDOUT_AUDIO JAU1
SDATA_OUT HDA_SDOUT_AUDIO 13 MIC_JD 1
EC_MUTE# R1545 1 2 0_0402_5% PD# 4 8 HDA_SDIN_AUDIO1 R1546 2 MIC2 2 1
29 EC_MUTE# PD# SDATA_IN HDA_SDIN0 13 2
33_0402_5% 3
MIC1 HP_JD 4 3
HDA_RST_AUDIO# 11 47 1 R1547 2 HP_OUTR 5 4
13 HDA_RST_AUDIO# RESET# EAPD EAPD 29 HP_OUTL 6 5
48 0_0402_5% 7 6
12 SPDIFO 8 7
MIC_JD 1 R1548 2 PCBEEP 20 9 8
20K_0402_1% MONO_OUT 10 9
HP_JD 2 R1549 1 SENSE_A 13 11 10
39.2K_0402_1% SENSE A 29 12 11
18 MIC2_VREFO 13 12
SENSE B 30 13 USB20_N5 14 13
MIC1_VREFO_R +MIC1_VREFO_R 13 USB20_P5 14
36 28 15
CBP LDO_CAP 16 15
+5VALW 16

10U_0805_10V6K
1 2 35 27 AC97_VREF 17
CBN VREF 17

10U_0805_10V6K

0.1U_0402_16V7K
C1497 2.2U_0603_16V6K 1 18
31 19 AC_JDREF 1 R1552 2 19 18
+MIC1_VREFO_L MIC1_VREFO_L JDREF 1 1 19
20K_0402_1% C1501 USB_ON# 20
29,31 USB_ON# 20
43 34 1 2 C1499 C1500 1 2 @ 21
42 PVSS2 CPVEE 2 13 USB_OC1# 22 21
C1498
3 49 PVSS1 26 2.2U_0603_16V6K @ 2 2 C9 0.1U_0402_16V7K USB20_P6 23 22 3
7 DVSS2 AVSS1 37 13 USB20_P6 24 23
+1.5VS USB20_N6
DVSS1 AVSS2 1 2 @ 13 USB20_N6 24
ALC269Q-VB5-GR_QFN48_7X7 25
C123 0.1U_0402_16V7K 26 GND1
GND2
1

1 2 @ ACES_88514-02401-071
4.7K_0402_5%
CONN@
R1553 @ C124 0.1U_0402_16V7K
1 2 @ Change CONN to SP010015W00
2

HDA_RST_AUDIO# R1556 1 2 0_0402_5% C125 0.1U_0402_16V7K

@
1 0.1U_0402_16V7K R1557 1 2 0_0402_5%

C1503 R1558 1 2 0_0402_5% For EMI (on MIC and Headphone AGND to connected with DGND)
2 R1559 1 2 0_0402_5%

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/3/31 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P25-HD CODEC ALC259
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA7323P 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 25 of 47
A B C D E F G H
 5 4 3 2 1

Card Reader RTS5137

(only SD/MMC/MS function)
+3VS +3VS_CR

D
30mil D
R1560 1 2 0_0603_5%

@
2 1 10mil
C1507 100P_0402_50V8J U51
C1508 1 2 +RREF 1
6.2K_0603_1% REFE 17 1 @ 2 1 2
USB20_N4 2 GPIO0 R1561 10_0402_5% @
@C1509
C1509 10P_0402_50V8J
13 USB20_N4 3 DM 24
USB20_P4 CLK_SD_48M CLK_SD_48M 12
13 USB20_P4 DP CLK_IN
+3VS_CR 4 23
+CARDPWR 5 3V3_IN NC
+VREG
30mil 6 CARD_3V3 22 MS_BS
1 2 V18 SP14
C1511 1 10mil 21 SDD2_MS_D5
7 SP13 20
C1510 C1512 EMI SDD3_MSD1
4.7U_0805_10V4Z 1U_0402_6.3V6K 0_0402_5% R37 NC SP12 19
2 1 SDWP_MSCLK 1 2 8 SP11 18 SDCMD
0.1U_0402_16V4Z 2 MS_INS# 9 SP1 SP10 16 MSD0
SDD1 10 SP2 SP9 15 1 2 SDCLK_MSD2
SP3 SP8

EPAD
SDD0 11 14 0_0402_5% R74 EMI
MSD3 12 SP4 SP7 13 SDCD#
SP5 SP6
RTS5137-GR_QFN24_4X4

25
+CARDPWR

Card Reader Connector

JCR1
SDCD# 1
SDWP_MSCLK 2 SD-CD
C SDD1 3 SD-WP C
SDD0 4 SD-DAT1
5 SD-DAT0
6 MS-GND
+CARDPWR MS_BS 7 SD-GND
SDCLK_MSD2 8 MS-BS
SDD3_MSD1 9 CD-CLK
30mil MSD0 10 MS-DAT1
11 MS-DAT0
12 SD-VCC
MS-DAT2
2

@ 1 1 1 13
MS_INS# 14 SD-GND
R1562 C1514 C1515 C1513 MSD3 15 MS-INS
100K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z SDCMD 16 MS-DAT3
2 2 2 17 SD-CMD
1

18 MS-SCLK 22
Close to connector MS-VCC GND
19 23
20 SD-DAT3 GND
SDD2_MS_D5 21 MS-GND
SD-DAT2
TAITW_R009-142-HM_RV
CONN@

SDWP_MSCLK SDCLK_MSD2

B
EMI B

close U51 22P_0402_50V8J

22P_0402_50V8J
1 1
C128 C129

@ 2 @ 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/10/08 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P26-RTS5137 Media Card Controller
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA7323P 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 26 of 47
5 4 3 2 1
 A B C D E

Mini-Express Card for WLAN/WiMAX(Half) W=60mils W=60mils

+3VALW +3VS_WLAN

Q31

D
3 1 R1590 2 1 0_1206_5%
1
C1664 @
+1.5VS 1U_0402_6.3V6K AO3413_SOT23-3

G
2
+3VS +3VS_WLAN +5VALW 2 @

Mini-Express Card(WLAN/WiMAX)

2
R1563 2 1 0_1206_5%
R1564 R545
1 1
0_1206_5% @ 100K_0402_5%

@ JMINI1 @

1
13,24,29,32 FCH_PCIE_WAKE# R1565 1 2 0_0402_5% WLAN_WAKE# 1 2 1 2 WLAN_EN#
@ 3 1 2 4 R114 0_0402_5%

1
R1587 1 2 0_0402_5% 5 3 4 6 D
14 BT_ON 5 6 1
MINI1_CLKREQ# 7 8 LPC_FRAME#_R 2 Q32 C1663
13 MINI1_CLKREQ# 7 8 29,34,38,42 SUSP#
9 10 LPC_AD3_R G SSM3K7002FU_SC70-3 0.1U_0603_25V7K
11 9 10 12 LPC_AD2_R
12 CLK_PCIE_MINI1# S @ @

3
13 11 12 14 LPC_AD1_R 2
12 CLK_PCIE_MINI1 13 14
15 16 LPC_AD0_R
PCI_RST#_R 17 15 16 18 R1567 1 @ 2 0_0402_5%
17 18 WL_OFF# 14
CLK_PCI_DB 19 20 R1568 1 2 0_0402_5%
21 19 20 22 WL_OFF#_EC 29
21 22 PLT_RST# 12,17,24,32
23 24 R1569 1 2 @ 0_0402_5% +3VALW
12 PCIE_FRX_DTX_N1 23 24
25 26 R1570 1 2 @ 0_0402_5%
12 PCIE_FRX_DTX_P1 25 26 +3VS
27 28
29 27 28 30 FCH_SMCLK0_R R1571 1 2 @ 0_0402_5%
29 30 FCH_SMCLK0 8,9,13
31 32 FCH_SMDAT0_R R1572 1 2 @ 0_0402_5%
12 PCIE_FTX_C_DRX_N1 31 32 FCH_SMDAT0 8,9,13
33 34
12 PCIE_FTX_C_DRX_P1 33 34
35 36
+3VS_WLAN 37 35 36 38 USB20_N3 13
39 37 38 40
USB20_P3 13 Reserve for SW mini-pcie debug card.
41 39 40 42
43 41 42 44 WLAN_LED_R# 0_0402_5% 2 1 R1575 WLAN_LED# Series resistors closed to KBC side.
43 44 WLAN_LED# 29
100_0402_1% 45 46 BT_LED_R# 0_0402_5% 2 1 R1577 BT_LED#
47 45 46 48 BT_LED# 29 1 2
R1581 LPC_FRAME#_R R1573 0_0402_5% LPC_FRAME#
47 48 LPC_FRAME# 12,29
EC_TX_P80_DATA 1 2 EC_TX_P80_DATA_R 49 50 LPC_AD3_R R1574 1 2 0_0402_5% LPC_AD3
29 EC_TX_P80_DATA 49 50 LPC_AD3 12,29
EC_RX_P80_CLK 1 2 EC_RX_P80_CLK_R 51 52 LPC_AD2_R R1576 1 2 0_0402_5% LPC_AD2
29 EC_RX_P80_CLK 51 52 LPC_AD2 12,29
@ R1582 LPC_AD1_R R1578 1 2 0_0402_5% LPC_AD1
LPC_AD1 12,29
100_0402_1% 53 54 LPC_AD0_R R1579 1 2 0_0402_5% LPC_AD0
GND1 GND2 LPC_AD0 12,29
14 BT_ON R1566 1 2 0_0402_5% PCI_RST#_R R1580 1 2 0_0402_5% PLT_RST#
CLK_PCI_DB CLK_PCI_DB 12
ACES_88915-5204 +3VALW +1.5VS
2

For EC to detect CONN@

R1583
debug card insert. 100K_0402_5% 1 1 1
2 @ CLK_PCI_DB 2
C1516 C1517 C1518
1

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

0_0402_5%
2 2 2

1
EMI R93
@

22P_0402_50V8J
1
C133

1 2 @ 2
+5VALW
R110 10K_0402_5%

LED
LED1
White 1 2 2 1
29,33 PWR_LED# +5VALW
300_0402_5% R1584
19-217/T1D-DP1Q2QY/3T 0603 WHITE D22
@
PWR_LED# 2
1
Orange LED2 3
BATT_LOW_LED# 1 2 2 1
29 CHARGE_LED1# +3VALW YSDA0502C 3P C/A SOT-23
O 300_0402_5% R1585

3 4 2 1 D25
29 CHARGE_LED0# +3VALW @
W 300_0402_5% R1586 CHARGE_LED1# 2
BATT_CHG_LED# 1
Green HT-297DQ/GQ 0603 AMB/YG CHARGE_LED0# 3

D24 LED3 YSDA0502C 3P C/A SOT-23

@ Green
3 D26 3
WLAN_LED_R# 1 2 RF_D_LED# 1 2 2 1 @
+3VS
300_0402_5% R1588 RF_D_LED# 2
RB751V_SOD323 1
D30 19-21SYGC/S530-E3/TR8 0603 Y/G 3
@ SATA_LED#
BT_LED_R# 1 2

RB751V_SOD323 YSDA0502C 3P C/A SOT-23

D27
@
NUM_LED# 2
29 RF_LED# R1589 1 2 0_0402_5% 1
CAPS_LED# 3

YSDA0502C 3P C/A SOT-23

LED4
Green 1 2 2 1
14 SATA_LED# +3VS
300_0402_5% R1591
19-21SYGC/S530-E3/TR8 0603 Y/G
ESD
LED5
Green 1 2 2 1
29 NUM_LED# +3VS
300_0402_5% R1593
19-21SYGC/S530-E3/TR8 0603 Y/G

LED6
Green 1 2 2 1
4 29 CAPS_LED# +3VS 4
300_0402_5% R1594
19-21SYGC/S530-E3/TR8 0603 Y/G

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P27-Mini PCIE/LED
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 27 of 47
A B C D E
 A B C D E F G H

SATA HDD BTB Conn.

JHDD1
1 2
1 14 SATA_ITX_DRX_P0 1 2 +5VS 1
3 4
14 SATA_ITX_DRX_N0 3 4
5 6
7 5 6 8
14 SATA_DTX_IRX_N0 9 7 8 10
14 SATA_DTX_IRX_P0 11 9 10 12
13 11 12 14
14 SATA_ITX_DRX_P2 13 14 +3VS
15 16
14 SATA_ITX_DRX_N2 15 16
17 18
19 17 18 20
14 SATA_DTX_IRX_N2 21 19 20 22
14 SATA_DTX_IRX_P2 23 21 22 24
25 23 24 26
27 25 26 28
29 27 28 30

GND
GND
GND
GND
GND
GND
29 30

ACES_88018-304G

31
32
33
34
35
36
CONN@

2 2

SATA ODD FFC Conn.

JODD1
1
SATA_ITX_C_DRX_P1 0.01U_0402_16V7K 2 1 C650 SATA_ITX_DRX_P1 2 GND
14 SATA_ITX_C_DRX_P1 A+
14 SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_N1 0.01U_0402_16V7K 2 1 C651 SATA_ITX_DRX_N1 3
4 A-
C1521 1 2 0.01U_0402_16V7K SATA_DTX_IRX_N1 5 GND
14 SATA_DTX_C_IRX_N1 C1522 1 2 0.01U_0402_16V7K SATA_DTX_IRX_P1 6 B-
14 SATA_DTX_C_IRX_P1 7 B+
GND
8
80mils 9 DP
10 +5V
+5VS +5V
1 2 11
+3VS 12 MD 14
R4 10K_0402_5%
13 GND GND1 15
@ GND GND2
SANTA_206001-1
CONN@

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P28-HDD & ODD CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 28 of 47
A B C D E F G H
 ID BRD ID Ra Rb Vab
+3VALW
0 R01 SR 100K 115K 1.6613V
R1602 1 2 0_0805_5% +3VALW_EC L1131 2 +EC_VCCA
1 1 1 1 1 1 FBM-11-160808-601-T_0603

0.1U_0402_16V4Z
C1524

0.1U_0402_16V4Z
C1525

0.1U_0402_16V4Z
C1526

0.1U_0402_16V4Z
C1527

1000P_0402_50V7K
C1528

1000P_0402_50V7K
C1529
1 1 R02 ER 100K 154K 1.8857V
C1530
2 2 2 2 2 2 1000P_0402_50V7K
2
2 R10 PR 100K 215K 2.1261V

ECAGND
KSO[0..15]
30 KSO[0..15]
KSI[0..7]
14,30 KSI[0..7]

111
125
22
33
96

67
9
U47

VCC
VCC
VCC
VCC
VCC
VCC

AVCC
SUSP# +3VALW
1 Ra
@ 1 21
C1542 13 EC_GA20 2 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F 23 BRDID R1603 1 2 100K_0402_5%
13 EC_KBRST# 3 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 26
1000P_0402_50V7K
2 12 SERIRQ 4 SERIRQ# FANPWM1/GPIO12 27 1 2 215K_0402_1%
ACOFF R1606
12,27 LPC_FRAME# 5 LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF 36 1 2
LPC_AD3 ECAGND
12,27 LPC_AD3 LPC_AD2 7 LAD3
12,27 LPC_AD2 LAD2 PWM Output C1531 100P_0402_50V8J Rb
LPC_AD1 8 63 BATT_TEMP
12,27 LPC_AD1 10 LAD1 BATT_TEMP/AD0/GPIO38 64 BATT_TEMP 35
C1532 LPC_AD0
2 1 2 R1604 1 12,27 LPC_AD0 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 65
12 ADP_I/AD2/GPIO3A 66 ADP_I 36
@ 22P_0402_50V8J @ 10_0402_5% AD Input
12 LPC_CLK0_EC A_RST# 13 PCICLK AD3/GPIO3B 75 BRDID
1 2 12 A_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76
+3VALW 20 ECRST# SELIO2#/AD5/GPIO43 +5VS
R1605 47K_0402_5% EC_SCI#
13 EC_SCI# 38 SCI#/GPIO0E
2 CLKRUN#/GPIO1D 68 TP_CLK R1607 1 2 4.7K_0402_5%
C1533 DAC_BRIG/DA0/GPIO3C 70 FAN_SET
EN_DFAN1/DA1/GPIO3D 71 IREF FAN_SET 33 TP_DATA R1608 1 2 4.7K_0402_5%
0.1U_0402_16V4Z DA Output
1 55 IREF/DA2/GPIO3E 72 IREF 36
KSI0
56 KSI0/GPIO30 DA3/GPIO3F CHGVADJ 36
KSI1
+3VALW KSI2 57 KSI1/GPIO31
KSI3 58 KSI2/GPIO32 83
KSI4 59 KSI3/GPIO33 PSCLK1/GPIO4A 84 USB_ON# EC_MUTE# 25
1 2 60 KSI4/GPIO34 PSDAT1/GPIO4B 85 USB_ON# 25,31 1 2
KSO1 KSI5 WLAN_LED# ACIN
61 KSI5/GPIO35 PSCLK2/GPIO4C 86 WLAN_LED# 27
R1609 47K_0402_5% KSI6 PS2 Interface BT_LED# C1534 100P_0402_50V8J
1 2 62 KSI6/GPIO36 PSDAT2/GPIO4D 87 BT_LED# 27
KSO2 KSI7 TP_CLK
KSO0 39 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E 88 TP_DATA TP_CLK 30
R1610 47K_0402_5%
1 2 SPI_SO KSO1 40 KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 30
@ +3VALW
R1611 100K_0402_1% KSO2 41 KSO1/GPIO21
1 @ 2 SPI_CS# KSO3 42 KSO2/GPIO22 97
KSO3/GPIO23 SDICS#/GPXOA00 VGATE 13,43

2
R1612 100K_0402_1% KSO4 43 98
EC_SMB_CK1 KSO5 44 KSO4/GPIO24 SDICLK/GPXOA01 99 EN_WOL 24
KSO5/GPIO25 Int. K/B
R1614
KSO6 45 SDIDO/GPXOA02 109 LID_SW# VLDT_EN 34
R1613 2.2K_0402_5% 10K_0402_5%
EC_SMB_DA1 KSO7 46 KSO6/GPIO26 Matrix SDIDI/GPXID0 LID_SW# 30
KSO7/GPIO27 SPI Device Interface
R1615 2.2K_0402_5% KSO8 47

1
1 2 EC_MUTE# KSO9 48 KSO8/GPIO28 119 SPI_SO_R
R1616 10K_0402_5% KSO10 49 KSO9/GPIO29 SPIDI/RD# 120 SPI_SI_R
1 @ 2 EC_SMI# KSO11 50 KSO10/GPIO2A
SPI Flash ROM
SPIDO/WR# 126 L125 1
EMI2 SPI_CLK
R1617 10K_0402_5% KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 SPI_CS# FBMA-10-100505-101T 1 2 EC_PME#
1 2 USB_ON# KSO13 52 KSO12/GPIO2C SPICS# 13,24,27,32 FCH_PCIE_WAKE# R1618 0_0402_5%
R1619 10K_0402_5% KSO14 53 KSO13/GPIO2D
KSO14/GPIO2E @
KSO15 54 73
81 KSO15/GPIO2F CIR_RX/GPIO40 74
82 KSO16/GPIO48 CIR_RLC_TX/GPIO41 89 FSTCHG
32 USB30_EN KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 90 FSTCHG 36
+3VS CHARGE_LED0#
BATT_CHGI_LED#/GPIO52 91 CHARGE_LED0# 27
CAPS_LED#
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 CHARGE_LED1# CAPS_LED# 27
35 EC_SMB_CK1 SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54 CHARGE_LED1# 27
EC_SMB_DA1 78 93
35 EC_SMB_DA1 EC_SMB_CK2 79 SDA1/GPIO45 SUSP_LED#/GPIO55 95 SYSON PWR_LED# 27,33
5,18 EC_SMB_CK2 SCL2/GPIO46 SM Bus SYSON/GPIO56 SYSON 32,34,39
EC_SMB_DA2 80 121
5,18 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 127 VR_ON 43
ACIN SPI_CLK_R
1 2 BKOFF# AC_IN/GPIO59 ACIN 36
R1622 10K_0402_5%

1
1 2 EC_SCI# 6 100
13 SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 101 EC_RSMRST# 13
R1623 10K_0402_5% EC_LID_OUT# @ R180
13 SLP_S5# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 102 EC_LID_OUT# 13
EC_SMI# EC_ON @ 33_0402_5%
13 EC_SMI# 16 EC_SMI#/GPIO08 EC_ON/GPXO05 103 EC_PME# EC_ON 14,33
+3VS D8 RB751V_SOD323
If Q8 or R429, R432 implemented, 17 LID_SW#/GPIO0A EC_SWI#/GPXO06 104 EC_PWROK_R 1 2

2
R747 & R748 need to be mounted 18 SUSP#/GPIO0B ICH_PWROK/GPXO06 105 BKOFF# EC_PWROK 13
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08 BKOFF# 10
19 GPIO 106 1 2 1 2
EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF#_EC 27 +3VS
@ @ INVT_PWM 25 107 R1624 0_0402_5% R1625 10K_0402_5% 1
10 INVT_PWM FAN_SPEED 28 EC_THERM#/GPIO11 GPXO10 108 RF_LED# 27
R1626 R1627 VGA_ON 23 @ @
33 FAN_SPEED 29 FAN_SPEED1/FANFB1/GPIO14 GPXO11
2.2K_0402_5% 2.2K_0402_5% C1535
EC_TX_P80_DATA 30 FANFB2/GPIO15 22P_0402_50V8J
27 EC_TX_P80_DATA 31 EC_TX/GPIO16 110 2
EC_RX_P80_CLK
27 EC_RX_P80_CLK 32 EC_RX/GPIO17 PM_SLP_S4#/GPXID1 112
EC_SMB_CK2
EC_SMB_DA2 33 ON/OFF# 34 ON_OFF/GPIO18 ENBKL/GPXID2 114 ENBKL 10
PWR_LED#/GPIO19 GPXID3 EAPD 25
NUM_LED# 36 GPI 115 EC_THERM#
1
@
C1537
1
@
C1538
27 NUM_LED# NUMLED#/GPIO1A GPXID4
GPXID5
116
117
SUSP#
PBTN_OUT#
EC_THERM# 5
SUSP# 27,34,38,42 EMI
GPXID6 118 PBTN_OUT# 13
100P_0402_50V8J 100P_0402_50V8J
2 2 XCLKI 122 GPXID7
RTC_CLK 1 2 XCLKO 123 XCLK1 124 V18R
12,16 RTC_CLK XCLK0 V18R
R1628 0_0402_5% 1
AGND
GND
GND
GND
GND
GND

C1536
4.7U_0805_10V4Z
2

KB930QF A0 LQFP 128P 2 +3VALW

1
11
24
35
94
113

69

R1787 C1677
20mils
100K_0402_5% 20P_0402_50V8 L114 1

1
2 ECAGND 1 2
1

FBM-11-160808-601-T_0603 C1539
0.1U_0402_16V4Z R1629
2 10K_0402_5%

2
1 2 U48
C1540 15P_0402_50V8J SPI_CS# 1 8
XCLKO SPI_SO_R 1 2 SPI_SO 2 CS# VCC 7 SPI_HOLD#
@ SO HOLD#
R1630 15_0402_5% 3 6 SPI_CLK_R1 R1631 2 SPI_CLK
WP# SCLK
1

32.768KHZ_12.5PF_9H03200413 4 5 15_0402_5%
3 4 @ GND SI
NC OSC R1633 MX25L1606EM2I-12G SOP 8P SPI_SI 1 R1632 2 SPI_SI_R
2 1 20M_0603_5% SA000041N00 15_0402_5%
NC OSC
2

@ Y5 XCLKI

1 2
C1541 15P_0402_50V8J
@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P29-BIOS & EC KB930
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 29 of 47
 5 4 3 2 1

JKB1
INT_KBD Conn. 26
25 GND2
KSI[0..7] GND1
KSI[0..7] 14,29
KSO7 24
KSO[0..15] KSO0 23 24
D KSO[0..15] 29 D
KSI1 22 23
KSI7 21 22
KSO9 20 21
KSO2 C1543 1 2 @ 100P_0402_50V8J KSO1 C1544 1 2 @ 100P_0402_50V8J KSI6 19 20
KSI5 18 19
KSO15 C1546 1 2 @ 100P_0402_50V8J KSO7 C1545 1 2 @ 100P_0402_50V8J KSO3 17 18
KSI4 16 17
KSO6 C1547 1 2 @ 100P_0402_50V8J KSI2 C1548 1 2 @ 100P_0402_50V8J KSI2 15 16
KSO1 14 15
KSO8 C1549 1 2 @ 100P_0402_50V8J KSO5 C1550 1 2 @ 100P_0402_50V8J KSI3 13 14
KSI0 12 13
KSO13 C1551 1 2 @ 100P_0402_50V8J KSI3 C1552 1 2 @ 100P_0402_50V8J KSO13 11 12
KSO5 10 11
KSO12 C1553 1 2 @ 100P_0402_50V8J KSO14 C1554 1 2 @ 100P_0402_50V8J KSO2 9 10
KSO4 8 9
KSO11 C1555 1 2 @ 100P_0402_50V8J KSI7 C1556 1 2 @ 100P_0402_50V8J KSO8 7 8
KSO6 6 7
KSO10 C1557 1 2 @ 100P_0402_50V8J KSI6 C1558 1 2 @ 100P_0402_50V8J KSO11 5 6
KSO10 4 5
KSO3 C1559 1 2 @ 100P_0402_50V8J KSI5 C1560 1 2 @ 100P_0402_50V8J KSO12 3 4
KSO14 2 3
KSO4 C1561 1 2 @ 100P_0402_50V8J KSI4 C1562 1 2 @ 100P_0402_50V8J KSO15 1 2
1
KSI0 C1563 1 2 @ 100P_0402_50V8J KSO9 C1564 1 2 @ 100P_0402_50V8J
CONN@
KSO0 C1565 1 2 @ 100P_0402_50V8J KSI1 C1566 1 2 @ 100P_0402_50V8J ACES_88514-02401-071
Change CONN to SP010015W00 REED Switch +3VALW

C C
CONN PIN define need double check +3VALW

1
R140
47K_0402_5%
Q34

To TP/B Conn.

2
2 3 LID_SW#

GND
+5VS VDD VOUT LID_SW# 29

C136 @ APX9131AAI-TRG_SOT23-3

1
0.1U_0402_16V4Z

C1567
JTP1
0.1U_0402_16V4Z 8
GND 7
6 GND
TP_CLK 5 6
29 TP_CLK 5
TP_DATA 4
29 TP_DATA 4
1 1 SW/L 3
@ @ SW/R 2 3
C1568 C1569 1 2
100P_0402_50V8J 100P_0402_50V8J 1
2 2 E-T_6905-E06N-00R
B CONN@ B
3

D17 D20

@ @
1

YSDA0502C 3P C/A SOT-23

YSDA0502C 3P C/A SOT-23

ESD
DTSM-61N-S-V-T-R(756)_4P
DTSM-61N-S-V-T-R(756)_4P
SW/R 3 1
SW/L 3 1
4 2
4 2
A SW6 A
SW5

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P30-KB /SW/TP/Lid
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 30 of 47
5 4 3 2 1
 A B C D E

2 R655 1 0_0402_5%
+5VALW @

1 L54 1
U54 +USB_VCCA USB20R_N0 1 2 USB20_N0_C
1 2
1 8
2 GND OUT 7 USB20R_P0 4 3 USB20_P0_C
C707 2 10.1U_0402_16V4Z 3 IN OUT 6 4 3
USB_ON# 4 IN OUT 5 1 2 WCM-2012HS-900T
25,29 USB_ON# EN# OC# USB_OC0# 13
0_0402_5% R109
1 2 2 R654 1 0_0402_5%
USB_OCI#A 32
AP2301MPG-13 MSOP 8P 0_0402_5% R108 @
1 @
Low Active C710

2
@ 1000P_0402_50V7K
ESD
2 R652 1 0_0402_5% D14
@ USB20_N0_C 6 3 USB20_N1_C
L57 I/O4 I/O2
USB20_N1 1 2 USB20_N1_C
13 USB20_N1 1 2
+5VALW 5 2
USB20_P1 4 3 USB20_P1_C VDD GND
13 USB20_P1 4 3
WCM-2012HS-900T
USB20_P0_C 4 1 USB20_P1_C
2 1 I/O3 I/O1
2 R631@ 0_0402_5% AZC099-04S.R7G_SOT23-6 2
EMI request

USB30@
1 2
R885 0_0402_5%

WCM-2012-900T_0805
Left USB Conn.
USB30@ R886 1 2 0_0402_5% U3RXDN_A_R 1 2 U3RXDN_A_R_0 +USB_VCCA
32 U3RXDN_A 1 2 W=80mils JUSB2
1
USB30@ R887 1 2 0_0402_5% U3RXDP_A_R 4 3 U3RXDP_A_R_0 USB20_N1_C 2 1
32 U3RXDP_A 4 3 2
1 1 USB20_P1_C 3
L56 @ 4 3
C711 C712 4
USB30@ 1 2 470P_0402_50V7K 47U_0805_6.3V 5
R888 0_0402_5% 2 2 6 GND
1 2 7 GND
USB30@ R889 0_0402_5% 8 GND
GND
WCM-2012-900T_0805 OCTEK_USB-04APEB
USB30@ C767 2 1 0.1U_0402_16V7K U3TXDN_A 1 2 U3TXDN_A_R CONN@
32 U3TXDN_A_C 1 2

USB30@ C768 2 1 0.1U_0402_16V7K U3TXDP_A 4 3 U3TXDP_A_R

32 U3TXDP_A_C 4 3
L58 @
3 3
must to close to JUSB1 1 2
USB30@ R890 0_0402_5%

For USB3.0 ESD diode

D38
+USB_VCCA U3TXDP_A_R 1 1 10 9 U3TXDP_A_R
USB30@ R881 1 2 0_0402_5% USB20R_N0
W=80mils JUSB1
32 U2DN_A
1 U3TXDN_A_R 2 2 9 8 U3TXDN_A_R
USB30@ R883 1 2 0_0402_5% USB20R_P0 USB20_N0_C 2 VBUS
32 U2DP_A D-
1 1 USB20_P0_C 3 U3RXDP_A_R_0 4 4 7 7 U3RXDP_A_R_0
4 D+
5 GND U3RXDN_A_R_0 5 5
C714 C713 U3RXDN_A_R_0 6 6 U3RXDN_A_R_0
470P_0402_50V7K 47U_0805_6.3V U3RXDP_A_R_0 6 SSRX- 10
2 2 7 SSRX+ GND 11 3 3
U3TXDN_A_R 8 GND GND 12
R882 1 2 0_0402_5% USB20R_N0 U3TXDP_A_R 9 SSTX- GND 13 8
13 USB20_N0 SSTX+ GND
R884 1 2 0_0402_5% USB20R_P0 OCTEK_USB-09EAEB YSCLAMP0524P_SLP2510P8-10-9
13 USB20_P0
CONN@ USB30@

Co-lay

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P31-USB/BT/USBsub
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 31 of 47
A B C D E
 5 4 3 2 1

+3V +3V +1.2VUSB +3V +5VS

USB30@
R1705 1 2 4.7K_0402_5% USB_PESEL For WAKE Function
R1706 1 USB30@2 4.7K_0402_5% USB_PEPWRDET USB_PPON_A# R1707 1 @ 2 100K_0402_5%

2
R1708 1 @ 2 4.7K_0402_5% USB_TEST_EN USB30@ USB30@ @
USB_PEPWRDET USB_OCI R1709 1 @ 2 4.7K_0402_5% R1712 R1710 R1713
R1711 1 @ 2 4.7K_0402_5% USB_GPIO1 2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5%
R1714 1 @ 2 4.7K_0402_5% USB30_SMI# R1719 R1706 USB_PE_REXT 1 2 USB30@
R1716 1 @ 2 4.7K_0402_5% USB_GPIO2 USB_UREXT 1 2 USB30@

1
R1718 1 @ 2 4.7K_0402_5% USB_PESEL S1 Mount @ R1715 12.1K_0402_1% USB_PORST#_R
R1719 1 @ 2 4.7K_0402_5% USB_PEPWRDET R1717 12.1K_0402_1%
R1720 1 @ 2 4.7K_0402_5% CLKREQ_USB30# S3 @ Mount

1
R1721 1 USB30@2 4.7K_0402_5% USB_TEST_EN D USB30@
R1722 1 @ 2 4.7K_0402_5% USB_GPIO0 2 Q102
D D
G
S

3
@ C1637 USB30@

1
USB30_XT1 2 1 22P_0402_50V8J C SSM3K7002FU_SC70-3
2 2 Q103

2
USB30@ C1638 B MMBT3904_SOT23-3
15P_0402_50V8J E

3
1 @ USB30@

1
USB30_XT2 2 1 R1723
USB30@ Y8 C1639 1 2 10K_0402_5%
20MHZ_12PF_X5H020000FC1H-X 22P_0402_50V8J

Power Sequence USB_PESEL 1 2

+1.2VUSB @ C1640
ASM1042 R808 R825
0.1U_0402_16V4Z
Other applaction Mount @ +3V +1.2VUSB
+5V
Express Card/Mini Card @ Mount U90 USB30@
+3V
+1.2V_VTT USB_GPIO1 1 64 USB_GPIO0
USB30_SMI# 2 GPIO1 GPIO0 63
14 USB30_SMI# SMI# GND3
T1 PORST# USB_GPIO2 3 62 Close to ASM1042
1U_0402_6.3V6K @ C1641 USB_PESEL 4 GPIO2 VCC12_3 61 USB_PE_REXT +VDD33U
T2 1 2 USB_PEPWRDET 5 PE_SEL PE_REXT 60 +VDD33U
PE_RST# PE_PWRDET VCC33P
1 2 CLKREQ_USB30# 6 59 PCIE_DTX_PRX_N2 USB30@ C1642 2 1 0.1U_0402_16V7K
7 PE_CLKREQ# PE_TXN 58 PCIE_PRX_C_USBTX_N2 12
T184 PAD @ @ PCIE_DTX_PRX_P2 USB30@ C1643 2 1 0.1U_0402_16V7K
VCC33_1 PE_TXP PCIE_PRX_C_USBTX_P2 12
R1724 0_0402_5% USB_SPISCK 8 57
C USB_SPISI 9 SPI_CLK GNDA3 56 C
T1: 70~80ms SPI_DO PE_RXN PCIE_PTX_C_USBRX_N2 12
USB30@ R1725 4.7K_0402_5% USB_SPICS# 10 55
T2: >20ms 2 1 USB_SPISO 11 SPI_CS# PE_RXP 54 PCIE_PTX_C_USBRX_P2 12
+3V SPI_DI VDD12P +VDD12U
12 53 USB30_XT1
USB_PORST#_R 1 2 USB_PORST# 13 GND1 XI 52 USB30_XT2
USB30@ R1726 0_0402_5% T174PAD @ 14 PORST# XO 51
UART_RX PE_CLKN CLK_USB30# 12
USB30@ C1644 1U_0402_6.3V6K 2 1 T175PAD @ 15 50
16
17
UART_TX
VCC12_1 ASM1042 PE_CLKP
VCC12_4
49
48
+VDD12U
CLK_USB30 12

18 U2DN_B VDD12U_2 47 U3RXDN_A

U2DP_B (TQFN 64) U3RXN_A U3RXDN_A 31
+3V R1727 1 2 0_0402_5% +USB_3V3 19 46 U3RXDP_A
VSUS33_1 U3RXP_A U3RXDP_A 31
USB30@ 20 45
U2DN_A 21 VSUS12_1 GNDA2 44 U3TXDN_A_C
31 U2DN_A 22 U2DN_A U3TXN_A 43 U3TXDN_A_C 31
U2DP_A U3TXDP_A_C
31 U2DP_A 23 U2DP_A U3TXP_A 42 U3TXDP_A_C 31
USB30@ USB_UREXT
R1728 0_0402_5% 24 VSUS33_2 UREXT 41
13,24,27,29 FCH_PCIE_WAKE# PE_WAKE# VCC33U +VDD33U
T176PAD @ USB_PPON_A# 25 40
R1729 4.7K_0402_5% 26 PPON_A U3TXN_B 39
2 @ 1 USB_OCI#A 27 PPON_B U3TXP_B 38
+3V 31 USB_OCI#A OCI_A# GNDA1
USB_OCI 28 37
1 2 PLT_RST#_USB30 29 OCI_B# U3RXN_B 36
12,17,24,27 PLT_RST# PE_RST# U3RXP_B
USB30@ R1730 0_0402_5% USB_TEST_EN 30 35 +VDD12U
TEST_EN VDD12U_1 +VDD12U
1 31 34
C1645
@
32 VCC33_2
VCC12_2
VSUS12_2
GND2
33 +3VALW to +3V Transfer
0.1U_0402_16V4Z +3VALW +3V
2
+3V
65 U10
GND4
1

+1.2VUSB 3 1
0.2A
USB30@ R1731 USB30@ R1732
SYSON 4 VIN VOUT 5
29,34,39 SYSON VIN/CE VOUT
B 4.7K_0402_5% 4.7K_0402_5% ASM1042_TQFN64_9X9 B

100_0603_5%
USB30@ 2 USB30@
2

GND

R1786
U91
USB_SPICS# 1 8 1 1 RT9701-PB_SOT23-5
CS# VCC
22U_0805_6.3V6M

22U_0805_6.3V6M

3 6 USB_SPISCK USB30@ USB30@ USB30@

7 WP# SCLK 5
2 USB_SPISI C1646 C1647 1208 Add switch

1 2
USB30@ C1648 4 HOLD# SI 2 USB_SPISO
GND SO 2 2 D
2 C1649
0.1U_0402_16V4Z MX25L5121EMC-20G SOP 8P USB30@ SYSON# 2
1 34 SYSON#
Q112 G
0.1U_0402_16V4Z S

3
1 SSM3K7002FU_SC70-3
@ USB30@
USB_PPON_A# 1 @ 2 USB_PPON_A#_R 1 2
R1735 0_0402_5% C1650 1U_0402_6.3V6K

FBMA-L11-201209-221LMA30T_0805
+3VALW to +1.2V Transfer
+5VALW +3VALW
+VDD12U +1.2VUSB +5VALW +3VALW +1.2VUSB

1U_0603_10V6K~N

10U_0603_6.3V6M
C135

C134
USB30@ L121 1 1 1A U3 1A
1 2 +VDD12U 5 3
+1.2VUSB VIN VOUT
9 4
USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 6 VIN VOUT
1 2 2 VCNTL
10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

USB30@ C1651 C1652 C1653 C1654 C1655 C1656 C1657 C1658 C1659 C1660 C1661 C1662 2 1 7 2 2 1
R21 POK FB R91

10U_0603_6.3V6M
5.1K_0402_1% 8 1 10K_0402_1%
2 2 2 2 2 2 2 2 2 2 2 2 EN GND

C127
USB30@ USB30@ USB30@ USB30@ 1

2
APL5930KAI-TRG_SO8
USB30@ R32
20K_0402_1% USB30@
R107 1 2 2
A 29 USB30_EN USB30@ A
USB30@ 0_0402_5%

1
+VDD33U +3V
USB30@ L122
1 2 +VDD33U
+3V
FBMA-L11-201209-221LMA30T_0805 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1 USB30@ 1
10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

USB30@ C1667 C1668 C1669 C1670 C1671 C1672 C1673 C1674 C1675 C1676
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/10/1 Deciphered Date 2012/06/30 Title
2 2 2 2 2 2 2 2 2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P32-USB3.0
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 32 of 47
5 4 3 2 1
 ON/OFF switch Power Button
+3VALW

Fan Control Circuit

2
R495 +3VS +5VS

For SR 100K_0402_5%

2
@ 2

1
SW3 D12 R653 C701 1
SMT1-05-A_4P 2 10K_0402_5%
ON/OFF# 29
1 3 ON/OFFBTN# 1 2.2U_0603_106K C700
Top Side 3 U53 1
51_ON# 35 1000P_0402_50V7K

1
2 4 8 1 2
DAN202UT106_SC70-3 FAN_SPEED 7 GND EN 2 JFAN1
GND VIN
Change to SC600000B00 6 3 +5VS_FAN 1
6
5
5 GND VOUT 4 FAN_SPEED 2 1
2 1 GND VSET 29 FAN_SPEED 2

1
C773 C702 3
1000P_0402_50V7K APL5607KI-TRG_SO8 C703 3
1000P_0402_50V7K 10U_0603_6.3V6M 4

2
1 2 5 GND
GND

Bottom Side @ D 29 FAN_SET ACES_85204-0300N

1
SW4
SMT1-05-A_4P EC_ON 2 SSM3K7002FU_SC70-3 CONN@
14,29 EC_ON

2
1 3 G Q27
R496 S

3
2 4
10K_0402_5%
6
5

1
H19
H_3P2

JBTN1
4 ON/OFFBTN# @
3.2

1
4 3
3 PWR_LED# 27,29
2 +5VALW
2 1
1 H18 H17 H16 H15
5 H_4P2 H_4P2 H_4P2 H_4P2
G1
G2
E-T_6905K-Q04N-00R
6

@ @ @ @
4.2

1
2

CONN@

PJSOT24CH_SOT23-3
D21 H7 H6 H5 H4 H3 H2
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
1

@ @ @ @ @ @ @ 3.0

1
H27 H26 H12 H11 H20 H9
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0

@ @ @ @ @ @ 3.0

1
H24 H14
H10 H8 H1 H_6P0 H_6P0
H_2P5 H_2P5 H_2P5

2.5 @ @ 6.0

1
@ @ @

1
EMI H25 H22
H_3P8 H_3P8
H23
H_4P5X3P2
4.5X3.2 @ @
3.8

1
@

1
FD1 FD2 FD3 FD4

H21
H_3P3
1

FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80

@ 3.3

1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/20 Deciphered Date 2012/06/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P33-Other IO/USB (right)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 33 of 47
 A B C D E

+5VALW TO +5VS +5VALW

+5VALW
Change P/N SB00000GV00 +1.1VALW TO +1.1VS +5VALW
+5VS

2
U38 +1.1VALW +1.1VS

2
AO4478L 1N SO8 U39 R1108
8 1 AO4478L 1N SO8 R1111 100K_0402_5%
7 2 8 1 100K_0402_5%

2
6 3 1 1 7 2

1
1 1 5 C1446 R1101 6 3 1 1

1
1
C1443 C1445 150_0603_5% 1 5 C1447 VLDT_EN# SYSON#
32 SYSON#
10U_0603_6.3V6M C1444 R1104 C1448

1
10U_0603_6.3V6M 2 2 1K_0402_5% 10U_0603_6.3V6M C1449 SSM3K7002FU_SC70-3 D

1
1 2 2
10U_0603_6.3V6M 1U_0402_6.3V4Z 2 2 D 2 1
2 2 SSM3K7002FU_SC70-3 29,32,39 SYSON
+5VS_DISC 1U_0402_6.3V4Z 29 VLDT_EN G Q52

2
1

1
D 10U_0603_6.3V6M G Q51 S

3
SSM3K7002FU_SC70-3

1
2 SUSP S R1109

3
Q53 G 100K_0402_5%
1 2 5VS_GATE S R1107
+VSB

3
R1103 47K_0402_5% 1 2 1.1VS_GATE 10K_0402_5%
+VSB

2
1 R1105 47K_0402_5%

2
D
1

C1450
SUSP 2 Q55 +5VALW
1

1
G 0.1U_0603_25V7K D C1451
S 2 VLDT_EN# 2
3

2
SSM3K7002FU_SC70-3 G Q56 0.1U_0603_25V7K
SSM3K7002FU_SC70-3 S 2 R1116

3
100K_0402_5%

+3VALW TO +3VS

1
SUSP
11,41 SUSP
Change P/N SB00000GV00
+3VS

1
+3VALW SSM3K7002FU_SC70-3 D
U41 2
27,29,38,42 SUSP# Q59
AO4478L 1N SO8 G

1
8 1 S

3
7 2

2
6 3 1 1 R1115
1 1 5 C1452 R1110 10K_0402_5%
2 C1453 C1454 300_5%_0603 2

2
10U_0603_6.3V6M C1455
4

10U_0603_6.3V6M 2 2

1 1
2 2
10U_0603_6.3V6M 1U_0402_6.3V4Z +3VS_DISC
D
2 SUSP
G
2 1 3VS_GATE Q60 S SSM3K7002FU_SC70-3
+VSB
3

R1112 200K_0402_5%
1

D
1
SUSP2 C1456
G Q61
SSM3K7002FU_SC70-3 S 0.1U_0603_25V7K
3

+1.5VS
Q63
+1.5V SI2301CDS-T1-GE3_SOT23-3 +1.5VS

+5VALW
S

3 1
D
2

2
3 3
R1121 C1461 R1120
G
2

470_0603_5% R1119
100K_0402_5% 10U_0603_6.3V6M 100K_0402_5%
2
1

+1.5VS_DISC

1
VGA_PWR_ON#
23 VGA_PWR_ON#
1

D
SSM3K7002FU_SC70-3 2 SUSP
D D
1

1
R1122 Q65 G SSM3K7002FU_SC70-3
SUSP# 2 1 2 Q67 S 2
3

200K_0402_5% 1 G G Q68
23,41,44 VGA_PWR_ON

1
S S
3

3
C1463 SSM3K7002FU_SC70-3 R1123
0.1U_0603_25V7K 100K_0402_5%
2

2
+1.5V +0.75VS +1.1VS +VGA_CORE
2

R1135 R1137 R1128 R1126

470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%

4 4
1

+1.5V_DISC +0.75VS_DISC +1.1VS_DISC +VGA_CORE_DISC

1

D D D D
2 SYSON# 2 SUSP 2 VLDT_EN# 2 SUSP
G G G G
S SSM3K7002FU_SC70-3 S SSM3K7002FU_SC70-3 S SSM3K7002FU_SC70-3 S SSM3K7002FU_SC70-3 Security Classification Compal Secret Data Compal Electronics, Inc.
3

Q78 Q80 Q74 Q28 2010/08/20 2012/06/30 Title

Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P34-DC Interface
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA7323P
Date: Friday, March 04, 2011 Sheet 34 of 47
A B C D E
 A B C D

PL1
HCB2012KF-121T50_0805
PH1 under CPU botten side :
1 2
VIN CPU thermal protection at 92 +-3 degree C
PL2 Recovery at 80 +-3 degree C
HCB2012KF-121T50_0805
ADPIN 1 2 VL
PJPDC1
1
1

1000P_0402_50V7K

1000P_0402_50V7K
2

100P_0402_50V8J

100P_0402_50V8J
2

22K_0402_1%
1

2
PC1

PC2

PC3

PC4
3
1
3 PC5
1

2
4 0.1U_0603_16V7K

PR1
2
4
@ACES_88323-0471
X7R type

1
PU1
1 8 OTP_N_001
VCC TMSNS1
2 7 OTP_N_002 2 1
GND RHYST1
3 6 PR2 22.1K_0402_1%
OT1 TMSNS2

1
4 5
OT2 RHYST2

OTP_N_003
G718TM1U_SOT23-8 PH1
100K_0402_1%_NCP15WF104F03RC
PL3

2
HCB2012KF-121T50_0805
1 2

VMB PR4
PJP2
PL4 2 1
1 HCB2012KF-121T50_0805 VS_ON 37
1 2 1 2 0_0402_5%
2 BATT+
3
3 4
4 5 EC_SMCA
5

1
6 EC_SMDA
6
2

7 TS_A PC6 PC7

7 8 PR27 1000P_0402_50V7K 0.01U_0402_25V7K

2
8 9
@PJSOT24CW_SOT323-3

1K_0402_1%
9 10
G1
1

2
11 PD1 2
1

G2

@SUYIN_200275MR009G180ZR
2

PD2
2 3 1 +VSBP
B+
1

100K_0402_1%
3

0.22U_0603_25V7K

0.1U_0603_25V7K
1
PR28

1
PC8

PC9
PR10
100_0402_1% @PJSOT24CW_SOT323-3
1 2
EC_SMB_CK1 29

2
1 2

2
EC_SMB_DA1 29
PR31 PQ1
100_0402_1% VL PR12 TP0610K-T1-GE3_SOT23-3
PR29 22K_0402_1%
1 2 1 2 VSB_N_001
+3VALW

1 VSB_N_003
100K_0402_5% PR13
PR30 100K_0402_1%
1 2
BATT_TEMP 29
PR16

1
1K_0402_1% 0_0402_5% D
1 2VSB_N_002 2 PQ2
37,40 SPOK
3
G SSM3K7002FU_SC70-3 3

0.1U_0402_16V7K
S

3
1

PC10
2
VIN
2

PD3
PJ2
RLS4148_LL34-2
2 1
VS_N_001

+VSBP +VSB
1

2 1
@JUMP_43X39

2 1 (120mA,40mils ,Via NO.= 1)

BATT+
1

PD4
RLS4148_LL34-2 PQ3 PR17 PR18
TP0610K-T1-GE3_SOT23-368_1206_5% 68_1206_5%
2

N1 3 1
VS
1

PC12
PR21 PC11 0.1U_0603_25V7K
100K_0402_1% 0.22U_0603_25V7K
2

2
2

4 4

1 2 VS_N_002
33 51_ON#
PR22
22K_0402_1%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN / BATT CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 35 of 47
A B C D
 A B C D

10U_0805_25V6K
4.7U_0805_25V6-K
PL103
(B+ 6A,240mils ,Via NO.= 12) 1 2

1
PC128

PC129
B+ 1.2UH_1127AS-1R2N_2.4A_30%
B+

2
PQ101 P2 PQ102 P3 PR101 PL102 CHG_B+ PQ103
AO4435L_SO8 AO4409L_SO8 0.02_1206_1% @HCB2012KF-121T50_0805 AO4407AL 1P SO8
VIN 8
7
1
2
1
2
8
7
1 4 2 1 1
2
8
7
6 3 3 6 2 3 CSIN 3 6

10U_0805_25V6K
5 5

@10U_0805_25V6K
5

4.7U_0805_25V6-K

2200P_0402_25V7K
0.1U_0402_25V6
CSIP

4
1 1

1
PC103

PC104

PC125
VIN

PC105

PC106
CHG_N_005

5600P_0402_25V7K
PQ104 PR107 PR108

2
2
0.1U_0603_25V7K
DTA144EUA_SC70-3 200K_0402_1% 191K_0402_1% PR110

PC107
6251VDD 1 2 ACSETIN 47K_0402_1%

2
1

1000P_0402_50V7K
2 1 2

2.2U_0603_6.3V6K
1CHG_N_010

1
VIN

2
PC108

PC109
RB751V-40TE17_SOD323-2

2
PR109

1
PC110

14.3K_0402_1%
47K_0402_1% PD101 PR112
10K_0402_1%
2

PR111
1

CHG_VIN 1

1 CHG_N_008
1
CHG_N_003

2
CHG_N_001

PR113 PR115
2 PR114 ACSETIN 1 2 100K_0402_1%
PQ105 1 10K_0402_1% 1 2 CHG_N_001
DTC115EUA_SC70-3 2 1 PU101 10_1206_5% PC112

DCIN
29 FSTCHG 1U_0603_25V6K

100K_0402_1%
PR116 1 24 1 2
3

VDD DCIN

PR117
150K_0402_1% PQ106
6

DTC115EUA_SC70-3 2 CHG_N_006
2

2 23 ACPRN
PQ107A ACSET ACPRN PR118

2
2 20_0603_5%
3 CHG_N_002

1
3 22 CHG_CSON 1 2 D
SSM6N7002FU_US6 2S: Float 6251_EN CSON

3
EN CSON

1
PR130 PC113 PC114 2 ACPRN
3S: GND
1

0_0402_5% 0.047U_0603_16V7K @2200P_0402_25V7K G

1 2 4 21 CHG_CSOP 1 2 CSOP S PQ109

3
CELLS CSOP PR119 @SSM3K7002FU_SC70-3
PQ107B PC116 6800P_0402_25V7K 20_0603_5% PQ108
2
SSM6N7002FU_US6 1 2 CHG_ICOMP 5 20 CHG_CSIN 2 1 4 AON7408L_DFN8-5 2

ICOMP CSIN

2
PC118 PR120
CHG_N_009 5 PC117 PR121 10K_0402_1% 0.1U_0603_25V7K 20_0603_5%
1 2 1 2 CHG_VCOMP 6 19 CHG_CSIP 1 2

1
VCOMP CSIP PL101 PR102
4

3
2
1
0.01U_0402_25V7K PR123
1
100_0402_1%
2 CHG_ICM 7 18
PR122 10UH +-20% MSCDRI-104A-100M-E
1 2 1
0.02_1206_1%
4
BATT+
PR124 LX_CHG 2.2_0603_1% CHG
22K_0402_5% ICM PHASE

5
6
7
8
1 2 1 2 2 3

@4.7_1206_5%
PACIN PC120 must close EC pin.

1
8 17

10U_0805_25V6K

10U_0805_25V6K
PC120 6251VREF DH_CHG
VREF UGATE

PR125
0.1U_0402_16V7K PR126 PC121
29 ADP_I 0_0603_5% 0.1U_0603_25V7K

1
PC101

PC102
2 1 CHG_CHLIM 9 16 BST_CHG 1 2 BST_CHGA 2 1
29 IREF CHLIM BOOT
1

1
4

1 CHG_SNUB2
PR103 PR127 PD106
0.01U_0402_25V7K

2
150K_0402_1% 6251VREF 1 2 6251aclim 10 15 6251VDDP RB751V-40TE17_SOD323-2
ACLIM VDDP
1

226K_0402_1%
1

1
PC122

@680P_0402_50V7K
ACOFF 2 PQ111 PR104 Rtop 1 2 6251VDD
29 ACOFF

3
2
1
DTC115EUA_SC70-3 140K_0402_1% 11 14 DL_CHG
VADJ LGATE

PC124
PR129
2

PR128 4.7_0603_5%
2

20K_0402_1% CHG_VADJ 12 13 PC123 PQ110

3

2
GND PGND 4.7U_0805_6.3V6K AO4468L_SO8

ISL6251AHAZ-T QSOP 24P

PR105
10K_0402_1%
1 2
29 CHGVADJ
2

3
PR106 3

22K_0402_1%
1

6251VDD

PR133

1
10K_0402_1%
PR131 1 2
CP= 85%*Iada; 47K_0402_1% PR132 ACIN 29
10K_0402_1%
Iada=0~4.737A(90W);CP=4.03A;where Racdet=0.020ohm,where Rtop=12.4K PACIN

2
90W for Dis:Rtop:SD00000AJ80

1
Iada=0~3.421A(65W);CP=2.91A;where Racdet=0.020ohm,where Rtop=226K C

1
ACPRN 2 PQ112
65W for UMA:Rtop:SD034226380 B PR136
Astro2010_01_15 need confirm P/N E 20K_0402_1%

3
MMBT3904WH NPN SOT323-3

2
CP mode
Vaclim=VREF*(Rbot//Rinternal/(Rtop//Rinternal+Rbot//Rinternal))
when 90W Vaclim=2.39*(20K//152K/(20K//152K+12.4K//152K))=1.44966V
when 65W Vaclim=2.39*(20K//152K/(20K//152K+226K//152K))=0.38914V
Iinput=(1/Racdet)*((0.05*Vaclim/VREF+0.05))
when 90W,Iinput=(1/0.02)*(0.05*1.44966/2.39+0.05)=4.02A
4 when 65W,Iinput=(1/0.02)*(0.05*0.38914/2.39+0.05)=2.92A 4

CC=0.25A~3A CHGVADJ=(Vcell-4)/0.10627
IREF=1.016*Icharge Vcell CHGVADJ
IREF=0.254V~3.048V 4V 0V
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title
VCHLIM need over 95mV 4.2V 1.882V CHARGER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 36 of 47
A B C D
 A B C D E

2VREF_6182

1
1 1
PC308
1U_0603_16V6K

2
PR301 PR305
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2

PR302 PR306
B+ B++
20K_0402_1% 20K_0402_1%
1 2 FB_3V FB_5V 1 2 B++
PL301
HCB2012KF-121T50_0805

1 2 +3VLP

ENTRIP2

ENTRIP1
PR303 PR307
@680P_0402_50V7K

2200P_0402_50V7K

2200P_0402_50V7K

10U_0805_25V6K
0.1U_0402_25V6

0.1U_0402_25V6
133K_0402_1% 165K_0402_1%
1

1
4.7U_0805_25V6-K

1 2 1 2
1

1
PC322

PC309

PC310

PC311

PC312
PC304

PC306
PQ303
2

2
6

1
AON7408L_DFN8-5 PU301
2

5
ENTRIP2

FB2

TONSEL

FB1

ENTRIP1
REF
1
PC313 PQ305
4 10U_0805_6.3V6M 25 AON7408L_DFN8-5
P PAD

2
7 24 4
2 VO2 VO1 2

1
2
3
PC314 PR308 8 23 PR309 PC315
0.1U_0402_10V7K 2.2_0402_5% VREG3 PGOOD 2.2_0402_5% 0.1U_0402_10V7K
1 2 BST1_3V 1 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 1 2

3
2
1
BOOT2 BOOT1
PL303 UG_3V 10 21 UG_5V PL305
4.7UH_FMJ-0630T-4R7 HF_5.5A_20% UGATE2 UGATE1 4.7UH_FMJ-0630T-4R7 HF_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1

8
7
6
5

5
6
7
8

1
4.7_1206_5%

4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PR312

PQ304

SKIPSEL

PR313
VREG5
1
PR314 1

GND

VIN
+

NC
PC303 499K_0402_1%

EN
2

2
150U_B2_6.3VM_R35M 4 1 2 4 + PC305
B++ SPOK 35,40
150U_B2_6.3VM_R35M
1 SNUB_3V

SNUB_5V
13

14

15

16

17

18
2 RT8205LZQW(2) WQFN 24P PWM
EN0 2
AO4468L_SO8 PQ306
1
2
3

3
2
1
680P_0402_50V7K

680P_0402_50V7K
VL AO4406AL_SO8

1
PC316

PC317
PR315
95.3K_0402_1% PC320
2

1U_0603_10V6K

2
1
PC318
4.7U_0805_10V6K

2
1
B++
PC319

2
3 0.1U_0603_25V7K 3

2VREF_6182
ENTRIP1

ENTRIP2
6

D D
PQ307A 2 N_3_5V_001 5 PQ307B
SSM6N7002FU_US6 G G SSM6N7002FU_US6 +3VLP +CHGRTC
PJP302
S S 2 1
1

PAD-OPEN 2x2m
PJP306
1 2 (5A,200mils ,Via NO.= 10)
+5VALWP +5VALW
1 2
VL PAD-OPEN 4x4m VL
35 VS_ON
1

PR317 PJP305 PJP301

100K_0402_5% 1 2 (5A,200mils ,Via NO.= 10) 2 1
+5VALWP +5VALW
PAD-OPEN 2x2m
1 2 2 PAD-OPEN 4x4m
VS PJP303
42.2K_0402_1%

2.2U_0603_10V6K

PR319 PQ308 1 2 +3VALW (4A,120mils ,Via NO.= 8)

+3VALWP
1

100K_0402_1% DTC115EUA_SC70-3
1
PR320

PC321

PAD-OPEN 4x4m
2
2

4 4

EC:+3VL, reserve PR319, install PR318, PR320 100K

EC:+3VALW, reserve PR318, install PR319, PR320 42.2K Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LAXXXX 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 37 of 47
A B C D E
 A B C D

1 1

PL402
PU401 PL401 <Vo=1.8V> VFB=0.6V

4
+5VALW HCB1608KF-121T30_0603 1UH_PCMC063T-1R0MN_11A_20%
1 2 1.8VSP_VIN 10 2 1.8VSP_LX 1 2 Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V

PG
PVIN LX +1.8VSP
9 3

68P_0402_50V8J
PVIN LX

1
4.7_1206_5%
1

1
PC404
PC403 8
SVIN

PR403
22U_0805_6.3VAM PR401
6 1.8VSP_FB 20K_0402_1%
2

2
5 FB

22U_0805_6.3VAM

22U_0805_6.3VAM
2

2
EN

1
NC

NC
TP

PC401

PC402
27,29,34,42 SUSP#

11

2
SNUB_1.8VSP
2
1 2 EN_1.8VSP 2

1
1

@0.1U_0402_10V7K
PR404 0_0402_5%

PC405
SY8033BDBC_DFN10_3X3 PR402

1
PR405 10K_0402_1%
@47K_0402_5%

2
680P_0402_50V7K
2

1
PC406

2
PJP401
1 2 (4A, 160mils, Via NO.= 8)
+1.8VSP +1.8VS

PAD-OPEN 3x3m
3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.8VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 38 of 47
A B C D
 5 4 3 2 1

D D

1.5V_B+
PR503 PL502 B+
2 1 EN_1.5V HCB1608KF-121T30_0603
29,32,34 SYSON 2 1
0_0402_5% PC505

1
@0.1U_0402_10V7K

@680P_0402_50V7K
10U_0805_25V6K

2200P_0402_50V7K
@4.7U_0805_25V6-K

0.1U_0402_25V6

PC502
2

PC507
PC503

PC504

PC506

2
PR504

2
2.2_0402_5%
BST_1.5V 1 2BST1_1.5V 1 2
4
PC508
0.1U_0402_10V7K

15

14
1
PU501 PQ501
PR506 AON7408L_DFN8-5

EN/DEM

NC

BOOT

3
2
1
255K_0402_1% +1.5VP
1 2TON_1.5V 2 13 UG_1.5V PL501
C TON UGATE 2.2UH_PCMC063T-2R2MN_8A_20% C

+1.5VP 3 12 LX_1.5V 1 2
VOUT PHASE
+5VALW +5VALW 1 2 V5FILT_1.5V 4 11 TRIP_1.5V 1 PR508 2 15.4K_0402_1%
VDD CS

@4.7_1206_5%
PR507 PR501

5
6
7
8

1
+1.5VP 1 2 FB_1.5V 5 10 +5VALW +5VALW 1
100_0402_1% FB VDDP

PR509
1

1
2.21K_0402_1% 6 9 LG_1.5V PQ502 + PC501
PGOOD LGATE

PGND
PC509 PC510 FDS6690AS-G_SO8 220U_6.3VM_R15
GND
1

4.7U_0603_10V6K 4.7U_0805_10V6K
2

2
PR502 4 2
2.15K_0402_1%

1SNUB_1.5V
7

8
RT8209MGQW_WQFN14_3P5X3P5

@680P_0402_50V7K
2

3
2
1

PC511
2
B PJP502 B
1 2

@PAD-OPEN 4x4m
PJP501
1 2 +1.5V (8A,320mils ,Via NO.= 16)
+1.5VP
@PAD-OPEN 4x4m

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 2008/05/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.5VP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LAXXXX 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 39 of 47
5 4 3 2 1
 5 4 3 2 1

D D
1.1V_B+
PR703 PL702 B+
2 1 EN_1.1V HCB1608KF-121T30_0603
35,37 SPOK 2 1
0_0402_5% PC704

1
@0.1U_0402_10V7K

10U_0805_25V6K

2200P_0402_50V7K
@4.7U_0805_25V6-K

0.1U_0402_25V6
1

1
PC702

PC703

PC705

PC706
PR704

2
2.2_0402_5% 2

2
BST_1.1V 1 2 BST1_1.1V 1 2
4
PC707
0.1U_0402_10V7K

15

14
1
PU701 PQ701
PR705 AON7408L_DFN8-5

EN/DEM

NC

BOOT

3
2
1
255K_0402_1% +1.1VALWP
1 2TON_1.1V 2 13 UG_1.1V PL701
TON UGATE 1UH_PCMC063T-1R0MN_11A_20%
+1.1VALWP 3 12 LX_1.1V 1 2
VOUT PHASE PR708 15K_0402_1%
+5VALW +5VALW 1 2 V5FILT_1.1V 4 11 TRIP_1.1V 1 2
VDD CS

@4.7_1206_5%
PR701

5
6
7
8

1
PR707 1 2 5 10 +5VALW +5VALW 1
FB VDDP

2
PR709
100_0603_1% +1.1VALWP FB_1.1V PQ702
1

1
4.64K_0402_1% 6 9 LG_1.1V PR706 + PC701
PGOOD LGATE
1

PGND
C PC708 PC709 FDS6690AS-G_SO8 @100K_0402_5% 220U_6.3VM_R15 C

GND
4.7U_0603_6.3V6M PR702 4.7U_0805_10V6K
2

2
10K_0402_1% 4 2

1
RT8209MGQW_WQFN14_3P5X3P5

1SNUB_1.1V
7

8
2

@680P_0402_50V7K
3
2
1

PC710
2
PJP701
1 2 +1.1VALW (8A,320mils ,Via NO.=16)
+1.1VALWP
PAD-OPEN 4x4m

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR+1.1VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LAXXXX
Date: Friday, March 04, 2011 Sheet 40 of 47
5 4 3 2 1
 5 4 3 2 1

+1.1VALW TO +1.05VSP
+1.1VALW +1.05VSP_L

+1.5V PQ601
IRF8707GTRPBF_SO8
8 1
PU601 7 2
1 8 6 3
VIN NC +3VALW

1
5
2 7 PC602 PC608
GND NC

1
D 1U_0402_6.3V6K 4.7U_0603_6.3V6K D

2
1
PC601 3 6 PC609
VREF VCNTL

1
4.7U_0805_6.3V6K 4.7U_0603_6.3V6K PR603

2
PR601 4 5 PC603 +VSB1 1 2
VOUT NC +VSB
1K_0402_1% 1U_0603_10V6K 47K_0402_5%

1
9

PC607
0.1U_0402_25V6
2
TP

1
APL5336KAI-TRL_SOP8P8 PR605 D PQ603

2
VREF_G2992 330K_0402_5% 2 SUSP
G
S
+0.75VSP

0.1U_0402_16V7K

3
1
PQ602 SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3

1
PR604 D +3VALW
PR602

1
2 10.75VS_N_002 2 1K_0402_1%
11,34 SUSP G PC605

2
2
10U_0805_6.3V6M

PC604
S

2
0_0402_5% PR606

1
@100K_0402_1%

6
D

1
PC606 2 +1.05VSP_N001
2 @0.1U_0402_10V7K G

PQ604A S

3
@SSM6N7002FU_US6 D PR607
5 +1.05VSP_N002 2 1
G VGA_PWRGD 12,42,44
@0_0402_5%

1
PQ604B S

4
@SSM6N7002FU_US6
PC610

2
@0.1U_0402_10V7K
C PJP601 C
1 2 +0.75VS (2A,80mils ,Via NO.= 4)
+0.75VSP
PJP602
PAD-OPEN 3x3m
1 2 (5A,200mils ,Via NO.=10)
+1.05VSP_L +1.05VS
PAD-OPEN 4x4m

Need to confirm with HW power sequence.

+5VALW
+1.5VP
1U_0603_10V6K
1

PC612

+3VS
2
4.7U_0805_6.3V6K
1

PU602 APL5930KAI-TRG_SO8
1

6
PC611

PR608 5 VCNTL 3
VIN VOUT +1.0VSP
@1K_0402_1% 9 4
VIN VOUT
1
2

B PR610 B
2

1
8 1.82K_0402_1%

180P_0402_50V8J

22U_0805_6.3V6M
PR609 7 EN 2
PC614

PC615
GND

100K_0402_1% POK FB
2

2
1 2
23,34,44 VGA_PWR_ON
2

PD601
1
1

1SS355_SOD323-2
1

1 2 PC613
0.1U_0402_16V7K PR611
2

7.32K_0402_1%
2

PJP603
1 2 +1.0VSG (2.5A,100mils ,Via NO.= 5)
+1.0VSP

PAD-OPEN 3x3m

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2006/11/23 Deciphered Date 2007/11/23 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR 0.75VSP +1.05VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LAXXXX 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 41 of 47
5 4 3 2 1
 A B C D

1 1

PL802
PL801

4
+5VALW @ HCB1608KF-121T30_0603 PU802 @ 1UH_PCMC063T-1R0MN_11A_20%
1 2 1.05VSP_VIN 10 1 1.05VSP_LX 1 2

PG
PVIN LX +1.05VSP
9 2

68P_0402_50V8J
PVIN LX

1
4.7_1206_5%
1

1
PC804
PC803 8 3
SVIN LX

PR803
@ 22U_0805_6.3VAM PR801
12,41,44 VGA_PWRGD PR806 6 1.05VSP_FB @ 7.5K_0402_1%

2
1 2 5 FB

22U_0805_6.3VAM

22U_0805_6.3VAM
2

2
EN

1
SS
TP

PC801

PC802
@ 0_0402_5% @
27,29,34,38 SUSP# @

SNUB_1.05VSP
11

2
2
1 2 EN_1.05VSP 2

1
1

0.1U_0402_10V7K
@ PR804 0_0402_5%

PC805
@ SY8035DBC_DFN10_3X3 PR802

1
PR805 @ 10K_0402_1% @ @
@ 47K_0402_5%

2
680P_0402_50V7K
2

PC806
@

2
@

PJP801
1 2 (5A,200mils ,Via NO.=10)
+1.05VSP +1.05VS

3
@ PAD-OPEN 4x4m 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/01/23 Deciphered Date 2010/01/23 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.8VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS NCL61 LA-6321P M/B 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 42 of 47
A B C D
 5 4 3 2 1

PR226
PC235 PC236 100_0402_5%
68P_0402_50V8J 470P_0402_50V8J 2 1
1 2 1 2 +APU_CORE 7
2 1
PR231 PR232 PR230 APU_VDD0_RUN_FB_H 5
D D
47K_0402_1% 10K_0402_1% PC239 0_0402_5%

2
COMP 1 2 1 2 @68P_0402_50V8J
+5VS

2
PR234

1
PC237 PC238 0_0402_5%
@68P_0402_50V8J @68P_0402_50V8J 2 1

1
APU_VDD0_RUN_FB_L 5

2
PR252
10K_0402_1% 2 1
FB PR236
100_0402_5%

1
RGND
CPU_B+
+5VS

2
PL205

2
PR253 PC253 PR256 HCB2012KF-121T50_0805
7.15K_0402_1% 0.01U_0402_25V7K 10K_0402_1% 2 1
B+

1
ISP1

1
+3VS PR247
ISN1 1_0402_5%

PC247

PC248

2200P_0402_50V7K
1 1

0.1U_0402_25V6

2200P_0402_50V7K
4.7U_0805_25V6-K
2
PR245

10U_0805_25V6K
2
2

1
PC230 110K_0402_1% PQ206 + +
1

1
OCSET

ISN0
ISP0
TON
PR254 TON 1 2 AON7408L_DFN8-5

@ PC246

PC244

PC245

PC249
0.1U_0402_25V6

@68U_25V_M_R0.44

@68U_25V_M_R0.44
1
@10K_0402_1%

PC243

2
2 2

2
1
PC250 2
1

+5VS PR248 0.1U_0402_25V6

41

40

39

38

37

36

35

34

33

32

31
PU201 2.2_0603_5% 4

2
BOOT0 2 1 2 1

ISP0

ISN0

ISP1

ISN1

BOOT1
GND

TON

RGND
OCSET

FB

COMP
29 VR_ON

1
PC234 PC240
2

0.01U_0402_25V7K PR250 0.22U_0603_10V7K

PR208 2_0603_5% UGATE0 PL204

3
2
1
100K_0402_1% 0.47UH_MMD-06CZ-R47M-V1_17.5A_20%
1

C 1 2 RBIAS 1 30 PHASE0 1 2 +APU_CORE C

2
RBIAS UGATE1

5
6
7
8

1
PR237 ENABLE 2 29 PR249
@51_0402_1% EN PHASE1 PQ205 4.7_1206_5% (14A, 560mils, via no = 28)

PVCC

1
1 2 3 28 PC252 AO4726L_SO8

1SNUB_CPU
PR241 @51_0402_1% SVC PGND1 1U_0603_10V6K
1 2 4 27 PR221
+1.5V

680P_0603_50V7K
2

2
SVD LGATE1 0_0402_5% LGATE0 4
PR227 5 26 1 2 PR242
1 2 PWORK RT8870AZQW_WQFN40_5X5 PVCC 2.43K_0402_1%
+CPU_CORE
5 APU_SVC 0_0402_5% PR238 PGOOD 6 25 LGATE0 1 2 Imax=7.7A
1 2 PGOOD LGATE0 PR244

PC251
3
2
1

2
5 APU_SVD 0_0402_5% VFIX/DRPSEL 7
VFIX/DRPSEL PGND0
24 2.43K_0402_1% Ipeak=11A
1 2 1 2 1 2
13 FCH_PWROK PR233 @0_0402_5% 8 23 PHASE0 Iocp(minimum)=13.2A
1 2 OCSET_NB PHASE0 ISP0 PC242
12 H_PWRGD_L
OCSET_NB
VCC 9 22 UGATE0 0.1U_0402_25V6
DCR=4.2mohm
VCC UGATE0
13,29 VGATE
PR235 0_0402_5%
10 21 BOOT0 ISN0 1
PR246
2
Rdson = 7mohm
FB_NB BOOT0
UGATE_NB
PHASE_NB
LGATE_NB
2

+5VS
COMP_NB

RGND_NB

PGND_NB

BOOT_NB

0_0402_5%

2
TON_NB

PR255 10uF_0603 * 7
ISN_NB
ISP_NB
FB_NB

10K_0402_1% PC241
0.1U_0402_25V6 1uF_0402 * 4

1
+5VS
0.1uF_0402 * 5
1

11

12

13

14

15

16

17

18

19

20

180P_0402 * 2
2

PR228 PR229 +3VS 390uF * 3

10K_0402_1% 33K_0402_1% PR202
UGATE_NB
PHASE_NB
LGATE_NB
COMP_NB

RGND_NB

Reserve 330uF * 2
BOOT_NB

2_0603_5%
TON_NB

ISN_NB
ISP_NB

CPU_B+
1

VFIX/DRPSEL
1

PC203
OCSET_NB 1U_0603_10V6K

1
PR207

10U_0805_25V6K

0.1U_0402_25V6

2200P_0402_50V7K
2

@4.7U_0805_25V6-K
1_0402_5%
PQ202 1
0.01U_0402_25V7K

0.01U_0402_25V7K
2

1
B B
PR205 AON7408L_DFN8-5

PC205

PC204

PC206

PC211
2

5
PR239 PR240 TON_NB 2 1
PC231

PC232

1 2
5.1K_0402_1% 22K_0402_1% 130K_0402_1%

2
2
1

PC215
1

0.1U_0402_25V6

2
BOOT_NB 2 1 2 1 4
PR206
2.2_0603_5% PC216
0.22U_0603_10V7K (10A, 400mils, via no = 20)
UGATE_NB

3
2
1
PL202
PR219 PC225 PC226 PHASE_NB 1 2
+APU_CORE_NB

1
100_0402_5% 470P_0402_50V8J 68P_0402_50V8J 1UH_MMD-06CZ-1R0M-V1_11A_20%

4.7_1206_5%
5
6
7
8
1 2 1 2 1 2 COMP_NB
+CPU_CORE_NB

PR210
7 +APU_CORE_NB
2

PR220
0_0402_5%
PR222
10K_0402_1%
PR223
47K_0402_1%
PC227
@68P_0402_50V8J
PQ203
AO4468L_SO8
1 Imax=7A
1

1SNUB_NB2
1 2 1 2 1 2 + PC218 Ipeak=10A

680P_0603_50V7K
5 APU_VDDNB_RUN_FB_H LGATE_NB 4 220U_6.3VM_R15
Iocp(minimum)=12A
2

FB_NB PR213
2

PC228 2K_0402_1% 2
PC229 @68P_0402_50V8J 2 1 DCR=10mohm

PC220
1

PR224 @68P_0402_50V8J PR251 Rdson = 22mohm

1

3
2
1
0_0402_5% 8.2K_0402_1% PC222

2
1 2 RGND_NB 1 2 1 2
5 APU_VDD0_RUN_FB_L
PR225 ISP_NB
1 2 0.1U_0402_25V6
10uF_0603 * 6
PR217
100_0402_5% ISN_NB 2 1 1uF_0402 * 5
0.1uF_0402 * 4
2

0_0402_5%
PC223 180P_0402 * 2
0.1U_0402_25V6 390uF * 1
1

A Reserve 390uF A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LAXXXX
Date: Friday, March 04, 2011 Sheet 43 of 47
5 4 3 2 1
 A B C D

PR922
0_0402_5%
1 1 2 EN_VGA PL902 1
23,34,41 VGA_PWR_ON
HCB1608KF-121T30_0603
VGA_B+ 1 2 B+

@680P_0402_50V7K
0.1U_0402_25V6

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2200P_0402_50V7K
1

PC908
1

1
PC906

PC903

PC904

PC907
PC905
@0.1U_0402_10V7K

2
2

2
5
6
7
8
+5VALW
1+5VALW

BST_VGA 1 2BST1_VGA 1 2

PR907 PC909
2.2_0402_5% 0.1U_0402_10V7K 4
PR908

15

14
1
316_0402_1% PU901
PR909 PQ901

EN/DEM

NC

BOOT
255K_0402_1% NTMS4816NR2G_SO8
2

3
2
1
Need to close PC901 1 2 TON_VGA 2 13 UG_VGA PL901
TON UGATE 0.56UH +-20% PCMC104T-R56MN 25A
+VGA_CORE 3 12 LX_VGA 1 2 +VGA_CORE
VOUT PHASE
V5FILT_VGA 4 11 TRIP_VGA 1 2
VDD CS

390U_2.5V_M

4.7U_0805_6.3V6K
PR905 1
+VGA_COREP1 1 2 FB_VGA 5 10 1 2 +5VALW 11K_0402_1%
FB VDDP

1
+

PC901

PC902
2 PR901 PR923 PR912 2
1

1
2K_0402_1% 6 9 0_0402_5% PC911 @4.7_1206_5%
PGOOD LGATE

PGND
PC910 4.7U_0805_10V6K

GND

2
1U_0603_10V6K +3VS 2
2

1SNUB_VGA
LG_VGA 4

8
1
RT8209BGQW_WQFN14_3P5X3P5

@680P_0402_50V7K
1

PR911
0.1U_0402_10V7K

PR914 100K_0402_1%
2

100_0402_5% PQ906 (14A, 560mils, via no = 28)

PC912

PC913
3
2
1
TPCA8059-H_PPAK56-8-5
2
2

2
VGA_PWRGD 12,41,42
+VGA_CORE

PR902
10K_0402_1%

20 GCORE_SEN
2

PR914 pin2 trace need to close VGA chipset

MLCC.(remote sense)
PC912 pin1 trace need to close PC901. (local +3VS
PR916 PR917
sense.) 10K_0402_5% 15K_0402_1%
1 2 N_VGA_001 2 1 N_VGA_003
3
GPU_VID1 GPU_VID0 +VGA_CORE 3
6

PQ903A PC914 PQ903B

0.022U_0402_16V7K SSM6N7002FU_US6
SSM6N7002FU_US6 1 1 0.9V
2

2
18 GPU_VID1

5
PR903
1

10.5K_0402_1%
0 1 1.05V
1
1

1 2 N_VGA_004 3 4
PR918 PR919
10K_0402_5% PR920
10K_0402_5% 15K_0402_1%
0 0 1.1V
2

N_VGA_002 2 1 N_VGA_005
2

PC915 PQ904B
5

PQ904A 0.022U_0402_16V7K PR904 SSM6N7002FU_US6

SSM6N7002FU_US6 30.1K_0402_1%
2

2 1 2 N_VGA_006 3 4
18 GPU_VID0
1

PR921
10K_0402_5%
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/05/29 Deciphered Date 200810/11 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA_CORE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LAXXXX 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 44 of 47
A B C D
 5 4 3 2 1

Version change list (P.I.R. List) Power section Page 1 of 1

Item Reason for change PG# Modify List Date Phase

1

2
D D

C C

B B

A A

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2008/09/15 Deciphered Date 2010/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Changed-List History
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
LA-4902P 0.22
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 45 of 47
5 4 3 2 1
 5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1 for PWR

Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase

DFB request 0.11 PG#10 change JLVDS1 connector to 40 pin and add JCM1 6pin 12/17 ER
1
D D
EC remove ext crystal 0.11 PG#29 Add R1787 and C1677 12/17 ER
2
PG#30
DFB request for soldering 0.11 PG#33 Change JTP1 and JBTN1 footprint 12/17 ER
3
4 JUSB2 no function 0.11 PG#31 Update JUSB2 symbol 12/17 ER

LID issue 0.11 PG#13 R930 change to pop 12/17 ER

5
LID issue 0.11 PG#29 LID_SW# added a pull up 10Kohm. (R35) 12/17 ER
6
Update Broad ID 0.11 PG#29 Change R1606 to 154Kohm 12/17 ER
7
for BIOS crisis 0.12 PG#14 Add U11 12/17 ER
8
DDR3 SPD 0.12 PG#8 Reserve R152 , R155 12/17 ER
9
C C
For discharge spec 0.13 PG#24 Add R1788 and Q113 discharge schematic 12/17 ER
10
For EMI test 0.2 PG#11 Remove Level Shifter schematic 12/17 ER
11
PG#16 Pop R594 and R602 , unpop R601 and R550
BIOS change to share ROM 0.2 PG#29 change U48 meterial 12/17 ER
12
Fix S3 resume black screen 0.21 PG#6 Add R1790 , R1791 68ohm pull down 02/18 PR
13
DFX request 0.21 PG#11 Update JDIMM2 fooprint 02/18 PR
14
Fix S3 resume too long 0.21 PG#18 Add R1795 1M ohm 02/18 PR
15
PG#29
Fix assembly issue 0.21 Update JKB1 and JAU1 footprint for ME connector 02/18 PR
16 PG#25

EMI request 0.22 PG#11 pop L11~L14 02/22 PR

17
B B
18

19

20

21

22

23

24

25
A A
26

27
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/09/30 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW-PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-7323P 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 46 of 47
5 4 3 2 1
 5 4 3 2 1

POWER SEQUENCE

ACIN/BATT-IN

+5VALW/+3VALW/+1.1VALW

D
EC_RSMRST# D

T>20ms

PBTN_OUT# EC to FCH

FCH to EC
SLP_S5#

SLP_S3# FCH to EC

Delay SLP_S5# 10mS

SYSON

+1.5V

Delay SLP_S3# 10ms

SUSP#

+5VS/+3VS/+1.8VS

C C

+1.05VS/+0.75VS

VLDT_EN Delay SUSP# 10ms

+1.1VS

VGA_ON Delay SUSP# 10ms

1.5_VDDC_PWREN AND from VGA_ON & PX_EN

+VGA_CORE/+1.5VSG

+1.8VSG/+1.0VSG
T<20ms +3VSG to +1.0VSG power up

VGA_PWRGD

VR_ON VGA_ON Delay 20ms

B B

+APU_CORE/+APU_CORE_NB

VGATE

EC_PWROK

PLT_RST#

A A

Security Classification Compal Secret Data

Issued Date 2010/09/30 Deciphered Date 2010/12/31 Title
Power Sequence
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-7323P 0.22
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, March 04, 2011 Sheet 47 of 47
5 4 3 2 1