Q.
1 Attempt any FOUR 08 Marks CO
1. Draw block diagram of op-amp. Name each block. 401.1
2. Draw equivalent circuit diagram of op-amp. 401.1
3. Draw pin diagram of op-amp IC 741. 401.1
4. Draw circuit diagram of basic differentiator. State output voltage equation. 401.2
5. Draw circuit diagram of basic Integrator. State output voltage equation. 401.2
6. Draw circuit diagram of Unity gain amplifier. State output voltage equation. 401.2
Q.2 Attempt any THREE 12 Marks
1. Define following parameters of op-amp-( any 4) 401.1
1) Input offset current 2) Input bias current 3) Output offset voltage
4) CMRR 5) Slew rate 6) Gain bandwidth product
2. Draw closed loop inverting amplifier. Derive output voltage equation. 401.2
3. Draw inverting summing amplifier. Derive output voltage equation for summing, 401.2
scaling and average amplifier.
4. Draw and explain V to I converter with grounded load. 401.3
5. Draw instrumentation amplifier using 2-opamp. Derive output voltage equation. 401.3
JAYAWANT SHIKSHAN PRASARAK MANDAL’s Set A
Bhivrabai Sawant Polytechnic
(Approved by AICTE, New Delhi, Govt. of Maharashtra, Affiliated to MSBTE
Mumbai)
Gat No. 720 (1&2), Wagholi, Pune-Nagar Road, Pune-412207)
Phone: 020 – 65335100 Tele fax: - + 91-020-65335100
E-mail:
[email protected] Website: www.jspm.edu.in
Unit Test-1
Academic Year 2021-22
Course: Linear Integrated Circuits Course Code: -22423
Semester: IV Time: - 1 Hrs.
Marks: - 20 Chapter: 1 & 2
Date:
Instructions:
1. All questions are compulsory.
2. Illustrate your answers with neat sketches wherever necessary.
3. Figures to the right indicate full marks.
4. Assume suitable data if necessary.
5. Preferably, write the answers in sequential order.
JAYAWANT SHIKSHAN PRASARAK MANDAL’s
Bhivrabai Sawant Polytechnic
(Approved by AICTE, New Delhi, Govt. of Maharashtra, Affiliated to MSBTE
Mumbai)
Gat No. 720 (1&2), Wagholi, Pune-Nagar Road, Pune-412207)
Phone: 020 – 65335100 Tele fax: - + 91-020-65335100
E-mail:
[email protected] Website: www.jspm.edu.in
Unit Test-1
Academic Year 2021-22
Course: Linear Integrated Circuits Course Code: -22423
Semester: IV Time: - 1 Hrs.
Marks: - 20 Chapter: 1 &2
Date:
Instructions:
1. All questions are compulsory.
2. Illustrate your answers with neat sketches wherever necessary.
3. Figures to the right indicate full marks.
4. Assume suitable data if necessary.
5. Preferably, write the answers in sequential order.
Q.1 Attempt any FOUR 08 Marks CO
1. Draw symbol of op-amp. Explain Inverting and Non-inverting input terminal of op- 401.1
amp.
2. Draw Pin diagram of LM IC 324. 401.3
3. Explain Concept of Virtual short. 401.1
4. Draw circuit diagram of basic differentiator. State output voltage equation. 401.2
5. Draw pin diagram of op-amp IC 741. 401.2
6. How will you convert Non-inverting amplifier into voltage follower. 401.2
Q.2 Attempt any THREE 12 Marks
1. Define following parameters of op-amp- ( any 4) 401.1
1) input offset current 2) input bias current 3) output offset voltage
4) CMRR 5) slew rate 6)Gain bandwidth product
2. Draw closed loop Non-inverting amplifier. Derive output voltage equation. 401.2
3. Draw inverting summing amplifier. Derive output voltage equation for summing, 401.2
scaling and average amplifier.
4. Draw I to V converter and derive output equation. 401.3
5. Draw instrumentation amplifier using 2-opamp. Derive output voltage equation. 401.3
JAYAWANT SHIKSHAN PRASARAK MANDAL’s Set C
Bhivrabai Sawant Polytechnic
(Approved by AICTE, New Delhi, Govt. of Maharashtra, Affiliated to MSBTE
Mumbai)
Gat No. 720 (1&2), Wagholi, Pune-Nagar Road, Pune-412207)
Phone: 020 – 65335100 Tele fax: - + 91-020-65335100
E-mail:
[email protected] Website: www.jspm.edu.in
Unit Test-1
Academic Year 2021-22
Course: Linear Integrated Circuits Course Code: -22423
Semester: IV Time: - 1 Hrs.
Marks: - 20 Chapter: 1& 2
Date:
Instructions:
1. All questions are compulsory.
2. Illustrate your answers with neat sketches wherever necessary.
3. Figures to the right indicate full marks.
4. Assume suitable data if necessary.
5. Preferably, write the answers in sequential order.
Q.1 Attempt any FOUR 08 Marks CO
1. Draw pin diagram of op-amp IC 747. 401.1
2. Draw equivalent circuit diagram of op-amp. 401.1
3. Explain Concept of Virtual Ground. 401.2
4. Draw circuit diagram of basic differentiator. State output voltage equation 401.2
5. Suggest and draw circuit which converts square wave form into triangular waveform. 401.2
6. Draw circuit diagram instrumentation amplifier using 3-opamp. State output voltage 401.3
equation.
Q.2 Attempt any THREE 12 Marks
1. Define following parameters of op-amp- ( any 4) 401.1
1) input offset current 2) input bias current 3) output offset voltage
4) CMRR 5) slew rate 6)Gain bandwidth product
2. Design Non-inverting amplifier with the gain of 11. 401.2
3. Draw inverting summing amplifier. Derive output voltage equation for summing, 401.2
scaling and average amplifier.
4. Draw V to I converter with floating load. And derive output equation. 401.3
5. Draw instrumentation amplifier using 2-opamp. Derive output voltage equation. 401.3
JAYAWANT SHIKSHAN PRASARAK MANDAL’s Set A
Bhivrabai Sawant Polytechnic
(Approved by AICTE, New Delhi, Govt. of Maharashtra, Affiliated to MSBTE
Mumbai)
Gat No. 720 (1&2), Wagholi, Pune-Nagar Road, Pune-412207)
Phone: 020 – 65335100 Tele fax: - + 91-020-65335100
E-mail:
[email protected] Website: www.jspm.edu.in
Unit Test-2
Academic Year 2021-22
Course: Linear Integrated Circuits Course Code: -22423
Semester: IV Time: - 1 Hrs.
Marks: - 20 Chapter: 1
Date:
Instructions:
1. All questions are compulsory.
2. Illustrate your answers with neat sketches wherever necessary.
3. Figures to the right indicate full marks.
4. Assume suitable data if necessary.
5. Preferably, write the answers in sequential order.
Q.1 Attempt any FOUR 08 Marks CO
1. Draw circuit diagram and input output waveforms of positive peak detector. 401.3
2. Design 2nd order LPF with cutoff frequency of 20KHz. 401.4
3. Draw block diagram of IC 565. 401.5
4. Draw pin diagram of IC 555 401.5
5. 401.5
Define Lock range , Capture range in PLL
6. Draw and explain Narrow BPF with its frequency response. 401.4
Q.2 Attempt any THREE 12 Marks
1. Draw and explain VCO using IC 555. 401.3
2. Draw and explain sample and hold circuit using op-amp. 401.3
3. Draw and explain RC phase shift oscillator and its frequency of oscillation. 401.4
4. Draw and explain Hartley oscillator. 401.4
5. Draw and explain Astable multivibrator using IC555. 401.5
6. Draw block diagram of PLL as a FM demodulator. Explain function of each
block. 401.5
JAYAWANT SHIKSHAN PRASARAK MANDAL’s Set B
Bhivrabai Sawant Polytechnic
(Approved by AICTE, New Delhi, Govt. of Maharashtra, Affiliated to MSBTE
Mumbai)
Gat No. 720 (1&2), Wagholi, Pune-Nagar Road, Pune-412207)
Phone: 020 – 65335100 Tele fax: - + 91-020-65335100
E-mail:
[email protected] Website: www.jspm.edu.in
Unit Test-2
Academic Year 2021-22
Course: Linear Integrated Circuits Course Code: -22423
Semester: IV Time: - 1 Hrs.
Marks: - 20 Chapter: 1
Date:
Instructions:
1. All questions are compulsory.
2. Illustrate your answers with neat sketches wherever necessary.
3. Figures to the right indicate full marks.
4. Assume suitable data if necessary.
5. Preferably, write the answers in sequential order.
Q.1 Attempt any FOUR 08 Marks CO
1. Draw circuit diagram and input output waveforms of positive comparator. 401.3
2. Draw and explain 2ndorder HPF with its frequency response. 401.4
3. Draw block diagram of IC 555. 401.5
4. Draw pin diagram of IC 555 401.5
5. 401.5
Define Lock range , Capture range in PLL
6. Draw and explain Narrow BRF with its frequency response.(Notch Filter) 401.4
Q.2 Attempt any THREE 12 Marks
1. Draw and explain Schmitt trigger with op-amp with input output waveform. 401.3
2. Draw and explain sample and hold circuit using op-amp. 401.3
3. Draw and explain Wein bridge oscillator and its frequency of oscillation. 401.4
4. Draw and explain Colpitts oscillator. 401.4
5. Design bistable multivibrator for time period of 5ms. 401.5
6. Draw block diagram of PLL as a FM demodulator. Explain function of each
block. 401.5
JAYAWANT SHIKSHAN PRASARAK MANDAL’s Set C
Bhivrabai Sawant Polytechnic
(Approved by AICTE, New Delhi, Govt. of Maharashtra, Affiliated to MSBTE
Mumbai)
Gat No. 720 (1&2), Wagholi, Pune-Nagar Road, Pune-412207)
Phone: 020 – 65335100 Tele fax: - + 91-020-65335100
E-mail:
[email protected] Website: www.jspm.edu.in
Unit Test-2
Academic Year 2021-22
Course: Linear Integrated Circuits Course Code: -22423
Semester: IV Time: - 1 Hrs.
Marks: - 20 Chapter: 1
Date:
Instructions:
1. All questions are compulsory.
2. Illustrate your answers with neat sketches wherever necessary.
3. Figures to the right indicate full marks.
4. Assume suitable data if necessary.
5. Preferably, write the answers in sequential order.
Q.1 Attempt any FOUR 08 Marks CO
1. Draw circuit diagram and input output waveforms of negative comparators. 401.3
2. Draw and explain 1nd order LPF with its frequency response. 401.4
3. Draw block diagram of IC 555. 401.5
4. Draw pin diagram of IC 555 401.5
5. 401.5
Define cutoff frequency, roll off rate of filter.
6. Draw and explain wide BPF with its frequency response.(Notch Filter) 401.4
Q.2 Attempt any THREE 12 Marks
1. Draw and explain Schmitt trigger with op-amp with input output waveform. 401.3
2. Draw and explain sample and hold circuit using op-amp. 401.3
3. Draw and explain RC phase shift oscillator. 401.4
4. Draw and explain Colpitts oscillator. 401.4
5. Draw and explain bistable multivibrator using IC555. 401.5
6. Draw block diagram of PLL as multiplier. Explain function of each block.
401.5
