CHAPTER

8 BJT Small-Signal
Analysis
8.1 INTRODUCTION
The transistor models introduced in Chapter 7 will now be used to perform a small-
signal ac analysis of a number of standard transistor network configurations. The net-
works analyzed represent the majority of those appearing in practice today. Modifi-
cations of the standard configurations will be relatively easy to examine once the
content of this chapter is reviewed and understood.
Since the re model is sensitive to the actual point of operation, it will be our pri-
mary model for the analysis to be performed. For each configuration, however, the
effect of an output impedance is examined as provided by the hoe parameter of the
hybrid equivalent model. To demonstrate the similarities in analysis that exist between
models, a section is devoted to the small-signal analysis of BJT networks using solely
the hybrid equivalent model. The analysis of this chapter does not include a load re-
sistance RL or source resistance Rs. The effect of both parameters is reserved for a
systems approach in Chapter 10.
The computer analysis section includes a brief description of the transistor model
employed in the PSpice software package. It demonstrates the range and depth of the
computer analysis systems available today and how relatively easy it is to enter a com-
plex network and print out the desired results.

8.2 COMMON-EMITTER FIXED-BIAS

CONFIGURATION
The first configuration to be analyzed in detail is the common-emitter fixed-bias net-
work of Fig. 8.1. Note that the input signal Vi is applied to the base of the transistor
while the output Vo is off the collector. In addition, recognize that the input current
Ii is not the base current but the source current, while the output current Io is the col-
lector current. The small-signal ac analysis begins by removing the dc effects of VCC
and replacing the dc blocking capacitors C1 and C2 by short-circuit equivalents, re-
sulting in the network of Fig. 8.2.
Note in Fig. 8.2 that the common ground of the dc supply and the transistor emit-
ter terminal permits the relocation of RB and RC in parallel with the input and output
sections of the transistor, respectively. In addition, note the placement of the impor-
tant network parameters Zi, Zo, Ii, and Io on the redrawn network. Substituting the re
model for the common-emitter configuration of Fig. 8.2 will result in the network of
Fig. 8.3.

338
 VCC

RC
RB Io
C Vo
C Vo
Ii Ii Io
C2 B
B Vi
Vi
Zo RC
C1 Zo
RB E
E Zi
Zi

Figure 8.1 Common-emitter fixed-bias con- Figure 8.2 Network of Figure 8.1 following
figuration. the removal of the effects of VCC, C1, and C 2.

Ii Ib Ic

+Z b c +
i Io

Vi Vo
RB β re β Ib ro RC
Figure 8.3 Substituting the re – –
model into the network of Fig. Zo
8.2.

The next step is to determine , re, and ro. The magnitude of  is typically ob-
tained from a specification sheet or by direct measurement using a curve tracer or
transistor testing instrument. The value of re must be determined from a dc analysis
of the system, and the magnitude of ro is typically obtained from the specification
sheet or characteristics. Assuming that , re, and ro have been determined will result
in the following equations for the important two-port characteristics of the system.
Zi: Figure 8.3 clearly reveals that
Zi  RBre ohms (8.1)
For the majority of situations RB is greater than re by more than a factor of 10
(recall from the analysis of parallel elements that the total resistance of two parallel
resistors is always less than the smallest and very close to the smallest if one is much
larger than the other), permitting the following approximation:

Zi  re ohms (8.2)

RB10re
Zo: Recall that the output impedance of any system is defined as the impedance
Zo determined when Vi  0. For Fig. 8.3, when Vi  0, Ii  Ib  0, resulting in an
open-circuit equivalence for the current source. The result is the configuration of
Zo
Fig. 8.4.
ro RC
Zo  RCro ohms (8.3)

If ro  10 RD, the approximation RCro  RC is frequently applied and

Zo  RC (8.4) Figure 8.4 Determining Zo for

ro10RC the network of Fig. 8.3.

8.2 Common-Emitter Fixed-Bias Configuration 339

 Av: The resistors ro and RC are in parallel,
and Vo  Ib(RC ro)
Vi
but Ib  
rc

 
Vi
so that Vo    (RC ro)
re

Vo (RC ro)
and Av     (8.5)
Vi re

If ro  10RC,

RC
Av   (8.6)
re ro10RC

Note the explicit absence of  in Eqs. (8.5 and 8.6), although we recognize that 
must be utilized to determine re.
Ai: The current gain is determined in the following manner: Applying the cur-
rent-divider rule to the input and output circuits,
(ro)(Ib) Io ro
Io   and   
ro  RC Ib ro  RC
(RB)(Ii) Ib RB
with Ib   or   
RB  re Ii RB  re
The result is
ro
     
Io Io Ib RB
Ai        
Ii Ib Ii ro  RC RB  re

Io RBro
and Ai     (8.7)
Ii (ro  RC)(RB  re)

which is certainly an unwieldy, complex expression.

However, if ro  10RC and RB  10re, which is often the case,
Io RBro
Ai    
Ii (ro)(RB)

and Ai   (8.8)
ro10RC, RB10re

The complexity of Eq. (8.7) suggests that we may want to return to an equation such
as Eq. (7.10), which utilizes Ao and Zi. That is,

Zi
Ai  Av (8.9)
RC

Phase Relationship: The negative sign in the resulting equation for Av reveals
that a 180° phase shift occurs between the input and output signals, as shown in Fig.
8.5.

340 Chapter 8 BJT Small-Signal Analysis

 VCC

Vo
RC
RB
Vi Vo 0 t

0 t Vi

Figure 8.5 Demonstrating the

180° phase shift between input
and output waveforms.

For the network of Fig. 8.6: EXAMPLE 8.1

(a) Determine re.
(b) Find Zi (with ro   ).
(c) Calculate Zo (with ro   ).
(d) Determine Av (with ro   ).
(e) Find Ai (with ro   ).
(f) Repeat parts (c) through (e) including ro  50 k in all calculations and compare
results.

12 V

3 kΩ
470 kΩ Io
Ii Vo
10 µ F
Vi
10 µ F β = 100 Zo
ro = 50 kΩ
Zi
Figure 8.6 Example 8.1.

Solution
(a) DC analysis:
VCC  VBE 12 V  0.7 V
IB      24.04 A
RB 470 k
IE  (  1)IB  (101)(24.04 A)  2.428 mA
26 mV 26 mV
re      10.71 
IE 2.428 mA
(b) re  (100)(10.71 )  1.071 k
Zi  RBre  470 k1.071 k  1.069 k
(c) Zo  RC  3 k
RC 3 k
(d) Av      280.11
re 10.71 
(e) Since RB  10re(470 k
10.71 k)
Ai    100

8.2 Common-Emitter Fixed-Bias Configuration 341

 (f) Zo  roRC  50 k3 k  2.83 k vs. 3 k
roRC 2.83 k
Av      264.24 vs. 280.11
re 10.71 
RBro (100)(470 k)(50 k)
Ai    
(ro  RC)(RB  re) (50 k  3 k)(470 k  1.071 k)
 94.13 vs. 100
As a check:
Zi (264.24)(1.069 k)
Ai  Av   3 k  94.16
RC
which differs slightly only due to the accuracy carried through the calculations.

8.3 VOLTAGE-DIVIDER BIAS

The next configuration to be analyzed is the voltage-divider bias network of Fig. 8.7.
Recall that the name of the configuration is a result of the voltage-divider bias at the
input side to determine the dc level of VB.

VCC

Io

RC
R1
C Vo
Ii C2
B
Vi
C1 Zo

E
Zi R2
RE CE

Figure 8.7 Voltage-divider bias

configuration.

Substituting the re equivalent circuit will result in the network of Fig. 8.8. Note
the absence of RE due to the low-impedance shorting effect of the bypass capacitor,
CE. That is, at the frequency (or frequencies) of operation, the reactance of the ca-
pacitor is so small compared to RE that it is treated as a short circuit across RE. When
Ii
b Ib c

+ Io +
Zi
Vi R1 R2 β re β Ib ro RC Vo

– e e Zo –

R'

Figure 8.8 Substituting the re equivalent circuit into the ac equivalent network of Fig. 8.7.

342 Chapter 8 BJT Small-Signal Analysis

VCC is set to zero, it places one end of R1 and RC at ground potential as shown in Fig.
8.8. In addition, note that R1 and R2 remain part of the input circuit while RC is part
of the output circuit. The parallel combination of R1 and R2 is defined by

R1R2
R  R1R2   (8.10)
R1  R2

Zi: From Fig. 8.8,

Zi  Rre (8.11)

Zo: From Fig. 8.8 with Vi set to 0 V resulting in Ib  0 A and Ib  0 mA,

Zo  RC ro (8.12)

If ro  10RC,

Zo  RC (8.13)
ro10RC

Av : Since RC and ro are in parallel,

Vo  (Ib)(RC ro)
Vi
and Ib  
re

 
Vi
so that Vo    (RC ro)
re

Vo RC ro
and Av     (8.14)
Vi re

which you will note is an exact duplicate of the equation obtained for the fixed-bias
configuration.
For ro  10RC,

Vo RC
Av     (8.15)
Vi re
ro10RC

Ai: Since the network of Fig. 8.8 is so similar to that of Fig. 8.3 except for the
fact that R  R1R2  RB, the equation for the current gain will have the same for-
mat as Eq. (8.7). That is,

Io Rro
Ai     (8.16)
Ii (ro  RC)(R  re)

For ro  10RC,
Io Rro
Ai    
Ii ro(R  re)

Io R
and Ai     (8.17)
Ii R  re
ro10RC

8.3 Voltage-Divider Bias 343

 And if R  10re,
Io R
Ai    
Ii R

Io
and Ai     (8.18)
Ii
ro10RC, R10re
As an option,

Zi
Ai  Av (8.19)
RC
Phase relationship: The negative sign of Eq. (8.14) reveals a 180° phase shift
between Vo and Vi.

EXAMPLE 8.2 For the network of Fig. 8.9, determine:

(a) re.
(b) Zi.
(c) Zo (ro   ).
(d) Av (ro   ).
(e) Ai (ro   ).
(f) The parameters of parts (b) through (e) if ro  1/hoe  50 k and compare re-
sults.

22 V

Io

6.8 kΩ
56 kΩ 10 µF
Vo
10 µ F
Vi β = 90 Zo

Ii

8.2 kΩ
Zi
1.5 kΩ 20 µ F

Figure 8.9 Example 8.2.

Solution
(a) DC: Testing RE
10R2
(90)(1.5 k)
10(8.2 k)
135 k
82 k (satisfied)
Using the approximate approach,
R2 (8.2 k)(22 V)
VB   VCC    2.81 V
R1  R2 56 k  8.2 k
VE  VB  VBE  2.81 V  0.7 V  2.11 V

344 Chapter 8 BJT Small-Signal Analysis

 VE 2.11 V
IE      1.41 mA
RE 1.5 k
26 mV 26 mV
re      18.44 
IE 1.41 mA
(b) R  R1R2  (56 k)(8.2 k)  7.15 k
Zi  R re  7.15 k(90)(18.44 )  7.15 k1.66 k
 1.35 k
(c) Zo  RC  6.8 k
RC 6.8 k
(d) Av       368.76
re 18.44 
(e) The condition R  10re (7.15 k  10(1.66 k)  16.6 k is not
satisfied. Therefore,
R (90)(7.15 k)
Ai     7.15 k  1.66 k  73.04
R  re
(f) Zi  1.35 k
Zo  RCro  6.8 k50 k  5.98 k vs. 6.8 k
RC ro 5.98 k
Av      324.3 vs. 368.76
re 18.44 
The condition
ro  10RC (50 k  10(6.8 k)  68 k)
is not satisfied. Therefore,
Rro (90)(7.15 k)(50 k)
Ai  
(ro  RC)(R  re)  
(50 k  6.8 k)(7.15 k  1.66 k)
 64.3 vs. 73.04
There was a measurable difference in the results for Zo, Av, and Ai because the
condition ro  10RC was not satisfied.

8.4 CE EMITTER-BIAS CONFIGURATION

The networks examined in this section include an emitter resistor that may or may
not be bypassed in the ac domain. We will first consider the unbypassed situation and
then modify the resulting equations for the bypassed configuration.

Unbypassed
The most fundamental of unbypassed configurations appears in Fig. 8.10. The re
equivalent model is substituted in Fig. 8.11, but note the absence of the resistance ro.
The effect of ro is to make the analysis a great deal more complicated, and consider-
ing the fact that in most situations its effect can be ignored, it will not be included in
the current analysis. However, the effect of ro will be discussed later in this section.
Applying Kirchhoff’s voltage law to the input side of Fig. 8.11 will result in
Vi  Ibre  Ie RE
or Vi  Ibre  (  1)IbRE

8.4 CE Emitter-Bias Configuration 345

 VCC Ii
b c
Ib
+ +
RC β re β Ib
RB Zi Io
Io
Vo Zb Zo
Ii C2 Vi RB RC Vo
Vi e
C1 Ie = ( β + 1)Ib
Zo RE
RE
– –
Zi

Figure 8.10 CE emitter-bias configuration. Figure 8.11 Substituting the re equivalent circuit into the ac equivalent net-
work of Fig. 8.10.

and the input impedance looking into the network to the right of RB is
Vi
Zb    re  (  1)RE
Ib

re β The result as displayed in Fig. 8.12 reveals that the input impedance of a transis-
tor with an unbypassed resistor RE is determined by

Zb Zb  re  (  1)RE (8.20)

RE
Since  is normally much greater than 1, the approximate equation is the following:
Zb  re  RE
Figure 8.12 Defining the input
impedance of a transistor with an and Zb  (re  RE) (8.21)
unbypassed emitter resistor.
Since RE is often much greater than re, Eq. (8.21) can be further reduced to

Zb  RE (8.22)

Zi: Returning to Fig. 8.11, we have

Zi  RBZb (8.23)

Zo: With Vi set to zero, Ib  0 and Ib can be replaced by an open-circuit equiv-
alent. The result is

Zo  RC (8.24)

Av :
Vi
Ib  
Zb
and Vo  Io RC  IbRC

 
Vi
   RC
Zb

Vo RC
with Av     (8.25)
Vi Zb

346 Chapter 8 BJT Small-Signal Analysis

Substituting Zb  (re  RE) gives

Vo RC
Av     (8.26)
Vi re  RE

and for the approximation Zb  RE,

Vo RC
Av     (8.27)
Vi RE

Note again the absence of  from the equation for Av.

Ai: The magnitude of RB is often too close to Zb to permit the approximation
Ib  Ii. Applying the current-divider rule to the input circuit will result in

RBIi
Ib  
RB  Zb
Ib RB
and   
Ii RB  Zb
In addition, Io  Ib
Io
and   
Ib
Io Io Ib
so that Ai     
Ii Ib Ii
RB
  
RB  Zb
Io RB
and Ai     (8.28)
Ii RB  Zb

Zi
or Ai  Av (8.29)
RC

Phase relationship: The negative sign in Eq. (8.25) again reveals a 180° phase
shift between Vo and Vi.
Effect of ro: The equations appearing below will clearly reveal the additional
complexity resulting from including ro in the analysis. Note in each case, however,
that when certain conditions are met, the equations return to the form just derived.
The derivation of each equation is beyond the needs of this text and is left as an ex-
ercise for the reader. Each equation can be derived through careful application of the
basic laws of circuit analysis such as Kirchhoff’s voltage and current laws, source
conversions, Thévenin’s theorem, and so on. The equations were included to remove
the nagging question of the effect of ro on the important parameters of a transistor
configuration.
Zi:

(  1)  RC /ro

Zb  re  1
 (RC  RE)/ro RE  (8.30)

8.4 CE Emitter-Bias Configuration 347

 Since the ratio RC/ro is always much less than (  1),

(  1)RE
Zb  re  
1  (RC  RE)/ro
For ro  10(RC  RE),

Zb  re  (  1)RE

which compares directly with Eq. (8.20).

In other words, if ro  10(RC  RE), all the equations derived earlier will result.
Since   1  , the following equation is an excellent one for most applications:

Zb  (re  RE) (8.31)

ro10(RCRE)
Zo:
(ro  re)


Zo  RC ro  
re
1  
RE
 (8.32)

However, ro

re, and



Zo  RC ro 1  
re
1  
RE

which can be written as

 
1
Zo  RC ro 1  
1 re
  
 RE

Typically 1/ and re/RE are less than one with a sum usually less than one. The
result is a multiplying factor for ro greater than one. For   100, re  10 , and
RE  1 k:

1 1 1
      50
1 re 1 10  0.02
     
 RE 100 1000 
and Zo  RC 51ro

which is certainly simply RC. Therefore,

Zo  RC (8.33)
Any level of ro

which was obtained earlier.

Av :

RC
 
re RC
 1    
Vo Zb ro ro
Av     R (8.34)
Vi 1  
C
ro

348 Chapter 8 BJT Small-Signal Analysis

 re
The ratio   1
ro
RC RC
  
Zb ro
Vo 
and Av    RC
Vi 1  
ro

For ro  10RC,

Vo RC
Av     (8.35)
Vi Zb
ro10RC

as obtained earlier.
Ai: The determination of Ai will be left to the equation

Zi
Ai  Av (8.36)
RC
using the above equations.

Bypassed
If RE of Fig. 8.10 is bypassed by an emitter capacitor CE, the complete re equivalent
model can be substituted resulting in the same equivalent network as Fig. 8.3. Eqs.
(8.1 through 8.9) are therefore applicable.

For the network of Fig. 8.13, without CE (unbypassed), determine:

(a) re.
EXAMPLE 8.3
(b) Zi.
20 V
(c) Zo.
(d) Av.
(e) Ai. Io

2.2 kΩ
10 µ F
470 kΩ
Vo
C2
10 µ F Zo
Vi β = 120, ro = 40 kΩ
Ii C1

Zi 0.56 kΩ CE
10 µ F

Figure 8.13 Example 8.3.

Solution
VCC  VBE 20 V  0.7 V
(a) DC: IB      35.89 A
RB  (  1)RE 470 k  (121)0.56 k
IE  (  1)IB  (121)(46.5 A)  4.34 mA
26 mV 26 mV
and re      5.99 
IE 4.34 mA

8.4 CE Emitter-Bias Configuration 349

 (b) Testing the condition ro  10(RC  RE),
40 k  10(2.2 k  0.56 k)
40 k  10(2.76 k)  27.6 k (satisfied )
Therefore,
Zb  (re  RE)  120(5.99   560 )
 67.92 k
and Zi  RB Zb  470 k67.92 k
 59.34 k
(c) Zo  RC  2.2 k
(d) ro  10RC is satisfied. Therefore,
Vo RC (120)(2.2 k)
Av      
Vi Zb 67.92 k
 3.89
compared to 3.93 using Eq. (8.27): Av  RC/RE.
59.34 k
 
Zi
(e) Ai  Av   (3.89) 
RC 2.2 k
 104.92
compared to 104.85 using Eq. (8.28): Ai  RB/(RB  Zb).

EXAMPLE 8.4 Repeat the analysis of Example 8.3 with CE in place.

Solution
(a) The dc analysis is the same, and re  5.99 .
(b) RE is “shorted out” by CE for the ac analysis. Therefore,
Zi  RBZb  RBre  470 k(120)(5.99 )
 470 k718.8   717.70 
(c) Zo  RC  2.2 k
RC
(d) Av  
re
2.2 k
   367.28 (a significant increase)
5.99 
RB (120)(470 k)
(e) Ai    
RB  Zb 470 k  718.8 
 119.82

EXAMPLE 8.5 For the network of Fig. 8.14, determine (using appropriate approximations):
(a) re.
(b) Zi.
(c) Zo.
(d) Av.
(e) Ai.

350 Chapter 8 BJT Small-Signal Analysis

 16 V

Io

2.2 kΩ
90 kΩ

+
C2
Vi β = 210, ro = 50 kΩ
Ii C1
Zo
Vo
Zi 10 kΩ
0.68 kΩ CE

–
Figure 8.14 Example 8.5.

Solution
(a) Testing RE
10R2
(210)(0.68 k)
10(10 k)
142.8 k
100 k (satisfied)
R2 10 k
VB   VCC   (16 V)  1.6 V
R1  R2 90 k  10 k
VE  VB  VBE  1.6 V  0.7 V  0.9 V
VE 0.9 V
IE      1.324 mA
RE 0.68 k
26 mV 26 mV
re      19.64 
IE 1.324 mA
(b) The ac equivalent circuit is provided in Fig. 8.15. The resulting configuration is
now different from Fig. 8.11 only by the fact that now

RB  R  R1R2  9 k

Ii +
+ Io
Zo
Zi 2.2 kΩ Vo
Vi 10 kΩ 90 kΩ
0.68 kΩ
– –

R'

Figure 8.15 The ac equivalent circuit of Fig. 8.14.

The testing conditions of ro  10 (RC  RE) and ro  10RC are both satisfied. Using
the appropriate approximations yields
Zb  RE  142.8 k
Zi  RBZb  9 k142.8 k
 8.47 k

8.4 CE Emitter-Bias Configuration 351

 (c) Zo  RC  2.2 k
RC 2.2 k
(d) Av      3.24
RE 0.68 k
8.47 k
 
Zi
(e) Ai  Av  (3.24) 
RC 2.2 k
 12.47

EXAMPLE 8.6 Repeat Example 8.5 with CE in place.

Solution
(a) The dc analysis is the same, and re  19.64 .
(b) Zb  re  (210)(19.64 )  4.12 k
Zi  RBZb  9 k4.12 k
 2.83 k
(c) Zo  RC  2.2 k
RC 2.2 k
(d) Av      112.02 (a significant increase)
re 19.64 k
2.83 k
 
Zi
(e) Ai  Av  (112.02) 
RL 2.2 k
 144.1

Another variation of an emitter-bias configuration appears in Fig. 8.16. For the dc

analysis, the emitter resistance is RE1  RE2, while for the ac analysis, the resistor RE
in the equations above is simply RE1 with RE2 bypassed by CE.

VCC

Io
RC
RB C2
Vo
C1
Vi

Ii

RE Zo
1
Zi

Figure 8.16 An emitter-bias

RE CE configuration with a portion of
2
the emitter-bias resistance by-
passed in the ac domain.

8.5 EMITTER-FOLLOWER
CONFIGURATION
When the output is taken from the emitter terminal of the transistor as shown in Fig.
8.17, the network is referred to as an emitter-follower. The output voltage is always
slightly less than the input signal due to the drop from base to emitter, but the ap-

352 Chapter 8 BJT Small-Signal Analysis

 VCC

RB C
Ii
B
Vi
C1 C2
E Vo
Io
Zi RE

Zo Figure 8.17 Emitter-follower

configuration.

proximation Av  1 is usually a good one. Unlike the collector voltage, the emitter
voltage is in phase with the signal Vi. That is, both Vo and Vi will attain their posi-
tive and negative peak values at the same time. The fact that Vo “follows” the mag-
nitude of Vi with an in-phase relationship accounts for the terminology emitter-
follower.
The most common emitter-follower configuration appears in Fig. 8.17. In fact, be-
cause the collector is grounded for ac analysis, it is actually a common-collector con-
figuration. Other variations of Fig. 8.17 that draw the output off the emitter with Vo 
Vi will appear later in this section.
The emitter-follower configuration is frequently used for impedance-matching pur-
poses. It presents a high impedance at the input and a low impedance at the output,
which is the direct opposite of the standard fixed-bias configuration. The resulting ef-
fect is much the same as that obtained with a transformer, where a load is matched
to the source impedance for maximum power transfer through the system.
Substituting the re equivalent circuit into the network of Fig. 8.17 will result in
the network of Fig. 8.18. The effect of ro will be examined later in the section.

Ii
b c
Ib
+
β re β Ib

Zi
Vi RB

e
+
Io

Zb Zo Vo
RE
Figure 8.18 Substituting the re
– Ie = ( β + 1) Ib – equivalent circuit into the ac
equivalent network of Fig. 8.17.

Zi: The input impedance is determined in the same manner as described in the
preceding section:

Zi  RBZb (8.37)

with Zb  re  (  1)RE (8.38)

8.5 Emitter-Follower Configuration 353

 or Zb  (re  RE) (8.39)

and Zb  RE (8.40)

Zo: The output impedance is best described by first writing the equation for the
current Ib:
Vi
Ib  
Zb
and then multiplying by (  1) to establish Ie. That is,
Vi
Ie  (  1)Ib  (  1) 
Zb
Substituting for Zb gives
(  1)Vi
Ie  
re  (  1)RE
Vi
or Ie  
[re/(  1)]  RE
but (  1)  
re re
and     re
1 
Vi
so that Ie   (8.41)
re  RE
re
If we now construct the network defined by Eq. (8.41), the configuration of Fig.
Vo
8.19 will result.
+ Ie
To determine Zo, Vi is set to zero and
Vi RE
Zo
– Zo  REre (8.42)

Since RE is typically much greater than re, the following approximation is often ap-
Figure 8.19 Defining the out- plied:
put impedance for the emitter-fol-
lower configuration.
Zo  re (8.43)

Av: Figure 8.19 can be utilized to determine the voltage gain through an appli-
cation of the voltage-divider rule:

REVi
Vo  
RE  re

Vo RE
and Av     (8.44)
Vi RE  re

Since RE is usually much greater than re, RE  re  RE and

Vo
Av    1 (8.45)
Vi

354 Chapter 8 BJT Small-Signal Analysis

 Ai: From Fig. 8.18,
RBIi
Ib  
RB  Zb
Ib RB
or   
Ii RB  Zb
and Io  Ie  (  1)Ib
Io
or   (  1)
Ib
Io Io Ib
so that Ai     
Ii Ib Ii
RB
 (  1) 
RB  Zb
and since (  1)  ,
RB
Ai   (8.46)
RB  Zb

Zi
or Ai  Av  (8.47)
RE

Phase relationship: As revealed by Eq. (8.44) and earlier discussions of this

section, Vo and Vi are in phase for the emitter-follower configuration.
Effect of ro:
Zi:
(  1)RE
Zb  re   RE (8.48)
1  
ro

If the condition ro  10RE is satisfied,

Zb  re  (  1)RE

which matches earlier conclusions with

Zb  (re  RE) (8.49)

ro10RE
Zo:
re
Zo  ro RE   (8.50)
(  1)

Using   1  ,

Zo  roREre

and since ro

re,

Zo  RE re (8.51)
Any ro

8.5 Emitter-Follower Configuration 355

 Av:
(  1)RE/Zb
Av   RE (8.52)
1  
ro

If the condition ro  10RE is satisfied and we use the approximation   1  ,

RE
Av  
Zb
But Zb  (re  RE)
RE
so that Av  
(re  RE)
RE
and Av   (8.53)
re  RE
ro10RE

EXAMPLE 8.7 For the emitter-follower network of Fig. 8.20, determine:

(a) re.
(b) Zi.
(c) Zo.
(d) Av.
(e) Ai.
(f) Repeat parts (b) through (e) with ro  25 k and compare results.

12 V

220 kΩ
10 µ F
Vi β = 100, ro = ∞ Ω

Ii 10 µ F
Vo

Io

Zi 3.3 kΩ

Zo

Figure 8.20 Example 8.7.

Solution
VCC  VBE
(a) IB  
RB  (  1)RE
12 V  0.7 V
   20.42 A
220 k  (101)3.3 k
IE  (  1)IB
 (101)(20.42 A)  2.062 mA
26 mV 26 mV
re      12.61 
IE 2.062 mA

356 Chapter 8 BJT Small-Signal Analysis

(b) Zb  re  (  1)RE
 (100)(12.61 )  (101)(3.3 k)
 1.261 k  333.3 k
 334.56 k  RE
Zi  RB Zb  220 k334.56 k
 132.72 k
(c) Zo  REre  3.3 k12.61 
 12.56   re
Vo RE 3.3 k
(d) Av      
Vi RE  re 3.3 k  12.61 
 0.996  1
RB (100)(220 k)
(e) Ai      39.67
RB  Zb 220 k  334.56 k
versus

 
Zi 132.72 k
Ai  Av   (0.996)   40.06
RE 3.3 k
(f) Checking the condition ro  10RE, we have
25 k  10(3.3 k)  33 k
which is not satisfied. Therefore,
(  1)RE (100  1)3.3 k
Zb  re    (100)(12.61 )  
RE 3.3 k
1   1  
ro 25 k
 1.261 k  294.43 k
 295.7 k
with Zi  RBZb  220 k295.7 k
 126.15 k vs. 132.72 k obtained earlier
Zo  RE re  12.56  as obtained earlier

(  1)RE/Zb (100  1)(3.3 k)/295.7 k

Av    
 RE
1  
ro  1 
3.3 k
25 
k 
 0.996  1
matching the earlier result.

In general, therefore, even though the condition ro  10RE was not satisfied, the
results for Zo and Av are the same, with Zi only slightly less. The results suggest that
for most applications a good approximation for the actual results can be obtained by
simply ignoring the effects of ro for this configuration.
The network of Fig. 8.21 is a variation of the network of Fig. 8.17, which em-
ploys a voltage-divider input section to set the bias conditions. Equations (8.37)
through (8.47) are changed only by replacing RB by R  R1R2.
The network of Fig. 8.22 will also provide the input/output characteristics of an
emitter-follower but includes a collector resistor RC. In this case RB is again replaced
by the parallel combination of R1 and R2. The input impedance Zi and output imped-
ance Zo are unaffected by RC since it is not reflected into the base or emitter equiv-

8.5 Emitter-Follower Configuration 357

 VCC VCC

RC
R1 R1

Ii C1
Vi Vi
C1 C2 C2
Vo Vo
R2 R2 Io
Zi Io Zi
RE RE
Zo Zo

Figure 8.21 Emitter-follower Figure 8.22 Emitter-follower

configuration with a voltage- configuration with a collector
divider biasing arrangement. resistor RC.

alent networks. In fact, the only effect of RC will be to determine the Q-point of op-
eration.

8.6 COMMON-BASE CONFIGURATION

The common-base configuration is characterized as having a relatively low input and
a high output impedance and a current gain less than 1. The voltage gain, however,
can be quite large. The standard configuration appears in Fig. 8.23, with the common-
base re equivalent model substituted in Fig. 8.24. The transistor output impedance ro
is not included for the common-base configuration because it is typically in the
megohm range and can be ignored in parallel with the resistor RC.

Ii Ie Ic
Ic
e Ie c
+ E C +
Io + Ii Io
+
RE RC
Vi Zi
B
Vo Zo Vi RE re α Ie RC Vo Zo
VEE VCC Zi
– – – –

Figure 8.23 Common-base configuration.

Figure 8.24 Substituting the re equivalent circuit into the
ac equivalent network of Fig. 8.23.

Zi:
Zi  RE re (8.54)

Zo:

Zo  RC (8.55)

Av :
Vo  Io RC  (Ic )RC  IeRC

358 Chapter 8 BJT Small-Signal Analysis

 Vi
with Ie  
re

 
Vi
so that Vo   RC
re

Vo RC RC
and Av       (8.56)
Vi re re
A i: Assuming that RE

re yields
Ie  Ii
and Io   Ie   Ii

Io
with Ai      1 (8.57)
Ii
Phase relationship: The fact that Av is a positive number reveals that Vo and Vi
are in phase for the common-base configuration.
Effect of ro: For the common-base configuration, ro  1/hob is typically in the
megohm range and sufficiently larger than the parallel resistance RC to permit the ap-
proximation roRC  RC.

For the network of Fig. 8.25, determine:

(a) re. EXAMPLE 8.8
(b) Zi.
(c) Zo.
(d) Av.
(e) Ai.
10 µ F Ie 10 µF

+ Io +
Ii
1 kΩ α = 0.98 5 kΩ
Vo ro = 1 MΩ Vo
Zi Zo
2V 8V
– –

Figure 8.25 Example 8.8.

Solution
VEE  VBE 2 V  0.7 V 1.3 V
(a) IE        1.3 mA
RE 1 k 1 k
26 mV 26 mV
re      20 
IE 1.3 mA
(b) Zi  REre  1 k20 
 19.61   re
(c) Zo  RC  5 k
RC 5 k
(d) Av      250
re 20 
(e) Ai  0.98  1

8.6 Common-Base Configuration 359

 8.7 COLLECTOR FEEDBACK
CONFIGURATION
The collector feedback network of Fig. 8.26 employs a feedback path from collector
to base to increase the stability of the system as discussed in Section 4.12. However,
the simple maneuver of connecting a resistor from base to collector rather than base
to dc supply has a significant impact on the level of difficulty encountered when an-
alyzing the network.

VCC

RC
RF Io
Vo
C C2
Ii
B
Vi
Zo
C1

E
Figure 8.26 Collector feedback
Zi
configuration.

Some of the steps to be performed below are the result of experience working
with such configurations. It is not expected that a new student of the subject would
choose the sequence of steps described below without taking a wrong step or two.
Substituting the equivalent circuit and redrawing the network will result in the con-
figuration of Fig. 8.27. The effects of a transistor output resistance ro will be dis-
cussed later in the section.

B – RF + C Io

+ Ii Ib Ic +
I'
Vi β re β Ib RC Zo V
o
Zi
Figure 8.27 Substituting the re
– – equivalent circuit into the ac
equivalent network of Fig. 8.26.

Vo  Vi
Zi: I  
RF
with Vo  IoRC
and Io  Ib  I
Since Ib is normally much larger than I,
Io  Ib
and Vo  (Ib)RC  IbRC
Vi
but Ib  
re

 
Vi RC
and Vo    RC  Vi
re re

360 Chapter 8 BJT Small-Signal Analysis

Therefore,
Vo  Vi
 
Vo Vi RCVi Vi 1 RC
I             1   Vi
RF RF RF reRF RF RF re
The result is
Vi  Ibre  (Ii  I)re  Iire  Ire

 
1 RC
Vi  Iire   1   reVi
RF re
re
  
RC
or Vi 1   1    Iire
RF re

Vi re
and Zi     re
 
Ii RC
1   1  
RF r
RC eRC
but RC is usually much greater than re and 1    
re re
re
so that Zi   RC
1  
RF

re
or Zi   (8.58)
1 RC
  
 RF

Zo: If we set Vi to zero as required to define Zo, the network will appear as
shown in Fig. 8.28. The effect of re is removed and RF appears in parallel with RC
and

Zo  RC RF (8.59)

RF

Ib = 0 A

Vi = 0 β re β Ib = 0 A RC Zo

Figure 8.28 Defining Zo for the

collector feedback configuration.

Av: At node C of Fig. 8.27,

Io  Ib  I
For typical values, Ib

I and Io  Ib.
Vo  Io RC  (Ib)RC
Substituting Ib  Vi/re gives us
Vi
Vo   RC
re
Vo RC
and Av     (8.60)
Vi re

8.7 Collector Feedback Configuration 361

 Ai: Applying Kirchhoff’s voltage law around the outside network loop yields

Vi  VRF  Vo  0
and Ibre  (Ib  Ii)RF  IoRC  0
Using Io  Ib, we have

Ibre  Ib RF  Ii RF  IbRC  0
and Ib(re  RF  RC)  IiRF
Substituting Ib  Io/ from Io  Ib yields

Io
(re  RF  RC)  IiRF

RFIi
and Io  
re  RF  RC
Ignoring re compared to RF and RC gives us

Io RF
Ai     (8.61)
Ii RF  RC

For RC

RF,
Io RF
Ai    
Ii RC
Io RF
and Ai     (8.62)
Ii RC

Phase relationship: The negative sign of Eq. (8.60) reveals a 180° phase shift
between Vo and Vi.
Effect of ro:
Zi: A complete analysis without applying approximations will result in
RC ro
1  
RF

Zi  1 1 RC ro (8.63)
    
re RF RFre

Recognizing that 1/RF  0 and applying the condition ro  10RC,

RC
1  
RF

Zi  1 RC
  
re RFre

but typically RC/RF  1 and

1
Zi  
1 RC
  
re RFre

362 Chapter 8 BJT Small-Signal Analysis

 re
or Zi   (8.64)
1 RC
  
 RF
ro10RC

as obtained earlier.
Zo: Including ro in parallel with RC in Fig. 8.28 will result in
Zo  roRC RF (8.65)

For ro  10RC,

Zo  RC RF (8.66)
ro10RC

as obtained earlier. For the common condition of RF

RC,

Zo  RC (8.67)
ro10RC, RF

RC

Av :

R  r(r R )
1 1
o C
F e
Av   (8.68)
roRC
1 
RF

Since RF

re,
roRC

re

Av   roRC
1  
RF

For ro  10RC,
RC

re

Av   RC (8.69)
1  
RF
ro10RC

and since RC/RF is typically much less than one,

RC
Av   (8.70)
re
ro10RC, RF

RC

as obtained earlier.

EXAMPLE 8.9
For the network of Fig. 8.29, determine:
(a) re.
(b) Zi.
(c) Zo.
(d) Av.
(e) Ai.
(f) Repeat parts (b) through (e) with ro  20 k and compare results.

8.7 Collector Feedback Configuration 363

 9V

2.7 kΩ

180 kΩ Io
Vo
Ii 10 µF
Vi β = 200, ro = ∞ Ω
10 µF
Zo
Zi

Figure 8.29 Example 8.9.

Solution
VCC  VBE 9 V  0.7 V
(a) IB    
RF  RC 180 k  (200)2.7 k
 11.53 A
IE  (  1)IB  (201)(11.53 A)  2.32 mA
26 mV 26 mV
re      11.21 
IE 2.32 mA
re 11.21  11.21 
(b) Zi      
1 RC 1 2.7 k 0.005  0.015
     
 RF 200 180 k
11.21 
   50(11.21 )  560.5 
0.02
(c) Zo  RCRF  2.7 k180 k  2.66 k
RC 27 k
(d) Av      240.86
re 11.21 
RF (200)(180 k)
(e) Ai    
RF  RC 180 k  (200)(2.7 k)
 50
R Cro ro  10RC is not satisfied. Therefore,
(f) Zi: The condition
2.7 k20 k
1   1  
RF 180 k
 
Zi  1 1 RC ro  1 1 02.7 k  20 k0
         
re RF RFre (200)(11.21) 180 k (180 k)(11.21 )
2.38 k
1  
180 k
 1  0.013
 0.45  10  0.006  103  1.18  103  
3
1.64  103
 617.7  vs. 560.5  above
Zo:
Zo  roRCRF  20 k2.7 k180 k
 2.35 k vs. 2.66 k above

364 Chapter 8 BJT Small-Signal Analysis

 Av:
1
 1
    (roRC)
RF re  1 1

    (2.38 k)
180 k 11.21 
Av    
roRC 2.38 k
1  1  
RF 180 k 
[5.56  106  8.92  102](2.38 k)
 
1  0.013
 209.56 vs. 240.86 above
Ai:
Zi
Ai  Av 
RC
617.7 
 (209.56)
2.7 k
 47.94 vs. 50 above

For the configuration of Fig. 8.30, Eqs. (8.71) through (8.74) will determine the
variables of interest. The derivations are left as an exercise at the end of the chapter.

VCC

RC
RF Io
Vo
Ii C2
Vi
C1
Zo
Zi
RE
Figure 8.30 Collector feedback
configuration with an emitter re-
sistor RE.

Zi:
RE
Zi   (8.71)
(RE  RC)
 
1
  
 RF
Zo:
Zo  RCRF (8.72)

Av :
RC
Av   (8.73)
RE

A i:
1
Ai   (8.74)
1 (RE  RC)
  
 RF

8.7 Collector Feedback Configuration 365

 8.8 COLLECTOR DC FEEDBACK
CONFIGURATION
The network of Fig. 8.31 has a dc feedback resistor for increased stability, yet the ca-
pacitor C3 will shift portions of the feedback resistance to the input and output sec-
tions of the network in the ac domain. The portion of RF shifted to the input or out-
put side will be determined by the desired ac input and output resistance levels.

VCC

RC
RF RF Io
1 2
Vo
C2
C3
C1
Vi
Zo
Ii

Zi Figure 8.31 Collector dc feed-

back configuration.

At the frequency or frequencies of operation, the capacitor will assume a short-

circuit equivalent to ground due to its low impedance level compared to the other el-
ements of the network. The small-signal ac equivalent circuit will then appear as
shown in Fig. 8.32.

Ii
Ib
+ Io +
Zi RF β re β Ib ro RF RC
Vi 1 2 Vo
Figure 8.32 Substituting the re
Zo equivalent circuit into the ac
– – equivalent network of Fig. 8.31.

Zi:

Zi  RF1re (8.75)
Zo:
Zo  RC RF2ro (8.76)

For ro  10RC,
Zo  RC RF2 (8.77)
ro10RC

Av :
R  ro RF2RC
and Vo  Ib R

366 Chapter 8 BJT Small-Signal Analysis

 Vi
but Ib  
re
Vi
and Vo    R
re

so that

Vo roRF2RC
Av     (8.78)
Vi re

For ro  10RC,

Vo RF RC
Av    2  (8.79)
Vi re
ro10RC

Ai: For the input side,

RF1Ii Ib RF1
Ib   or   
RF1  re Ii RF1  re

and for the output side using R  roRF2

RIb Io R
Io   or   
R  RC Ib R  RC

The current gain,

Io Io Ib
Ai      
Ii Ib Ii
R RF1
   
R  RC RF1  re
Io RF1R
and Ai     (8.80)
Ii (RF1  re)(R  RC)
RroRF2

Since RF1 is usually much larger than re, RF1  re  RF1

Io RF1(roRF2)
and Ai     
Ii RF1(roRF2  RC)

Io 
so that Ai     (8.81)
Ii RC
1  
roRF2
RF110re

Io Zi
or Ai    Av (8.82)
Ii RC

Phase relationship: The negative sign in Eq. (8.78) clearly reveals a 180° phase
shift between input and output voltages.

8.8 Collector DC Feedback Configuration 367

 EXAMPLE 8.10 For the network of Fig. 8.33, determine:
(a) re.
(b) Zi. 12 V
(c) Zo.
(d) Av. 3 kΩ
(e) Ai.
120 kΩ 68 kΩ Io
Vo
10 µF
0.01 µF
Ii Zo
Vi β = 140, ro = 30 kΩ
10 µF

Zi
Figure 8.33 Example 8.10.

Solution

VCC  VBE
(a) DC: IB   
RF  RC
12 V  0.7 V
 
(120 k  68 k)  (140)3 k
11.3V
   18.6 A
608 k
IE  (  1)IB  (141)(18.6 A)
 2.62 mA
26 mV 26 mV
re      9.92 
IE 2.62 mA
(b) re  (140)(9.92 )  1.39 k
The ac equivalent network appears in Fig. 8.34.
Zi  RF1re  120 k1.39 k
 1.37 k

Ib
+ Ii Io +
β re β Ib ro
120 kΩ 68 kΩ 3 kΩ
Vi 1.395 kΩ 140 Ib 30 kΩ Vo

Zi
Zo
– –

Figure 8.34 Substituting the re equivalent circuit into the ac equivalent network of
Fig. 8.33.

(c) Testing the condition ro  10RC, we find

30 k  10(3 k)  30 k
which is satisfied through the equals sign in the condition. Therefore,
Zo  RCRF2  3 k68 k
 2.87 k

368 Chapter 8 BJT Small-Signal Analysis

(d) ro  10RC, therefore,
RF RC 68 k3 k
Av  2   
re 9.92 
2.87 k
 
9.92 
 289.3
(e) Since the condition RF1

re is satisfied,
 140 140 140
Ai        
RC 3 k 1  0.14 1.14
1   1  
roRF2 30 k68 k
 122.8

8.9 APPROXIMATE HYBRID EQUIVALENT

CIRCUIT
The analysis using the approximate hybrid equivalent circuit of Fig. 8.35 for the
common-emitter configuration and of Fig. 8.36 for the common-base configuration is
very similar to that just performed using the re model. Although time and priorities
do not permit a detailed analysis of all the configurations discussed thus far, a brief
overview of some of the most important will be included in this section to demon-
strate the similarities in approach and the resulting equations.

b c
Ib

hie hfe Ib hoe

Figure 8.35 Approximate

e e common-emitter hybrid equiva-
lent circuit.

e c
Ie

hib hfb Ie hob

Figure 8.36 Approximate
common-base hybrid equivalent
b b
circuit.

Since the various parameters of the hybrid model are specified by a data sheet or
experimental analysis, the dc analysis associated with use of the re model is not an
integral part of the use of the hybrid parameters. In other words, when the problem
is presented, the parameters such as hie, hfe, hib, and so on, are specified. Keep in
mind, however, that the hybrid parameters and components of the re model are re-
lated by the following equations as discussed in detail in Chapter 7: hie  re, hfe 
, hoe  1/ro, hfb   , and hib  re (note Appendix A).

Fixed-Bias Configuration
For the fixed-bias configuration of Fig. 8.37, the small-signal ac equivalent network
will appear as shown in Fig. 8.38 using the approximate common-emitter hybrid equiv-

8.9 Approximate Hybrid Equivalent Circuit 369

 VCC

RC Io
RB
+
Ii C2
hie
+ hfe Zo
C1 Vo
Vi Zi Figure 8.37 Fixed-bias configu-
– – ration.

Ii Ic
+ +
Zi Ib
Io

Vi RB hie hfe Ib hoe RC Vo

– Zo –

Figure 8.38 Substituting the approximate hybrid equivalent circuit into

the ac equivalent network of Fig. 8.37.

alent model. Compare the similarities in appearance with Fig. 8.3 and the re model
analysis. The similarities suggest that the analysis will be quite similar, and the re-
sults of one can be directly related to the other.
Zi: From Fig. 8.38,
Zi  RBhie (8.83)

Zo: From Fig. 8.38,

Zo  RC1/hoe (8.84)

Av : Using R  1/hoeRC,
Vo  Io R  ICR
 hfe Ib R
Vi
and Ib  
hie
Vi
with Vo  hfe R
hie

Vo hfe(RC1/hoe)
so that Av     (8.85)
Vi hie

Ai: Assuming that RB

hie and 1/hoe  10RC, then Ib  Ii and Io  Ic 

hfeIb  hfe Ii with

Io
Ai    hfe (8.86)
Ii

370 Chapter 8 BJT Small-Signal Analysis

For the network of Fig. 8.39, determine: EXAMPLE 8.11
(a) Zi.
8V (b) Zo.
Io
(c) Av.
2.7 kΩ (d) Ai.
330 kΩ
Vo
Vi hfe = 120 Zo
hie = 1.175 kΩ
Ii hoe = 20 µ A/V

Zi Figure 8.39 Example 8.11.

Solution
(a) Zi  RBhie  330 k1.175 k
 hie  1.171 k
1 1
(b) ro      50 k
hoe 20 A/V
1
Zo  RC  50 k2.7 k  2.56 k  RC
hoe
hfe(RC1/hoe) (120)(2.7 k50 k)
(c) Av      1.171 k  262.34
hie
(d) Ai  hfe  120

Voltage-Divider Configuration
For the voltage-divider bias configuration of Fig. 8.40, the resulting small-signal ac
equivalent network will have the same appearance as Fig. 8.38, with RB replaced by
R  R1R2.

VCC

Io

RC
R1
Vo
Ii C2
hie
Vi hfe
C1
Zo
R2
Zi RE CE

Figure 8.40 Voltage-divider

bias configuration.

Zi: From Fig. 8.38 with RB  R,

Zi  Rhie (8.87)

Zo: From Fig. 8.38,

Zo  RC (8.88)

8.9 Approximate Hybrid Equivalent Circuit 371

 Av:

hfe(RC1/hoe)
Av    (8.89)
hie

A i:

hf R
Ai  e (8.90)
R  hie

Unbypassed Emitter-Bias Configuration

For the CE unbypassed emitter-bias configuration of Fig. 8.41, the small-signal ac
model will be the same as Fig. 8.11, with re replaced by hie and Ib by hfeIb. The
analysis will proceed in the same manner.

VCC

Io

RC
RB

Vo

Vi hie
hfe
Ii
Zo

Zi RE

Figure 8.41 CE unbypassed

emitter-bias configuration.

Zi:
Zb  hfe RE (8.91)

and Zi  RBZb (8.92)

Zo:

Zo  RC (8.93)

Av :
hfe RC hfeRC
Av    
Zb hfe RE

RC
and Av   (8.94)
RE
A i:

hf RB
Ai  e (8.95)
RB  Zb

372 Chapter 8 BJT Small-Signal Analysis

 Zi
or Ai  Av (8.96)
RC

Emitter-Follower Configuration
For the emitter-follower of Fig. 8.42, the small-signal ac model will match Fig. 8.18,
with re  hie and   hfe. The resulting equations will therefore be quite similar.
Zi:
Zb  hfe RE (8.97)

Zi  RBZb (8.98)

VCC

RB
Ii
hie
Vi hfe
Zi
Vo
Io Zo
RE

Figure 8.42 Emitter-follower

configuration.

Zo: For Zo, the output network defined by the resulting equations will appear
as shown in Fig. 8.43. Review the development of the equations in Section 8.5 and
hie
Zo  RE 
1  hfe
or since 1  hfe  hfe,

hie
Zo  RE  (8.99)
hfe

Figure 8.43 Defining Zo for the

emitter-follower configuration.

Av: For the voltage gain, the voltage-divider rule can be applied to Fig. 8.43 as
follows:
RE (Vi)
Vo  
RE  hie/(1  hfe)

8.9 Approximate Hybrid Equivalent Circuit 373

 but since 1  hfe  hfe,

Vo RE
Av     (8.100)
Vi RE  hie/hfe

A i:

hfe RB
Ai   (8.101)
RB  Zb

Zi
or Ai  Av (8.102)
RE

Common-Base Configuration
The last configuration to be examined with the approximate hybrid equivalent circuit
will be the common-base amplifier of Fig. 8.44. Substituting the approximate com-
mon-base hybrid equivalent model will result in the network of Fig. 8.45, which is
very similar to Fig. 8.24. From Fig. 8.45,

hib , hfb
Ii Ic

+ Io +
RE RC
Vi Zi Vo Zo

VEE VCC
– –

Figure 8.44 Common-base configuration.

+ Ii Ie +
Io

Zi Zo
Vi RE hib hfb Ie RC Vo

– –

Figure 8.45 Substituting the approximate hybrid equivalent circuit into the ac
equivalent network of Fig. 8.44.

Zi:
Zi  RE hib (8.103)

Zo:

Zo  RC (8.104)

Av :
Vo  Io RC  (hf b Ie)RC

374 Chapter 8 BJT Small-Signal Analysis

 Vi Vi
with Ie   and Vo  hfb RC
hib hib
Vo hfb RC
so that Av     (8.105)
Vi hib

A i:
Io
Ai    hfb  1 (8.106)
Ii

For the network of Fig. 8.46, determine:

(a) Zi. EXAMPLE 8.12
(b) Zo.
(c) Av.
(d) Ai.

Ii

+ Io
+

Zi 2.2 kΩ hfb = − 0.99 3.3 kΩ

Vi Vo Zo
hib = 14.3 Ω
4V hob = 0.5 µA/V 10 V
– –

Figure 8.46 Example 8.12.

Solution
(a) Zi  REhib  2.2 k14.3   14.21   hib
1 1
(b) ro      2 M
hob 0.5 A/V
1
Zo  RC  RC  3.3 k
hob
hfb RC (0.99)(3.3 k)
(c) Av      229.91
hib 14.21
(d) Ai  hfb  1

The remaining configurations of Sections 8.1 through 8.8 that were not analyzed
in this section are left as an exercise in the problem section of this chapter. It is as-
sumed that the analysis above clearly reveals the similarities in approach using the re
or approximate hybrid equivalent models, thereby removing any real difficulty with
analyzing the remaining networks of the earlier sections.

8.10 COMPLETE HYBRID EQUIVALENT

MODEL
The analysis of Section 8.9 was limited to the approximate hybrid equivalent circuit
with some discussion about the output impedance. In this section, we employ the com-
plete equivalent circuit to show the impact of hr and define in more specific terms the

8.10 Complete Hybrid Equivalent Model 375

 impact of ho. It is important to realize that since the hybrid equivalent model has the
same appearance for the common-base, common-emitter, and common-collector con-
figurations, the equations developed in this section can be applied to each configura-
tion. It is only necessary to insert the parameters defined for each configuration. That
is, for a common-base configuration, hfb, hib, and so on, are employed, while for a
common-emitter configuration, hfe, hie, and so on, are utilized. Recall that Appendix
A permits a conversion from one set to the other if one set is provided and the other
is required.
Consider the general configuration of Fig. 8.47 with the two-port parameters of
particular interest. The complete hybrid equivalent model is then substituted in Fig.
8.48 using parameters that do not specify the type of configuration. In other words,
the solutions will be in terms of hi, hr, hf, and ho. Unlike the analysis of previous sec-
tions of this chapter, the current gain Ai will be determined first since the equations
developed will prove useful in the determination of the other parameters.

Io

+ +
Ii
Rs
Zo
+ Vi Transistor Vo RL
Zi
Vs

– – –

Figure 8.47 Two-port system.

Ii
Ib Io
+ hi I
+
Rs +
+ Vi hr Vo hf Ib 1/ho Vo RL
Zi Zo
Vs –
– – –

Figure 8.48 Substituting the complete hybrid equivalent circuit into the two-port sys-
tem of Fig. 8.47.

Current Gain, Ai  Io /Ii

Applying Kirchhoff’s current law to the output circuit yields
Vo
Io  hf Ib  I  hf Ii    hf Ii  hoVo
1/ho
Substituting Vo  Io RL gives us
Io  hf Ii  ho RL Io
Rewriting the equation above, we have
Io  ho RL Io  hf Ii
and Io(1  ho RL)  hf Ii

376 Chapter 8 BJT Small-Signal Analysis

 Io hf
so that Ai     (8.107)
Ii 1  hoRL
Note that the current gain will reduce to the familiar result of Ai  hf if the factor
hoRL is sufficiently small compared to 1.

Voltage Gain, Av  Vo /Vi

Applying Kirchhoff’s voltage law to the input circuit results in
Vi  Iihi  hrVo
Substituting Ii  (1  hoRL)Io/hf from Eq. (8.107) and Io  Vo/RL from above re-
sults in
(1  hoRL)hi
Vi   Vo  hrVo
hf RL
Solving for the ratio Vo/Vi yields

Vo hf RL
Av    
hi  (hiho  hf hr)RL (8.108)
Vi

In this case, the familiar form of Av  hf RL/hi will return if the factor (hiho 
hf hr)RL is sufficiently small compared to hi.

Input Impedance, Zi  Vi/Ii

For the input circuit,
Vi  hi Ii  hrVo
Substituting Vo  Io RL
we have Vi  hi Ii  h r RL Io
Io
Since Ai  
Ii
Io  Ai Ii
so that the equation above becomes
Vi  hiIi  hr RL Ai Ii
Solving for the ratio Vi/Ii, we obtain

Vi
Zi    hi  hr RL Ai
Ii
and substituting
hf
Ai  
1  ho RL

Vi  h f hr RL
yields Zi    hi  (8.109)
Ii 1  ho RL
The familiar form of Zi  hi will be obtained if the second factor is sufficiently smaller
than the first.

8.10 Complete Hybrid Equivalent Model 377

 Output Impedance, Zo  Vo /Io
The output impedance of an amplifier is defined to be the ratio of the output voltage
to the output current with the signal Vs set to zero. For the input circuit with Vs  0,
hrVo
Ii  
Rs  hi
Substituting this relationship into the following equation obtained from the output cir-
cuit yields
Io  hf Ii  hoVo
hf hrVo
   hoVo
Rs  hi

Vo 1
and Zo     (8.110)
Io ho  [hf hr /(hi  Rs)]
In this case, the output impedance will reduce to the familiar form Zo  1/ho for the
transistor when the second factor in the denominator is sufficiently smaller than the
first.

EXAMPLE 8.13 For the network of Fig. 8.49, determine the following parameters using the complete
hybrid equivalent model and compare to the results obtained using the approximate
model.
(a) Zi and Zi.
(b) Av.
(c) Ai  Io /Ii and Ai  Io /Ii.
(d) Zo (within RC) and
Zo (including RC).

Figure 8.49 Example 8.13.

Solution
Now that the basic equations for each quantity have been derived, the order in which
they are calculated is arbitrary. However, the input impedance is often a useful quan-
tity to know and therefore will be calculated first. The complete common-emitter hy-
brid equivalent circuit has been substituted and the network redrawn as shown in Fig.
8.50. A Thévenin equivalent circuit for the input section of Fig. 8.50 will result in the
input equivalent of Fig. 8.51 since ETh  Vs and RTh  Rs  1 k (a result of RB 
470 k being much greater than Rs  1 k). In this example, RL  RC and Io is de-

378 Chapter 8 BJT Small-Signal Analysis

 Ii' Ii Io
Ib
+ 1.6 kΩ +
Z'i Zi Zo Z'o
Rs 1 kΩ +
+ Vi 470 kΩ 2 × 10− 4 Vo 110 Ib 50 kΩ 4.7 kΩ Vo
Vs –
– – –

Thevenin

Figure 8.50 Substituting the complete hybrid equivalent circuit into the ac
equivalent network of Fig. 8.49.

I'i Ii hie Io

+ 1.6 kΩ +
Z'i Zi Z'o Zo
Rs 1 kΩ + 1
hre Vo hfe Ib hoe = 50 kΩ
+ Vi 2 × 10− 4 Vo
4.7 kΩ Vo
110 Ib hoe = 20 µS
Vs –
– – –

Figure 8.51 Replacing the input section of Fig. 8.50 with a Thévenin equivalent circuit.

fined as the current through RC as in previous examples of this chapter. The output
impedance Zo as defined by Eq. (8.110) is for the output transistor terminals only. It
does not include the effects of RC. Zo is simply the parallel combination of Zo and
RL. The resulting configuration of Fig. 8.51 is then an exact duplicate of the defining
network of Fig. 8.48, and the equations derived above can be applied.
Vi h fe h re RL
(a) Eq. (8.109): Zi    hie  
Ii 1  hoe RL
(110)(2  104)(4.7 k)
 1.6 k  
1  (20 S)(4.7 k)
 1.6 k  94.52 
 1.51 k
versus 1.6 k using simply hie.
Zi  470 kZi  Zi  1.51 k
Vo hfeRL
(b) Eq. (8.108): Av    
Vi hie  (hiehoe  hfehre)RL
(110)(4.7 k)
 
1.6 k  [(1.6 k)(20 S)  (110)(2  104)]4.7 k

517  103 
 
1.6 k  (0.032  0.022)4.7 k
517  103 
 
1.6 k  47 
 313.9

8.10 Complete Hybrid Equivalent Model 379

 versus 323.125 using Av  hfeRL/hie.
Io hfe 110
(c) Eq. (8.107): Ai      
Ii 1  hoe RL 1  (20 S)(4.7 k)
110
   100.55
1  0.094
versus 110 using simply hfe. Since 470 k

Zi, Ii  Ii and Ai  100.55 also.

Vo 1
(d) Eq. (8.110): Zo    
hoe  [hfehre/(hie  Rs)]
Io
1
 
20 S  [(110)(2  104)/(1.6 k  1 k)]
1
 
20 S  8.46 S
1
 
11.54 S
 86.66 k
which is greater than the value determined from 1/hoe  50 k.
Zo  RCZo  4.7 k86.66 k  4.46 k
versus 4.7 k using only RC.

Note from the results above that the approximate solutions for Av and Zi were very
close to those calculated with the complete equivalent model. In fact, even Ai was off
by less than 10%. The higher value of Zo only contributed to our earlier conclusion
that Zo is often so high that it can be ignored compared to the applied load. However,
keep in mind that when there is a need to determine the impact of hre and hoe, the
complete hybrid equivalent model must be used, as described above.
The specification sheet for a particular transistor typically provides the common-
emitter parameters as noted in Fig. 7.28. The next example will employ the same tran-
sistor parameters appearing in Fig. 8.49 in a pnp common-base configuration to in-
troduce the parameter conversion procedure and emphasize the fact that the hybrid
equivalent model maintains the same layout.
EXAMPLE 8.14
For the common-base amplifier of Fig. 8.52, determine the following parameters us-
ing the complete hybrid equivalent model and compare the results to those obtained
using the approximate model.
(a) Zi and Z i.
(b) Ai and Ai.
hie = 1.6 kΩ hfe = 110
hre = 2 × 10− 4 hoe = 20 µS
Io

+ +
Ii' Ii
Rs 1 kΩ 3 kΩ 2.2 kΩ

+ Vi Vo
Z'i Zi Zo Z'o
Vs 6V 12 V

– – –

Figure 8.52 Example 8.14.

380 Chapter 8 BJT Small-Signal Analysis

(c) Av.
(d) Zo and Z o.

Solution
The common-base hybrid parameters are derived from the common-emitter parame-
ters using the approximate equations of Appendix A:
hie 1.6 k
hib      14.41 
1  hfe 1  110
Note how closely the magnitude compares with the value determined from
hie 1.6 k
hib  re      14.55 
 110
hiehoe (1.6 k)(20 S)
hrb    hre    2  104
1  hfe 1  110
 0.883  104
hfe 110
hfb      0.991
1  hfe 1  110
hoe 20 S
hob      0.18 S
1  hfe 1  110
Substituting the common-base hybrid equivalent circuit into the network of Fig.
Ii' Ii hib Io
e c
+ 14.41 Ω +
Z'i Zi Ie Zo Z'o
Rs 1 kΩ +
+ 3 kΩ Vi 0.883 × 10−4 Vo − 0.991Ie hob = 0.18 µ S 2.2 kΩ Vo
hrb Vo hfb Ie
Vs –
– – –
b b
Thévenin

Figure 8.53 Small-signal equivalent for the network of Fig. 8.52.

8.52 will then result in the small-signal equivalent network of Fig. 8.53. The Thévenin
network for the input circuit will result in RTh  3 k1 k  0.75 k for Rs in the
equation for Zo.
Vi h f b h rb RL
(a) Eq. (8.109): Zi    hib  
Ii 1  hob RL
(0.991)(0.883  104)(2.2 k)
 14.41   
1  (0.18 S)(2.2 k)
 14.41   0.19 
 14.60 
versus 14.41  using Zi  hib.
Z i  3 kZi  Zi  14.60 
Io hfb
(b) Eq. (8.107): Ai    
Ii 1  hob RL

8.10 Complete Hybrid Equivalent Model 381

 0.991
 
1  (0.18 S)(2.2 k)
 0.991  hfb
Since 3 k

Zi, I i  Ii and Ai  Io/I i  1 also.

Vo h fb RL
(c) Eq. (8.108): Av    
Vi hib  (hib hob  hfbhrb)RL
(0.991)(2.2 k)
 
14.41   [(14.41 )(0.18 S)  (0.991)(0.883  104)]2.2 k
 149.25
versus 151.3 using Av  hfb RL/hib.
1
(d) Eq. (8.110): Zo  
hob[hf b hrb /(hib  Rs)]
1
 
0.18 S  [(0.991)(0.883  104)/(14.41   0.75 k)]
1
 
0.295 S
 3.39 M
versus 5.56 M using Zo  1/hob. For Z o as defined by Fig. 8.53:
Z o  RCZo  2.2 k3.39 M  2.199 k
versus 2.2 k using Z o  RC.

8.11 SUMMARY TABLE

Now that the most familiar configurations of the small-signal transistor amplifiers
have been introduced, Table 8.1 is presented to review the general characteristics of
each for immediate recall. It must be absolutely clear that the values listed are sim-
ply typical values to establish a basis for comparison. The levels obtained in an ac-
tual analysis will most likely be different, and certainly different from one configu-
ration to another. Being able to repeat most of the information in the table is an
important first step in developing a general familiarity with the subject matter. For in-
stance, one should now be able to state with some assurance that the emitter-follower
configuration typically has a high input impedance, low output impedance, and a volt-
age gain slightly less than 1. There should be no need to perform a variety of calcu-
lations to recall salient facts such as those above. For the future, it will permit the
study of a network or system without becoming mathematically involved. The func-
tion of each component of a design will become increasingly familiar as general facts
such as those above become part of your background.
One obvious advantage of being able to recall general facts like the above is an
ability to check the results of a mathematical analysis. If the input impedance of a
common-base configuration is in the kilohm range, there is good reason to recheck
the analysis. However, on the other side of the coin, a result of 22  suggests that
the analysis may be correct.

382 Chapter 8 BJT Small-Signal Analysis

TABLE 8.1 Relative Levels for the Important Parameters of the CE, CB, and CC Transistor Amplifiers

Configuration Zi Zo Av Ai
Fixed-bias: Medium (1 k) Medium (2 k) High (200) High (100)
VCC
RC  RBre  RCro (RCro) RBro
RB    
re (ro  RC)(RB  re)
 re  RC
(RB  10re) RC  
(ro  10RC)  
re (ro  10RC ,
(ro  10RC) RB  10re)

Voltage-divider VCC Medium (1 k) Medium (2 k) High (200) High (50)
bias: RC
R1  R1R2re  RCro RCro (R1R2)ro
   
re (ro  RC)(R1R2  re)
 RC
RC
R2 (ro  10RC)   (R R2)
re  1
RE CE R1R2  re
(ro  10RC)
(ro  10RC)

Unbypassed VCC High (100 k) Medium (2 k) Low (5) High (50)
emitter bias: RC
RB  RBZb  RC RC RB
   
re  RE RB  Zb
Zb  (re  RE) (any level
of ro)
 RBRE RC
 
RE (RE

re) RE
(RE

re)

Emitter-
follower: VCC High (100 k) Low (20 ) Low (  1) High (50)
RB
 RBZb  REre RE RB
   
RE  re RB  Zb
Zb  (re  RE)
 re
 RBRE  1
RE (RE

re)
(RE

re)

Common-
Low (20 ) Medium (2 k) High (200) Low (1)
base:
 REre  RC RC  1
RE RC  
re
VEE VCC  re
(RE

re)

Collector
VCC Medium (1 k) Medium (2 k) High (200) High (50)
feedback:
RC
RF re  RCRF RC RF
     
1 RC re RF  RC
   (ro  10RC)
 RE (ro  10RC)
RF

RC) RF
 
(ro  10RC) RC

8.12 Troubleshooting 383