UNIVERSITY OF KWAZULU-NATAL
School of Electrical, Electronic & Computer Engineering
MAIN EXAMINATION: December 2020
Subject, Course and Code: Electrical Principles 2: ENEL2EB H2
Duration: 90 minutes with extra 30 minutes to upload solutions
Total Marks: 50
Examiners: Prof V. Srivastava (Analogue Electronics)
Dr E. Bhero (Digital Electronics)
Independent Moderator: Dr F. Ghayoor
General Instructions:
1. This paper contains Digital Electronics section only.
2. Answer ALL questions in both sections.
3. You may use any calculator, provided that no text or formulae are present in memory at the
start of the examination.
4. Show all working in calculations and derivations.
5. Fully label all diagrams and graphs.
UNIVERSITY OF KWAZULU-NATAL EXAMINATIONS: December 2020
Subject, Course and Code: Electrical Principles 2: ENEL2EB H2 Page 2 of 4
DIGITAL ELECTRONICS – answer in a separate book ANSWER ALL QUESTIONS
Question D1 - MCQ [5 marks]
1. Which logic gate is implemented by the following circuit?
Answer = AND gate
2. Which logic gate has the following truth table?
A B Y
0 0 1
0 1 0
1 0 0
1 1 1
Answer = XNOR
3. CMOS voltage levels for logic 0 if the supply is 12 V.
Answer = any voltage from 3.6V and below (below 30% of supply voltage).
4. The difference between combinational logic and sequential logic is that the
combinational logic has a memory element connected to it.
Answer = False.
5. RS Flip-Flop is an improvement to the JK Flip-Flop.
Answer = False.
UNIVERSITY OF KWAZULU-NATAL EXAMINATIONS: December 2020
Subject, Course and Code: Electrical Principles 2: ENEL2EB H2 Page 3 of 4
Question D2: [45 marks]
6. The figure below shows the complementary metal-oxide semiconductor (CMOS) transistor
implementation of a particular logic function. Given that A, B and S are inputs and Z is the
output, write down the truth table for the circuit.
[3]
7. Implement the Boolean function, 𝐹 = 𝑌̅ + 𝑊
̅ 𝑋 + 𝑋̅𝑍, using NAND gates only.
[4]
8. Using the K-map procedure, implement the optimum solution of the following Boolean
function:
F(A, B, C, D) = Π(0,4,7,11,12,14,15)
[7]
9. For the circuit in the figure below, write down a truth table that relates the output, Q, of the D
Flip-Flop to the inputs applied at the D input.
X S Q
D Q
_
CP Q
Y R
Clock
[4]
10. Implement the following Boolean function with a Multiplexer.
F(w,x,y,z) = (𝑌̅ + 𝑋̅)(𝑊
̅ +Y)
UNIVERSITY OF KWAZULU-NATAL EXAMINATIONS: December 2020
Subject, Course and Code: Electrical Principles 2: ENEL2EB H2 Page 4 of 4
[7]
11. Using MSI chips of your choice and some logic gates, design a simple binary counter that
counts continuously from 2 to 9 and display the count on a 7-segment LEDs.
NOTE: you must provide a complete block diagram with a brief explanation on how the circuit
works.
[12]
12. The incomplete Table 1 below is an attempt to design a J-K flip-flop based up counter, which
continuously counts in the order, 1, 3, 5, 7, 9, 11 and then 1. Complete this table by filling in
the values of J3K3, J1K1 and J0K0 for all the above counts.
Table 1
Decimal Present Sate Next Sate Flip-Flop Input
Count
Q3Q2Q1Q0 Q3Q2Q1Q0 J3K3 J2K2 J1K1 J0K0
1 0001 0011
3 0011 0101
5 0101 0111
7 0111 1001
9 1001 1011
11 1011 0001
[8]
