EMC REMEDIAL INVESTIGATIONS

AND DESIGN GUIDELINES

Presented by: George Vassila

Electromagnetic Testing Services Ltd
 EMC REMEDIAL INVESTIGATIONS PROCEDURE
 FIXES THAT DO NOT REQUIRE DESIGN CHANGES
SHORT TERM / LONG TERM (PRODUCT AND COST CRITERIA)

SHORTER TIME TO MARKET COMPARED TO DESIGN CHANGES FIXES

MORE EXPENSIVE

LIMITED EFFECTIVENESS

 DESIGN CHANGES FIXES

 LONG TERM FIXES
 VERY LOW UMC COST
 VERY EFFECTIVE (DEALS WITH PROBLEMS AT SOURCE)
 EXPENSIVE IMPLEMENTATION COSTS (PCB AND DESIGN CHANGES)
 LONGER TIME TO MARKET
 EMC REMEDIAL INVESTIGATIONS PROCEDURE
FIXES THAT DO NOT REQUIRE DESIGN CHANGES

 EVALUATE PROBLEMS IN STANDBY MODE (EMISSIONS)

 RESOLVE STANDBY MODE ISSUES BEFORE CONSIDERING ACTIVE MODE
 APPLICATION OF FERRITES ON CABLES
 FILTERING POWER AND SIGNAL PORTS WITH OFF THE SHELVE COMPONENTS
 GROUNDING
 SHIELDED CABLES
 SHIELDED ENCLOSURES
 REPLACING COMPONENTS SUCH AS OP-AMPS WITH SMALLER BANDWIDTH
 RE-ROUTING INTERNAL CABLES
 SOFTWARE / FIRMWARE CHANGES
 FIXES THAT DO NOT REQUIRE DESIGN CHANGES
INVESTIGATION APPROACH

 ISOLATE SOURCE OF PROBLEM BY:

 REMOVING CABLE PORTS (LOW FREQUENCY PROBLEMS < 300 MHz)

 SIMPLIFY SYSTEM BY SWITCHING SUBASSEMBLIES OFF –START WITH MINIMUM SYSTEM

 DON’T FORGET THE ‘KITCHEN FOIL’ APPROACH FOR HIGH FREQUENCIES ( 300 MHz)
 ITS ALWAYS A GOOD IDEA TO MAKE A LIST OF OPTIONS AND POSSIBILITIES
 FOLLOW YOUR LIST METHODICALLY
 CONSIDER THE POSSIBILITY OF GROUND LOOPS

 THERE IS A LIMITED LIST OF FIXES THAT CAN BE APPLIED AND IF RESULTS ARE NEGATIVE:
 YOU CAN ONLY RESOLVE BY DESIGN CHANGES
 DESIGN CHANGES APPROACH

INVESTIGATION APPROACH
 DESIGN REVIEW OF CIRCUIT DIAGRAMS AND PCB LAYOUTS:
 RESERVOUR CAPACITANCE

 DECOUPLING

 DC POWER FILTERING
 I/O PORTS FILTERING
 SPLIT 0V PLANES. ARE THEY NECESSARY?
 PCB LAYOUT

 MODIFY A PCB WITH PROPOSED CHANGES AND RETEST TO ASSESS EFFECTIVENESS

DESIGN GUIDELINES
 DESIGN GUIDELINES
DC POWER FILTER

Apply this filtering network to all input and output DC power ports. Always position at the entry point
to the PCB / system.

C1 C4 - 100 uF
C2 C5 - 100 nF
C3 C6 - 10 nF
VR1—Varistor

L1 CM Choke 0.1– 5.0 mH - Current rating 2.5 x DC

All capacitors ceramics / multilayer
DESIGN GUIDELINES
IC DECOUPLING

C1 100 nF
C2 10 nF

C1, C2 capacitors ceramics / multilayer

All ICs handling fast signals must have the above decoupling network at each
power pin.
 DESIGN GUIDELINES
DC to DC Converter Decoupling Network

C1 100 nF
C2 10 nF
C3 100uF

C1, C2 capacitors ceramics / multilayer

C3 electrolytic reservoir low ESR

Add to all inputs and outputs of DC-DC converters

 DESIGN GUIDELINES
High Speed Signal Filtering and Line Termination

120 R

100 pF

0V

All high speed signals must be provided with cap filtering to 0V and inline resistor to provide termination as per the charac teristic impedance of the signal line. Values can
vary between 10 R and 570 R. For multilayer PCBs 120 R is normally an optimum value,. Network must be placed as close as poss ible to the driver end of the signal line.
 DESIGN GUIDELINES
I/O Filtering Network

Apply attached filtering network to all input and output signals. Cap values can vary depending on speed if signal from 10 pF to 1 nF.
An inline termination resistor / ferrite / inductor will be necessary to provide inline impedance for the filter network to work.
DESIGN GUIDELINES
OP AMP filtering

Apply filtering on all op amps.

Use op amps with smallest BW.
 DESIGN GUIDELINES
DC MOTOR FILTERING
 DESIGN GUIDELINES
0V PLANES

0V Planes

Digital Analogue RF

I/ I/ I/
O O O
 DESIGN GUIDELINES
0V PLANES
SHOULD BE USED FOR DESIGNS WHERE SIGNALS CROSS PLANE BOUNDARIES
 DESIGN GUIDELINES
0V PLANES
SINGLE 0V PLANE IS FAR BETTER

0V Planes

Digital
RF
Analogue

I/ I/ I/
O O O
DESIGN GUIDELINES
 DESIGN GUIDELINES
FILTERING APPLICATION
 DESIGN GUIDELINES
ESD PROTECTION – BATTERY POWERED SYSTEM EXAMPLE

USB
+
IC1 IC2
-
 DESIGN GUIDELINES
ESD PROTECTION – BATTERY POWERED SYSTEM EXAMPLE

USB
+
IC1 IC2
-

L1
22-100 uH
 DESIGN GUIDELINES
GREATING A SYSTEM EARTH – DC SYSTEMS

+ C1 C2 C3 VR1 + C4 C5 C6

- 0V

PCB

Signal In

0V
THANK YOU FOR YOUR ATTENTION