EED-Digital Electronics Manual
AIM OF THE EXPERIMENT:
Realisation of Design of I bit & 2 bit comparator circuit.
EQUIPMENTS REQUIRED
SI. No. Equipments Quantity
1 IC Traner Kit
2 Patch chords As required
COMPONENTS REQUIRED
SI. No. Components Specification Quantity
1 OR Gate IC 7432
2 NAND Gate IC 7400 2
X-OR Gate IC 7486 1
THEORY:
The comparison of2 numbers is an operation that determines if one number is greater than, less than or
equal to the other numbers. A magnitude comparator is a combinational circuit that compares two
numbers at a time & determines their relative magnitudes. The outcome of the comparison is specified
by three binary variables that indicate where A>B, A = B or A<B. The circuit for comparing two r-bit
numbers has 2" entries in the truth table & becomes too cumbersome even with r =3.
1. Bit comparator
A B A<B A B A>B
0 0 1 0
0 0 0 1
From the table, we observe that
For A B: AB gives the result
A = B: AOB gives the result
A >B: AB givesthe result
EED-Digital Electronics Manual
2. Bit comarator
For designing a 2 bit comparator circuit we have 3 conditions let A = AgAi, B = B,B
i. A = B
(A B) AND (Ao = Bo)
Y = A,B AOB
i. A> B
a. A >Bi or
b. (A B1) AND (A0> Bo)
Y AB + (A,OB) (A,B)
(Referring to above truth table)
ii. A < B
a. A Bi or
b. (A= B1) AND (Ao < Bo)
Y AB, + (A®B,) (AB,)
(Referring to previous truth table)
Bo A>B A B A<B
A Ap B
0
0 0
0 0
0
0 0
0
0
0
0 0
0
0 0
0 0
0
0 0 0
0 0 0 0 0
0 0 0
0 0 0 0
0 0 0
0 0
0 0
0 0
1 0 1 0
EED-Digital Electronics Manual
LOGIC CIRCUIT
I Bit Conmparator:
AB
A
AOAb
AC
AYS
K-Map:
B
B 0 0
o
0
AB:A>B
AOB:A= B
AB A<B