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Asynchronous (Serial, Communication

The document discusses asynchronous serial transmission and data transfer methods. It describes: 1) Asynchronous serial transmission involves transmitting each bit in a message sequentially, with a start bit indicating the beginning and a stop bit indicating the end. This allows for transmission with no information idle time but is slower than parallel transmission. 2) There are two methods for asynchronous serial transmission - an asynchronous communication interface that uses shift registers to transmit and receive data bytes, and a first in first out (FIFO) buffer that accepts data at one rate and outputs at another, acting as a buffer between asynchronous devices. 3) Data transfer between computer components can occur synchronously, using a common clock, or asynchronously without a shared clock.

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S.Ramesh raja
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367 views

Asynchronous (Serial, Communication

The document discusses asynchronous serial transmission and data transfer methods. It describes: 1) Asynchronous serial transmission involves transmitting each bit in a message sequentially, with a start bit indicating the beginning and a stop bit indicating the end. This allows for transmission with no information idle time but is slower than parallel transmission. 2) There are two methods for asynchronous serial transmission - an asynchronous communication interface that uses shift registers to transmit and receive data bytes, and a first in first out (FIFO) buffer that accepts data at one rate and outputs at another, acting as a buffer between asynchronous devices. 3) Data transfer between computer components can occur synchronously, using a common clock, or asynchronously without a shared clock.

Uploaded by

S.Ramesh raja
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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II B.

Sc CS - Computer Architecture

Advantage of the Handshaking method:


 The Handshaking scheme provides degree of flexibility and reliability because the
successful completion of data transfer relies on active participation by both units.
 If any of one unit is faulty, the data transfer will not be completed. Such an error can
be detected by means of a Timeout mechanism which provides an alarm if the data is
not completed within time.

ASYNCHRONOUS SERIAL TRANSMISSION:

• The transfer of data between two units is serial or parallel.


• In parallel data transmission, n bit in the message must be transmitted through n
separate conductor path.
• In serial transmission, each bit in the message is sent in sequence one at a time.
• Parallel transmission is faster but it requires many wires. It is used for short distances
and where speed is important. Serial transmission is slower but is less expensive.
• In Asynchronous serial transfer, each bit of message is sent a sequence at a time, and
binary information is transferred only when it is available. When there is no
information to be transferred, line remains idle.
• In this technique each character consists of three points :
i. Start bit
ii. Character bit
iii. Stop bit

i. Start Bit- First bit, called start bit is always zero and used to indicate the beginning
character.
ii. Stop Bit- Last bit, called stop bit is always one and used to indicate end of
characters. Stop bit is always in the 1- state and frame the end of the characters to
signify the idle or wait state.
iii. Character Bit- Bits in between the start bit and the stop bit are known as character
bits. The character bits always follow the start bit.

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II B.Sc CS - Computer Architecture

Serial Transmission of Asynchronous is done by two ways:


a) Asynchronous Communication Interface

b) First In First out Buffer

ASYNCHRONOUS COMMUNICATION INTERFACE:

• It works as both a receiver and a transmitter. Its operation is initialized by CPU by


sending a byte to the control register.

• The transmitter register accepts a data byte from CPU through the data bus and
transferred to a shift register for serial transmission.

• The receive portion receives information into another shift register, and when a
complete data byte is received it is transferred to receiver register.

• CPU can select the receiver register to read the byte through the data bus. Data in the
status register is used for input and output flags.

First In First Out Buffer (FIFO):

• A First In First Out (FIFO) Buffer is a memory unit that stores information in such a
manner that the first item is in the item first out. A FIFO buffer comes with separate
input and output terminals. The important feature of this buffer is that it can input data
and output data at two different rates.

• When placed between two units, the FIFO can accept data from the source unit at one
rate, rate of transfer and deliver the data to the destination unit at another rate.

• If the source is faster than the destination, the FIFO is useful for source data arrive in
bursts that fills out the buffer. FIFO is useful in some applications when data are
transferred asynchronously.

3. MODES OF DATA TRANSFER :

Transfer of data is required between CPU and peripherals or memory or sometimes between
any two devices or units of your computer system. To transfer a data from one unit to another
one should be sure that both units have proper connection and at the time of data transfer the
receiving unit is not busy. This data transfer with the computer is Internal Operation.

All the internal operations in a digital system are synchronized by means of clock pulses
supplied by a common clock pulse Generator. The data transfer can be
i. Synchronous or
ii. Asynchronous

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