Si47961-62 Data Short

High-Performance Automotive Dual AM/FM Radio Receiver and

KEY FEATURES
HD Radio™/DAB/DAB+/DMB/DRM Tuner
The Si47961/62 integrates two global radio receivers. The analog AM/FM receivers and • Dual worldwide FM band support (64–108
MHz)
digital radio tuners set a new standard for automotive broadcast reception.
• Dual worldwide AM band support (520–
The Si47961/62 is the most integrated automotive tuner in the industry with the smallest 1710 kHz)
external bill of materials. Si47961/62 based systems can scale from a low-cost dual tu- • Dual LW band support (144–288 kHz)
ner AM/FM radio to the highest performance systems with multiple tuners and multiple • Dual SW band support (2.3–30 MHz)
antennas, enabling the radio suppliers to reuse their R&D across multiple product lines, • Dual DAB/DAB+/DMB support (Si47962
all with a common software API. The Si47961/62 A-grade parts meet rigorous automo- only) (168–240 MHz)
tive quality standards.
• NOAA Weather Band support
Applications • On-chip RDS/RDBS
• OEM automotive infotainment systems • AM/FM
• Comprehensive AM/FM signal
• Aftermarket car radio systems processing firmware
• Integrated active AM/FM buffers for
background/data tuners
• Analog FM phase diversity with two
DEBUGN
DEBUGP
DACREF

AOUT1

AOUT0
XTALO

CLKO
XTALI

tuners
ICN
ICP

• HD Radio
• Digital I/Q interface to HD Radio
DAC

DAC

REFCLK
DOUT0 Processor
DCLK0
DFS0 • HD Radio MRC with two tuners
FMA AGC AGC
DOUT1 • DRM30/DRM+ (Si47962 only)
PGA ADC Radio DSP 0 DCLK1
B3A AGC
DFS1 • Digital I/Q interface to DRM processor
RF
Synth 0
DIFS0 • Fully integrated AGC
DICLK0
B3B AGC
Digital DIN0
• DRM detect
RF Flex I/F
AGC
• Dual DAB/DAB+/DMB (Si47962 only)
FMB AGC Select PGA ADC Radio DSP 1 ZIFCLK
ZIFFS
• Digital I/Q interface to DAB/DAB+/DMB
LTB RF
ZIFI0 processor
ZIFQ0
Synth 1
LTA • DAB/DAB+/DMB MRC with two tuners
ISFSN
AMVAG ARM ISFSP • Integrated active Band III buffers for
Cortex M3 ZIFI1
AMI AGC ZIFQ1 background/data tuners
MCU
AMO SPI Flash
Master
SPI/I2C Control
Interface
• Audio
• Two analog audio outputs
• Three digital audio ports (I2S)
NVMISO
NVMOSI
NVSSB
NVSCLK

SMODE
INTB
MISO
MOSI
SCLK
SSB

GP0
GP1
GP2

• 1.8 V or 3.3 V digital IO power supplies

• 3.3 V analog power supply and 1.8 V
digital power supply
• QFN 56-pin, 8x8x0.85 mm
• Pb-free/RoHS compliant
• AEC-Q100 qualified (A-grade devices)

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 Si47961-62 Data Short
Pin Descriptions

1. Pin Descriptions

DCLK/GP0

DFS/GP1
DICLK0

DOUT0
AOUT1

AOUT0
ABYP1
CLKO

DIFS0

DIN0

GP2
VA1

ICN
ICP

45

44

43
46
48
56

47
53
54
55

52

49
51

50
XTALO 1 42 DCLK0

XTALI 2 41 DFS0

DACREF 3 40 DOUT1

FMA 4 39 DEBUGP

B3A/WXI 5 38 DEBUGN

B3B 6 37 ISFSP

FMB 7 36 ISFSN

AMO 8 35 ZIFI0

AMI 9 34 ZIFCLK

AMVAG 10 33 ZIFQ0

LTB 11 32 ZIFFS

LTA 12 31 ZIFI1

ABYP2 13 30 ZIFQ1

VA2 14 29 VIO2
15

16

17

18

19

20

21

22

23

24

25

26

27

28
RSTB

SMODE

NVMISO

NVMOSI

NVSSB

NVSCLK

INTB

MISO/A0

MOSI/SDA

SCLK/SCL

SSB/A1

VIO1

VD

DBYP

Figure 1.1. Si47961-62 Pinout Diagram

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 Si47961-62 Data Short
Package Outline

2. Package Outline

Figure 2.2. 56-Pin QFN

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 Si47961-62 Data Short
Package Outline

Table 2.1. Package Dimensions

Dimensions Min Nom Max

A 0.80 0.85 0.90

A1 0.00 0.035 0.05

b 0.20 0.25 0.30

A3 0.203 REF

D 8.00 BSC

e 0.5 BSC

E 8.00 BSC.

D2 6.30 6.40 6.50

E2 6.30 6.40 6.50

L 0.35 0.40 0.45

K 0.20 — —

aaa 0.10

bbb 0.10

ccc 0.08

ddd 0.10

eee 0.10

Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.

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Disclaimer
Silicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or
intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical"
parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Labs reserves the right to make changes without
further notice to the product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. Without prior
notification, Silicon Labs may update product firmware during the manufacturing process for security or reliability reasons. Such changes will not alter the specifications or the performance
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