CD4512BC 8-Channel Buffered Data Selector

October 1987
Revised January 1999

CD4512BC
8-Channel Buffered Data Selector
General Description Features
The CD4512BC buffered 8-channel data selector is a com- ■ Wide supply voltage range: 3.0V to 15V
plementary MOS (CMOS) circuit constructed with N- and ■ High noise immunity: 0.45 VDD (typ.)
P-channel enhancement mode transistors. This data selec-
tor is primarily used as a digital signal multiplexer selecting ■ 3-STATE output
1 of 8 inputs and routing the signal to a 3-STATE output. A ■ Low quiescent power dissipation:
high level at the Inhibit input forces a low level at the out- 0.25 µW/package (typ.) @ VCC = 5.0V
put. A high level at the Output Enable (OE) input forces the ■ Plug-in replacement for Motorola MC14512
output into the 3-STATE condition. Low levels at both the
Inhibit and (OE) inputs allow normal operation.

Ordering Code:
Order Number Package Number Package Description
CD4512BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
CD4512BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.

Connection Diagram Truth Table

Pin Assignments for SOIC and DIP Address Inputs Control Inputs Output
C B A Inhibit OE Z
0 0 0 0 0 X0
0 0 1 0 0 X1
0 1 0 0 0 X2
0 1 1 0 0 X3
1 0 0 0 0 X4
1 0 1 0 0 X5
1 1 0 0 0 X6
1 1 1 0 0 X7

Top View 2 1 1 1 0 0
2 2 2 2 1 Hi-Z

2 = Don't care
Hi-Z = 3-STATE condition
Xn = Data at input n

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CD4512BC
Logic Diagram

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 CD4512BC
Absolute Maximum Ratings(Note 1) Recommended Operating
(Note 2) Conditions (Note 2)
Supply Voltage (VDD) −0.5 to +18 VDC DC Supply Voltage (V DD) 3.0 to 15 VDC
Input Voltage (VIN) −0.5 to VDD + 0.5 VDC Input Voltage (VIN) 0 to VDD VDC
Storage Temperature Range (TS) −65°C to +150°C Operating Temperature Range (TA) −40°C to +85°C
Power Dissipation (P D) Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
Dual-In-Line 700 mW that the devices should be operated at these limits. The Recommended
Small Outline 500 mW Operating Conditions and Electrical Characteristics table provide condi-
tions for actual device operation.
Lead Temperature, (TL)
Note 2: VSS = 0V unless otherwise specified.
(Soldering, 10 seconds) 260°C

DC Electrical Characteristics (Note 2)

−40°C +25°C +85°C
Symbol Parameter Conditions Units
Min Max Min Typ Max Min Max
IDD Quiescent Device VDD = 5V, VIN = VDD or VSS 20 0.005 20 150 µA
Current VDD = 10V, VIN = VDD or VSS 40 0.010 40 300 µA
VDD = 15V, VIN = VDD or VSS 80 0.015 80 600 µA
VOL LOW Level VDD = 5V 0.05 0 0.05 0.05 V
Output Voltage VDD = 10V |IOL| < 1 µA 0.05 0 0.05 0.05 V
VDD = 15V 0.05 0 0.05 0.05 V
VOH HIGH Level VDD = 5V 4.95 4.95 5.0 4.95 V
Output Voltage VDD = 10V |I OH| < 1 µA 9.95 9.95 10.0 9.95 V
VDD = 15V 14.95 14.95 15.0 14.95 V
VIL LOW Level VDD = 5V, VO = 0.5V 1.5 2.25 1.5 1.5 V
Input Voltage VDD = 10V, VO = 1.0V 3.0 4.50 3.0 3.0 V
VDD = 15V, VO = 1.5V 4.0 6.75 4.0 4.0 V
VIH HIGH Level VDD = 5V, VO = 4.5V 3.5 3.5 2.75 3.5 V
Input Voltage VDD = 10V, VO = 9.0V 7.0 7.0 5.50 7.0 V
VDD = 15V, VO = 13.5V 11.0 11.0 8.25 11.0 V
IOL LOW Level Output VDD = 5V, VO = 0.4V 0.52 0.44 0.78 0.36 mA
Current VDD = 10V, VO = 0.5V 1.3 1.1 2.0 0.9 mA
(Note 3) VDD = 15V, VO = 1.5V 3.6 3.4 7.8 2.4 mA
IOH HIGH Level Output VDD = 5V, VO = 4.6V −0.2 −0.16 −0.12 mA
Current VDD = 10V, VO = 9.5 −0.5 −0.4 −0.3 mA
(Note 3) VDD = 15V, V O = 13.5V −1.4 −1.2 −1.0 mA
IIN Input Current VDD = 15V, VIN = 0V −0.3 −10−5 −0.3 −1.0 µA
VDD = 15V, VIN = 15V 0.3 10−5 0.3 1.0 µA
IOZ 3-STATE VDD = 15V, VO = 0V ±1.0 ±10 −5 ±1.0 ±7.5 µA
Output Current VDD = 15V, VO = 15V
Note 3: IOH and IOL are tested one output at a time.

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CD4512BC
AC Electrical Characteristics (Note 4)
TA = 25°C, tr = tf = 20 ns, CL = 50 pF
CD4512BM CD4512BC
Symbol Parameter Conditions Units
Min Typ Max Min Typ Max
tPHL Propagation Delay VDD = 5V 225 500 225 750 ns
HIGH-to-LOW Level VDD = 10V 75 175 75 200 ns
VDD = 15V 57 130 57 150 ns
tPLH Propagation Delay VDD = 5V 225 500 225 750 ns
LOW-to-HIGH Level VDD = 10V 75 175 75 200 ns
VDD = 15V 57 130 57 150 ns
tTHL, tTLH Transition Time VDD = 5V 70 200 70 200 ns
VDD = 10V 35 100 35 100 ns
VDD = 15V 25 80 25 80 ns
tPHZ, tPLZ Propagation Delay into VDD = 5V 50 125 50 125 ns
3-STATE from Logic Level VDD = 10V 25 75 25 75 ns
VDD = 15V 19 60 19 60 ns
tPZH, tPZL Propagation Delay to Logic VDD = 5V 50 125 50 125 ns
Level from 3-STATE VDD = 10V 25 75 25 75 ns
VDD = 15V 19 60 19 60 ns
CIN Input Capacitance (Note 5) 7.5 15 7.5 15 pF
COUT 3-STATE Output (Note 5) 7.5 15 7.5 15 pF
Capacitance
CPD Power Dissipation Capacity (Note 6) 150 150 pF
Note 4: AC Parameters are guaranteed by DC correlated testing.
Note 5: Capacitance guaranteed by periodic testing.
Note 6: CPD determines the no load AC power of any CMOS device. For complete explanation, see Family Characteristics Application Note, AN-90.

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 CD4512BC
Typical Application
Serial Data Routing Interface

AC Test Circuit and Switching Time Waveforms

Input Connections for tr, tf, tPLH, tPHL

Test Inhibit A X0
1 PG GND VDD
2 GND PG VDD
3 GND GND PG

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CD4512BC
3-STATE AC Test Circuit and Switching Time Waveforms

Switch Positions for 3-STATE Test

Test S1 S2 S3 S4
tPHZ Open Closed Closed Open
tPLZ Closed Open Open Closed
tPZL Closed Open Open Closed
tPZH Open Closed Closed Open

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 CD4512BC
Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Wide
Package Number M16A

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CD4512BC 8-Channel Buffered Data Selector
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N16E

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instructions for use provided in the labeling, can be rea-
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