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02 ISA-Ch10

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24 views37 pages

02 ISA-Ch10

Uploaded by

Abdalrhman juber
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Organization

Instruction Set Characteristics,


Instruction Formats, Addressing
Modes, RTL & Micro-Operations, CISC,
RISC.

Chapter (10 )

1
Instruction Set Architecture (ISA)
• Complete set of instructions used by a machine
• Abstract interface between the HW and lowest-
level SW.
• An ISA includes the following …
— Instructions and Instruction Formats
– Data Types, Encodings, and Representations
– Programmable Storage: Registers and Memory
– Addressing Modes: to address Instructions and Data
– Handling Exceptional Conditions (like division by zero)

• Examples (Versions) First Introduced in


— Intel (8086, 80386, Pentium, ...) 1978
— MIPS (MIPS I, II, III, IV, V) 1986
— PowerPC (601, 604, …) 1993
The Instruction Set Architecture
• ISA is considered part of the SW
• Must be designed to survive changes in
hardware technology, software
technology, and application characteristic.
—Is the agreed-upon interface between all the
software that runs on the machine and the
hardware that executes it.
• Advantages:
—Different implementations of the same
architecture
—Easier to change than HW
—Standardizes instructions, machine language
bit patterns, etc.
• Disadvantage:
—Sometimes prevents using new innovations
Instruction Set Architecture:
Critical Interface

software

instruction set

hardware

• Properties of a good abstraction


— Lasts through many generations (portability)
— Used in many different ways (generality)
— Provides convenient functionality to higher levels
— Permits an efficient implementation at lower levels
Intel 8086 instruction set
• There were 116 instructions in the Intel
8086 instruction set
Elements of an Instruction
• Operation code (Op code)
—Specify the operation (e.g., ADD, I/O)
• Source Operand reference
—Operands that are input to the operation.
• Result Operand reference
—Put the answer here
• Next Instruction Reference
—Tells the processor where to fetch the next
instruction
Instruction Representation
• In machine code each instruction has a
unique bit pattern
• For human consumption (well,
programmers anyway) a symbolic
representation is used
—e.g. ADD, SUB, LOAD
• Operands can also be represented in this
way
—ADD A,B
Instruction Cycle State Diagram
Generic CPU Machine Instruction
Execution Steps

9
Where have all the Operands Gone?
Where is the next instruction to be fetched?
• Main memory (or virtual memory or
cache)

• CPU register

• I/O device
Typical Operations
Types of Operand
• Addresses
• Numbers
—Integer/floating point
• Characters
—ASCII etc.
• Logical Data
—Bits or flags
Types of Operation
• Data Transfer
• Arithmetic
• Logical
• Conversion
• I/O
• System Control
• Transfer of Control
Data Transfer
• Specify
—Source
—Destination
—Amount of data
• May be different instructions for different
movements
—e.g. IBM 370
• Or one instruction and different addresses
—e.g. VAX
Arithmetic
• Add, Subtract, Multiply, Divide
• Signed Integer
• Floating point ?
• May include
—Increment (a++)
—Decrement (a--)
—Negate (-a)
Types of Operation

Shift and Rotate Operations


Logical and Conversion
• Bitwise operations
• AND, OR, NOT
• E.g. Binary to Decimal
Types of Operation
• Input/Output
—May be specific instructions
—May be done using data movement
instructions (memory mapped)
—May be done by a separate controller (DMA)

• Systems Control
—For operating systems use
Transfer of Control
• Branch
—e.g. BRZ X branch to x if result of (ADD,SUB,…) is zero
— See next slide
• Skip
—e.g. increment and skip if zero ISZ
301
.
.

309 ISZ R1
310 BR 301
311
* eg. R1is set to -1000, the loop will be executed 1000 times
• Subroutine call
—c.f. interrupt call
Branch Instruction
Procedure Calls Instructions
• Computer program that is incorporated
with larger program.
• At any point in the program the procedure
may be invoked, or called
• When the procedure is executed, return to
the point at which the call took place.
• Advantages:
—Economy:
+The same piece of Code can be used many times-
efficient use of storage space in the system
—Modularity
+Allow large programming tasks to be divided into
smaller units which eases the programming
task
Procedure Calls Instructions
• Involves two basic instructions
—Call: branch to the procedure location
—Return: from the procedure to the place from
which it was called

• Stack can be used to store the return


address.
Nested Procedure Calls
Use of Stack
Number of Addresses (a)
• # of addresses contained in each
instruction
—May be 1, 2, 3 or 4 addresses
• 3 addresses
—Operand 1, Operand 2, Result
—ADD a,b,c (a = b + c;)
• 4 addresses
—Operand 1, Operand 2, Result, and next
instruction
—Not common
—Needs very long words to hold everything
Number of Addresses (b)
• 2 addresses
—One address doubles as operand and result
— ADD a,c (a = a + b)
—Reduces length of instruction
—Requires some extra work
– Temporary storage to hold some results
• 1 address
—Implicit second address
—Usually a register (accumulator)
—ADD B (AC = AC + B)
—Common on early machines
REVERSE POLISH NOTATION
Arithmetic Expressions: A + B
A+B Infix notation
+AB Prefix or Polish notation
AB+ Postfix or reverse Polish notation
- The reverse Polish notation is very suitable for
stack manipulation

Evaluation of Arithmetic Expressions


Any arithmetic expression can be expressed in parenthesis-free
Polish notation, including reverse Polish notation

(3 * 4) + (5 * 6) ⇒ 34*56*+

6
4 5 5 30
3 3 12 12 12 12 42
3 4 * 5 6 * +
Number of Addresses (d)
• 0 (zero) addresses
—Applicable to a special memory organization
called Stack
—Stack is known location
—Often at least the top two stack elements are
in processor registers
– ADD
– All addresses implicit
—e.g. push a
— push b
— add
— pop c
—c = a + b
How Many Addresses
• More addresses
—More complex (powerful?) instructions
—More registers
– Inter-register operations are quicker
—Fewer instructions per program
• Fewer addresses
—Less complex (powerful?) instructions
—More instructions per program
—Faster fetch/execution of instructions
• Most processor designs involve a variety
of instruction formats.
Fundamental Issues in Instruction Set Design

• Operation repertoire
— How many ops?
— What can they do?
— How complex are they?
• Data types
— The data type that the processor can deal with
— E.g., Pentium can deal wit data types of:
– Byte, 8 bits
– Word, 16 bits
– Doubleword, 32 bits
– Quadword, 64 bits
– Other data type…
• Instruction formats
— Length of op code field
— Number of addresses
Fundamental Issues in Instruction Set Design

• Registers
—Number of CPU registers available
—Which operations can be performed on which
registers?
• Addressing modes (later…)

• RISC v CISC
Byte Order
(A portion of chips?)
• What order do we read numbers that occupy
more than one byte
• e.g. (numbers in hex to make it easy to read)
• 12345678 can be stored in 4x8bit locations as
follows
Byte Order (example)
• Address Value (1) Value(2)
• 184 12 78
• 185 34 56
• 186 56 34
• 186 78 12

• i.e. read top down or bottom up?


Byte Order Names
• The problem is called Endian
• The system on the left has the least significant
byte in the lowest address
• This is called big-endian
• The system on the right has the least
significant byte in the highest address
• This is called little-endian
Example of C Data Structure
Alternative View of Memory Map
Standard…What Standard?
• Pentium (80x86), VAX are little-endian
• IBM 370, Moterola 680x0 (Mac), and most RISC
are big-endian
• Internet is big-endian
—Makes writing Internet programs on PC more
awkward!
—WinSock provides htoi and itoh (Host to Internet &
Internet to Host) functions to convert

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