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03 Instruction Set Architecture Co 2022

This document discusses instruction set architecture (ISA) and key concepts in computer organization. It explains that an ISA includes the complete set of instructions and addressing modes supported by a processor. It provides examples of popular processor ISAs from Intel, AMD, ARM and others. It also defines important memory concepts like word size, memory addresses, alignment and basic memory operations like load and store. Finally, it outlines the main types of instructions that a processor must support including data transfer, arithmetic, program control and I/O.

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Win War
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83 views10 pages

03 Instruction Set Architecture Co 2022

This document discusses instruction set architecture (ISA) and key concepts in computer organization. It explains that an ISA includes the complete set of instructions and addressing modes supported by a processor. It provides examples of popular processor ISAs from Intel, AMD, ARM and others. It also defines important memory concepts like word size, memory addresses, alignment and basic memory operations like load and store. Finally, it outlines the main types of instructions that a processor must support including data transfer, arithmetic, program control and I/O.

Uploaded by

Win War
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as ODP, PDF, TXT or read online on Scribd
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Computer Organization

Instruction Set Architecture


Abhijit A M
[email protected]
9422308125
ISA
● A complete instruction set, including
operand addressing methods, is often
referred to as the instruction set
architecture (ISA) of a processor.
Many processors!
● Many Processors!
– Intel x86 series
● 8086, 8088, 80286, 80386, 80486, Pentium (80586), Pentium-II, Core2-Duo, Core-i3, ...
● AMD processor follow the same ISA !
– Nios II processor from Altera Corporation.
– ColdFire processor from Freescale Semiconductor, Inc.
– ARM processor from ARM Ltd.
– PowerPC by IBM
– SPARC by Sun Solaris (now Oracle)
●
We study the “generic” concepts
Memory (RAM!) Locations and addresses
●
Memory cell: 1 bit of information
●
8 bits: 1 byte
●
Some fixed #bytes: Word
●
Each byte location has an “address”
– Processors can “address” a fixed amount of
RAM only
– “k” bit address space, means 0 to 2k-1
addresses in memory
●
Word length, typically 16,24,32,64 bits
– Memory if typically accessible on word
boundaries
Memory sizes, notations
● K bit address space: 0..2k-1
● 210 is called kilo (K), nearly thousand
● 220 is called mega (M), nearly a million
● 230 is called giga (G), nearly a billion
● 232 is 4 giga, nearly 4 billion
● B is Bytes, b is bits
● What do these mean? 4KB, 4Kb, 32 Gb, 16 MB
Word Alignment
● Word aligned memory addresses
– If word size is 2 bytes, then 0, 2, 4, 6, ...
– If word size is 4 bytes, then 0, 4, 8, 12, ...
– If word size is 8 bytes, then 0, 8, 16, 24, ...
● Unaligned addressed
– All addresses that are not aligned
● Byte addressibility
– Any memory address can be part of a machine instruction
– Fetching data from unaligned addresses may be more expensive (in terms of
time)
Memory operations
● Processor must have instructions to
– Read from memory (into CPU’s registers)
● E.g. Load R1, <addr1>
– Write to memory (from CPU’s registers)
● E.g. Store <addr2>, R2
–
Instruction types: must have
1) Data Transfer
 To and From Memory
2)Arithmetic and Logic operations
 On data already in registers
3)Program Sequencing and control
 To change PC value, automatically or at will
4)I/O transfers
 How do you get data/code in RAM? From I/O devices to RAM!
●
Why these 4 types?
– That’s how you utitlise all the functional units, and make them work with each other!
Notation for instructions
● Register Transfer ● Assembly
Notation Language Notation
● R1 <- [addr] – Load R1, [addr]
● R4 <- [R1] + [R2] – Add R4, R1, R2

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