MICROPROCESSORS & PERIPHERALS

20CS405

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 Course Outcome
 At the end of the course the student will be able to:
 1. Illustrate the internal architecture of 8086 microprocessor,
concept of addressing modes. Develop and execute simple 8086
programs using 8086 instruction set.
 2. Build and examine modular assembly level language program
for 8086 microprocessors.
 3. Interface microprocessor to external I/O devices namely logic
controller, stepper motor, seven segment display, DAC, keypad,
and elevator.
 4. Construct machine code for 8086 and describe the working and
benefits of 8259A Priority Interrupt Controller.
 5. Describe the hardware components of 8086 and outline the
salient features of advanced microprocessors.
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 Syllabus
UNIT – I

8086 INTERNAL ARCHITECTURE :The Programming Model, Multipurpose

registers, Special purpose Registers, Segment registers. Real mode memory addressing,
Protected mode memory addressing, Flat mode addressing.

8086 ADDRESSING MODES: Register addressing, Immediate addressing, Direct

addressing, Register Indirect addressing, Based addressing with displacement, Indexed
addressing with displacement, Based Indexed addressing, Based Indexed addressing
with displacement.

8086 INSTRUCTIONS SET – 1 Data transfer instructions (including I/O transfers),

Binary arithmetic instructions, Decimal (BCD, ASCII) arithmetic instructions, Logical
instructions, Shift and rotate instructions, Control transfer instructions, PUSHF and
POPF, XLAT instructions.

8086 PROGRAMMING BASED ON INSTRUCTION SET - 1: Programs based on data

transfer instructions, binary arithmetic instructions, logical instructions, shift and rotate
instructions, control transfer instructions. 10 Hours
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Introduction to Microprocessors

Unit-I
Part A

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Block diagram of Computer

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 Overview of Microcomputer
Structure and Operation

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 Block Diagram of Microprocessor based
Computer System

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 Major parts are the CPU, Memory and the
Input and Output circuitry or I/O

 Connecting these parts are three sets of

parallel lines called buses

 Address bus, Data Bus and Control Bus

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 DATA BUS

INPUT
DEVICE
CONTROL CONTROL
MEMORY
I/O BUS BUS
CPU (RAM AND
PORTS
ROM)

OUTPUT
DEVICE ADDRESS BUS

Block Diagram of a simple Microcomputer

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Memory
 Memory unit is the integral part of any
microcomputer system and its primary purpose is
to hold program and data

 The major design goal of memory unit is to allow

it to operate at a speed close to that of the
processor

 In order to seek a trade-off between the cost and

operating speed, a memory system is usually
designed with different technologies such as solid
state, magnetic and optical

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 There is no speed disparity between the
registers and the microprocessor because
they are fabricated using the same
technology

 The main disadvantage is the cost involved

which forces the architect to include very few
registers (usually 8 to 16 only) in the
microprocessor

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 A Microcomputer memory can be logically divided
into three groups:
 Processor Memory
 Primary or Main Memory
 Secondary memory

 Processor Memory refers to a set of CPU

registers

 These registers are useful to hold temporary

results when a computation is in progress

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Primary Memory:

 Is the storage area in which all the programs are

executed

 The processor can directly access only those items

that are stored in the primary memory

 All the programs and corresponding data must be

within primary memory prior to execution

 The size of primary memory is much larger

compared to processor memory but its operating
speed is slower than processor registers

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 Primary memory normally includes ROM
(Read Only Memory) and RAM (Random
Access Memory)

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Secondary memory

 Refers to the storage medium for huge files

such as program source codes, compilers,
operating systems, RDBMSs etc

 These are not needed very frequently

 They comprises of slow devices such as

magnetic tapes and optical disks

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Input/Output

 Allows the computer to take in data from the outside

world or send data to the outside world

 Peripherals such as keyboards, video display

terminals, printers and modems are connected to
the I/O section

 The actual physical devices used to interface the

computer buses to external systems are called
ports

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 An input port allows data from a keyboard, an
A/D converter, or some other source to be read
into the computer under the control of CPU

 An output port is used to send data from the

computer to some peripheral, such as a video
display terminal, a printer etc

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Central Processing Unit (CPU)

 Controls the operation of the computer

 Fetches binary-coded instructions from memory,

decodes the instructions into a series of simple
actions and carries out these actions in a
sequence of steps

 Also contains Address Counter or Instruction

Pointer register

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Address Bus

 Consists of 16, 20, 24 or 32 parallel signal lines

 On these lines the CPU sends out the address of

the memory location that is to be written or read
from

 The number of unique addresses a microprocessor

can generate depends on the width of this bus

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 16 – bits address bus - it can generate 216 =
65,536 different addresses

 Unidirectional – from microprocessor to

memory or I/O elements

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Data Bus
 Consists of 8, 16 or 32 parallel signal lines

 Bidirectional – data is brought on these lines prior to

an operation and results are sent back to selected
memory location or I/O using these lines only

 The width determines the amount of information that

can be brought/sent at once, more precisely in one
machine cycle into or out of processor

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Control Bus
 Consists of 4 to 10 signal lines

 CPU sends out signals on the control bus to enable the

outputs of addressed memory devices or port devices

 Typical control bus signals are Memory Read, Memory

Write, I/O Read, and I/O Write

 Some signals are unidirectional and some are

bidirectional

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 The memory read signal enables the
addressed memory device to output a data
word onto the data bus

 The data word from the memory travels along

the data bus to the CPU

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Hardware, Software, and Firmware
 Hardware is the name given to the physical
devices and circuitry of the computer

 Software refers to the programs written for the

computer

 Firmware is the term given to programs stored in

ROMs or in other devices which permanently
keep their stored information

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 Simple Micro Computer Operation:
3- Instruction program

 Input a value from port 05H

 ADD 07H to that value
 Output result to port 02h

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Central Processing Unit (CPU)

 Controls the operation of the computer

 Fetches binary-coded instructions from memory,

decodes the instructions into a series of simple
actions and carries out these actions in a
sequence of steps

 Also contains Address Counter or Instruction

Pointer register

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Memory address and memory content
for 3-Step Program

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Execution of 3-Step Program

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 EVOLUTION
OF
MICROPROCESSORS

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First generation (1971 – 73)
 In 1971, Intel Corporation introduced 4004, the 4 bit
microprocessor.
 4004 is a 4 bit programmable controller on chip,
contained 45 Instructions. It is evolved from the
development effort while designing a calculator chip

 There were three other microprocessors in the

market during the same period:
 Rockwell International’s PPS-4 (4 bits)
 Intel’s 8008 (8 bits)
 National Semiconductor’s IMP-16 (16 bits)

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 They were fabricated using PMOS
technology which provided low cost, slow
speed and low output currents

 They were not compatible with TTL

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Second Generation (1974 – 1978)
 Marked the beginning of very efficient 8 – bit microprocessors

 Some of the popular processors were:

 Motorola’s 6800 and 6809

 Intel’s 8080 followed by Intel’s 8085
 Zilog’s Z80

 They were manufactured using NMOS technology

 This technology offered faster speed and higher density than

PMOS

 It is TTL compatible

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 Third generation microprocessors (1979 – 80)
 This age is dominated by 16 – bits microprocessors

 Some of them were:

 Intel’s 8086/80186/80286
 Motorolla’s 68000/68010

 They were designed using HMOS technology

 HMOS provides some advantages over NMOS as

 Speed-power-product of HMOS is four times better than that of

NMOS

 HMOS can accommodate twice the circuit density compared to

NMOS

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 Fourth Generation (1981 – 1995)
 This era marked the beginning of 32 bits microprocessors

 In 1983 Intel released a successful 32 bit microprocessor called

as 80386

 Motorola introduced 68020/68030.

 Intel introduced 80486 in 1989.

 Pentium series processor from 1993 having additional
functionalities which is also 32 bit processors

 They were fabricated using low-power version of the HMOS

technology called HCMOS

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Fifth Generation (1995 – till date)

 This age the emphasis is on introducing chips that carry

on-chip functionalities and improvements in the speed of
memory and I/O devices along with introduction of 64-bit
microprocessors.

 64 bit processors Pentium 4, Core 2 and multiple Core

are introduced that can address 4G bytes of memory
through 64 bit address

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Types of Microprocessors Based on devices
optimized and designed for doing some task
 Dedicated or embedded controllers generally
Known as microcontrollers:
 Designed to control smart machines like washing
machines, microwave ovens, metal lathes. Example
Intel 8048 an 8 bit CPU,RAM,ROM and some I/O port all
in one, Intel 8051,8096
 Bit-slice processors:
 Advanced micro devices 2900 family that includes 4 bit
ALU’s, Multiplexers and other parts needed for custom
building a CPU which can be connected in parallel to
work with 8,16 or 32 bit words are called as bit-slice
processors
 :
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 General purpose CPU’s:
 Can be programmed to perform several tasks with
variety of applications
 Gives a microcomputer having good computing power
 Intel series starting from 8085, 8086, 8088, 80186
,80286, 80386, 80486, pentium, core2, Dual core, i3…
 Motorola 6800,6809,68000 series

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Architecture of 8086

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 20
Adder

Bus Interface
ES Unit
CS
SS Instruction
DS queue

IP

AX AH(8) AL(8) Control Control

BH(8) BL(8) Unit lines
BX General
CX CH(8) CL(8) Registers
DX DH(8) DL(8)

SP Execution
BP
ALU Unit
DI
SI
Flags

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Execution Unit

 The execution unit consists of

 Arithmetic Logic Unit
 Control unit
 Flag Registers
 General Registers

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Arithmetic Logic Unit (ALU)
 ALU is 16-bits wide. It can do the following 16-bits
arithmetic operations
 Addition
 Subtraction
 Multiplication
 Division

 Arithmetic operations may be performed on four

types of numbers
 Unsigned binary numbers
 Signed binary numbers (Integers)
 Unsigned packed decimal numbers
 Unsigned unpacked decimal numbers

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 The ALU can also perform logical operations
such as
 NOT
 AND
 OR
 EXCLUSIVE OR
 TEST

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Flag Register

 The Execution Unit has a 16-bit flag register some of

flags indicates some conditions affected by the execution
of an instruction.

 Some bits of the flag register control certain operations

of the EU.

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15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

U U U U OF DF IF TF SF ZF U AF U PF U CF

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 Six of the nine flags are used to indicate some
condition produced by an instruction

 These condition flags are also called status flags of

8086 microprocessor

 These are the Carry flag, Parity flag, Auxiliary carry

flag, Zero flag, and Sign flag

 The other three Control flags are Trap Flag,

Direction Flag and Interrupt flag

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Carry Flag (CF)

 This flag will be set to one if the addition of two

16-bit binary numbers produces a carry out of
the most significant bit position or if there is a
borrow to the MSB after subtraction

 This flag is also affected when other arithmetic

and logical instruction are executed

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Parity Flag (PF)

 This flag is set, if the result of the operation has

an even number of 1's (in the lower 8 bits of the
result)

 This flag can be used to check for data

transmission error

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Auxiliary Carry Flag (AF)

 This flag is set, when there is a carry out of the

lower nibble to the higher nibble or a borrow
from the higher nibble to the lower

 The auxiliary carry flag is used for decimal adjust

operation

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Zero Flag (Z)

 This flag is set when the result of an

operation is zero

 The flag is reset when the result is not zero

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Overflow Flag (O)

 This flag is set, when an arithmetic overflow

occurs

 Overflow means that the size of the result

exceeded the storage capacity of the
destination, and a significant digit has been lost

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Sign flag (S)

 This flag is set, when an MSB bit of the result is

high after an arithmetic operation

 When this flag is set the data is assumed to be

negative and when this flag is zero it is assumed
to be positive

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Control Flags
 Control flags are used to control certain operations
of the processor

 The application of these flags are different from that

of six conditional flags

 The conditional flags are set or reset by the EU on

the basis of the result of some arithmetic or logic
operations

 The control flags are deliberately set or reset with

specific instructions included in the program

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Trap flag (T)

 This is used for single stepping through a

program

 It is used for debugging the programs

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Interrupt Flag (I)

 It is used to allow / prohibit the interruption of a

program

 When the flag set, it enables the interrupt from

INTR

 When the flag is reset (0), it disables the

interrupt

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Direction Flag (D)

 It is used for string instruction

 If the direction flag is set, the pointers are

decremented else the pointers are
incremented

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General Registers

 The CPU has eight 16-bit general registers

 They are divided into two files of four

registers each

 They are:
(a) The data register file and
(b) The pointer and index register file

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 AH AL AX
BH BL BX
CH CL CX
DH DL DX
Data Register File

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 The upper and lower halves of the data
registers are individually addressable

 The data registers can be used in most

arithmetic and logic operations

 Some instructions however require these

registers for specific use

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 The index register file consists of the Stack
Pointer (SP), the Base Pointer (BP), Source
Index (SI) and Destination Index (DI)
registers all are of 16-bits

 These registers are usually used to hold

offset addresses for addressing within a
segment

 Offset addressing reduces program size by

eliminating the need for each instruction to
specify frequently used addresses
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 Stack pointer: it holds the 16 bit offset from
the start of stack segment to the memory
location where a word most recently stored
on a stack(top of the stack).

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 The pointer and index register files are further
divided into the pointer sub-file (containing the Stack
Pointer and the Base Pointer registers) and the
index sub-file (containing the Source index and
Destination index registers)

 Unless otherwise specified in the instruction, stack

pointer registers refer to the current stack segment
while index register refers to the current data
segment

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 8086 has an additional pointer into the stack called
the BP register

 the BP register is used to hold an old stack pointer

value, or it can mark a place in the subroutine stack
independent of the SP register

 SI and DI are both 16-bits wide and are used by

string manipulation instructions and in building some
of the more powerful 8086/8088 data structures and
addressing modes

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 Both the SI and the DI registers have auto
incrementing and auto-decrementing
capabilities

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Bus Interface Unit (BIU)
 The BIU sends out addresses, fetches instructions
from memory, reads data from memory and ports,
and writes data to ports and memory

 BIU handles all transfers of data and addresses on

the buses for the execution unit

 The BIU has

1. An instruction queue
2. An Instruction pointer
3. Segment registers

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Instruction Queue

 To speed up program execution, the BIU fetches as

many as 6 instruction bytes ahead of time from
memory

 The prefetched instruction bytes are held for the EU

in a first-in-first-out group of register called a queue

 When the EU is ready for its next instruction, it

simply reads the instruction from the queue in the
BIU

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 Fetching the next instruction while the
current instruction executes, is called
pipelining

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Segment Registers
 The 8086 microprocessor uses segmented
memory.
 A segment is a logical unit of memory that may
be up to 64K bytes long.
 In 8086 Memory is viewed as collection of 64K
bytes long segments
 That is memory is divided into segments namely
Code segment, data segment, Extra segment
and stack segment
 All the segment registers in 8086 are 16-bits in
length.
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 Each segment is made up of contiguous memory
locations and is an independent, separately
addressable unit
 Each segment is assigned a base address, which is
its starting location in the memory space.
 A segment register is used to hold the16 bits of the
starting address for each of the segments
 There are four 16 bits segment registers namely
Code segment Data segment, Extra segment and
stack segment register.
 All segments start on 16-bit memory boundaries

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 The 20 bit address for address line to address memory is
generated from the 16 bit starting address of segment
register and a 16 bit offset address.
 The actual memory address which is 20 bit in length in
20 bit address line is known as physical address.
 The 16 bit number that expresses the operand's distance
in bytes from the beginning of the segment in which it
resides is called as Effective address
 The BIU always inserts zeros for the lowest 4 bits
(nibble) of the 20-bit starting address for a segment
 For example, If the code segment register contains
348Ah, then the code segment will start at address
348A0h

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 FFFFFH HIGHEST ADDRESS

7FFFFH Top of Extra Segment

64k

70000H Extra Segment Base ES = 7000H

5FFFFH Top of Stack Segment

64k

50000H Stack Segment Base SS = 5000h

4489FH Top of Code Segment

64k

348A0H Code Segment Base CS = 348Ah

2FFFFH Top of Data Segment

64k

20000H Bottom of Data Segment

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 Given that the EA is 2359 H and the DS =
490B H, what is the physical address?
DS: 490B0 H
EA: 2359 H
Physical add. 4B409

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 The main advantages of segmentation is that It
provides a powerful memory management
mechanism. Data related or stack related operations
can be performed in different segments. Code
related operation can be done in separate code
segments.
 There is no restriction on the locations of these
segments in the memory. These segments can
be separate from each other or they can overlap. In
the users program there can be many segments but
8086 can deal with only four of them at any given time
because it has only four segment registers.
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Instruction Pointer (IP)
 The Instruction Pointer is a 16-bit register

 The instruction pointer is incremented after

each opcode fetch to point to the next
instruction

 The value contained in the IP is referred to as an

offset because this value must be offset from
(added to) the segment base address in CS to
produce the required 20-bit physical address
sent out by the BIU

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Default offset registers for Physical
Address calculation

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The programming model of the 8086 through the Core2
microprocessor including the 64-bit extensions.

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 8086, 8088, and 80286 contain 16-bit internal architectures
 The 80386 through the Core2 microprocessors contain full 32-
bit internal architectures.
 The Pentium 4 and Core2 also contain 64-bit registers when
operated in the 64-bit mode.

 The architectures of the 8086 through the 80286 are fully upward-
compatible to the 80386 through the Core2.
 The 8-bit registers are AH, AL, BH, BL, CH, CL, DH, and DL are
referred to when an instruction is formed using these two-letter
designations.

 The 16-bit registers are AX, BX, CX, DX, SP, BP, DI, SI, IP,
FLAGS, CS, DS, ES, SS, FS, and GS.

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 The extended 32-bit registers are EAX, EBX, ECX, EDX, ESP,
EBP, EDI, ESI, EIP, and EFLAGS.
 These 32-bit extended registers, and 16-bit registers FS and GS,
are available only in the 80386 and above.

 Note that 32-bit registers are designated by three-letter like

EAX,EBX ,etc..
 EAX, EBX, ECX, EDX, EBP, EDI, and ESI are multipurpose
registers

 The 64-bit registers are designated as RAX, RBX, and so forth.

 There are also 8 additional 64-bit registers that are called R8
through R15.

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 The additional 64 bit registers are addressed
as a byte, word, double word as given in the
example below
Register Size Override Bits accessed Example
8 bits B 7-0 MOV R9B, R10B
16 bits W 15 - 0 MOV R10W, AX

32 bits D 31 - 0 MOV R10D, R14D

64 bits - 63 - 0 MOV R13, R12

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Registers may be categorized into 2 groups
Multipurpose Registers
Special purpose Registers
 Multipurpose Registers :
1. Accumulator : RAX is 64-bit , EAX is 32-bit ,AX is 16
bit, AH and AL are 8 bit registers referenced as
accumulator. The accumulator is used for instructions
such as multiplication, division and some of the
adjustment instructions.

2. Base Index: RBX, EBX, BX and BH, or BL are

respectively 64,32,16 and 8bit general purpose registers
known as base index and may be used to hold the
offset address of a location in the memory
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 3. Count Registers: RCX, ECX, CX, CH, or CL, is a general-
purpose register that also holds the count for various
instructions.

 4.Data Register: RDX, EDX, DX, DH, or DL, is a general-

purpose register that holds a part of the result from a
multiplication or part of the dividend before a division.


 5. Base pointer Register: RBP, EBP, or BP, points to a

memory location for memory data transfers.

 6. Destination index Register: RDI, EDI, or DI, often

addresses string destination data for the string instructions.

 7. Source index register: RSI, ESI, or SI often addresses

source string data for the string instructions.
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 8. R8 through R15 : These registers are only found in
the Pentium 4 and Core2 if 64-bit extensions are
enabled. Data in these registers are addressed as 64-,
32-, 16-, or 8-bit sizes and are of general purpose.

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 Special-Purpose Registers.
 The special-purpose registers include RIP, RSP, and
RFLAGS; and the segment registers include CS, DS, ES, SS,
FS, and GS.

 RIP (instruction pointer):

It holds address of the next instruction in a section of
memory . This register is IP (16 bits) when the
microprocessor operates in the real mode and EIP (32 bits)
when the 80386 and above operate in the protected mode.
 In the 64-bit mode, RIP contains a 40-bit address at present
to address a 1TB flat address space.

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 RSP (stack pointer):
It addresses an area of memory called the stack. The
stack memory stores data through this pointer.
 This register is referred to as SP if used as a 16-bit
register and ESP if referred to as a 32-bit register.
 RFLAGS indicate the condition of the microprocessor
and also control its operation.
 The 8086–80286 contain a FLAG register (16 bits) and
the 80386 and above contain an EFLAG register (32-bit
extended flag register). The 64-bit RFLAGS contain the
EFLAG register, which is unchanged in the 64-bit
version.
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 The EFLAG and FLAG register counts for the entire 8086 and Pentium
microprocessor family.

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 The rightmost five flag bits and the overflow flag change
after many arithmetic and logic instructions execute. The
flags never change for any data transfer or program
control operation. Some of the flags are also used to
control features found in the microprocessor.

 Following is a list of each flag bit, with a brief description

of their function.

C (carry), P (parity), A (auxiliary carry), Z (zero), S (sign),

T (trap), I (interrup,t), D (direction), O (overflow)

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 Other flags used by 32 and 64 bit processors
 IOPL (I/O privilege level):IOPL is used in protected mode
operation to select the privilege level for I/O devices
 NT (nested task) : The nested task flag indicates that the current
task is nested within another task in protected mode operation. This flag is
set when the task is nested by software
 RF (resume) :The resume flag is used with debugging to control the
resumption of execution after the next instruction
 VM (virtual mode): The VM flag bit selects virtual mode operation
in a protected mode system. A virtual mode system allows multiple DOS
memory partitions that are 1M byte in length to coexist in the memory
system. Essentially, this allows the system program to execute multiple
DOS programs. VM is used to simulate DOS in the modern Windows
environment.

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 AC (alignment check): The alignment check flag bit
activates if a word or double word is addressed on a non-word or
non-double word boundary. Only the 80486SX microprocessor
contains the alignment check bit that is primarily used by its
companion numeric coprocessor, the 80487SX, for synchronization

 VIF(virtual interrupt): The VIF is a copy of the interrupt

flag bit available to the Pentium–Pentium 4 microprocessors. This is
used in multitasking environments to provide the operating system
with virtual interrupt flags and interrupt pending information.

 ID (identification):The ID flag indicates that the Pentium–

Pentium 4 microprocessors support the CPUID instruction. The
CPUID instruction provides the system with information about the
Pentium microprocessor, such as its version number and
manufacturer

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Segment Registers.
 Additional registers, called segment registers, generate memory
addresses when combined with other registers in the
microprocessor. There are either four or six segment registers in
various versions of the microprocessor. A segment register functions
differently in the real mode when compared to the protected mode
operation of the microprocessor

 CS (code), DS (data) , ES (extra), SS (stack) are 64K bytes length

segment registers in 8086–80286 and 4G bytes in the 80386 and
above.

 FS and GS segments are supplemental segment registers available

in the 80386–Core2 microprocessors to allow two additional
memory segments for access by programs. Windows uses these
segments for internal operations, but no definition of their usage is
available.

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