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Schedule of STC - VLSI - Design

The document announces a short-term course on modern VLSI design and EDA tools to be held from November 2-8, 2023 in a hybrid format at the National Institute of Technology Delhi. The course will cover topics such as digital and analog IC design flows using Cadence tools, recent developments in industrial IoT and its applications in VLSI design, nanometer SRAM design, and emerging non-volatile memories. It includes both lecture and hands-on sessions conducted by experts from academia and industry. Participants can choose to attend online or in-person, and the registration deadline is October 31, 2023.

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0% found this document useful (0 votes)
37 views1 page

Schedule of STC - VLSI - Design

The document announces a short-term course on modern VLSI design and EDA tools to be held from November 2-8, 2023 in a hybrid format at the National Institute of Technology Delhi. The course will cover topics such as digital and analog IC design flows using Cadence tools, recent developments in industrial IoT and its applications in VLSI design, nanometer SRAM design, and emerging non-volatile memories. It includes both lecture and hands-on sessions conducted by experts from academia and industry. Participants can choose to attend online or in-person, and the registration deadline is October 31, 2023.

Uploaded by

yvkrishnareddy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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NATIONAL INSTITUTE OF TECHNOLOGY DELHI

Department of Electronics and Communication Engineering

SCHEDULE OF SHORT-TERM COURSE ON “ Modern VLSI Design and EDA Tools Hands-on”
2nd-8th, November 2023, Hybrid Mode (Participant can attend either Online or Physical mode)
02.11.2023 03.11.2023 04.11.2023 06.11.2023 07.11.2023 08.11.2023
Thursday Friday Saturday Monday Tuesday Wednesday
10:00 AM– 12:00 NOON

Digital IC Design Recent


Inauguration
Flow Using Cadence Developments in
Session (11.00 AM) Hands-on Session Analog & Mixed
Tool- Hands-on Industrial IoT and Digital VLSI Design
& Mr. Kumar Divya, Signal Design
Session its Application in CoreEL Techn Pvt. Ltd.
Digital Design Overview Mr. Anish Kumar, VLSI Design
Prof R. K Sharma Prof. Jasdeep Kaur,
NIT Kurukshetra IGDTUW Delhi
and RTL Flow Entuple Technologies Pvt. Dr. Naman Garg
Mr. Asutosh Gupta Ltd. IIIT Una
Synopsys, India

Lunch Break

Analog IC Design Emerging Non-


02:00 PM – 04:00 PM

Flow Using Cadence Domino Logic and Nanometer SRAM Volatile Memories
Tool- Hands-on its Application for Hands-on Session Dr. Vikas Nehra
Digital VLSI Design Design
Prof. Sudebdas Gupta, Session Biomedical Devices Prof. Neeta Pandey,
Mr. Kumar Divya, DCRUST
Mr. Kamlesh, CoreEL Techn Pvt. Ltd. &
IIT Roorkee Dr. Ankur Kumar DTU Delhi
Entuple Technologies IIIT Una
Pvt. Ltd.
Velidictroy
Session

Patron: Prof. (Dr.) Ajay K Sharma, Director, National Institute of Technology Delhi
Convenor: Prof. (Dr.) Manoj Kumar & Dr. Preeti Verma, Dept. of ECE, National Institute of Technology Delhi,
Email: [email protected], Contact Number: 9717063730
Coordinators: Dr. Manisha Bharti & Dr.D.Vaithiyanathan, Dept. of ECE , National Institute of Technology Delhi
For further details: https://nitdelhi.ac.in/wp-content/uploads/2023/10/BROCHURE.pdf
Registration Link: https://forms.gle/haMs23cgPAW9QcT67
Last date for registration is 31.10.2023

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