ECE314 - Microprocessor and Microcontroller Systems Example

Assembly Language Basics Let's say we have a hypothetical machine language instruction
Assembly Language – a low-level programming language that for adding two values from memory addresses A and B and storing
serves as an intermediary between human-readable source code and the result in memory address C. Here's a simplified binary
machine code. It is specific to a computer architecture and consists of representation:
a set of symbolic names and mnemonics representing the computer's - Opcode for addition: "0001"
basic operations. - Operand 1 (Memory Address A): "11001100"
Purpose: - Operand 2 (Memory Address B): "10101010"
- Operand 3 (Memory Address C): "11110000"
• Human-Readable Representation: makes it easier for
The machine code instruction might look like this: "0001
programmers to write and understand low-level code.
11001100 10101010 11110000" This binary representation tells the
• Direct Hardware Interaction: allows direct interaction with a
CPU to execute an addition operation, fetching values from memory
computer's hardware components, such as registers, memory,
addresses A and B, and storing the result in memory address C.
and I/O ports, providing fine-grained control over a system's
resources. Syntax and Structure of Assembly Language Programs:
• Efficiency: Assembly language programs are often more Assembly Language as a Low-Level Language:
efficient in terms of execution speed and memory usage
compared to high-level languages, making it ideal for tasks Assembly language is a low-level programming language that
where performance is critical. serves as an interface between human-readable code and machine
code. It provides a symbolic representation of machine instructions.
Comparisons:
Unlike high-level languages such as Python or C++, assembly
• High-Level Languages: In contrast to high-level programming language is specific to a particular computer architecture and closely
languages like Python, C++, or Java, assembly language is much reflects the hardware's capabilities.
closer to the computer's architecture, providing more control but
requiring more detailed coding. Mnemonics and Instructions:
• Abstraction Level: While high-level languages offer a higher In assembly language programming, mnemonics are short,
level of abstraction, assembly language operates at a lower level, symbolic abbreviations used to represent machine code operations or
requiring programmers to have a deeper understanding of the instructions. They serve as a bridge between human-readable code
underlying hardware. and the actual binary instructions that a computer's CPU can execute.
Machine Language Fundamentals Each mnemonic corresponds to a specific operation that the CPU
• Machine Code – also known as machine language, is the lowest- can perform, such as data movement, arithmetic operations,
level programming language that a computer can understand. It branching, and more.
consists of binary instructions that the CPU directly interprets and Common Mnemonics:
executes.
• MOV: Stands for "move" and is used to transfer data from one
• Binary Representation: Machine code instructions are location to another. For example, MOV AX, BX copies the
represented in binary format, which means they are composed contents of register BX into register AX.
of 0s and 1s. Each binary sequence corresponds to a specific
• ADD and SUB: Represent addition and subtraction operations.
operation or instruction that the CPU can perform.
For instance, ADD AX, 10 adds the value 10 to the contents of
How Instructions are Encoded in Machine Language: register AX.
Machine language instructions are encoded in binary, which is a • JMP: Represents a jump instruction, used for altering the flow of
base-2 numeral system using 0s and 1s. This binary encoding is used program execution. JMP label transfers control to a labeled
to represent various aspects of an instruction, including the operation section of code.
to be performed (the opcode) and any data or memory addresses • CMP: Used for comparison operations. It compares two values
associated with that operation (operands and sets the CPU's flags based on the result, often used in
conditional branching.
Opcode (Operation Code) – the most critical part of a machine • CALL and RET: Used for subroutine calls and returns. CALL
language instruction. It specifies the type of operation or action that transfers control to a subroutine, and RET returns control to the
the CPU should perform. Common opcodes represent operations like calling program.
addition, subtraction, loading data from memory, storing data to • NOP: Stands for "no operation" and represents an instruction that
memory, and more. does nothing. It is often used for padding or alignment in code.
Example: In a hypothetical machine language, an opcode of Operands:
"0001" might represent addition, while "0010" represents subtraction.
• Assembly language instructions typically have one or more
In many machine language instructions, there are one or more operands. Operands provide data or specify memory addresses
operands. Operands provide the data or addresses needed to carry that the instruction operates on.
out the specified operation. The way operands are encoded can vary, • Operands can be registers, memory addresses, or immediate
but there are two primary methods:
values (constants).
a. Immediate Operand: The value of the operand is directly • Register Operand: Refers to a CPU register. For example, in
included within the instruction itself. For example, if you want to MOV AX, BX, AX and BX are registers.
add the value 42 to a register, the immediate operand might be • Memory Operand: Refers to a memory location. For example, in
"00101010" (binary for 42). MOV AL, [1234], [1234] represents a memory location.
b. Memory Address Operand: The operand specifies a memory • Immediate Operand: Represents a constant value embedded in
address where the data to be used in the operation is located. the instruction itself. For instance, MOV CX, 5 sets the CX
The CPU will fetch the data from this memory address during register to the value 5.
execution.
Encoding and Machine Code:
Operand Addressing Modes:
• While mnemonics make assembly code human-readable, they
In addition to specifying the type of operand (immediate or are translated into binary machine code for execution by the CPU.
memory address), machine language instructions often include • The assembler, a program that converts assembly code into
information about the addressing mode. The addressing mode machine code, maps each mnemonic to a specific binary opcode
defines how the CPU should interpret the operand's value or address. (operation code) and encodes the operands accordingly.
Common addressing modes include: • For example, MOV AX, BX might be translated into a sequence
• Direct Addressing: The operand directly specifies a memory of 0s and 1s that represent the appropriate opcode and operands
address where data is located. for the given CPU architecture.
• Register Addressing: The operand is a reference to a CPU What Are Registers
register where data is stored.
Registers – small, high-speed storage locations within a CPU
• Indirect Addressing: The operand points to a memory address
(Central Processing Unit) that are used to hold data temporarily during
that contains the actual memory address of the data to be used
program execution. Think of registers as the CPU's internal
(a level of indirection).
scratchpad or working memory.
• Indexed Addressing: The operand includes an offset or index
value that is added to a base address to calculate the final
memory address.
Key Characteristics of Registers: Data Movement Instructions:
Speed: Registers are the fastest storage locations in a computer. • Assembly language provides instructions for moving data
Accessing data from registers is significantly quicker than accessing between CPU registers and memory locations. One of the most
data from memory. common instructions for this purpose is MOV (move).-+
Limited in Number: A CPU typically has a limited number of registers, • The MOV instruction allows you to copy data from a memory
which can vary depending on the architecture. Common register sets location to a register or from a register to a memory location.
include general-purpose registers, special-purpose registers, and Example 1: MOV AX, [1234] copies the data stored at memory
floating-point registers. address 1234 into the AX register.
Usage: Registers are used for a variety of purposes, including data Example 2: MOV [5678], BX stores the value in the BX register
storage, arithmetic operations, addressing memory, and control flow into memory address 5678.
operations.
Direct Addressing:
3 Types of Registers:
• Direct addressing is a simple memory access mode where the
1. General-Purpose Registers: These registers can be used for a
memory address is explicitly provided within the instruction.
wide range of tasks, such as holding data, performing arithmetic
• This mode is suitable for accessing data at specific, known
operations, and serving as temporary storage for intermediate
memory addresses.
results. Common examples include AX, BX, CX, and DX.
General-Purpose Registers (8086): Example: MOV AL, [4567] loads the byte at memory address
The 8086 architecture includes several general-purpose 4567 into the AL register.
registers, each serving a specific purpose: Register Addressing:
• AX (Accumulator): Often used for arithmetic operations
and data manipulation. For example, you might perform • Register addressing mode involves using a register as an indirect
addition or subtraction with data in AX. pointer to a memory address. The content of the register serves
• BX (Base Register): Typically used for addressing data in as the address.
memory, especially in conjunction with the DI or SI registers • It's often used when the memory address is stored in a register
for effective address calculations. and needs to be accessed indirectly.
• CX (Count Register): Often used for loop control and string Example: MOV [BX], AX stores the content of the AX register at
operations. It can also serve as a general-purpose register. the memory address specified by the BX register.
• DX (Data Register): Used in arithmetic operations and for Indexed Addressing:
I/O operations, such as transferring data between the CPU
and peripheral devices. • Indexed addressing mode is especially useful when working with
2. Special-Purpose Registers: These registers serve specific data structures like arrays. It allows you to add an offset or index
functions within the CPU. to a base memory address to access elements efficiently.
Special-Purpose Registers (8086): • This mode simplifies data structure traversal.
• IP (Instruction Pointer): Keeps track of the memory • Example: MOV CX, [SI+10] loads the value at the memory
address of the next instruction to be executed. It is crucial address SI+10 into the CX register, where SI serves as the base
for program control flow. address.
• SP (Stack Pointer): Points to the top of the stack, which is Memory Operations:
essential for managing the program's call stack during
function calls and subroutine execution. • Apart from data movement, assembly instructions like ADD, SUB,
• BP (Base Pointer): Often used as a reference point for and CMP can directly operate on data stored in memory locations.
accessing data on the stack within function calls. It helps • These instructions allow for arithmetic operations and
maintain a stable frame for the current function. comparisons with memory-resident data.
• SI (Source Index) and DI (Destination Index): These • Example: ADD [BX], 5 adds 5 to the value stored at the memory
registers are commonly used for string manipulation address specified by the BX register.
instructions like copying, comparing, or searching strings in Importance in Assembly Programming:
memory.
Memory Models: In some CPU architectures like x86, memory is
3. Segment Registers (8086): In addition to general-purpose and
organized into segments, and different memory models define how
special-purpose registers, the 8086 architecture features
memory is accessed. These models dictate the addressing schemes
segment registers, which are used for memory segmentation:
used in programs.
• CS (Code Segment): Points to the segment in memory
containing executable code. Addressing Range: Different CPU architectures have varying
• DS (Data Segment): Points to the segment in memory addressing ranges, determined by the number of address bits
containing data. available. For example, the 8086 CPU has a 20-bit address bus,
• ES (Extra Segment): Often used as an additional data allowing access to a maximum of 1 MB of memory.
segment in some operations, like string manipulations. What Are Instruction Sets?
• SS (Stack Segment): Points to the segment in memory
Instruction sets – collections of machine-level instructions that a
used for the stack.
CPU can execute. Each instruction corresponds to a specific
• FS and GS (Additional Segments): In later x86 architectures
operation, such as data manipulation, arithmetic, branching, or
(not strictly 8086), these registers are introduced for
input/output.
additional data segments.
Types of Instruction Sets:
Memory and Addressing in Assembly Language
• CISC (Complex Instruction Set Computer):
Memory and addressing are fundamental concepts in assembly
CISC architectures feature a rich set of instructions, some of
language programming, as they enable the manipulation of data and
which can be complex and take multiple clock cycles to execute.
instructions. In this slide, we'll explore how assembly language
They are designed to handle a wide range of tasks with a single
interacts with memory and various addressing modes.
instruction.
Memory Access in Assembly:
Examples include the x86 architecture used in many personal
Storage and Retrieval of Data: computers.
• Memory access in assembly language involves the storage and • RISC (Reduced Instruction Set Computer): RISC
retrieval of data from memory locations. architectures have a smaller, simpler set of instructions, typically
• Memory is essential for holding program instructions, variables, designed to execute in a single clock cycle. They aim for higher
and other data structures that a program uses during execution. instruction throughput and reduced complexity.
Memory Access in Assembly Language: Examples include ARM and MIPS architectures, commonly used
Memory Addresses: in mobile devices and embedded systems.

• Memory locations are identified by numerical addresses. Each • VLIW (Very Long Instruction Word): VLIW architectures
address corresponds to a specific location in memory where data provide parallelism by allowing multiple instructions to execute
or instructions are stored. simultaneously. They rely on the compiler to schedule
• Addresses are typically represented within square brackets, such instructions for parallel execution.
as [1234], indicating the data or instruction stored at memory Example: Itanium processors from Intel.
address 1234.
• EPIC (Explicitly Parallel Instruction Computing): EPIC Microprocessor and Microcontroller
architectures, like IA-64 (Intel Architecture 64), combine System – must have at least one input, one output, and must do
elements of CISC and RISC, emphasizing parallel execution and something.
efficient handling of complex instructions. Microprocessor System
Instruction Categories: • Input voltages to tell what the microprocessor will do
Assembly instructions can be categorized into several groups: • Output voltages to control an external circuit.
• Data Movement: Instructions for copying data between registers • micro or small; processor or something that process data
and memory. Microprocessor – a programmable, multipurpose, clock-driven,
• Arithmetic/Logical: Operations like addition, subtraction, AND, register-based electronic device that reads – binary instructions,
OR, and XOR. accepts binary data as input, and processes data according to these
• Control Flow: Instructions for branching and changing the flow instructions and provides result as output.
of program execution.
• Stack Operations: Pushing and popping data from the stack.
• String Operations: Manipulating strings of data. Computer System
• Input/Output: Instructions for interacting with input and output
devices.

Microcontroller – single Integrated Circuit (IC)l typically used for a

specific application and designed to implement certain tasks. Memory
and I/O output component is connected internally. The cost of a
Computer System – consists of several key components:
system built using a microcontroller is less as all the components are
readily available. Power consumption is less. 1. Arithmetic Logic Unit (ALU) – a crucial component of a central
processing unit (CPU) in a computer. Its primary purpose is to
Microprocessor – processor in which memory and I/O output
perform arithmetic and logical operations on data. These
component is connected externally. The overall cost of a system built
operations include addition, subtraction, multiplication, division,
using a microprocessor is high. This is because of the requirement of
bitwise AND, OR, and more. The ALU is responsible for
external components. Generally, power consumption and dissipation
executing instructions and performing computations as specified
are high because of the external devices. Hence, it requires an
by the computer’s program or software. It operates on binary data,
external cooling system.
manipulating bits and bytes to produce results.
Arithmetic Operations – basically addition and subtraction. Addition
can be substituted for multiplication; subtraction for division.
Logic Operations – include NOR, NOT, or XOR
Bit Shifting Operations – moving the bits of a binary number to the
left or right by a specified number of positions.
Overflow Error – happens when the largest number that a device can
hold is exceeded.
Registers – a collection of flip-flops; storage areas inside the
microprocessor. It will be stored until the power supplies are removed
– either by an equipment fault or, more usually, by the system being
switched off.
Shift Register – shifts data from one flip-flop to the next each time
the clock runs one cycle.
Rotate Register – data from the output is fed back into the start and
it goes round and round and…
Problem 2: If the hex number 4C is applied to eight NOT gates, the
output would have the value of:
Solution:
4𝐶!" = 01001100#
&&&&&&&&&&&&&&
01001100# = 10110011#
10110011# = 𝑩𝟑𝟏𝟔
2. Memory Unit (MU)
Memory – stores bulk of data or information.
Random Access Memory – (read/write memory) stores binary data
in arrays. The data can be addressed (selected) from anywhere in the
matrix.
• Static RAM – holds its values as long as power is on. Access
times are very fast. It requires more components to do this; more
expensive and larger.
A0 – A10 – for address inputs; 11 address lines give 2^11 = 2K
WE (write enable) – for writing data into SRAM (active low)
OE (output enable) – for reading data out of SRAM (active low)
CS (chip select) – used to select the memory chip
I/O 0 – I/0 7 – for data I/O, where 8-bit data lines give an
organization of 2K * 8
• Dynamic RAM – uses passive components that hold data values
for only a few fractions of a second. It has low power consumption
and cheaper price, but slower access time; must be refreshed
periodically because the capacitor cell loses its charge.
A0 – A8 – for address inputs, where 9 address lines, thus 2^(9*2)
= 256K
WE (write enable) – for writing data into SRAM (active low)
CAS (Column Address Strobe) – sent by the processor to a
DRAM circuit to activate a column address
RAS (Row Address Strobe) – sent by the processor to a DRAM
circuit to activate a row address.
Problem 3: An SRAM with 12 address pins and 8 data pins would b. Decode Stage
have: - The instruction held in the current instruction register is
a. An organization of 128 bits now decoded by the decode unit.
b. Approximately 163.4 M locations - The instruction is made up of two parts:
c. An organization of 12K * 8 bits o Opcode: What to do
d. A storage capacity of 32 768 bits o Operand: What to do it to
- The operand could contain the actual data or the address
Solution: where the data is.
2!# ∗ 8 = 𝟑𝟐𝟕𝟔𝟖 𝒃𝒊𝒕𝒔 𝒔𝒕𝒐𝒓𝒂𝒈𝒆 𝒄𝒂𝒑𝒂𝒄𝒊𝒕𝒚 - By decoding this instruction, we can see that the operation
we need is a load operation. We need to load contents of
Problem 4: Find the capacity and number of pins set aside for
memory location 0101 into the CPU’s accumulator.
address and data for memory chips with the following organizations:
c. Execute Stage
a. 16K * 4 SRAM - We can send address 0101 to the memory address
register.
- We send the address down the address bus to main
memory.
b. 1M * 1 DRAM - We want to read the data stored in memory address 0101,
so the control unit sends a read signal along the control
bus to main memory.
- The contents stored in memory at address 0101 can now be
Problem 5: Find the organization and chip capacity for each RAM sent along the data bus to the memory data register.
with the indicated number of address and data pins: - The contents of the memory data register are now copied
to the accumulator, one of several general purpose
a. 11 address, 1 data SRAM registers in modern CPUs.
This instruction is now complete.
Bus – a collection of conductors providing a similar function.
b. 9 address, 4 data DRAM • Data Bus – a two-way bus carrying data around the system.
Information going into the microprocessor and results coming out.
• Address Bus – carries addresses and is one-way bus from the
microprocessor to the memory or other devices.
Read-Only Memory – (nonvolatile memory) used to store information • Control Bus – an association of all the other necessary
on a more-or-less permanent basis connections such as those to the chip select and read/write pins.
• Programmable ROM – a type of ROM that can be programmed Peripheral – a device that is used to put information into or get
once with specific data or instructions during manufacturing; data information out of the computer.
is fixed; cannot be changed.
Input-Output Interface – used to synchronize the operating speed if
• Erasable PROM
CPU with respect to input-output devices. It selects the input-output
o UVPROM (Ultraviolet PROM) – refers to EPROM chips that
device which is appropriate for the interpretation of the input-output
can be erased by exposing the memory cells to ultraviolet
device. It converts Series-Parallel or Digital-Analog Signals.
light.
o EEPROM (Electrically EPROM) – can be electrically Architecture of Microprocessor
programmed and erased.
Problem 6: Find the capacity and number of pins set aside for
address and data for memory chips with the following organizations:
a. 32K * 8 EPROM

b. 64K * 8 EEPROM

Von Neumann Architecture

3. Control Unit (CU) – informs the arithmetic and logic unit, the • There is common bus for data and instruction transfer.
computer’s main memory and the output and input devices how • Same physical memory address is used for instructions and data
to respond to the command that have been sent to the processor • Two clock cycles are required to execute single instruction.
- “fetch” and “execute” are used to describe the actions of • It is used in personal computers and small computers.
the control unit.
Harvard Architecture
• Separate buses are used for transferring data and instruction.
Fetch – Decode – Execute Cycle • Separate physical memory address is used for instructions and
a. Fetch Stage data.
- The program counter is checked as it holds the address of • An instruction is executed in a single cycle.
the next instruction to be executed. • It is used in microcontrollers and signal processing.
- The address Is then copied to the memory address Instruction Set of Microprocessor
register (MAR).
- The address is then sent along the address bus to main Complex Instruction Set Computers (CISC)
memory, where it waits to receive a signal from the control • The primary goal of CISC architecture is to complete a task in as
bus. few lines of assembly as possible.
- As we want to read the data stored in memory address 0000, • Complex instructions
the control unit sends a read signal along the control bus • Multiple clock cycles
to main memory. • Less registers
- The contents stored in memory at address 0000 can now be • Variable length instructions
sent along the data bus to the memory data register.
Reduced Instruction Set Computers (RISC)
- As we are currently in the process of fetching an instruction,
the data received from the memory by memory data • RISC Processors only used simple instructions that can be
register is copied into the current instruction register. executed within one clock cycle
- The instruction has now been fetched, Before we proceed • Simple instructions
to the decode phase, we must increment the contents of • Single clock cycle
program counter so the address it contains points to the • More registers
next instruction to be executed. • Fixed length instructions