The ATmega324 Microcontroller

Chapter 8
Serial Port Operation

Nguyen Trung Hieu

Ho Chi Minh City University of Technology
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Parallel vs Serial Communication

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 Parallel vs Serial Communication
Parallel Serial

• Multiple data wire: One bit • Single data wire: Words

per wire transmitted one bit at a time
• High data throughput with • Higher data throughput with
short distances long distances
• Higher cost, bulky • Cheaper, less bulky
• Typically used when • More complex interfacing logic
connecting devices on same and communication protocol
IC or same circuit board

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Direction

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Three types of serial communication

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Waveform

I2C signal

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 Outline
• USART/UART
• SPI
• I2C

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 USART Frame Format
TBIT

Always 1 bit
Can be 5, 6, 7, 8 or 9 bit
or no bit
Can be 1 or 2 bit

→ 30 combinations of valid frame formats

Baudrate = 1/TBIT

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 USART and UART
USART UART Need to know
baudrate

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USART and UART

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 USART and UART
Needs Requires clock and data signals Requires only data signals
Mode Half-duplex mode Full-duplex mode
Speed Higher Lower
Data Transmits data in the form of data Transmits data in the form of data bytes
transmission blocks
Data Fixed rate Different speeds
transmission
rate
Transfer Higher data rate Range between 4800, 9600, and 38400
speed bps

Baud-rate The receiver doesn't need to The recipient must know the
know the baud rate of the sender transmitter's baud rate before gathering
as it is determined by the data
line offered by the clock signal.

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 USART
• Two USART instances:
• USART0: RxD0 (PD0), TxD0 (PD1), XCK0 (PB0)
• USART1: RxD1 (PD2), TxD1 (PD3), XCK1 (PD4)
• Full Duplex (if UART) and Half Duplex (if USART)
• 3 special function registers: UCSRxA, UCSRxB, UCSRxC
• UDRx (x=0,1): same address but 2 buffers; 1 buffer for
transmission and 1 buffer for reception
• Baud rate (serial port frequency of operation):
configure by UBRRxL:UBRRxH (x=0,1)

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USART in AVR

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USARTx
Block Diagram

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 USART Pin

USART0

USART1 Nguyễn Trung Hiếu 15

 USART Clock Generator

To Transmitter

Use in mode
synchronous

UART
To Receiver
fOSC
U2Xn = 0: f Baud =
8(UBRRn + 1) USART

fOSC fOSC
U2Xn = 1: f Baud = f Baud =
16(UBRRn + 1) 2(UBRRn + 1) 16
 USART Baud Rate Register
SRAM address:
UBRR0L (0xC4) and UBRR0H (0xC5)
UBRR1L (0xCC) and UBRR1H (0xCD)

Example:
LDI R16,HIGH(21)
STS UBRR0H,R16
LDI R16,LOW(21)
STS UBRR0L,R16 Nguyễn Trung Hiếu 17
 Example Calculate Baudrate
UART

fOSC
U2Xn = 0: f Baud =
16(UBRRn + 1)
fOSC
U2Xn = 1: f Baud =
8(UBRRn + 1)

Example: Calculate UBRR0 value to provide 4800 baud for

USART0 operating in mode UART. Given fOSC = 8MHz.
• If U2X0 = 1: 6
fOSC 8.10
f Baud = → 4800 = → UBRR0  207
8(UBRR0 + 1) 8(UBRR0 + 1)
• If U2X0 = 0:
fOSC 8.106
f Baud = → 4800 = → UBRR0  103
16(UBRR0 + 1) 16(UBRR0 + 1) 18
 Error in Baudrate
• Due to rounding, there is a slight error.

Example: Calculate the error in the previous example

• If U2X0 = 1: UBRR0 = 207
fOSC 8.106
f Baud = → f Baud =  4807.7(baud )
8(UBRR0 + 1) 8(207 + 1)
 4807.7 
Error (%) =  − 1 .100% = 0.16%
 4800 
• If U2X0 = 0: UBRR0 = 103
fOSC 8.106
f Baud = → f Baud =  4807.7(baud )
16(UBRR0 + 1) 16(103 + 1)
 4807.7 
Error (%) =  − 1 .100% = 0.16% 19
 4800 
UBRRx Settings

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Receiver and Transmitter Block Diagram

Writing to UDRx: loads data to be transmitted

Reading from UDRx: accesses received data
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UDRx Register
Two buffers have the same address

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 UDRn Register
SRAM address:
UDR0 (0xC6)
UDR1 (0xCE)

- USART Transmit Data Buffer Register and Receive Data Buffer

Registers share the same SRAM address referred to as UDRn

- For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by
the Transmitter and set to zero by the Receiver

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 UCRSA
SRAM address:
UCRSA0 (0xC0)
UCRSA1 (0xC8)

Config speed
of UART

UDRE: 1 – the transmit buffer is empty

0 – the transmit buffer is not empty

TXC: 1 – transmission done (shift done and buffer empty)

0 – cleared by software (write 1 to this position)

RXC: 1 - there are unread data in the receive buffer (reception done)
0 - the receive buffer is empty 24
 UCRSB
SRAM address:
UCRSB0 (0xC1)
UCRSB1 (0xC9)

RXB8: Receive Data Bit 8

TXB8: Transmit Data Bit 8

RXEN: 1 – Receiver enable TXEN: 1 – Transmitter Enable

0 – Receiver disable 0 – Transmitter Disable
25
 UCRSC
SRAM address:
UCRSC0 (0xC2)
UCRSC1 (0xCA)

26
UCRSC

27
 Example: Initialize the UART
USART_INIT:
LDI R16,(1<<TXEN0) ;Enable Transmitter
STS UCSR0B, R16
LDI R16,(1<<UCSZ01)|(1<<UCSZ00) ;8-bit data
STS UCSR0C, R16 ;no parity, 1 stop bit
LDI R16,0x00
STS UBRR0H,R16
LDI R16,51 ;baud rate = 9600 and Fosc = 8 MHz
STS UBRR0L,R16
RET

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 Example: Initialize the UART
Write a subroutine to initialize UART 6-bit data with even parity,
1 stop bit, enable receiver. The baudrate is 19200.
Given FOSC=8MHz

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 5-Bit to 8-Bit UART Transmitter
• Transmission is initiated by writing to UDRx.
• UDREx is set: the buffer is empty, and therefore
ready to be written

UART_TRANS:
LDS R17,UCSR0A
SBRS R17,UDRE0
RJMP UART_TRANS UDRn

STS UDR0,R16
RET

30
 5-Bit to 8-Bit UART Receiver
• Reception is initiated by a 1-to-0 transition on RxD.
• RXCx is set at the end of character reception and
unread. It is clear when the receiver buffer is
empty

UART_RECEIVE:
LDS R17,UCSR0A
SBRS R17,RXC0 UDRn
RJMP UART_ RECEIVE
LDS R16,UDR0
RET

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 Example 1: Transmission
Assume a 10-byte string of 8-bit data is stored in SRAM from the
location $100. Write a program that sends this string to the USART0
(19200 baud, 1 stop bit, no parity).

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 Example 1: Transmission
Assume a 10-byte string of 8-bit data is stored in SRAM from the location $100.
Write a program that sends this string to the USART0 (19200 baud, 1 stop bit, no
parity).
USART_INIT:
LDI R16,(1<<TXEN0) ;Enable Transmitter
STS UCSR0B, R16
LDI R16,(1<<UCSZ01)|(1<<UCSZ00) ;8-bit data
STS UCSR0C, R16 ;no parity, 1 stop bit
LDI R16,0x00
STS UBRR0H,R16
LDI R16,25 ;baud rate = 19200 and Fosc = 8 MHz
STS UBRR0L,R16
RET
UART_TRANS:
LDS R17,UCSR0A
SBRS R17,UDRE0
RJMP UART_TRANS
STS UDR0,R16
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RET
 Init UART

Loop  10

.ORG $0 Ptr  $100

RCALL USART_INIT
LDI R18,10 R16  (Ptr)
LDI ZH,HIGH($100)
LDI ZL,LOW($100) Transmit
Again:LD R16,Z+
RCALL UART_TRANS Ptr  Ptr+1
DEC R18
BRNE Again LoopLoop-1

N
Loop=0?
Z=0
YZ=1
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 Your Turn!
Assume that a string of 8-bit data is stored in SRAM at address $130 to $180. Write
a program that sends this string to the USART0 (19200 baud, 1 stop bit, no parity).

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 Example 2: Reception
Write a program that receives a 15-byte string of 8-bit data from the USART0
(19200 baud, 1 stop bit, no parity). Then, the data is stores in the SRAM from the
location $200
USART_INIT:
LDI R16,(1<<RXEN0) ;Enable Receiver
STS UCSR0B, R16
LDI R16,(1<<UCSZ01)|(1<<UCSZ00) ;8-bit data
STS UCSR0C, R16 ;no parity, 1 stop bit
LDI R16,0x00
STS UBRR0H,R16
LDI R16,25 ;baud rate = 19200 and Fosc = 8 MHz
STS UBRR0L,R16
RET
UART_RECEIVE:
LDS R17,UCSR0A
SBRS R17,RXC0
RJMP UART_ RECEIVE
LDS R16,UDR0
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RET
 Init UART

Loop  15

.ORG $0 Ptr  $200

RCALL USART_INIT
LDI R18,15 Receive
LDI ZH,HIGH($200)
LDI ZL,LOW($200) (Ptr)  R16
Again:RCALL UART_TRANS
ST Z+,R16 Ptr  Ptr+1
DEC R18
BRNE Again LoopLoop-1

N
Loop=0?
Z=0
YZ=1
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 Your Turn!
Write a program that receives a string of 8-bit data from the USART0
(19200 baud, 1 stop bit, no parity). Then, the data is stores in the
SRAM from the location $200 to $250

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 Problem 1
Write a program that sends a string of 8-bit data from the USART0
(19200 baud, 1 stop bit, no parity) to a computer (connected to MCU
ATmega324P). This string is stored from location $220 in SRAM and
terminates with a $00 byte.

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 Problem 2
Write a program that receives a string of 8-bit data from the USART0
(19200 baud, 1 stop bit, no parity) and displays to LCD (connected to
PORTA). This string terminates with a $00 byte.

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 9-Bit UART
• On transmission, the 9th bit is whatever has been put in TXB8.
• Must be written before writing the low bits to UDRn.
UCSR0B:

USART_TRANS_9BIT:
LDS R17,UCSR0A
SBRS R17,UDRE0
RJMP USART_TRANS_9BIT
LDS R17,UCSR0B
BST R18,0 ;Store bit 0 in R18 to T
BLD R17,0 ;Load T to bit 0 in R17
STS UCSR0B,R17 ;Write 9th bit to TXB8
STS UDR0,R16
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RET
 9-Bit UART
• On reception, the 9th bit received is placed in RXB8.
• Must be read before reading the low bits from UDRn.
UCSR0B:

USART_RECEIVE_9BIT:
LDS R17,UCSR0A
SBRS R17,RXC0
RJMP USART_RECEIVE_9BIT
LDS R17,UCSR0B ;Receive 9th bit
LDS R16,UDR0
LSL R17
ANDI R17,1
RET 42
 UART with Parity bit
• The Parity bit is used to check received data is error or not.
• There are two types of parity:
➢ Even:
➢ Odd:
• To use the parity bit: use UPM[1:0] in UCSR0C

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UART with Parity bit

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 Check Parity Bit at Receiver
• Use status bit in UCRSAx

UPE: 1 – Parity Check Error

0 – Parity Check Right/ Receive Buffer is Read

• This UPE bit must be reading the low bits from UDRn

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 Example 3
Write a program that receives a 15-byte string of 8-bit data from the
USART0 (19200 baud, 1 stop bit, parity even). If parity check right, the
data is stores in the SRAM from the location $200. If not, don’t store
this data

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 Example 3
Write a program that receives a 15-byte string of 8-bit data from the
USART0 (19200 baud, 1 stop bit, parity even). If parity check right, the
data is stores in the SRAM from the location $200. If not, don’t store
this data
USART_RECEIVE:
LDS R17,UCSR0A
SBRS R17,RXC0
RJMP USART_RECEIVE
LDS R18,UCSR0A ;Receive status bit
LDS R16,UDR0 ;Receive 8-bit data
ANDI R18,1<<UPE
BREQ NO_ERROR
… ;Create a flag to signal
NO_ERROR:
RET
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Check Frame Error and DataOverun at Receiver
• Use status bits in UCRSAx

FE:
1 – Frame Check Error
0 – Frame Check Right/ Receive Buffer is Read

DOR:
1 – DataOverun Occur when the receive buffer is full (two characters).
The new character is waiting in shift register, and a new start bit is
detected
0 – Receive Buffer is Read
• These bits must be reading the low bits from UDRn
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 Multiprocessor Communications
• When MPCM=1 (in UCRSAx)

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 Outline
• USART/UART
• SPI
• I2C

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 SPI
• Full-duplex
• Synchronous
• Serial

Abbreviation meaning:
• MOSI
Master Out Slave In
• MISO
Master In Slave Out
• SCLK
Shift Clock

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 SPI (Another version)

Abbreviation meaning:
• SDI
Serial Data In
• SDO
Serial Data Out
• SCK
Shift Clock
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SPI waveform

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 SPI waveform
Example: polarity = 1, phase = 1
Master sends 0x53, slave sends back 0x46

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 SPI waveform
Example: polarity = 0, phase = 0
What does Master send? What does Slave send?

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 SPI internal circuit
By each clock, a bit is shifted out from the master’s shift register
into the slave’s shift register

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 SPI internal circuit
After 8 bits are shifted, they can be read by memory

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 SPI Pin

SPI

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 SPDR0

SPI
Block
Diagram

SPSR0 SPCR0

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 SPSR0
SPI Status Register 0
- I/O address: $2D
- SRAM address: $4D

SPIF0 (SPI Interrupt Flag)

SPIF0 = 1: A serial transfer is completed
The SS pin is driven low in slave mode
SPIF0 = 0: By first reading the SPSR0 with SPIF set,
then accessing the SPDR0
WCOL0 (Write Collision)
SPI2X0 (Double SPI Speed)

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 SPDR0
SPI Data Register 0
- I/O address: $2E
- SRAM address: $4E

The SPDR0 is a read/write register used for data transfer

between the Register File and the SPI Shift Register.
• Writing to the SPDR0 initiates data transmission.
• Reading the SPDR0 causes the Shift Register Receive
buffer to be read.

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 Send and Read Data using SPI

SPI_Transmit:
OUT SPDR0,R16 Send data through SPI
Wait_Transmit:
IN R18, SPSR0
SBRS R18, SPIF0 Wait for transmission done
RJMP WAIT_TRANSMIT
(IN R17,SPDR0) Read data from SPI
RET (Optional)

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 SPCR0
SPI Control Register 0
- I/O address: $2C
- SRAM address: $4C

MSTR0 (Master/Slave Select):

• 1: Master
• 0: Slave

DORD0 (Data0 Order):

• 1: LSB first
• 0: MSB first
SPE0 (SPI enable):
• 1: SPI enable
63
• 0: SPI disable
SPCR0

64
SPCR0

65
 Example: Initialize the SPI
Explain mode of SPI in this subroutine?
.EQU SPI_PORT=PORTB
.EQU SPI_PORT_DDR=DDRB
.EQU SS=4
.EQU MOSI=5
.EQU MISO=6
.EQU SCK=7
SPI_INIT:
LDI R16,(1<<SS)|(1<<MOSI)|(1<<SCK)
OUT SPI_PORT_DDR, R16 ; Output pins
LDI R16,(1<<SPE0)|(1<<MSTR0)|(1<<SPR00)
OUT SPCR0, R16 ; Enable, master, MSB first
LDI R16,(1<<SPI2X0) ; SCK=FOSC/8
STS SPSR0,R16
RET
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 Your Turn!
Explain mode of SPI in this subroutine?
.EQU SPI_PORT=PORTB
.EQU SPI_PORT_DDR=DDRB
.EQU SS=4
.EQU MOSI=5
.EQU MISO=6
.EQU SCK=7
SPI_INIT:
LDI R16,(1<<SS)|(1<<MOSI)|(1<<SCK)
OUT SPI_PORT_DDR, R16
LDI R16,(1<<SPE0)|(1<<MSTR0)|(1<<SPR00)|(1<<CPHA0)
OUT SPCR0, R16
LDI R16,$00
STS SPSR0,R16
RET
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 Example 1: Transmission
Write a program that continuously reads a byte from PortA and sends it to a
slave connected with MCU through SPI (1MHz, MSB first).
Given that FOSC=8MHz

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 Example 1: Transmission
.EQU SPI_PORT=PORTB
.EQU SPI_PORT_DDR=DDRB
.EQU SS=4
.EQU MOSI=5
.EQU MISO=6
.EQU SCK=7

.ORG 0
RCALL SPI_INIT
LDI R16,$00
OUT DDRA,R16
LDI R16,$FF
OUT PORTA,R16

LOOP: IN R16,PINA ; Get data from PortA

CBI SPI_PORT,SS ; Start Sending
RCALL SPI_TRANS ; Sends to SPI (MOSI pin)
SBI SPI_PORT,SS ; Stop Sending
RJMP LOOP Nguyễn Trung Hiếu ; Ignore received data 69
 Example 1: Transmission
SPI_INIT:
LDI R16,(1<<SS)|(1<<MOSI)|(1<<SCK)
OUT SPI_PORT_DDR, R16 ; Output pins
LDI R16,(1<<SPE0)|(1<<MSTR0)|(1<<SPR00)
OUT SPCR0, R16 ; Enable, master, MSB first
LDI R16,(1<<SPI2X0) ; SCK=FOSC/8
STS SPSR0,R16
RET

SPI_TRANS:
OUT SPDR0,R16 ; Out data to MOSI pin
WAIT_SPI:
IN R18,SPSR0
SBRS R18,SPIF0 ; Wait for transmission done
RJMP WAIT_SPI ;
IN R17,SPDR0
RET
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 Example 2: Transmission
Write a program that continuously reads a byte from PortA and sends it to 8
LEDs connected a 74HC595 (shifted register). Show the connection.
Given that FOSC=8MHz

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 Example 2: Transmission
SH_CP (Shift Clock) → SCK Transmit MSB first
DS (Data Shift) → MOSI CPHA0 = 0, CPOL = 0
ST_CP (Latch Data) → SS
 Example 2: Reception
Write a program that continuously reads a byte from SPI protocol in master
mode (1MHz, MSB first). The received data is sends to LEDs connected to
PortA
Given that FOSC=8MHz

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 Example 2: Reception
.EQU SPI_PORT=PORTB
.EQU SPI_PORT_DDR=DDRB
.EQU SS=4
.EQU MOSI=5
.EQU MISO=6
.EQU SCK=7

.ORG 0
RCALL SPI_INIT
LDI R16,$FF
OUT DDRA,R16

LOOP: CBI SPI_PORT,SS ; Start Sending

LDI R16,0 ; Dump data
RCALL SPI_TRANS ; Sends to SPI (MOSI pin)
OUT PORTA,R17 ; Out data to PortA
SBI SPI_PORT,SS ; Stop Sending
RJMP LOOP ; Ignore received data
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 Example 2: Reception
Set this to
SPI_INIT: simulate
LDI R16,(1<<SS)|(1<<MOSI)|(1<<SCK)
OUT SPI_PORT_DDR, R16 ; Output pins
LDI R16,(1<<SPE0)|(1<<MSTR0)|(1<<SPR00)|(1<<CPHA0)
OUT SPCR0, R16 ; Enable, master, MSB first
LDI R16,(1<<SPI2X0) ; SCK=FOSC/8
STS SPSR0,R16
RET

SPI_TRANS:
OUT SPDR0,R16 ; Out data to MOSI pin
WAIT_SPI:
IN R18,SPSR0
SBRS R18,SPIF0 ; Wait for transmission done
RJMP WAIT_SPI ;
IN R17,SPDR0
RET
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Example: SPI interfacing with EEPROM

- SPI interface
- Max read frequency: 20MHz
- Capacity: 1024 Kbit = 128 Kbytes
- Page size: 256 Bytes
- Sector size: 32 Kbytes

76
Block Diagram

77
Connection

78
 Page, Sector

256 Bytes 128 Pages 4 Sectors

Total: 512 pages Page 0: address: 0x00000 – 0x000FF
Page 1: address: 0x00100 – 0x001FF
Page 2: address: 0x00200 – 0x002FF
..
79
Page 511: address: 0x1FF00 – 0x1FFFF
 Power-On State

EEPROM powers on in the following state:

- In low-power Standby mode (CS=1)
- The write enable latch is reset
- SO is in high-impedance state
- A high-to-low-level transition on CS is required
to enter active state

Must be done before using

80
 Instruction Set

Must send WREN ($06) before send WRITE ($02) or PE($42),

then send WRDI ($04) or autoreset after a write cycle
check STATUS register

81
 Status Register

WIP (Write In Process): indicates whether the EEPROM is busy with a

write operation
1: write is in progress
0: no write is in progress

WEL (Write Enable Latch): indicates the status of the write enable latch
1: allows writes to the array
0: prohibit writes to the array

82
 Read Status Register
RDSR

WR_FIN:
LDI R16,$05
CBI SPI_PORT,SS
RCALL SPI_TRANS
SBRC R17,0 ; 0 is position of bit WIP
RJMP WR_FIN
83
SBI SPI_PORT,SS
 Write Command Waveform
WREN WRDI

CBI SPI_PORT,SS CBI SPI_PORT,SS

LDI R16,$06 LDI R16,$04
RCALL SPI_TRANS RCALL SPI_TRANS
SBI SPI_PORT,SS SBI SPI_PORT,SS84
 Write Command Waveform
If the nCS doesn’t go high,
WRITE the next byte will be sent out

3 BYTES ADDRESS (HIGH,MID,LOW)

CBI SPI_PORT,SS LDI R16,ADDR_LOW

LDI R16,$02 RCALL SPI_TRANS
RCALL SPI_TRANS LDI R16,DATA
LDI R16,ADDR_HIGH RCALL SPI_TRANS
RCALL SPI_TRANS SBI SPI_PORT,SS
LDI R16,ADDR_MID
RCALL SPI_TRANS
85
 Write Command Waveform
Example: Write a subroutine call EEPROM_WRITE to write data in R19 to
EEPROM at give address

Write WREN

Write WRITE

Write 3-byte address

Write DATA

Wait until finish write

86
EEPROM_WRITE:
CBI SPI_PORT,SS
LDI R16,WREN
RCALL SPI_TRANS
SBI SPI_PORT,SS
CBI SPI_PORT,SS
LDI R16,WR
RCALL SPI_TRANS .EQU WIP=0
LDI R16,ADDR_HIGH .EQU WREN=$06
RCALL SPI_TRANS .EQU RDSR=$05
LDI R16,ADDR_MID .EQU WRSR=$01
RCALL SPI_TRANS .EQU RD=$03
LDI R16,ADDR_LOW .EQU WR=$02
RCALL SPI_TRANS .EQU PE=$42
MOV R16,R19 .EQU ADDR_HIGH=0X00
RCALL SPI_TRANS .EQU ADDR_MID=0X01
SBI SPI_PORT,SS .EQU ADDR_LOW=0X00
WR_FIN:
LDI R16,RDSR
CBI SPI_PORT,SS
RCALL SPI_TRANS
SBRC R17,WIP
RJMP WR_FIN
SBI SPI_PORT,SS
87
RET
 Read Command Waveform
If the nCS doesn’t go high,
READ the next byte will be sent out

3 BYTES ADDRESS (HIGH,MID,LOW)

CBI SPI_PORT,SS LDI R16,ADDR_LOW

LDI R16,$03 RCALL SPI_TRANS
RCALL SPI_TRANS LDI R16,$FF
LDI R16,ADDR_HIGH RCALL SPI_TRANS
RCALL SPI_TRANS SBI SPI_PORT,SS
LDI R16,ADDR_MID
RCALL SPI_TRANS Dump data
to read88
 Read Command Waveform
Example: Write a subroutine call EEPROM_READ to read data in EEPROM
at given address and save to R20

Write READ

Write 3-byte address

Write dump data

and read

89
EEPROM_READ:
CBI SPI_PORT,SS
LDI R16,RD
RCALL SPI_TRANS
LDI R16,ADDR_HIGH
RCALL SPI_TRANS .EQU WIP=0
LDI R16,ADDR_MID .EQU WREN=$06
RCALL SPI_TRANS .EQU RDSR=$05
LDI R16,ADDR_LOW .EQU WRSR=$01
RCALL SPI_TRANS .EQU RD=$03
LDI R16,$FF .EQU WR=$02
RCALL SPI_TRANS .EQU PE=$42
MOV R20,R17 .EQU ADDR_HIGH=0X00
SBI SPI_PORT,SS .EQU ADDR_MID=0X01
RET .EQU ADDR_LOW=0X00

90
 Page Erase Command Waveform
Page Erase

3 BYTES ADDRESS (HIGH,MID,LOW)

CBI SPI_PORT,SS LDI R16,ADDR_LOW

LDI R16,$42 RCALL SPI_TRANS
RCALL SPI_TRANS SBI SPI_PORT,SS
LDI R16,ADDR_HIGH
RCALL SPI_TRANS
LDI R16,ADDR_MID
RCALL SPI_TRANS
91
 Example
Write a program to read data from switches connected to PortA and save it
to EEPROM 25AA1024

92
 References

• I. Scott Mackenzie, The 8051 Microcontroller

• Các tài liệu trên Internet không trích dẫn hoặc không ghi tác
giả

Nguyễn Trung Hiếu 93