BT149G

SCR
10 April 2018 Product data sheet

1. General description
Planar passivated Silicon Controlled Rectifier with sensitive gate in a SOT54 (TO-92) plastic
package. This SCR is designed to be interfaced directly to microcontrollers, logic ICs and other low
power gate trigger circuits.

2. Features and benefits

• Enhanced voltage capability
• Planar passivated for voltage ruggedness and reliability
• Sensitive gate
• Direct triggering from low power drivers and logic ICs

3. Applications
• General purpose switching and phase control

4. Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VRRM repetitive peak reverse - - 600 V
voltage
IT(AV) average on-state half sine wave; Tlead ≤ 83 °C; Fig. 1 - - 0.5 A
current
IT(RMS) RMS on-state current half sine wave; Tlead ≤ 83 °C; Fig. 2; - - 0.8 A
Fig. 3
ITSM non-repetitive peak on- half sine wave; Tj(init) = 25 °C; - - 8 A
state current tp = 10 ms; Fig. 4; Fig. 5
half sine wave; Tj(init) = 25 °C; - - 9 A
tp = 8.3 ms
Tj junction temperature - - 125 °C
Static characteristics
IGT gate trigger current VD = 12 V; IT = 10 mA; Tj = 25 °C; - 50 200 µA
Fig. 7
Dynamic characteristics
dVD/dt rate of rise of off-state VDM = 402 V; Tj = 125 °C; RGK = 1 kΩ; 500 800 - V/µs
voltage (VDM = 67% of VDRM); exponential
waveform; Fig. 12
WeEn Semiconductors BT149G
SCR

5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 K cathode A K

2 G gate G
sym037
3 A anode

321
TO-92 (SOT54)

6. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
BT149G TO-92 plastic single-ended leaded (through hole) package; 3 leads SOT54

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SCR

7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDRM repetitive peak off-state - 600 V
voltage
VRRM repetitive peak reverse - 600 V
voltage
IT(AV) average on-state current half sine wave; Tlead ≤ 83 °C; Fig. 1 - 0.5 A
IT(RMS) RMS on-state current half sine wave; Tlead ≤ 83 °C; Fig. 2; Fig. 3 - 0.8 A
ITSM non-repetitive peak on- half sine wave; Tj(init) = 25 °C; tp = 10 ms; - 8 A
state current Fig. 4; Fig. 5
half sine wave; Tj(init) = 25 °C; tp = 8.3 ms - 9 A
2 2
I t I t for fusing tp = 10 ms; SIN - 0.32 A²s
dIT/dt rate of rise of on-state IT = 2 A; IG = 10 mA; dIG/dt = 100 mA/µs - 50 A/µs
current
IGM peak gate current - 1 A
VRGM peak reverse gate - 5 V
voltage
PGM peak gate power - 2 W
PG(AV) average gate power over any 20 ms period - 0.1 W
Tstg storage temperature -40 150 °C
Tj junction temperature - 125 °C

001aab446
0.8 77

Ptot a = 1.57 Tlead(max)

(W) (°C)
1.9
0.6 89
2.2

2.8

0.4 conduction form 101

4
angle factor
(degrees) a
30 4
0.2 60 2.8 113
α
90 2.2
120 1.9
180 1.57

0 125
0 0.1 0.2 0.3 0.4 0.5 0.6
IT(AV) (A)

α = conduction angle
a = form factor = IT(RMS) / IT(AV)
Fig. 1. Total power dissipation as a function of average on-state current; maximum values

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SCR

001aab449 001aab450
2 1
IT(RMS)
IT(RMS)
(A) 83 °C
(A)
0.8
1.5

0.6

0.4

0.5
0.2

0 0
10-2 10-1 1 10 -50 0 50 100 150
surge duration (s) Tlead (°C)

f = 50 Hz; Tlead = 83 °C
Fig. 3. RMS on-state current as a function of lead
Fig. 2. RMS on-state current as a function of surge temperature; maximum values
duration for sinusoidal currents
001aab499
10
ITSM
(A)
8

4
IT ITSM

tp t
Tj(init) = 25 °C max
0
1 10 102 103
number of cycles

f = 50 Hz
Fig. 4. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum
values

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WeEn Semiconductors BT149G
SCR

001aab497
103
IT ITSM
ITSM
(A)

tp t
102 Tj(init) = 25 °C max

10

1
10-5 10-4 10-3 10-2
tp (s)

tp ≤ 10 ms
Fig. 5. Non-repetitive peak on-state current as a function of pulse width for sinusoidal currents; maximum values

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SCR

8. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-lead) thermal resistance Fig. 6 - - 60 K/W
from junction to lead
Rth(j-a) thermal resistance printed circuit board mounted: lead - 150 - K/W
from junction to length = 4 mm
ambient free air

001aab451
102

Zth(j-lead)
(K/W)

10

10-1

tp t

10-2
10-5 10-4 10-3 10-2 10-1 1 10
tp (s)

Fig. 6. Transient thermal impedance from junction to lead as a function of pulse width

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SCR

9. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
IGT gate trigger current VD = 12 V; IT = 10 mA; Tj = 25 °C; - 50 200 µA
Fig. 7
IL latching current VD = 12 V; IG = 0.5 mA; Tj = 25 °C; - 2 6 mA
RGK(ext) = 1 kΩ; Fig. 8
IH holding current VD = 12 V; Tj = 25 °C; RGK(ext) = 1 kΩ; - 2 5 mA
Fig. 9
VT on-state voltage IT = 1.2 A; Tj = 25 °C; Fig. 10 - 1.25 1.7 V
VGT gate trigger voltage VD = 12 V; IT = 10 mA; Tj = 25 °C; - 0.5 0.8 V
Fig. 11
VD = 600 V; IT = 10 mA; Tj = 125 °C; 0.2 0.3 - V
Fig. 11
ID off-state current VD = 600 V; RGK(ext) = 1 kΩ; Tj = 125 °C - 0.05 0.1 mA
IR reverse current VR = 600 V; Tj = 125 °C; RGK(ext) = 1 kΩ - 0.05 0.1 mA
Dynamic characteristics
dVD/dt rate of rise of off-state VDM = 402 V; Tj = 125 °C; RGK = 1 kΩ; 500 800 - V/µs
voltage (VDM = 67% of VDRM); exponential
waveform; Fig. 12
VDM = 402 V; Tj = 125 °C; (VDM = 67% - 2 - V/µs
of VDRM); exponential waveform; gate
open circuit; Fig. 12
tgt gate-controlled turn-on ITM = 2 A; VD = 600 V; IG = 10 mA; dIG/ - 2 - µs
time dt = 0.1 A/µs; Tj = 25 °C
tq commutated turn-off VDM = 402 V; Tj = 125 °C; ITM = 1.6 A; - 100 - µs
time VR = 35 V; (dIT/dt)M = 30 A/µs; dVD/
dt = 2 V/µs; RGK(ext) = 1 kΩ; (VDM =
67% of VDRM)

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SCR

001aab502 001aab503
3 3

IGT IL
IGT(25°C) IL(25°C)

2 2

1 1

0 0
-50 0 50 100 150 -50 0 50 100 150
Tj (°C) Tj (°C)

RGK = 1 kΩ
Fig. 7. Normalized gate trigger current as a function of
junction temperature Fig. 8. Normalized latching current as a function of
junction temperature
001aab504 001aab454
3 5
IT
IH (A)
IH(25°C) 4

2
3

2
1

1
(1) (2) (3)

0 0
-50 0 50 100 150 0.4 1.2 2 2.8
Tj (°C) VT (V)

RGK = 1 kΩ Vo = 1.067 V; Rs = 0.187 Ω

(1) Tj = 125 °C; typical values
Fig. 9. Normalized holding current as a function of
(2) Tj = 125 °C; maximum values
junction temperature
(3) Tj = 25 °C; maximum values
Fig. 10. On-state current as a function of on-state
voltage

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SCR

001aab501 001aab507
1.6 104

VGT dVD/dt
VGT(25°C) (V/µs)
(1)
1.2 103

0.8 102

(2)

0.4 10
-50 0 50 100 150 0 50 100 150
Tj (°C) Tj (°C)

(1) RGK = 1 kΩ
Fig. 11. Normalized gate trigger voltage as a function of
(2) gate open circuit
junction temperature
Fig. 12. Critical rate of rise of off-state voltage as a
function of junction temperature; typical values

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SCR

10. Package outline

Fig. 13. Package outline TO-92 (SOT54)

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SCR

11. Package outline

0.45
4.2 0.38
3.6

0.48
0.40
1

4.8 2
2.54
4.4 1.27
3

5.2 14.5
5.0 12.7

Dimensions in mm 04-11-16

Fig. 14. Package outline TO-92 (SOT54)

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SCR

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Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.

Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.

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SCR

13. Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Limiting values............................................................. 3
8. Thermal characteristics............................................... 6
9. Characteristics..............................................................7
10. Package outline........................................................ 10
11. Package outline........................................................ 11
12. Legal information..................................................... 12

© WeEn Semiconductors Co., Ltd. 2018. All rights reserved

For more information, please visit: http://www.ween-semi.com
For sales office addresses, please send an email to: [email protected]
Date of release: 10 April 2018

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