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DLD Assignment 2

This document contains an assignment on simplifying logic expressions using Karnaugh maps and gate-level minimization. It has 18 multiple choice questions covering Course Outcome 2 (CO2) related to simplifying logic expressions. Students are asked to submit their responses by November 18th, 2023 for an assignment worth 20 marks. The assignment covers topics related to Boolean algebra, Karnaugh maps, and minimizing logic expressions.

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81 views3 pages

DLD Assignment 2

This document contains an assignment on simplifying logic expressions using Karnaugh maps and gate-level minimization. It has 18 multiple choice questions covering Course Outcome 2 (CO2) related to simplifying logic expressions. Students are asked to submit their responses by November 18th, 2023 for an assignment worth 20 marks. The assignment covers topics related to Boolean algebra, Karnaugh maps, and minimizing logic expressions.

Uploaded by

siddharthsrathor04
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ITER, SIKSHA ‘O’ ANUSANDHAN (Deemed to be

Assignment
University)

Branch CSE and CSIT Programme B.Tech


Course Name Digital Logic Design Semester III
Course Code EET1211 Academic Year 2023/Odd
Topic- Karnaugh map to Simplify logic
Assignment-2 GP-1
expressions and Gate-level Minimization
Learning Level L1: Remembering L3: Applying L5: Evaluating
(LL) L2: Understanding L4: Analysing L6: Creating

Q’s Questions COs LL

1 CO2 L2

2 CO2 L2

3 CO2 L2

4 CO2 L2

5 CO2 L2

6 CO2 L2
7 CO2 L2

8 CO2 L2

9 CO2 L2

[2016]

10 CO2 L2

11 CO2 L2
12 CO2 L4

Consider the combinational circuit shown above.


a. Derive the Boolean expressions for T1 through T4. Evaluate the outputs F1 and F2
as a function of the four inputs.
b. List the truth table with 16 binary combinations of the four input variables. Then
list the binary values for T1 through T4 and outputs F1 and F2 in the table.

Consider the following minterm expression F:


( ) ∑( ). The minterms 2, 7, 8 and 13 are don’t- care
13 CO2 L2
terms. What is the minimal sum-of-products form for ? (GATE CSE 2014)

Let the minterm expression ( ) ∑ ( ) ∑ ( ). What


is the minimal form of the function represented by the Karnaugh map?
14 CO2 L2
(GATE CSE 2008)

What is the minimum SOP for ( ) ∑ ( ) ∑ ( )?


15 (GATE CSE 2002) CO2 L2

Implement the 4-varibale function using minimum number of 2-input NOR gates,
which is expressed in sum-of-minterms form as ∑( ).
16 CO2 L2
(GATE CSE 2019)

What is the minimum POS for ( ) ∑ ( )?


17 (GATE CSE 1996) CO2 L2

Consider the minterms list form of a Boolean function ( )


∑ ( ) ∑ ( ). Here, denote a minterm and denotes
a don’t care term, then what are the essential prime implicates of the function
18 CO2 L2
(GATE CSE 2018)

Assignment 2 Topic: Karnaugh map to Simplify Date of Assignment2: Date of Submission:


logic expressions and Gate-level 11.11.2023 18.11.2023
Minimization
Note:
1. assignment carries weightage of 20 marks out of 100
2. Course outcome CO2 was covered.
CO1 Able to State and explain different number systems, binary codes
Able to apply the principles of Boolean algebra, Karnaugh map and Quine McCluskey
CO2
Method to simplify logic expressions a
Course CO3 Able to Analyse and design various combinational circuits
Outcomes Able to Analyse and design Memory and Programmable Logic Devices
CO4
CO5 Able to Analyse and understand latches, flip-flops, registers and counter operations.
CO6 Able to implement various digital circuits using HDL and Standard ICs..

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