REVISION PRACTICE

Course : Common Engineering Programme

Diploma in Electronic & Computer Engineering
Diploma in Aerospace Systems & Management

Module : EGC180 – Digital Electronics

EGE180 – Digital Electronics
EGK180 – Digital Electronics

INSTRUCTIONS

1 This revision practice paper consists of SIXTEEN (16) pages including this
page.

2 Answer ALL questions.

3 Datasheets of logic devices are provided on page 13 to page 16 of this paper.

 Revision Practice / EGC180, EGE180, EGK180 / Page 2

ANSWER ALL QUESTIONS

Question 1

(a) Perform the following conversions between different number systems.

(i) Convert hexadecimal number 7E16 into 8-bit unsigned binary number.

Answer

(ii) Convert 8-bit unsigned binary number 010110102 into hexadecimal

numbers.

Answer

(iii) Convert 8-bit unsigned binary number 011010002 into its decimal
equivalent by using the sum-of-weights method.

Answer
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(iv) Convert decimal number 9910 into its 8-bit unsigned binary equivalent by
using the sum-of-weights method.

Answer

(v) Determine the 8-bit signed binary number (in two’s complement form)
that represents –6610.

Answer

(vi) Convert the 8-bit signed binary number 100011012 (in two’s
complement form) into its signed decimal equivalent using the sum-of-
weights method.

Answer
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(b) A periodic binary waveform with 20% duty cycle is used as an input test signal
for a combinational logic circuit.

(i) If the pulse width of the test signal is 100µs, determine the period and
frequency of the waveform.

Answer

(ii) If the frequency is reduced to 500Hz while maintaining the same pulse
width, what would be the duty cycle of the new waveform?

Answer
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Question 2

A certain application requires a logic circuit that outputs a logic HIGH when it detects
a 3-bit binary number containing two bits of ‘1’. Implement the logic circuit as shown
in the block diagram below, with input A as the most significant bit (MSB).

C
Detection Y
B
Circuit
(MSB) A

(a) Construct the truth table for the logic circuit.

Answer

Inputs Output
A B C Y

(b) Obtain the standard Sum-Of-Products (SOP) expressions for the output Y.

Answer
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(c) Sketch the expected output Y waveform for the following input waveforms.

Answer
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Question 3

(a) In an air pressure monitoring system, a pressure sensor outputs a 4-bit binary
number DCBA (where D is the MSB) to represent the level of air pressure
measured in a gas turbine power plant. A digital control circuit is to be added to
fulfil the following specifications of the monitoring system.

• When the decimal value of DCBA is less than 1010, a green LED is to be
turned on to indicate that the air pressure is within acceptable range.

• When the decimal value of DCBA is equal to or larger than 1010, a red LED
is to be turned on to indicate that the air pressure is too high.

Using a comparator IC 7485 and any other logic gate(s), design the digital
control circuit. Show all the necessary connections for the digital control circuit
in Figure Q3a.

Answer

A0
A1 7485
A2
A3

A>B A>B
Outputs
Inputs

A=B A=B
A<B A<B

B0
B1
B2 Green Red
B3 LED LED

Figure Q3a
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(b) A comparator IC 7485 is used in an application with connections shown in

Figure Q3b.

A A0
B A1 7485
C A2
A3
+5V

A>B A>B X

Outputs
Inputs
A=B A=B Y
A<B A<B Z

B0
B1
B2
B3

Figure Q3b

For each of the input combinations in the table below, determine the logic states
at each output (X, Y and Z) of the comparator.

Answer

INPUTS OUTPUTS
A B C X Y Z
1 1 0
0 0 1
1 0 0
0 1 1
1 1 0
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Question 4

(a) Using a 74151 8-input multiplexer shown in Figure Q4a, implement the logic
function specified by the expression below.

𝑌𝑌 = 𝐴𝐴̅𝐵𝐵�𝐶𝐶̅ + 𝐴𝐴𝐵𝐵�𝐶𝐶̅ + 𝐴𝐴𝐴𝐴𝐶𝐶̅

Answer

A 74151
B
C Y
D0
D1
D2
D3
D4
D5
D6
D7

Figure Q4a
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(b) In a demultiplexing application, a 1-to-16 demultiplexer is used to route the data

signal to either Device 1 or Device 2 as shown in Figure Q4b.

A0 Y0
A A1 Y1
A2 74154 Y2 Device 1
A3 Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10 Device 2
Y11
Y12
Y13
G1
Y14
Data G2 Y15

Figure Q4b

With the waveforms of control signal A and Data input shown below, determine
the waveforms of the signals received by Device 1 and Device 2.

Answer
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Question 5

(a) A circuit is needed to determine if a 4-bit number ABCD (where A is the MSB)
contains three bits of ‘0’. Design the circuit using a 74154 decoder and any
other logic gate(s) to output a logic HIGH (Y = logic 1) when the condition is
matched. Show all the necessary connections for the decoder circuit shown in
Figure Q5a.

Answer

A0 Y0
A1 Y1
A2 74154 Y2
A3 Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
G1
Y14
G2 Y15

Figure Q5a
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(b) A 74147 encoder is connected to the display circuit as shown in Figure Q5b.

BI/RBO RBI LT
+5V

a ANODE
a
S1 1 Q3 b
S2 2 D D b

S3 3 Q2 c c
4 C C 7447
S4 d d
S5 5 74147 B Q1
B e
S6 6 Q0
e

S7 7 A A
f f
S8 8
S9 9 g g

Figure Q5b

Given the logic levels at the inputs of the 74147 encoder and the control pin
settings of the 7447 driver in the table below, determine the data inputs (Q3, Q2,
Q1, Q0) and the displays on the 7-segment display unit.

Answer

Data Inputs of Control Inputs of

Inputs to 74147 Seven
7447 7447
Segment
S 1 S 2 S 3 S 4 S 5 S 6 S 7 S 8 S 9 Q3 Q2 Q1 Q0 RBI BI/RBO LT Display

H L H L H L H H L H H H

H H H H H H H H H H H H

H L H H H H L H H L H L

H H H H L H H H H H L L

H H H H H H H H H L H H
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APPENDIX – DATASHEETS

7485 4-BIT MAGNITUDE COMPARATOR

Truth Table
Comparing Inputs Cascading Inputs Outputs
A3, B3 A2, B2 A1, B1 A0, B0 A >B A <B A =B OA >O B OA < OB OA = OB
A3 > B3 X X X X X X H L L
A3 < B3 X X X X X X L H L
A3 = B3 A2 > B2 X X X X X H L L
A3 = B3 A2 < B2 X X X X X L H L
A3 = B3 A2 = B2 A1 > B1 X X X X H L L
A3 = B3 A2 = B2 A1 < B1 X X X X L H L
A3 = B3 A2 = B2 A1 = B1 A0 > B0 X X X H L L
A3 = B3 A2 = B2 A1 = B1 A0 < B0 X X X L H L
A3 = B3 A2 = B2 A1 = B1 A0 = B0 H L L H L L
A3 = B3 A2 = B2 A1 = B1 A0 = B0 L H L L H L
A3 = B3 A2 = B2 A1 = B1 A0 = B0 L L H L L H
A3 = B3 A2 = B2 A1 = B1 A0 = B0 L H H L H H
A3 = B3 A2 = B2 A1 = B1 A0 = B0 H L H H L H
A3 = B3 A2 = B2 A1 = B1 A0 = B0 H H H H H H
A3 = B3 A2 = B2 A1 = B1 A0 = B0 H H L H H L
A3 = B3 A2 = B2 A1 = B1 A0 = B0 L L L L L L
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7447 BCD-TO-SEVEN DECODERS / DRIVERS

NOTES:

1. The blanking input (BI) must be open or held at a high logic level when output functions 0 through
15 are desired. The ripple-blanking input (RBI) must be open or high if blanking of a decimal zero
is not desired.

2. When a low logic level is applied directly to the blanking input (BI), all segment outputs are off
regardless of the level of any other input.

3. When ripple-blanking input (RBI) and inputs A, B, C, and D are at a low level with the lamp test
input high, all segment outputs go off and the ripple-blanking output (RBO) goes to a low level
(response condition).

4. When the blanking input/ripple blanking output (BI/RBO) is open or held high and a low is applied
to the lamp test input, all segment outputs are on.
Revision Practice / EGC180, EGE180, EGK180 / Page 15

74147 DECIMAL-TO-BCD ENCODER

74151 DATA SELECTOR / MULTIPLEXER

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74154 4-LINE TO 16-LINE DECODER / DEMULTIPLEXER

Input Outputs
G2 G1 A3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15
L L L L L L L H H H H H H H H H H H H H H H
L L L L L H H L H H H H H H H H H H H H H H
L L L L H L H H L H H H H H H H H H H H H H
L L L L H H H H H L H H H H H H H H H H H H
L L L H L L H H H H L H H H H H H H H H H H
L L L H L H H H H H H L H H H H H H H H H H
L L L H H L H H H H H H L H H H H H H H H H
L L L H H H H H H H H H H L H H H H H H H H
L L H L L L H H H H H H H H L H H H H H H H
L L H L L H H H H H H H H H H L H H H H H H
L L H L H L H H H H H H H H H H L H H H H H
L L H L H H H H H H H H H H H H H L H H H H
L L H H L L H H H H H H H H H H H H L H H H
L L H H L H H H H H H H H H H H H H H L H H
L L H H H L H H H H H H H H H H H H H H L H
L L H H H H H H H H H H H H H H H H H H H L
L H X X X X H H H H H H H H H H H H H H H H
H L X X X X H H H H H H H H H H H H H H H H
H H X X X X H H H H H H H H H H H H H H H H

END OF PAPER