1. Explain the operation of Ex-OR and EX-NOR gates.
What is the difference between this
two?
2. Explain the operation of basic gates with truth table.
3. Explain the operation of universal gates with truth table.
4. Simplify the following Boolean expression with Boolean rules and laws
a) F(A,B,C)=AB’C+A’BC+A’B’C
b) F(A,B,C,D)= A’B’C+(A+B+C’)’+A’B’C’D
c) F(A,B,C,D)= ABCD+AB(CD)’+(AB)’CD
d) F(A,B,C,D) = 𝐴′ 𝐵′ 𝐶 + (𝐴𝐵𝐶 )′ + 𝐴′𝐵′𝐶′𝐷
e) F(A,B,C) = (A+B) (A’(B+C)’)’+A’ (B+C)
f) F(A,B,C) = (A+B+C). (A+B′+C′).(A+B+C′).(A+B′+C)
5. Obtain the minimal sum of products expression for the following function and
implement the same using universal gates
F(A,B,C,D) = ∑m (0,2,3,5,7,8,13) +∑d (1,6,12).
6. A truth table in POS form is given by
F (A,B,C,D) = Π M (4,5,6,7,8,9)
Simplify and design the circuit in both NAND-NAND and NOR –NOR configuration
7. Simplify the logic expression using Karnaugh map:
F (A, B, C, D) = ∑ m (1,3,7,11,15) + ∑d (0,2,5).
Realize the simplified logic expression using NOR logic gates
8. Simplify the Boolean expression Y= Π M (0,1,3,5,6,7,10,14,15)
9. Simplify the Boolean expression Y= ∑m (0,1,2,3,4,5,6,7,11,13,14)
10. Simplify the Boolean expression Y= ∑m (0,2,4,7,8,10,12,13)
11. Simplify the Boolean expression Y= ∑m (0,1,2,3,5,7,8,9,11,14)
12. Simplify the Boolean expression Y= ∑m (0,1,2,3,4,7,8,9,10,11,12,14)
13. Simplify the Boolean expression Y= ∑m (7,9,10,11,12,13,14,15)
14. Simplify the Boolean expression Y= Π M (0,1,2,3,8,9,10,11,12,13)
15. Simplify the Boolean expression Y= Π M (0,2,8,9,12,13,15)
16. Simplify the Boolean expression Y= Π M (1,2,5,6,8,9,15)
17. Prove that AB+(𝐴𝐶 )′ +A𝐵′ C(AB+C) =1 using Boolean laws.
18. Prove that A (𝐴̅ +C)(𝐴̅B+C)(𝐴̅ BC + 𝐶̅ ) = 0 using Boolean laws.
19. A truth table in SOP form is given by
F (A,B,C,D) = ∑m (4,5,6,7,8,9)
Simplify and design the circuit in NAND-NAND configuration
20. Explain full adder circuit with logic diagram and truth table.
21. Explain full subtractor circuit with logic diagram and truth table.
22. Explain the operation of 4 bit binary parallel adder circuit.
23. Explain the operation of 4 bit binary parallel subtractor circuit
24. What is carry propagation delay in 4-bit parallel adder/Subtractor circuit? Which circuit
is used to overcome this problem? Explain the circuit.
25. Explain the operation of 4x1 Multiplexer with truth table
26. Explain the operation of 8x1 Multiplexer with truth table.
27. Implement a 8x1 multiplexer with the help of 4x1 multiplexers
28. Implement a full adder circuit using a 8x1 line multiplexer
29. Implement a full subtractor circuit using a 8x1 line multiplexer
30. Explain the operation of 1x4 demultiplexer with truth table
31. Explain the operation of 1x8 demultiplexer with truth table
32. Implement a 1x8 demultiplexer with the help of 1x4 demultiplexers
33. Implement a 1x16 demultiplexer with the help of 1x8 demultiplexers
34. Implement a full adder circuit using a 1x8 line demultiplexer
35. Implement a full subtractor circuit using a 1x8 line demultiplexer
36. Explain the operation of 2x4 decoder with the help of truth table.
37. Explain the operation of 3x8 decoder with the help of truth table.
38. Explain the operation of BCD to decimal decoder with the help of truth table
39. Implement a full adder circuit using decoder
40. Implement a full subtractor circuit using decoder
41. Explain the operation of 4x2 Encoder (Encoder with 4 input lines) with the help of truth
table.
42. Explain the operation of 8x3 Encoder (Encoder with 8 input lines) with the help of truth
table.
43. Describe the operation of 3 bit binary to gray and gray to binary converter with truth table
and logic diagram.
44. Explain the operation of 3 bit parity generator and checker with truth table and logic
diagram.
45. Write down the difference between combinational and sequential circuit.
46. Showing the steps, realization of S-R Flip flop with truth table
47. What is edge triggered flip- flop? Explain the functioning of a positive edge triggered S-
R flip- flop with truth table.
48. What is race around condition in J-K Flip flop. Explain the operation of a clocked J-K
Flip flop along with its excitation table.
49. Describe with necessary waveforms the functioning of a negative edge triggered J-K
Flip- Flop.
50. Explain the operation of D flip flop with truth table and excitation table.
51. Explain the operation of T flip flop with truth table and excitation table.
52. Classify different types of Registers. Draw the operation table of a 4-bit Shift Right
register .when 0 clock pulse resets all the Flip-flops and data 1101 enters left to right
53. What do you mean by a shift register? Explain the operation of serial in serial out shift
register with the help of suitable example.
54. Explain the operation of serial in parallel out shift register with the help of suitable
example.
55. Write down the difference between asynchronous and synchronous counter.
56. With necessary diagrams, explain the operation of a 3-bit ring counter.
57. Design a MOD-4 synchronous counter using T Flip flops.
58. Design a MOD-4 asynchronous counter using T Flip flops.
59. Design a MOD-8 synchronous counter using K-map method
60. Write short note on:
a. Full subtractor circuit.
b. Encoder circuit with eight input lines (8x3)
c. Prove NAND gate is a universal gate.
d. D flip flop
e. 1: 8 Demultiplexer
f. Ring counter
g. 3 bit parity generator and checker.
h. MOD-8 synchronous counter
