Renewable and Sustainable Energy Reviews 45 (2015) 69–86

Contents lists available at ScienceDirect

Renewable and Sustainable Energy Reviews

journal homepage: www.elsevier.com/locate/rser

Single phase transformerless inverter topologies for grid-tied

photovoltaic system: A review
Monirul Islam a,n, Saad Mekhilef a,n, Mahamudul Hasan b
a
Power Electronics and Renewable Energy Research Laboratory (PEARL), Department of Electrical Engineering, Faculty of Engineering, University of Malaya,
Kuala Lumpur 50603, Malaysia
b
Department of Mechanical Engineering, University of Malaya, Kuala Lumpur 50603, Malaysia

art ic l e i nf o a b s t r a c t

Article history: Grid-tied inverters are the key components of distributed generation system because of their function as
Received 10 October 2013 an effective interface between renewable energy sources and utility. Recently, there has been an
Received in revised form increasing interest in the use of transformerless inverter for low-voltage single-phase grid-tied
12 December 2014
photovoltaic (PV) system due to higher efficiency, lower cost, smaller size and weight when compared
Accepted 4 January 2015
to the ones with transformer. However, the leakage current issues of transformerless inverter, which
depends on the topology structure and modulation scheme, have to be addressed very carefully. This
Keywords: review focuses on the transformerless topologies, which are classified into three basic groups based on
Common mode voltage the decoupling method and leakage current characteristics. Different topologies under the three classes
Grid connected
are presented, compared and evaluated based on leakage current, component ratings, advantages, and
Leakage current
disadvantages. An examination of demand for the inverter, the utility grid, and the PV module are
Renewable energy
Photovoltaic presented. A performance comparison in MATLAB/Simulink environment is done among different
Transformerless inverter topologies. Also an analysis has been presented to select a better topology. Finally, based on the analysis
and simulation results, a comparison table has been presented. Furthermore, some important experi-
mental parameters have been summarized.
& 2015 Elsevier Ltd. All rights reserved.

Contents

1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. Grid-tied photovoltaic inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1. Classification of grid-tied PV inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.1. Central inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.2. String inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.3. Module integrated inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1.4. Multi-string inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2. Design of grid-tied PV inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3. Requirements of the grid-tied PV system. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.1. Requirements of the grid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.2. Requirements of the photovoltaic module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Transformerless inverter for grid-tied PV system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1. Parasitic capacitance and leakage current issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2. Classification of transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3. Zero state decoupled transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3.1. H5 topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3.2. HERIC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.3.3. H6-type MOSFET inverter topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3.4. Improved H6 topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

n
Corresponding authors.
E-mail addresses: [email protected] (M. Islam),
[email protected] (S. Mekhilef).

http://dx.doi.org/10.1016/j.rser.2015.01.009
1364-0321/& 2015 Elsevier Ltd. All rights reserved.
70 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

4.3.5. Highly reliable and efficient (HRE) topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.4. Zero-state mid-point clamped transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.4.1. H6 topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.4.2. HB-ZVR topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4.3. oH5 topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4.4. PN-NPC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.5. Solidity clamped transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.5.1. Neutral point clamped three-level VSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.5.2. Active NPC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5.3. Dual-parallel-buck converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5.4. Virtual DC bus topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5.5. Flying capacitor topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5.6. Conergy NPC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5. Performance comparison of different transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6. Analysis and discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Appendix A. Important experimental parameters of different transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

1. Introduction

The conventional generation systems such as coal fired, gas and

nuclear power as well as hydroelectric dams are centralized and
often require electricity to be transmitted over long distances. The
security and stability of the conventional electrical power system
are under threat due to a number of blackouts caused by chain
failure [1] and electric grid ruptures caused by extreme weather
[2]. In contrast, distributed energy resources such as solar power,
wind power, biomass, and biogas are decentralized, modular and
more flexible. As well, these energy sources have the advantage
that the power is produced in close proximity to where it is
consumed [3,4]. This way the losses due to transmission lines can
be reduced. In addition, the constant consumption of fossil fuels is
leading to energy crisis and increasing environmental pollution
problems. Therefore, the distributed energy resources, particularly
PV and wind power basis [5], have achieved great response in
current years to meet the world energy demand and become the
important alternatives of traditional power sources [3,4,6].
Among a variety of renewable energy sources, PV is predicted
to have the biggest generation, up to 60% of the total energy by the
Fig. 1. Evaluation of PV installation [10].
end of this century [7,8], because the energy which is converted
into electrical energy is the light from the sun, which is free,
available almost everywhere and will still be present for millions
of years long after all non-renewable energy sources have been
depleted [7,9]. Though the PV module is still expensive, due to the
large-scale manufacturing it is becoming increasingly cheaper in
the last few years. In addition, the PV module has no moving parts,
which have made it a very robust, long lifetime and low main-
tenance device. Based on the newest report of International
Energy Agency (IEA) on installed PV power, the milestone of
100 GW PV system all over the world was achieved at the end of
2012, and increased to 140 GW at the end of 2013 which is shown
in Fig. 1 [10].
Fig. 2 shows the share of grid-tied and off-grid PV installation.
It can be seen that the off-grid market can hardly be compared
with the grid-tied market. The evaluation of the share of grid-tied
PV market per region from 2000 to 2013 is shown in Fig. 3. Though
Asia started to dominate the market in the early 2000, after 2004 a
great development can be seen in Europe. While Europe and Asia
presented a major part of grid-tied PV installation globally in 2013,
the Middle East & Africa started to grow in 2012 and 2013.
However, for grid-tied PV system, the power electronic technology
plays an important role in the integration of PV energy sources Fig. 2. Share of grid-connected and standalone PV installation [10].
 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 71

power delivered to the grid by the central inverter was of very

poor quality involving many current harmonics.

2.1.2. String inverter

The string inverter that offers a number of advantages are
leading the present technology [15]. Fig. 4(b) describes the string
inverter system, where a single PV string made by series con-
nected solar panels is coupled to an inverter. The string voltage
may be sufficient, and thus voltage boosting is not required. The
normal operating voltage of string inverter is 340–510 VDC for
230 VAC application. The opportunity of using less PV modules
connected in series is also available if a DC–DC booster or a line
frequency transformer has been used. Compared to the central
inverter, the string inverter has several advantages such as no
string diode losses, individual MPPTs can be applied for every
string, lower price due to huge production, and overall higher
efficiency [13,14].

2.1.3. Module integrated inverter

The module integrated inverter system is shown in Fig. 4(c),
Fig. 3. Share of grid-connected PV market per region [10].
where an AC module made by a single solar panel and its own
inverter is connected to the grid. There is no mismatch between
the PV modules; as a result, the power loss is well minimized. It is
into the utility grid. Generally, a single-phase power converter is
also possible to obtain maximum power from the PV module as a
used to process the power of PV energy sources with certain
result of its own inverter and MPPT [11]. The advantage of an easy
matters like efficiency and cost as the main factors.
expanding of the system is available here due to the modular
The scope of this paper is to provide an overview and discuss
structure. The main disadvantage is the reduced overall efficiency
some trends in grid-tied photovoltaic inverter. Firstly, the overview
because of higher voltage amplification and installation cost.
of grid-tied PV system is presented including different types of PV
However, this can be overcome by huge production, leading to
inverter and the examination of demands for the utility grid, and
low manufacturing and retail costs.
the PV modules. Further, the leakage current issues of transformer-
less inverter for grid-tied PV system are discussed. Next, a review of
transformerless topologies for grid-tied PV system by emphasizing 2.1.4. Multi-string inverter
the leakage current and efficiency is presented. At last, simulations The multi-string inverter is the evaluation of string inverter
are carried out of different topologies to compare their perfor- depicted in Fig. 4(d), where each string made of several solar
mance. Finally, the approaches are further discussed and evaluated panels is coupled to its own DC-to-DC converter with individual
to select the most suitable topologies for future grid-tied PV system. MPPT and feed energy to a common DC to AC inverter. Conse-
quently, each PV power plant with a few modules can be func-
tioned separately. The advantages of string and module integrated
2. Grid-tied photovoltaic inverter inverter is combined here. Since each PV string is controlled
individually, the overall efficiency is higher. There are several
2.1. Classification of grid-tied PV inverter advantages of multi-string inverters such as cost reduction, more
flexible, small DC-link capacitor, and high energy reveal due to
The general classifications of grid-tied PV inverters are as local MPP tracking and optimum monitoring of the PV system
follows [11–15]: [12,16].

Central inverter; 2.2. Design of grid-tied PV inverter

String inverter;

Module integrated inverter; The PV generates DC voltage; thus, it requires a converter to

Multi-string inverters. convert into a voltage of corresponding amplitude at the main
frequency for feeding it into utility grid as shown in Fig. 5. Most of
the countries report installing PV system by counting DC power,
2.1.1. Central inverters but some report AC power also. The inverter role in grid-tied PV
The central inverter system depicted in Fig. 4(a) was imple- system is to be the interface between two energy sources: the PV
mented in the past technology [15], where PV plants bigger than module on one side and the utility grid on the other side. Since the
10 kWp were prepared in series or parallel strings and connected inverter converts DC power of PV module into AC power for
to the inverter. The inverters were mostly connected to a three- feeding it into utility grid, it is responsible for power quality that
phase application; thus no decoupling was necessary. The voltage needs to be satisfied by the requirement of different standards,
generated by the series connected modules was high enough to which are briefly described in the next section. Depending on the
satisfy the input voltage condition of the inverter [12]. However, galvanic isolation between the PV module and the grid, the grid-
this inverter had some significant disadvantages such as high tied PV inverter can be categorized as isolated or non-isolated. The
power losses due to centralized maximum power point tracking galvanic isolation between the PV module and the grid can be
(MPPT), high voltage DC cables between PV panels and inverters observed by using a line frequency transformer or a high fre-
due to high input voltage, non-flexible design, losses in the string- quency transformer that adjusts converter DC voltage [6,17,18].
diodes, and being expensive. Consequently, it was not possible to Due to size, weight and price in favor of high frequency transfor-
acquire the advantages of huge production. Furthermore, the mers, the tendency of removing the line frequency transformers is
72 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

Fig. 4. Different types of grid-tied PV inverter: (a) central inverter; (b) string inverter; (c) module inverter; and (d) multi-string inverter.

increased when designing the new converter. Also the existence of operated at MPP; and (2) the injected current to the grid must be
high-frequency transformer requires several power stages, which sinusoidal which has to comply with some specific standards. In
makes reducing cost and increasing efficiency a challenging task this section, these tasks are further investigated.
[19–21]. On the other hand, transformerless grid-tied inverter has
the benefits of lower cost, higher efficiency, smaller size, and 3.1. Requirements of the grid
weight when compared to the ones with transformer [22–28].
Furthermore, during the last few years, a change of paradigm The grid connected PV system must comply with some specific
concerning the size of the grid-tied inverter has been observed standards that are regulated by the utility in each country such as
[29,30]. Because of some limitations of big central inverters of IEEE 1547.1-2005, VDE0126-1-1, EN 50106, and IEC61727. These
power more than 100 kW, the present technology consists of the standard deal with matters like total harmonic distortion (THD)
small size string or multi-string inverters which improve the MPPT and individual harmonic current levels, injected DC current level
of large PV groups of panel [14,31,32]. and leakage current, range of voltage and frequency for regular
operation, power factor (PF), detection of islanding operation
(islanding or non-islanding functions), grounding of the system,
3. Requirements of the grid-tied PV system and automatic reconnection and synchronization [33–36]. Table 1
summarizes the requirements of IEEE 1547 standard [14,37].
The photovoltaic system connected to the grid involves two As seen in Table 1, the IEEE 1547 standard set some restrictions
major tasks: (1) it must be ensured that the solar panels are on maximum acceptable DC current injection into the utility grid.
 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 73

Generally, the saturation of distribution transformer is neglected

by limiting the DC current injection [38,39]. Nevertheless, the limit

Low frequency
transformer
Converter
is quite small in IEEE 1547 standard ( o0.5% of rated output

Filter
PV Vg current) and it is difficult to maintain this value precisely with
the exciting circuit inside the inverter. Rather this can be sup-
pressed by providing a galvanic isolation between PV module and
the grid. However, this matter is a great concern in case of
transformerless inverter and different control strategies have been
investigated to effectively limit the DC current injection into the
High frequency

utility grid [40–42]. The DC current injection requirement given by

transformer

Converter different standards could be summarized as shown in Table 2.

Filter
PV Vg
The EN 50106 standard deals with the voltage characteristics of
electrical energy in the public distribution system. It defines the
requirements of the main voltages and their permitted deviation
ranges at the point of common coupling (PCC) in low voltage and
medium voltage distribution system under normal operating
condition. Table 3 shows the requirement of the EN 50106
Converter

standard. In the table, low and medium voltages are defined as

Filter

PV Vg the phase–phase nominal root mean square (RMS) voltage that

does not exceed 1000 V for low voltage and lies between 1 and
35 kV for medium voltage.
The German VDE-0126-1-1 standard is the only standard that
Fig. 5. Grid-tied PV system using (a) grid size low-frequency transformer; (b) DC
specifically deals with transformerless PV inverter concerning fault
side high-frequency transformer; and (c) transformerless inverter.
or leakage current levels. According to VDE-0126-1-1 standard, the
disconnection time of the inverter from the grid is 0.3 s when the
Table 1 RMS value of leakage current is greater than 30 mA. The RMS
IEEE 1547 requirements for grid connection [14].

Nominal power 30 kW
Harmonic currents (2–10) 4.0% Table 4
(11–16) 2.0% Leakage current value and their corresponding
(17–22) 1.5% disconnection times listed in VDE 0126-1-1 stan-
(23–34) 0.6% dard [33].
( 435) 0.3%
THD 5% Leakage current value Disconnection time
DC current injection o 0.5% of rated output current (mA) (s)
Abnormal voltage V o50% or V 4137% 6 cycles
disconnection 50% o V o88% or 110% o V o137% 120 cycles 30 0.3
Abnormal frequency fo rated–0.7 Hz 6 cycles 60 0.15
disconnection f4ratedþ 0.5 Hz 6 cycles 100 0.04

Table 2
Maximum DC current injection described in different standard.

Standard IEC61727 VDE0126-1-1 IEEE1547

DC current injection o 1% of rated output current o 1A o0.5% of rated output current

Table 3
Requirements of the standard EN 50106 [43].

Parameters Characteristics of the supply voltage

Low voltage Medium voltage

Power frequency 71% (49.5–50.5 Hz) for 99.5% of week 7 1% (49.5–50.5 Hz) for 99.5% of week
 6%/þ 4% (47–52 Hz) for 100% of week  6%/ þ4% (47–52 Hz) for 100% of week
Voltage magnitude variations 710% for 95% of week 7 10% for 95% of week
Rapid voltage changes 5% Normal 4% Normal
10% Infrequently 6% Infrequently
Plt r 1 for 95% of week Plt r1 for 95% of week
Supply voltage dips 10–50% 10–15%
Short interruptions of supply voltage (up to 3 min) (up to 3 min)
few tens – few hundreds/year few tens – few hundreds/year
Duration: 70% of themo 1 s Duration: 70% of them o1 s
Long interruptions of supply voltage (longer than 3 min) (longer than 3 min)
o10–50/year o 10–50/year
Temporary power frequency overvoltage o1.5 kV RMS 1.7 Uc (solid or impedance earth)
2.0 Uc (unearthed or resonant earth)
Transient overvoltage Generally o 6 kV, Not defined
occasionally higher; rise time: ms – ms
74 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

i PV
i PV
U MPP ,I MPP

i SC

i SC
id U PV P
MPP
P PV
U PV
u OC
Fig. 6. Characteristics and model of a PV cell: (a) electrical model with current and voltage defined and (b) electrical characteristics of PV cell.

values of the fault or leakage current and their corresponding P

disconnection times are detailed in Table 4. S1 S3
LA LDM LCM
A
3.2. Requirements of the photovoltaic module Vpv PV C Co C Vg
B
V
S2 S4 LB
A model for PV module and its electrical characteristics are V
C C
illustrated in Fig. 6. The most common material for the solar cell is N
crystalline silicon which is divided into multiple categories accord- C C i Z
ing to the crystallinity and crystal size as mono-crystalline silicon,
poly-crystalline silicon, ribbon silicon, and mono-like-multi sili-
Fig. 7. Single-phase transformerless FB inverter for the grid-tied PV system.
con. Analysts have predicted that the cost of polycrystalline silicon
will drop as companies build additional poly-silicon capacity
quicker than the industry's demand. The MPP voltage range for
this kind of PV modules is normally defined between 23 and 38 V. for a PV module with an MPP voltage of 35 V, the amplitude of the
On the other hand, the amount of material required for creating ripple voltage should not exceed 3 V.
the active material of solar cell is reduced by thin film technolo-
gies. Since silicon solar panels only use one pane of glass, thin film
panels are approximately twice as heavy as crystalline
silicon panel. 4. Transformerless inverter for grid-tied PV system
The PV module must be operated at the MPP that has to be
guaranteed by the inverter. Generally, most of the energy is 4.1. Parasitic capacitance and leakage current issues
captured at MPP, accomplished by MPP tracker (MPPT). In order
to operate the PV module around MPP without excessive variation, The PV module generates an electrically chargeable surface
it is necessary to reduce the ripple at the terminal of the PV area which faces a grounded frame. In case of such configuration, a
module. The relationship between the amplitude of the voltage capacitance is formed between the PV module and the ground.
ripple and the utilization ratio can be found from the analysis of Since this capacitance occurs as an undesirable side effect, it is
the circuit shown in Fig. 6, which can be expressed as [44] referred to as parasitic capacitance. The value of the parasitic
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi capacitor depends on many factors such as solar panel and frame
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
2ðK PV  1ÞP MPP ðK PV  1ÞP MPP structure, surface of cell, distance between cells, weather condi-
Δv ¼ ¼2 ð1Þ
3αV MPP þ β 2
dP =dV 2PV tion, humidity, dust or salt covering the PV panels, etc. [45–48].
PV
In [49], the parasitic capacitance of Soleil FVG 36, Kyocera KS10,
where Δv is the voltage ripple, PMPP and VMPP are the power and and BPSolar MSX120 multi-crystalline PV arrays has been mea-
voltage at MPP, α and β are the coefficients which describe the sured at different atmospheric conditions. It can be seen that the
second order Taylor approximation of the current and KPV is the maximum value of 75 nF/kW has been measured for BPSolar
utilization ratio which is given from the ratio of average generated MSX120 PV module by considering the worst-case scenario. It is
power to the theoretical MPP power. The coefficient can be also mentioned that a value of 1000 nF/kW could be measured for
calculated as follows [44]: thin film modules due to the metallic sheet on which the shells
have been installed. Therefore, a non-negligible parasitic capaci-
iPV ¼ αV 2PV þ βV PV þ γ ð2Þ
tance is present in every PV installation.
In order to remove the effect of leakage current and parasitic
V PV  V MPP þ Δv sin ðωt Þ ð3Þ
capacitance on the grid connected PV system, a transformer is
2 used that confirms the galvanic isolation between the PV module
1 d I MPP
α¼ ð4Þ and the grid. However, in case of transformerless inverter, a
2 dV 2MPP galvanic connection between the PV module and the grid exists
that can create a common-mode resonant circuit [46,50,51].
dI MPP
β¼  2αV MPP ð5Þ An alternating CM voltage, which mostly depends on the topology
dV MPP structure and control scheme, can electrify the resonant circuit
and may lead to a high ground leakage current [48,52]. In order to
dI MPP
γ ¼ αV 2MPP  V MPP þ I MPP ð6Þ analyze the CM characteristics, full-bridge (FB) transformerless
dV MPP
inverter for the single-phase grid-tied PV system is considered
Based on the calculations, the utilization ratio will be 98% if the which is shown in Fig. 7, where LA, LB and Co make up the low pass
amplitude of the ripple voltage is lower than 8.5% of the MPP LC type filter and Cdc represents the DC-link capacitor. LCM and LDM
voltage. As an example, in order to obtain a utilization ratio of 98% denote the common-mode (CM) and differential-mode (DM)
 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 75

inductor, respectively, and CDM and CCM are the DM and CM at medium frequency range. Finally, an equivalent CM circuit could
capacitors, respectively, in the EMI filter. be drawn as shown in Fig. 9.
The voltage between the mid-points A & B, of the bridge-leg From the simplified circuit made in Fig. 9, the total CM voltage
and the reference terminal N, is symbolized as VAN and VBN, and for single-phase FB inverter can easily be derived as follows:
imposed by the switches modulation scheme. Therefore, these two V DM LB  LA
outputs can be assumed as controlled voltage sources and sub- V tCM ¼ V CM þ ð11Þ
2 LA þ LB
stituted in Fig. 7. According to the definition of CM and DM voltage
In the half-bridge inverter family, one of the filter inductors LA
V CM ¼ 1=2ðV AN þ V BN Þ ð7Þ
or LB is commonly zero. On the other hand, LA and LB are usually
V DM ¼ V AN  V BN ð8Þ designed with equal values for the FB inverter family. As a result,
the condition of eradicating CM leakage current is concluded as
where VCM and VDM are, respectively, the CM and DM voltages.
Solving Eqs. (7) and (8); VAN and VBN can be expressed as follows: V tCM ¼ V CM ¼ 1=2ðV AN þ V BN Þ ¼ constant ð12Þ

V AN ¼ ð1=2ÞV CM þ V DM ð9Þ It can be seen from Eq. (12) that the CM voltage to be calculated
by the bridge-leg voltage VAN and VBN, which is different for
V BN ¼ ð1=2ÞV CM  V DM ð10Þ different topologies, mostly depends on the topology structure and
In order to achieve the CM model at switching frequency, Eqs. the modulation strategy. Therefore, the topology and the modula-
(9) and (10) have been substituted for the bridge-leg in Fig. 7 and tion strategy must be designed very carefully to minimize ground
the new model can be obtained as shown in Fig. 8. leakage current for the transformerless grid-tied PV system.
According to the ‘superposition principle’, the differential
branch and element can be removed while the CM branch and 4.2. Classification of transformerless topologies
element are retained. Moreover, the grid voltage can be shortened
Despite the numerous transformerless grid-tied PV inverter
topologies, most of them can be grouped into three classes as (1)
LA LCM zero-state decouple topologies; (2) zero-state mid-point clamped
topologies; and (3) solidity clamped topologies. The above-
CCM mentioned groups are based on the leakage current characteristics
CDM Vg
CCM and the decoupling method of transformerless topologies. The
zero-state decouple topologies can decouple the PV module from
LB E
the grid during the freewheeling mode. And the topologies that
V DM - V DM decouple the PV module from the grid during the freewheeling
mode and also clamp the short circuited output voltage to the
VCM Zg mid-point of DC-link have been included in the zero-state mid-
point clamped topologies. However, the solidity clamped topolo-
C PVg i cm gies have solid connection between the PV module and the grid.
Fig. 10 details the classification, where the transformerless topol-
Fig. 8. The equivalent CM model of transformerless FB inverter. ogies under each group is presented.

VtCM=VCM+VDM/2 4.3. Zero state decoupled transformerless topologies

LA//LB LCM
(LB-LA/LA+LB)
N The conventional FB topology has a number of features for
single-phase operation connected with PV module such as simple
C CCM

VAB
Zg icm
(V)

Fig. 9. The final CM model of transformerless FB inverter.

Transformerless Topologies
i leakage
(A)

Zero state decouple Zero state mid-point Solidity clamped

topologies clamped topologies topologies

H5 topology [24] H6 topology [27] NPC three-level VSI [40] V CM

HERIC topology [53] HB-ZVR topology [25] ANPC topology [79, 80]
H6-type MOSFET inverter oH5 topology [26] Dual-parallel-buck
(V)

topology [59] PN-NPC topology [62] topology [22]

Improved H6 topology [67] Topology proposed in [63] Virtual DC bus topology
HRE topology [52] [68]
Other topologies proposed Flying capacitor topology
in [23], [54], [55], [56], [87, 90, 91]
[57], [58], [60], and [61].
Fig. 11. CM voltage and leakage current for FB inverter by employing bipolar-
Fig. 10. Classification of transformerless inverter topologies [53,54,56–58,60,61,63,64]. SPWM.
76 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

Table 5 P
LA
Parameters used in simulation.
S1 S3
Inverter parameter Value A S5
Vpv PV Cdc Co Vg
Input voltage 400 VDC
Grid voltage/frequency 230 V/50 Hz
B
S6
Rated power 1000 W S2 S4
AC output current 4.2 A
Switching frequency 20 kHz N LB
DC bus capacitor 1000 mF
Filter capacitor 2.2 mF Fig. 14. HERIC topology.
Filter inductor LA, LB 3 mH
PV parasitic capacitor Cpv1, Cpv2 75 nF
P
S1 S3 LA

VAB A B Co Vg
Cdc
Vpv PV S5 D1 D2 S5
LB
(V)

S2 S4
N
VCM
Fig. 15. H6-type MOSFET inverter topology.
(V)

the freewheeling period. In this section, the topologies based on

zero-state decouple are further reviewed.

ileakage
(A)

4.3.1. H5 topology
An explicit inverter topology proposed in [24] is called H5
topology as shown in Fig. 13. This topology is patented by the
Fig. 12. CM voltage and leakage current for FB inverter by employing unipolar- world famous SMA solar technology, which is enumerated as one
SPWM. of the world's top producers of PV inverter. It is made up by adding
an extra switch with FB topology. The unipolar-SPWM has been
applied to operate this inverter with three-level output voltage. In
the positive half cycle of the grid current, switches S4 and S5 are
P commutated with switching frequency and the active current
S5 flows through S1, S4, and S5. The zero voltage vectors are achieved
S1 S3 when S4 and S5 are turned off and the freewheeling current flows
LA
through S1 and the body-diode of S3. In the negative half cycle, S5
A
Vpv PV Cdc Co Vg and S2 are switched with switching frequency and the freewheel-
B ing current flows through S3 and the body-diode of S1. Since the
LB output current flows through three switches in the active mode,
S2 S4
higher conduction losses are present [69,70]. However, using this
N topology, the maximum efficiency and California energy commis-
sion (CEC) efficiency have been reported as 98.5% and 98.0%,
Fig. 13. Circuit structure of H5 topology. respectively, for 8 kW inverter [71].

circuit structure, low DC bus voltage compared with half-bridge 4.3.2. HERIC topology
topology, low cost, high efficiency, small amount of PV module Full-bridge inverter along with AC bypass (FB-ACBP) topology
connected in series and many more. The FB inverter operated with has been proposed in [72] as shown in Fig. 14, called Highly
bipolar sinusoidal pulse width modulation (SPWM) generates low Efficient and Reliable Inverter Concept (HERIC) topology. This
leakage current as shown in Fig. 11. However, it produces high topology has been implemented in some commercial inverters,
ripple at the inverter output, which increases the size of the especially those from Sunway's converter [22,65]. It has the benefit
output filter. Consequently, energy conversion efficiency is of three-level output voltage by employing unipolar-SPWM with
decreased. The simulation parameters are given in Table 5. On low current ripple across the output filter. Two switches are added
the other hand, the FB inverter operating with unipolar-SPWM in the AC side to provide the path of freewheeling current. In order
introduces high frequency CM leakage current as shown in Fig. 12. to flow the freewheeling current, either S5 or S6 is turned on for
In unipolar-SPWM, the zero voltage state occurs when the bottom positive or negative half cycle of grid current. Though the PV
or upper switches are off state. The active and zero states occur at module is decoupled from the grid, a varying CM voltage is present
every PWM cycle, as a result the CM voltage fluctuates with high because the potential of the freewheeling path is not clamped to
frequency. In order to ensure almost constant CM voltage, the PV the half of the DC input voltage. However, the ground leakage
module must be decoupled from the grid during the freewheeling current is minimized to an acceptable level [25,72]. Furthermore,
period. A number of modified FB topologies have been proposed in the inverter efficiency has been kept high because the load current
the literature by decoupling the PV module from the grid during is short circuited via S5 or S6 during the freewheeling period [33].
 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 77

4.3.3. H6-type MOSFET inverter topology topology is the necessity of additional capacitors which may
Yu et al. proposed an H6-type MOSFET inverter topology in [59] increase the losses.
by removing the use of low effective IGBTs which is depicted in
Fig. 15. Unipolar-SPWM can be implemented for this topology with
three-level output voltage. In the positive half cycle of grid current, 4.3.5. Highly reliable and efficient (HRE) topology
the freewheeling current flows through S5 and D1, when S1 and Bin et al. proposed a high reliability and efficiency (HRE)
S4 are turned off. In contrast, it flows through S6 and D2, when S2 topology in [52] by using MOSFETs as main power switches, which
and S3 are turned off for the negative half cycle of grid current. is shown in Fig. 17. The HRE topology splits the AC side into two
Therefore, the reverse-recovery issues are not required for this individual parts for positive and negative half cycle of grid current
topology that allows utilizing MOSFET switches. The indicated if compared with HERIC topology. Diodes D1–D4 accomplish the
peak efficiency and European efficiency of H6-type MOSFET voltage clamping functions for the active switches S1–S4. When S1
inverter on 300 W prototype circuit with 180 VDC bus voltage and S3 are turned off, the freewheeling current flows through S5
and 30 kHz operating frequency were 98.3% and 98.1%, respec- and D5 decoupling the PV module from the grid for positive half
tively [59,73]. In the active mode, the grid current flows through cycle. On the other hand, when S2 and S4 are turned off, the
three switches; as a result, higher conduction losses still remain. freewheeling current flows through S6 and D6 for the negative
Another difficulty is that the anti-parallel diodes of MOSFETs will half cycle of grid current. Coupled inductors L1 and L2 are
be activated if a phase shift occurs between the inverter output activated for the positive and negative half cycles, respectively.
voltage and current. Consequently, the dependability of the system The reported maximum and CEC efficiencies of the HRE inverter
will be reduced due to the low reverse recovery issues of MOSFETs on a 5 kW prototype circuit with 20 kHz switching frequency were
anti-parallel diode [52,73]. 99.3% and 99%, respectively. The main topology consists of six
MOSFETs and six diodes which increase the complexity and the
initial cost.

4.3.4. Improved H6 topology

Another H6 topology has been proposed in [67], where the 4.4. Zero-state mid-point clamped transformerless topologies
author has analyzed the effect of switches junction capacitance on
the CM voltage and achieved an improved grid-tied inverter that The zero-state mid-point clamped transformerless topologies
can meet the condition of constant CM voltage. Two extra switches are very similar to the zero-state decoupled topologies and the
S5 and S6 are symmetrically added to the FB inverter to develop majority of mid-point clamped topologies can be obtained from
this topology, which is depicted in Fig. 16. In practical cases, when decouple topologies. The only difference is that the short circuited
the inverter commutates from one non-decoupling mode to one output voltage during freewheeling period is clamped to the mid-
decoupling mode, the slope of the leg point voltage VAN and VBN point of DC bus. Consequently, the CM voltage kept constant
depends on the junction capacitance of the switches [67,74,75]. during the whole period. In this section, zero-state mid-point
As a result, the CM voltage is affected by the junction capacitance. clamped transformerless topologies are further investigated.
The modulation technique used for this topology is unipolar-
SPWM and double frequency SPWM. It has been shown that the
CM voltage will be constant if two extra capacitors with the values 4.4.1. H6 topology
of 29 pF are connected in parallel to the switches S3 and S4 under A topology by adding two switches and a bidirectional clamp-
unipolar-SPWM. On the other hand, under double-frequency ing branch with the FB topology has been proposed in [27], called
SPWM, the CM voltage will be constant if four extra capacitors full-bridge with DC bypass (FB-DCBP) topology as illustrated in
with the values of 470 pF are connected in parallel to the switches Fig. 18. The clamping branch constitutes a capacitive divider and
S1, S2, S3, and S4. Double-frequency SPWM reduces the current two diodes that can clamp the CM voltage to the half of the DC
ripples across the output filter which is half if compared with the input voltage. The switches S1 & S4 are commutated with line-
unipolar-SPWM scheme [67]. The main disadvantage of this frequency and in anti-parallel to S2 and S3, based on whether the
grid voltage is in the positive or negative half period. During
P freewheeling mode, either diode D1 or diode D2 can be conducted
S5 based on whether the freewheeling path potential (VAN E VBN) is
S1 S3
LA higher or lower than half of the DC link voltage. In this topology,
A leakage current removal effect depends only on the turn-on speed
Cdc Co Vg of the clamping diodes. The main drawbacks of FB-DCBP topology
Vpv PV
B are that the conduction losses are more due to the inductor
LB
S2 S4 current flowing through four switches in the active mode [27].
S6
The reported maximum efficiency and European efficiency of H6
N
inverter for 5 kW prototype circuit with 350 VDC input voltage
Fig. 16. Improved H6 topology. were 97.4% and 97.16%, respectively.

P
P S5
S1 D4 D3 S2 S1 S3
L1 C D1 L
A
D5
S6 Vg Co Vg
Vpv PV C Vpv PV
S5 D6 B
C D2
L2 S2 S4 L
D1 S4 S3 D2 S6
N N

Fig. 17. Highly reliable and efficiency topology by Gu et al. Fig. 18. H6 topology by Gonzalez et al.
78 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

4.4.2. HB-ZVR topology the gate signals of the switches S5 and S6 to avoid the short circuit
FB inverter topology with AC bypass has been proposed in [25] of the input split capacitor Cdc1. As a result, CM voltage fluctuates in
called H-Bridge Zero Voltage Rectifier (HB-ZVR) topology, where dead time [26,55]. Another disadvantage of this topology is that
the short circuited output voltage during freewheeling period is higher conduction losses still remain due to the inductor current
clamped to the mid-point of the DC bus through a diode rectifier flowing through three switches in the active mode.
and one bidirectional switch. In order to defend the lower DC link
capacitor from short circuiting, an extra diode is added as shown 4.4.4. PN-NPC topology
in Fig. 19. The operational principle of HB-ZVR topology is very The neutral point clamped (NPC) topology is an excellent
similar to the HERIC topology [72]. The gate pulse of S5 in the exploration for the grid-tied PV system [40,77]. Zhang et al.
positive half-wave is the contrary gate pulse of S1 and S4, with a proposed two kinds of switching cells, the positive neutral-point
small dead time to neglect grid short circuit [25,76]. During the clamped cell and the negative neutral-point clamped cell to build
negative half wave, S5 is controlled using the contrary gate pulse NPC topology in [62] called the PN-NPC topology which is illu-
of S2 and S3 and creates zero-voltage state by short-circuiting the strated in Fig. 21. The working principle of the PN-NPC topology is
output of the inverter and clamping them to the mid-point of the similar to that of the H6 topology [27]. During freewheeling period,
DC bus. The clamping function of this topology has been done the short circuited output voltage is directly clamped to the half of
using diode D5, which allows one-directional clamping only if the DC input voltage through switches S7 and S8. As a result, the CM
freewheeling path potential is higher than the mid-point voltage voltage is kept constant at VPV/2 and the leakage current is as low as
of the DC link. As a result, CM voltage fluctuation could be other mid-point clamped topologies. The PN-NPC inverter has
observed when the reverse condition is occurred. Another dis- three-level output voltage with excellent DM characteristics. The
advantage of this topology is the necessity of dead time which main drawback of this topology is the higher number of switches
increases the distortion of the output current. which leads to more complexity if compared with other topologies.
Another difficulty is that the inductor current flows through four
4.4.3. oH5 topology switches in the positive half cycle of grid current; thus, higher
Huafeng et al. proposed a modified H5 topology in [26], called conduction losses are also present in this topology [62].
optimized H5 (oH5) topology which is presented in Fig. 20.
A clamping branch consisting of a switch and a capacitor divider 4.5. Solidity clamped transformerless topologies
are added with the H5 topology which guarantees that the free-
wheeling path potential is clamped to the half of DC bus voltage. In solidity clamped transformerless topologies, a solid connec-
Switches S5 and S6 are commutated complementarily during the tion has been observed between the PV module and the grid in the
whole grid period to ensure the disconnection of PV module from freewheeling mode such that the high frequency CM voltage is
the grid. Unfortunately, a dead time must have to be added between aimed to be kept constant. Although the common property of
these topologies is the solid connection, their operating principle,
P DC bus, boosting, and output voltage characteristics may be
S1 S3
L
different. In this section, some of the solidity clamped transfor-
C merless topologies are reviewed.

V PV
A
S5 C V 4.5.1. Neutral point clamped three-level VSI
B The neutral point clamped half-bridge is the multilevel-based
C
S2 S4 topology for single phase operation which is mostly used in high
N
L power motor drive applications [77]. Recently, an NPC topology
has been proposed in [40] for single phase operation to be used in
Fig. 19. HB-ZVR topology.
the grid-tied PV system. It has one leg consisting of four switches
S1–S4 and two diodes D1–D2 to clamp the mid-point voltage as
illustrated in Fig. 22. These clamping diodes provide the free-
P wheeling path for the output current in the freewheeling mode,
S5
C S1 S3 resulting in the 0V output state [40,65]. The operating principle of
L
S6 this topology is very similar to that of the half-bridge topology, but
A
Co Vg
the efficiency is more and current ripple is less. Furthermore, the
Vpv PV
high frequency CM voltage is kept constant; thus leakage current
B
C L
S2 S4
P
N
S1
Fig. 20. oH5 topology.
PV

D2 S2
P LA
Cdc1 S1 S4 LA Vpv
S7 Vg
A Co Vg
B D1 S3
Vpv PV S2 S5
LB PV

S8 S4
Cdc2 S3 S6
N N
Fig. 21. PN-NPC topology. Fig. 22. Neutral point clamped three-level voltage source inverter.
 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 79

is minimized. On the other hand, unipolar-SPWM can be employed between switches S3 and S4 through which the grid is directly
to this topology with three-level output voltage as in the FB connected [52]. At the moment of zero crossing, a dead time of
topology [51]. The main drawback of this topology is the necessity 500 mS has been added that may increase the distortion of the
of higher input voltage 800 V if compared with the FB topology. output current and reduce the reliability of the topology [22].
Therefore, it requires high capacity bank of capacitor, which is
another disadvantage of this topology [66,78].
4.5.4. Virtual DC bus topology
Yunjie et al. proposed a cost-effective PV inverter by introducing
4.5.2. Active NPC topology virtual DC bus concept [68]. In order to suppress the leakage current,
The modification of NPC topology has also been proposed by the parasitic capacitance between the PV module and the ground has
replacing the clamping diodes with power switches, called active been avoided by connecting the grid neutral-line directly to the
NPC (ANPC) topology as shown in Fig. 23 [79,80]. The ANPC negative pole of the DC bus as shown in Fig. 25. Meanwhile, a virtual
topology has several ways to clamp the mid-point voltage if DC bus is created to provide the negative level. Thus, the inverter
compared with the conventional NPC topology. When the obtains three-level output voltage as like the unipolar FB inverter
switches S5 and S2 are turned on, the upper clamping path is with good DM characteristics. In the positive half cycle of grid
established as well as lower clamping path is established by current, switches S1 and S3 are always on and S2 is always off, while
turning on S3 and S6 [81,82]. The key feature of ANPC topology S4 and S5 commutate complementarily with high frequency. In the
is the improvement of power loss distribution; thus the power negative half cycle, S5 is always on and S4 is always off, while S1 and
semiconductors load uniformly and increase the efficiency of the S3 synchronously and S2 complementarily commutate with switch-
converter [77,80]. A number of different control strategies for NPC ing frequency [68]. The main difficulty of this topology is controlling
topology have been proposed in the literature [77,79–83], where the charging of virtual DC bus capacitor by the real bus at every
the author has established various paths of freewheeling current switching cycle. Another difficulty of this topology is that the power
for uniform loss distribution. switches are affected by some extra current stresses due to the
operation of switched capacitor, which reduces the efficiency and
reliability [67,68].
4.5.3. Dual-parallel-buck converter
Araujo et al. proposed a solidity clamped transformerless
topology in [22] called dual-parallel-buck converter as shown in 4.5.5. Flying capacitor topology
Fig. 24. This topology has been derived from [84] and [85] to get Fig. 26 shows another half-bridge three-level inverter topology
reverse power flow. The negative output of PV module is directly called flying capacitor (FC) topology that can be considered as an
connected to the neutral of the inverter in the positive half cycle as excellent solution for transformerless PV inverter. In this topology,
well as to the phase in the negative half cycle. Therefore, high the clamping diodes have been replaced with a capacitor that
frequency CM voltage oscillation is minimized, resulting in low “floats” with respect to the DC source reference. The additional
leakage current. The inductor current flows through two switches levels are achieved by means of the capacitor and it is mandatory
in the active mode; thus the conduction loss is reduced. The to confirm a constant voltage across the capacitor at the desired
reported maximum efficiency and European efficiency for a
4.5 kW prototype circuit with 16 kHz switching frequency were P
99% and 98.8%, respectively. The main drawback of this topology is
that the grid will be short circuit if no dead time is present S1

Vpv PV C1
P
S2 S4
S1
Cdc1 LA
N C2 A
S5 S2 LA
S3 S5 Vg
Vpv PV Co Vg

S6 S3
Cdc2
Fig. 25. Circuit structure of virtual DC bus topology.
S4
P
N
S1
Fig. 23. Active NPC topology. Cdc1

S2 LA
P
CFC
S3 S4 Vpv PV
D2 Co Vg
LA
A
S3
Vpv PV Cdc Vg
Cdc2
B
LB S4
S1 S2 D3 D4
N N
Fig. 24. Dual-parallel-buck topology. Fig. 26. Flying capacitor topology.
80 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

ig
P

(A)
Cdc1 S1
LA
S4 S3 VAB
Vpv PV Co Vg

(V)
Cdc2 S2
ileakage
N

(A)
P

Cdc1 S1
VAN
D1 D3 LA
Vpv PV
S3

(V)
D2 D4 Co Vg

Cdc2 S2
VCM
N

(V)
Fig. 27. (a) Conergy NPC topology and (b) variant of conergy NPC topology.

VBN
ig
(V)
(A)

VAB
Fig. 29. CM and DM characteristics of HERIC topology.
(V)

ileakage the floating capacitor is required to overcome the undesired

overvoltage, which increases the complexity in the control circuit
of FC inverter [69,89,90]. In addition, a high number of capacitors
(A)

are required for larger structures. The most interesting feature of

FC inverter is the fault tolerant operation that can be obtained for a
high number of levels. This characteristic allows the inverter to
continue the operation even if a single switch fault per phase or
VAN multiple faults in different phase occur [91].
(V)

4.5.6. Conergy NPC topology

VCM Conergy NPC topology is an excellent alternative of the classical
NPC topology with the output voltage clamped to the neutral-
(V)

point using bi-directional switches which have been patented by

conergy [92] which is shown in Fig. 27(a). An alternative realiza-
tion of the same concept has been presented in [93], where the
VBN clamping circuit consists of one switch and four diodes as shown
in Fig. 27(b). In this topology, the zero-voltage state can be
(V)

achieved by clamping the output voltage to the ground (middle-

point of DC bus) using switches S3 and S4. During the positive half
cycle, S1 and S3 commutate complementarily at the high fre-
quency as well as S2 and S4 commutate complementarily with
Fig. 28. CM and DM characteristics of H5 topology. high frequency in the negative half cycle. During the whole
process, the CM voltage has been clamped to VPV/2 and, as a
result, low leakage current follows through the parasitic capaci-
level, particularly when loading the outer DC link capacitor. tance [81]. This topology has similar characteristics as the NPC
However, imbalances can lead to high voltages that can destroy half-bridge topology, but it shows higher efficiency, which makes
the inverter [86–88]. Therefore, a special circuit for pre-charging it suitable for low power PV application [69].
 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 81

ig ig

(A)
(A)

VAB
VAB

(V)
(V)

i leakage
ileakage

(A)
(A)

Fig. 32. Inverter output voltage and leakage current of NPC topology.

VAN
ig
(V)

(A)
VCM
VAB
(V)

VBN (V)
(A) ileakage
(V)

Fig. 33. Inverter output voltage and leakage current of ANPC topology.
Fig. 30. CM and DM characteristics of H6 topology.

5. Performance comparison of different transformerless

ig
topologies
(A)

In order to present a performance comparison among the

topologies discussed earlier, simulations were carried out in
VAB MATLAB/Simulink software environment based on the parameters
given in Table 5. The parameters were the same for all the
(V)

topologies to make a fair comparison. During the simulation, the

PV module, and the stray capacitance between the PV module and
ileakage the ground have been replaced with a 400 VDC source and two
capacitors of 75 nF each, respectively. However, for the cases of
NPC and ANPC topology, the input voltage was 800 VDC.
(A)

The output waveform and CM behavior of the selected H5, HERIC,

H6, oH5, NPC, and ANPC topologies are depicted in Figs. 28–33. It can
be seen that all the topologies are generating three-level output
voltage which reduces the grid current ripple across the output filter
VAN inductor. Therefore, the DM behavior of all the topologies is almost
identical. But it can be observed from Figs. 32 and 33 that for the
(V)

application of 230 VAC, the NPC and ANPC topologies are required to
be implemented with 800 VDC input voltage, which is double if
compared to the other selected topologies.
VCM As seen in Fig. 28(b), the voltages VAN and VBN of H5 topology are
not clamped at the mid-point of dc-link voltage during the free-
(V)

wheeling mode, but well clamped to VPV and 0 during active mode.
As a result, it fluctuates (from 130 V to 200 V) with switching
frequency which induces a non-negligible leakage current as shown
VBN in Fig. 28(a). The CM characteristic of HERIC topology which is shown
in Fig. 29(b) also indicates the CM voltage fluctuation of amplitude
around 200 V with switching frequency. Thus, the leakage current is
(V)

not completely eliminated as shown in Fig. 29(b). On the other hand,

the voltages VAN and VBN of H6 topology which are shown in Fig. 30
(b) are completely complementary to each other; as a result, the CM
Fig. 31. CM and DM characteristics of oH5 topology. voltage kept constant at the mid-point of the DC-link voltage.
82 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

Table 6
Comparison of the several existing topologies.

Transformerless Input Input voltage Switches Diodes Transistor Output Leakage Maximum
topologies capacitor (230 VAC application) voltage, V voltage level current efficiency (%)
(No. of
switches)

Zero-state decouple H5 topology 1 400 VDC 5 0 0 1200 3 Low 98.5

transformerless topologies (5)
HERIC topology 1 400 VDC 6 0 0 1200 3 Low –
(6)
H6-type MOSFET 1 400 VDC 6 2 250 0 3 Low 98.3
inverter topology (6)
Improved H6 1 400 VDC 6 0 600 0 3 Very low 97.1
topology (6)
HRE topology 1 400 VDC 6 6 600 0 3 Low 99.3
(6)
Zero-state mid-point clamped H6 topology 2 400 VDC 6 2 600 1200 3 Very low 97.4
transformerless topologies (2) (4)
HB-ZVR topology 2 400 VDC 5 5 0 1200 3 Low 94.88
(5)
oH5 topology 2 400 VDC 6 0 600 1200 3 Very low –
(2) (4)
PN-NPC 2 400 VDC 8 0 600 1200 3 Very low 97.8
(6) (2)
Solidity clamped transformerless NPC three-level VSI 2 800 VDC 4 2 600 0 3 Very low 98.16
topologies (4)
Active NPC topology 2 800 VDC 6 0 0 1200 3 Very low 97.34
(6)
Dual-parallel-buck 1 400 VDC 4 4 650 900 3 Low 99.0
topology (2) (2)
Virtual DC bus 2 400 VDC 5 0 600 0 3 Low –
topology (5)
Flying capacitor 3 800 VDC 4 0 0 1200 3 Very low –
(4)
Conergy NPC 2 800 VDC 4 0 0 1200 3 Very low 97.67
topology (4)

Another zero-state mid-point clamped topology (oH5 topology) leakage current is very low [55,94]. However, each of the topology
shows constant CM voltage because the voltages VAN and VBN are has some advantages and disadvantages, and it is difficult to narrate
completely clamped to the mid-point of DC-link during the free- which topology is better than other. In order to select a better
wheeling period which is demonstrated in Fig. 31(b). Thus, low topology, it is interesting to compare the above-presented topolo-
leakage current is observed for both H6 and oH5 topology as gies by highlighting some key features as follows:
presented in Figs. 30(a) and 31(a), respectively.
In the case of solidity clamped transformerless topologies, high
Number of input capacitor and capacitance: The input capacitors
frequency CM voltage fluctuation is not present due to the solid are necessary for the PV inverter, which supply the AC
connection between the PV module and grid. The leakage current component of input current. The design and control of DC-
depends on the grid impedance. The leakage current waveform for link capacitor will be more complex if it is more than one. In
NPC and ANPC topologies is presented in Figs. 32 and 33. It can be addition, the necessity of input capacitance for some topologies
seen that very low leakage current flows through the system. can reach high values because of low frequency input current.
Therefore, it can be concluded that the zero-state decoupled trans-
Power semiconductors: The initial cost of PV inverters directly
formerless topologies cannot completely eliminate leakage current, affects the total cost of the grid-tied PV system. Therefore, it is
while the zero-state mid-point clamp and the solidity clamp trans- very important to reduce the cost of the inverter. Because of this
formerless topologies present almost zero leakage current. reason, the topology with the lowest number of switches could be
better. Furthermore, the efficiency of the inverter is affected by the
power rating of the switches. Therefore, it would be significant to
6. Analysis and discussion implement topologies using low voltage rating switches.

Efficiency: The key feature of a grid-tied PV inverter is to attain
It can be seen that a lot of research on transformerless inverter higher efficiency over a wide load range. Therefore, the topol-
have been completed to minimize the leakage current and increase ogies with high efficiency could be appropriate alternatives.
the efficiency. In this paper, based on the leakage current character-
Leakage current: As explained earlier, the most important issue
istics and decoupling methods, a large number of transformerless of transformerless PV inverter is leakage current that increases
topologies have been classified in a small number of basic groups. the grid current harmonics and system losses, and also creates
Furthermore, not only the cause of leakage current but also the strong conducted and radiated electromagnetic interference
operation principle, advantages and disadvantages of each topology [62]. Therefore, it is mandatory to reduce the leakage current
are investigated. It is shown that the cause of leakage current for within the limit described in the international regulations.
zero-state decoupled topologies is the mismatch between the
inverter output voltage and DC-link capacitance voltage, while in According to the above analysis, a comparison among various
the solidity clamped method the neutral line impedance plays an transformerless topologies has been conducted and summarized
important role. In mid-point clamped method, the grid voltage is in Table 6. It can be seen that most of the topologies under zero-
followed by the parasitic capacitance voltage; as a result, the state mid-point clamped and solidity clamped methods need to be
 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 83

implemented with two input capacitors that can increase the Table A4
complexity of the control circuit. However, these topologies Parameters of the improved H6 topology by Yang et al. [67].
present very low leakage current. In contrast, though zero-state
Inverter parameter Value
decouple topologies cannot completely eliminate leakage current
but only one input capacitor is required for them. It can be seen Input voltage 380 VDC
that some of the topologies could be implemented with less Grid voltage/frequency 220 V/50 Hz
number of switches and also low voltage rating switches. Rated power 1000 W
Switching frequency 20 kHz
DC bus capacitor 940 mF
Power switches (S1–S6) IRGB4056DPbF
Filter inductor LA, LB 4 mH
7. Conclusion PV parasitic capacitor Cpv1, Cpv2 75 nF

In this paper, a comprehensive review on the grid-tied PV system

followed by the single-phase transformerless topologies has been
presented. Due to the omission of transformer, a resonant circuit can Table A5
Parameters for the HRE topology by Bin et al. [52].
be created and electrified by the fluctuating CM voltage that depends
on the topology structure and modulation scheme. As a result, non- Inverter parameter Value
negligible leakage current may flow through the system. Three
methods have been presented based on the decoupling method and Input voltage 380 VDC
Grid voltage/frequency 240 V/60 Hz
leakage current characteristics as (1) disconnecting the PV module
Rated power 5000 W
from the grid during zero state; (2) clamping the short-circuited AC output current 21 A
output voltage to the half of DC input voltage during freewheeling Switching frequency 20 kHz
period; and (3) making a solid connection by connecting the neutral Power switches (S1–S6) IPW60R041C6
line to one pole of PV panels. The operation principle, advantages and Diodes (D1–D6) APT30DQ60BG
Filter inductor L1, L2 0.95 mH
disadvantages of the existing transformerless topologies have been PV parasitic capacitor Cpv1, Cpv2 100 nF
Digital controller Texas instrument's 28335

Table A1
Important parameters for H5 topology [26]. Table A6
Parameters for the H6 topology by Gonzalez et al.
Inverter parameter Value
Inverter parameter Value
Input voltage 340–700 VDC
Grid voltage/frequency 240 V/50 Hz Input voltage 350–800 VDC
Rated power 1000 W Grid voltage/frequency 230 V/50 Hz
Switching frequency 20 kHz Rated power 5000 W
DC bus capacitor 470 mF Switching frequency 16 kHz
Filter capacitor 6.6 mF Power switches (S1–S4) Mitsubishi CM100DY-24NF (1200 V)
Filter Inductor LA, LB 4 mH Power switches (S5–S6) IR G4PSC71UG (600 V)
PV parasitic capacitor Cpv1, Cpv2 100 nF Filter inductor LA, LB 3 mH

Table A7
Table A2 Parameters for the HB-ZVR topology by Kerekes et al.
Parameters of HERIC topology [95].
Inverter parameter Value
Inverter parameter Value
Input voltage 350 VDC
Input voltage 350 VDC Grid voltage/frequency 230 V/50 Hz
Grid voltage/frequency 230 V/50 Hz Rated power 2800 W
Rated power 1000 W Switching frequency 8 kHz
Switching frequency 8 kHz Power switches (S1–S5) PM75DSA120 (1200 V)
DC bus capacitor 250 mF Filter capacitor, Co 2 mF
Filter capacitor 2 mF Filter inductor LA, LB 1.8 mH
Filter inductor LA, LB 1.8 mH DC bus capacitor 250 mF
Dead time 2.5 ms

Table A3
Parameters for the H6-type MOSFET inverter topology by Table A8
Yu et al. [59]. Parameters for oH5 topology [26].

Inverter parameter Value Inverter parameter Value

Input voltage 180–200 VDC Input voltage 340–700 VDC

Grid voltage/frequency 120 V/50 Hz Grid voltage/frequency 240 V/50 Hz
Rated power 300 W Rated power 1000 W
Switching frequency 30 kHz Switching frequency 20 kHz
DC bus capacitor 470 mF DC bus capacitor Cdc1, Cdc2 470 mF/400 V
Filter capacitor 0.68 mF Filter capacitor Co 6.6 mF
Filter inductor LA, LB 0.8 mH Filter inductor LA, LB 4 mH
PV parasitic capacitor Cpv1, Cpv2 75 nF MOSFET S1  S6 IXFN36N100
Power switches (S1–S6) FDB2710 (250 V) PV parasitic capacitor Cpv1, Cpv2 100 nF
84 M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86

Table A9 presented. Simulation results have been given to compare the

Parameters for PN-NPC topology [62]. performance of the topologies. Finally, a discussion has been pre-
sented to select a suitable topology. Additionally, a comparison table
Inverter parameter Value
has been accomplished for direct comparison among the topologies.
Input voltage 380–700 VDC Therefore, it is expected that this review will be helpful for reference
Grid voltage/frequency 230 V/50 Hz on transformerless grid connected PV inverter for the researchers,
Rated power 1000 W engineers, manufacturers and users.
Switching frequency 20 kHz
Filter capacitor Co 0.47 mF
Filter inductor LA, LB 3 mH
1200 V IGBT IRG4PH40U
Acknowledgments
600 V IGBT SGH40N60UFD
1000 V diode MUR8100T
PV parasitic capacitor Cpv1, 100 nF The authors wish to acknowledge the financial support from
Cpv2 the University of Malaya through HIR-MOHE project UM.C/HIR/
MOHE/ENG/41 and UMRG project RP015D-13AET.

Table A10
Appendix A. Important experimental parameters of different
Parameters for NPC three-level inverter [40].
transformerless topologies
Inverter parameter Value
See Appendix tables A1–A13.
Input voltage 700–1100 VDC
Grid voltage/frequency 230 V/50 Hz
Rated power 5000 W
Switching frequency 16 kHz
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