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Ect203 Logic Circuit Design, December 2021

1. This document appears to be an exam for a logic circuit design course. It contains 20 multiple choice and written response questions across 5 modules. 2. The questions cover topics like binary conversions, Boolean algebra, logic gates, flip-flops, counters, multiplexers, encoders, Verilog code, and comparisons of logic families like TTL and CMOS. 3. Students are asked to perform logic operations, simplify expressions, design circuits, explain concepts, write Verilog code, compare logic families, and more.

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74 views2 pages

Ect203 Logic Circuit Design, December 2021

1. This document appears to be an exam for a logic circuit design course. It contains 20 multiple choice and written response questions across 5 modules. 2. The questions cover topics like binary conversions, Boolean algebra, logic gates, flip-flops, counters, multiplexers, encoders, Verilog code, and comparisons of logic families like TTL and CMOS. 3. Students are asked to perform logic operations, simplify expressions, design circuits, explain concepts, write Verilog code, compare logic families, and more.

Uploaded by

instapc0210
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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c

Reg No.:

Course Code: ECT203


Course Name: LOGIC CIRCUIT DESIGN
Max. Marks: 100 Duration: 3 Hours
PART A
Answer all questions. Each question canies 3 marks Marks

('
1 Convert(231.45)3to equivalent decimal and binary (3)

2 Give a brief description of keywords in Verilog (3)


a_ (3)
Reduce the expression F = AB+ A + AB using De-Morgan's theorem

4 Write a Verilog code for implementing a NOR gate (3)

5 Explain the working of a multiplexer (3)

6 Write a Verilog code for half subtractor (3)

7 Convert a JK flipflop to T flipflop (3)

8 Write a Verilog code for implementing D flipflop (3)

9 Define noise-margin (3)

10 Define propagation delay and power dissipation (3)

PART B
Answer any onefull questionfrom each module. Each question carries 14 marks
Module 1

11 (a)Perform the following operations (6)

(i) (A5C)r6 +(8E4)10 (ii) (17s.6)8-(47.7)8


(b)What is Hamming code? The message 11001l0 is coded in 7-bit even parity (8)

Hamming code which is transmitted through a noisy channel. Decode the

message assuming that a single eror occuffed in the codeword


12 (a) Find I 100l-10001 using I's and 2's complement arithmetic (8)

(b)Explain the operators in Verilog (6)

Module 2
l1
(a) Obtain the canonical POS expression of F(A,B,C) = (A+B)(B+C)(A+ C ) (5)
(b) Simply the expression Y:f[M(0,1,4,5,6,8,9,12,13,14) using K-Map and

implement the simplified expression using NOR logic. (e)

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08008CT203122005

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14 For the logical expression F=A+AB+ABD+ABD+C 04)

(D Obtain Canonical SOP e.xpression

(ii)Simpliff the expression using K-Map


(iii)Write Verilog code for the simplifred expression
Module 3
15 (a)Design a tull adder circuit (8)

(b) Write a Verilog code for l:4 demultiplexer (6)

16 (a)Implement the logic function f(A,B,C):lm(0,2,3,5) using (8)

(i) 8:1 MUx (ii) 4:l MUX


(^ (b)Design a octal to binary encoder (6)

Module 4
L7 (a)Explain the operation of a JK flip-flop usrng NAND gates (6)

(b)Explain the operation of a 4-bit Johnson counter with


truth table and waveforms (S)

l8 (a)Design a mod-6 synchronous up-counter using JK flip-flop (7)

(b)Explain a PISO shift register using LOAD /SHIFT Q)


Module 5
19 (a)Compare TTL & CMOS logic families in terms of fan-in, fan-out, supply (5)

voltage, propagation delay and noise maxgln


(b)Draw the circuit and explain the operation of transistor level TTL NAND (9)
I
gate

20 (a)Draw the circuit diagram of a transistor level TTL Inverter and explain the (5)

working :

(b)Draw the circuit and explain the operation of transistor level CMOS NAND (9)

gate
*****

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