RTU3A-1

A Low Power mm-wave Oscillator Using Power Matching

Techniques
Lianming Li, Patrick Reynaert, Michiel Steyaert

KU Leuven ESAT-MICAS, Leuven, Belgium

{Lianming.Li, Patrick.Reynaert, Michiel.Steyaert}@esat.kuleuven.be

Abstract —— A low power low voltage 90nm CMOS mm- and good phase noise can be achieved using this
wave oscillator using a power matching technique is technique.
presented. The oscillator uses an inductive divider to create
impedance matching for the amplifier. With this technique,
the effect of the varactor loss on the phase noise is reduced II. DESIGN OF POWER MATCHING CIRCUIT
and the oscillator power efficiency is increased. The proposed
oscillator achieves a phase noise of -95dBc/Hz at 1MHz offset A realistic oscillator typically consists of two parts: 1)
from 64GHz carrier, consuming 3.16 mW from a 0.6 V an LC tank for frequency selectivity and frequency tuning
supply voltage. The figures-of-merit are FOM -186 and and 2) an amplifier connected in positive feedback to
FOMT -185 respectively. The tuning range is from 61.1 GHz
to 66.7 GHz and the measured output power is about -14 compensate the inevitable loss of a physical LC tank. For
dBm. mm-wave oscillators, the varactor and the amplifier are
Index Terms —— LC oscillator, millimeter-wave oscillators, important noise sources.
power matching, quality factor, VCO. For the LC tank, the important figure-of-merit is the
tank quality factor (Q). Because the oscillator phase noise
performance relies considerably on the tank Q, the
I. INTRODUCTION
oscillator designer should first maximize the tank Q as
With the increasing requirements for higher data-rate, high as possible. For GHz oscillators, the tank Q is
the 60 GHz band is a very good candidate for the typically limited by the inductor loss. However in the mm-
applications like network connection, HDTV etc [1]. wave range, because the quality factor is frequency
Considering the fabrication cost and the scaling benefits, dependent, the tank Q is limited by the varactor loss.
CMOS technology can be used to design mm-wave Moreover, for the large tuning range, the varactor
circuits [2]. As the key component of the frequency capacitance to the parasitic capacitance ratio should be
synthesizer, the oscillator design has a lot of implications sufficiently large, making it very difficult to achieve a
for the system architecture and frequency planning [3]. As good phase noise in mm-wave application.
mentioned in [4], there are many challenges for mm-wave
oscillators design ranging from the large tuning range,
very high frequency to low supply voltage etc.
Up till now, several fundamental mm-wave oscillators
have been designed using different bulk CMOS or SOI
processes [5]-[9]. However achieving a large tuning range
and low phase noise with good power efficiency still
remains a challenge. In this paper we proposed to use
power matching techniques to achieve better power M1 M2
efficiencies.
Basically, LC oscillators can be understood as tuned
amplifiers connected in a positive feedback topology. For
mm-wave oscillators, the low gain of amplifiers at high
frequencies limits the oscillator performance. To
overcome the limitations, the proposed oscillator employs
an inductor divider to achieve power matching between Fig. 1 The common differential oscillator structure
the transistor and the LC tank. Experimental results show
that a power efficient oscillator with a large tuning range

978-1-4244-3376-6/978-1-4244-3378-0/09/$25.00  2009 IEEE 469 2009 IEEE Radio Frequency Integrated Circuits Symposium
 As the loss compensating element, the amplifier is the vehicle. With the help of the inductor divider, the
other important part of the oscillator. It will set limits to impedance is boosted up from the drain side to the gate
the frequency tuning range and the phase noise side. In this way, the impedance match is realized, at least
performance improvement. Because the operating in the signal crossing point, which is the sensitive point
frequency is close to the transistor intrinsic frequency fT for phase noise performance [11]. As a result, a higher
and fMAX, the amplifier power efficiency is typically poor. power efficient amplifier is realized. Accordingly the
In the common differential oscillator structure, shown in signal amplitude at the gate side is larger than the drain
Fig.1, the gate of one transistor and the drain of the other side. In other words, the slope of the gate voltage is
are usually connected together. From an amplifier point of increased because the period of the drain and gate voltage
view, the drain impedance of transistor M1 is the driving signal is the same. The increased slope of the gate voltage
source impedance of transistor M2. To achieve an in turn improves the slope of injection current at the drain
amplifier with optimum performance, one has to create a point. Based on (1) [12], the increased slope is beneficial
conjugate match between the drain impedance and the to the phase noise performance:
gate impedance. As shown in Fig. 2, in this particular
2π dt
90nm CMOS technology, the intrinsic drain and gate real θ n2 = ⋅ vn ⋅ (1)
parallel impedance of a transistor biased in optimum T dV A
conditions are respectively 473 and 2.34 k at 60GHz.
With dVA/dt the signal slope at the crossing point, T the
Considering the loading effect from the LC tank, the
signal period, n the noise induced phase variation. (1) can
impedance at the transistor drain point is reduced further,
be understood as follows: with higher signal slopes, a
leading to a severe impedance mismatch. Therefore, the
noise source with a certain value vn has less time to
working condition of the amplifier part in the oscillator is
convert into phase noise, thus improving the phase noise
far from the optimum region, and the power efficiency of
performance.
the amplifier suffers as a result.
Considering the above benefits, the varactor is
25 connected to the transistor drain side to reduce its effect
on the phase noise. Such arrangement also has the
20 advantage of achieving higher operating frequency
because of the distributed effect.
Imp [Kohm]

15

10 Rgate
L1 VC L1'
Lb1
5
Rds
Out+ Out-
0 L2 L2'
20 40 60 80 100
Freq [GHz] Mb2

Osc- Osc+
Fig. 2 Transistor gate and drain resistance Mb1
(2.34 k and 473 ohm respectively at 60GHz) M1 M2

With the above problems in mind, an oscillator with an

inductive divider power matching amplifier is proposed.
Different from [4], the inductive divider of this work Fig. 3 The schematic of the proposed oscillator
focuses on the matching of the transistors and reduces the
influence of the varactor loss on the phase noise, thus Calculations indicate that the effect of the transistor
improving power consumption and phase noise parasitic capacitance on the oscillation frequency is
performance. enlarged because of the inductor divider. But with the
The proposed oscillator with the cascode buffer improved amplifier efficiency, the transistor size of this
amplifier is shown in Fig.3. The tail current source is proposed oscillator is reduced more than half compared
eliminated for voltage headroom and noise issues [4]. The with the previous oscillator [4], and so is the power
differential oscillator tank comprises NMOS in nWell consumption. So this structure will not have any negative
varactor and 2 inductors: L1 and L2. L1 and L2 function as effect on the tuning range, which is confirmed by the
the inductor divider, which is an impedance boosting measurement results.

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 TABLE I
PERFORMANCE SUMMARY OF STATE-OF-ART MM-WAVE OSCILLATORS

FO FTR PNoise PDISS Vdd FOM FOMT

VCO[Ref] Tech.
(GHz) (%) (dBc/Hz) (mW) (V) (dBc/Hz) (dBc/Hz)

H. Wang [5] 49.5 2.21 -99.7@1M 13 1.3 -182.4 -169.3 0.25 um CMOS
M. Tiebout [6] 51.2 1.39 -85@1M 1.0 1 -179.2 -162. 0.12um CMOS
F. Ellinger [7] 56.5 14.7 -92@1M - 21.0 1.5 -173.8 -177.3 90nm SOI
C. Cao [8 ] 56.5 10.27 108@10M 9.8 1.5 -173.1 -173.4 0.13um CMOS
D. D. Kim [9 ] 70.2 9.55 -106.1@10M 5.4 1.2 -175.8 -175.4 65nm SOI
62.1 10 -95@1M 3.9 1 -185 -185
Borremans [10 ] 0.13 um CMOS
59.1 10.2 -91@1M 3.9 1 -180.5 -180.7
58.4 9.32 -90@1M 8.1 0.7 -176 -176
L. Li [4] 90nm CMOS
61.7 4.81 -90@1M 1.2 0.43 -185 -178.6
This work 64 8.75 -95@1M 3.16 0.6 -186 -185 90nm CMOS
a. FOM=PNoise-20log(f0/¨f)+10log(PDISS/1mW)
b. FOMT= PNoise-20log((f0/¨f)*(FTR/10))+10log(PDISS/1mW)

67
III. CHIP FABRICATION AND MEASUREMENT RESULTS
66
The oscillator is realized in a 90nm CMOS process, and
the chip micrograph is shown in Fig. 4. The inductors L1 65
Freq [GHz]

and L2 in Fig. 3 are realized using a differential 3 turns

inductor. The winding of this inductor is designed to make 64
use of the positive magnetic coupling. Because of 3 turns
63
coupling effect, a compact LC tank could be realized. This
area is about 110x80um2. For the design of the inductor, 62
special considerations are devoted to the balance between
the self resonance frequency and the losses of internal 61
inductors L2. The reason is that the parasitic capacitance 0 0.2 0.4 0.6 0.8 1 1.2
VC [V]
will limit the tuning range while the loss will reduce the
signal slope. Fig. 5 The tuning curve of the oscillator

The oscillator works at a 0.6 V supply voltage,

consuming a power consumption of only 3.16 mW. The
tuning curve of the oscillator is given in Fig. 5. With the
tuning voltage ranging from 0 to 1.2V, the oscillator
achieves a tuning range about 5.6GHz (from 61.1GHz to
66.7GHz). The phase noise is measured using the delay
line method, which is an accurate and reliable phase noise
measurement method for free running oscillators. The
phase noise curve at 64GHz is shown in Fig. 6. At 1MHz
offset, the phase noise is about -95dBc/Hz. Because of the
pole effect of the delay line, the results above 5MHz offset
are not accurate. The phase noise curve across the tuning
range is shown in Fig. 7. Across the tuning range, the
output power is about -14 dBm. Table I offers the
performance summary of the state-of-art mm-wave
Fig. 4 The oscillator die photo oscillators. To make the performance comparison, two

471
 figure-of-merits are used. At 64GHz carrier, the oscillator The FOM and FOMT are about -186 and -185 respectively.
achieves a FOM and FOMT of -186 and -185 respectively. The implemented oscillator achieved the best FOM among
To the best knowledge of the authors, this advances the mm-wave oscillators.
state-of-art.
ACKNOWLEDGEMENT
-20
The authors wish to acknowledge Ilja Ocket (ESAT-
-40 TELEMIC), Prof. Dominique Schreurs (ESAT-
TELEMIC) and Frederik Daenen (ESAT-MICAS/Imec)
-60 for their support during the measurements and Noella
L(f) [dBc/Hz]

Gaethofs (ESAT-MICAS) for the packaging. R&S

-80 Belgium is acknowledged for their excellent support with
the measurement setup. Lianming Li is supported by a
-100 Fellowship from the Chinese Scholarship Council.
-120
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-140 4
10 10
5 6
10
7
10
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