Nokia

DXT Plug-in Unit Descriptions

CP816-AD/-AC/-A
DN0423836
Issue 1-7
 CP816-AD/-AC/-A

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2 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A

Table of Contents
This document has 52 pages

Summary of changes .................................................................... 7

1 CP816-AD/-AC/-A overview........................................................... 8

2 Capacity and performance of CP816-AD/-AC/-A......................... 11

3 Structure of CP816-AD/-AC/-A.....................................................13
3.1 Mechanical structure of CP816-AD/-AC/-A.................................. 13
3.2 Logical structure of CP816-AD/-AC/-A.........................................13
3.2.1 SCSI interfaces ........................................................................... 15
3.2.2 Ethernet interfaces....................................................................... 15
3.3 Interfaces..................................................................................... 15
3.3.1 Front panel interfaces.................................................................. 15
3.3.2 Backplane interfaces....................................................................15

4 Operation of CP816-AD/-AC/-A................................................... 17

5 Power consumption of CP816-AD/-AC/-A....................................24

6 CP816-AD C112354.....................................................................25
6.1 Advantech CP816-AD.................................................................. 25
6.1.1 Equipping DIMM modules............................................................ 25
6.1.2 DIP-switch settings.......................................................................26
6.2 RadiSys CP816-AD......................................................................28
6.2.1 Equipping DIMM modules............................................................ 28
6.2.2 DIP-switch settings.......................................................................29

7 CP816-AC C111134..................................................................... 31
7.1 Advantech CP816-AC.................................................................. 31
7.1.1 Equipping DIMM modules............................................................ 31
7.1.2 DIP-switch settings.......................................................................32
7.2 RadiSys CP816-AC......................................................................34
7.2.1 Equipping DIMM modules............................................................ 34
7.2.2 DIP-switch settings.......................................................................35

8 CP816-A C108488....................................................................... 37
8.1 Advantech CP816-A.....................................................................37
8.1.1 Equipping DIMM modules............................................................ 37
8.1.2 DIP-switch settings.......................................................................38
8.2 Force CP816-A............................................................................ 40
8.2.1 Equipping DIMM modules............................................................ 40
8.2.2 DIP-switch settings.......................................................................41
8.3 RadiSys CP816-A........................................................................ 43
8.3.1 Equipping DIMM modules............................................................ 43

DN0423836 Issue: 1-7 © 2016 Nokia 3

 CP816-AD/-AC/-A

8.3.2 DIP-switch settings.......................................................................44

9 Connector maps of CP816-AD/-AC/-A.........................................46

4 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A

List of Figures
Figure 1 The operating environment of the CP816-A......................................... 9
Figure 2 The operating environment of the CP816-AC...................................... 9
Figure 3 The operating environment of the CP816-AD.................................... 10
Figure 4 The block diagram of the CP816-A.................................................... 13
Figure 5 The block diagram of the CP816-AC..................................................14
Figure 6 The block diagram of the CP816-AD..................................................14
Figure 7 The front panel of the Advantech CP816-AD/-AC.............................. 17
Figure 8 The front panel of the RadiSys CP816-AD/-AC..................................18
Figure 9 The front panel of the Advantech CP816-A........................................19
Figure 10 The front panel of the Force CP816-A................................................20
Figure 11 The front panel of the RadiSys CP816-A........................................... 21
Figure 12 Connectors and switches of the CP816-AD....................................... 25
Figure 13 Connectors and switches of the CP816-AD....................................... 28
Figure 14 Connectors and switches of the CP816-AC....................................... 31
Figure 15 Connectors and switches of the CP816-AC....................................... 34
Figure 16 Connectors and switches of the CP816-A..........................................37
Figure 17 Connectors and switches of the CP816-A..........................................40
Figure 18 Connectors and switches of the CP816-A..........................................43

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 CP816-AD/-AC/-A

List of Tables
Table 1 Capacity and performance of the CP816-AD/-AC/-A..........................11
Table 2 LED descriptions................................................................................ 21
Table 3 Power consumption of the CP816-AD/-AC/-A (room temperature).... 24
Table 4 SW1 switch settings........................................................................... 26
Table 5 Interchangeability code (ICC) settings (SW1).................................... 26
Table 6 SW3 switch settings........................................................................... 29
Table 7 Interchangeability code (ICC) settings (SW3).................................... 29
Table 8 SW1 switch settings........................................................................... 32
Table 9 Interchangeability code (ICC) settings (SW1).................................... 32
Table 10 SW3 switch settings........................................................................... 35
Table 11 Interchangeability code (ICC) settings (SW3).................................... 35
Table 12 SW1 switch settings........................................................................... 38
Table 13 Interchangeability code (ICC) settings (SW1).................................... 38
Table 14 SW1 switch settings........................................................................... 41
Table 15 Interchangeability code (ICC) settings (SW1).................................... 41
Table 16 SW3 switch settings........................................................................... 44
Table 17 Interchangeability code (ICC) settings (SW3).................................... 44
Table 18 Signals of the front panel connectors J7 and J6.................................46
Table 19 Signals of the backplane connector P5 - B(22) female...................... 46
Table 20 Signals of the backplane connector P4 - A(25) female...................... 48
Table 21 Signals of the backplane connector P3 - B(19) female...................... 49
Table 22 Signals of the backplane connector P2 - B(22) female...................... 50
Table 23 Signals of the backplane connector P1 - A(25) female...................... 51

6 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Summary of changes

Summary of changes
Changes between document issues are cumulative. Therefore, the latest document
issue contains all changes made to previous issues.
Changes between issues 1-7 and 1-6
Information on CP816-AD plug-in unit variant added to document
Changes between issues 1-6 and 1-5
Editorial changes.
Changes between issues 1-5 and 1-4
Information on CP816-AC added to the document.
Changes between issues 1-4 and 1-3
DIP switch settings updated with NE installation information.
Changes between issues 1-3 and 1-2
Figure 7 corrected.
Changes between issues 1-2 and 1-1
Added information for the Advantech plug-in units. Removed information concerning
IPSec.
Changes made between issues 1-1 and 1–0
Editorial corrections.
Changes for issue 1-0
This is the first issue of CP816-A.

DN0423836 Issue: 1-7 © 2016 Nokia 7

CP816-AD/-AC/-A overview CP816-AD/-AC/-A

1 CP816-AD/-AC/-A overview
The 8th generation Central Processor (the CP816-AD/-AC/-A plug-in unit) has a Pentium
M Dothan) processor with maximum of 1.8 GHz frequency and is used as the central
processing resource in the DX 200 system computer units. Processor speed is selected
by software, because the functioning frequency of the plug-in unit depends on the
thermal characteristics of the network element it is used in.
Main functions of CP816-AD/-AC/-A
The CP816-AD/-AC/-A is used as the Central Processing Unit (CPU) in the
microcomputer units of the i-series DX 200 system network elements.
The CP816-AD/-AC/-A provides the hardware required by the operating system DMX
and application software such as the boot memory, SDRAM, real time clock, interrupt
handling, process timing and V.24/V.28-based serial interfaces for service terminals.
The CP816-AD has four 10 Base-T/100Base-Tx /1000Base-S/-T Ethernet interfaces.
There is no CompactPCI bus in the CP816-AD. The CP816-AD does not support SCSI
interfaces.
The CP816-AC has four 10 Base-T/100Base-Tx /1000Base-S/-T Ethernet interfaces.
The CP816-AC is usually connected to the backplane CompactPCI bus, but it can be
used without the CompactPCI connection as well. The CP816-AC does not support SCSI
interfaces.
The CP816-A supports standard external interfaces such as Wide Ultra3 SCSI and
Ultra2 SCSI and four 10 Base-T/100Base-Tx /1000Base-S/-T Ethernet. The CP816-A is
usually connected to the backplane CompactPCI bus, but it can be used without the
CompactPCI connection as well.
Operating environment of CP816-AD/-AC/-A
The CP816-A has a 16 bit wide Ultra3 SCSI bus. It is possible to connect up to 16
devices into the SCSI bus (including the CP816-A). The CP816-A has two SCSI
interfaces because the mass memory system is 2N redundant. Note, that Ultra2 SCSI is
also supported.
The CP816-AD/-AC/-A is connected to the clock system. The 8 kHz synchronization
signal is used to generate the 100 Hz clock interrupt signal that is the base for the time
maintained in DDR SDRAM.
There are two V.24/V.28-based serial interfaces for service terminals to provide an
interface for controlling and monitoring the CP816-AD/-AC/-A.
The CP816-AD/-AC/-A has four 10 Base-T /100 Base-TX /1000 Base-T Ethernet
interfaces to connect to LAN.
The CP816-AC/-A can transfer data to and from the preprocessor units of the same
cartridge. The system bus on the backplane is CompactPCI. The CP816-AC/-A is
connected to the CompactPCI bus with a PCI/PCI Bridge. In addition, the CP816-AC/-A
has two interrupt lines for each preprocessor unit.
The CP816-AD/-AC/-A is fed the +5V, +3.3V and -5V supply voltages through backplane
connectors. V(I/O) pins are also used for 3.3V supply.
The figure below presents the operating environment of the CP816-A.

8 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A CP816-AD/-AC/-A overview

Figure 1 The operating environment of the CP816-A

Clock Compact
StorageDevices
System PCIBus

8kHz PCI/PCI SCSI

Clock Interface Interface

CP816-A

Serial DualEthernet DualEthernet

Interfaces Interface Interface

DN0480039

g Note: The CP816-A can also be used in an environment where there is no

CompactPCI bus on the backplane, but even in this case power intakes and SCSI and
Ethernet interfaces are located on the backplane - mainly for debugging purposes.

The figure below presents the operating environment of the CP816-AC.

Figure 2 The operating environment of the CP816-AC

Clock Compact
System PCIBus

8kHz PCI/PCI
Clock Interface

CP816-AC

Serial DualEthernet DualEthernet

Interfaces Interface Interface

DN70387462

DN0423836 Issue: 1-7 © 2016 Nokia 9

CP816-AD/-AC/-A overview CP816-AD/-AC/-A

g Note: The CP816-AC can also be used in an environment where there is no

CompactPCI bus on the backplane, but even in this case power intakes and Ethernet
interfaces are located on the backplane - mainly for debugging purposes.

The figure below presents the operating environment of the CP816-AD.

Figure 3 The operating environment of the CP816-AD

Clock
System

8kHz
Clock

CP816-AD

Serial DualEthernet DualEthernet

Interfaces Interface Interface

DN0960296

10 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Capacity and performance of CP816-AD/-AC/-A

2 Capacity and performance of CP816-AD/-AC/-

A
The table below summarizes the capacity and performance of the CP816-AD/-AC/-A.

Table 1 Capacity and performance of the CP816-AD/-AC/-A.

Feature CP816-AD/-AC/-A

Processor core speed 600 MHz...1.8GHz, Pentium M Dothan

FSB/memory bus speed 400MHz, 64 bits

Memory size/type Up to 3.5 GB (DMX limits), registered. DDR SDRAM

200MHz

L2 cache 2MB

PCI Multiple PCI/PCIX:66/64 + 133/64 +33/32.

CPCI 33 MHz, 32 bits (Intel 21154)

SCSI 2 x 160 MB/s LSI 53C1010-661

Ethernet 4 x 1000 Mbits/s Intel 82546

1) Only in CP816-A.
2) CPCI bus is not visible in CP816-AD

Processor and memory

The processor and memory capacity is as follows:

• 600MHz to 1.8GHz Pentium M in 479 ball micro-FCBGA package

• Up to 4GB DDR 200 CL3.5 (DIMM level) SDRAM in four DIMMs
• 2MB L2 cache on processor die, running with processor core speed
• At least 8MB boot FLASH.
PCI Buses
The CP816-AD/-AC/-A plug-in unit has three internal PCI buses. The first bus is a
33MHz, 32-bit PCI bus and it is used as a compatibility PCI bus (Bus 3). MCH internal
configuration registers are located in device 0 on bus 0.
The second PCI bus is a 33/66MHz, 64 bit PCI bus (Bus 4). The PCI bus 3 is designed
for 66MHz operation, and it is used as 64 bit wide.
The third PCI bus is capable of PI-X operation up to 133MHz. It is 64 bit wide (Bus 2).
Ethernet

DN0423836 Issue: 1-7 © 2016 Nokia 11

Capacity and performance of CP816-AD/-AC/-A CP816-AD/-AC/-A

Four Intel 82544EI 10Base-T/100BaseTx/1000-Base-T with internal PHY device-based

Physical Interface. The Ethernet interface is routed to the backplane, via an onboard
isolation transformer, connecting to one of the user-defined connectors in the cPCI
specification. The interface provides the following:

• maximum data transfer rate full duplex 1000Mb/s

• four interfaces on the backplane
• two dual MAC and PHY controllers that support speeds up to 1000Mbit
• support for speeds 10Mbit/s, 100Mbit/s and 1000Mbit/s.
SCSI
There are no SCSI interfaces in CP816-AD/-AC.
There are two on-board SCSI interfaces controlled by a Symbios Logic SYM53C1010-66
device in CP816-A. The SCSI bus signals are routed to the backplane using one of the
user-defined connectors in the cPCI specification.
The SCSI bus interface is used for connecting storage devices equipped with an SCSI
interface to the microcomputer units of the DX 200 system. The interfaces provide the
following:

• data transfer rate maximum 160MB/s (synchronous mode, Ultra3)

• 16 bit wide SE/LVD
• maximum 16 devices on bus
• two buses on the backplane.
Serial interfaces
The capacity of serial interfaces is as follows:

• typical data transfer rate used is 9600bit/s or 19200bit/s; maximum rate 38 400bit/s
• two interfaces located on the front panel.

12 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Structure of CP816-AD/-AC/-A

3 Structure of CP816-AD/-AC/-A

3.1 Mechanical structure of CP816-AD/-AC/-A

The size of the printed wiring board (PWB) is 233.4 mm x 220 mm and the nominal
thickness is 1.6 mm.
The CP816-AD/-AC/-A connects to the backplane with five 2 mm Hard Metric
connectors. They are shielded except for the uppermost (P5) connector. The front panel
has eight LED indicators, below them a debug switch and a reset switch, and two
shielded RJ45 connectors for V.24/V.28-based maintenance terminal connections.

3.2 Logical structure of CP816-AD/-AC/-A

The block diagram of the CP816-A is presented in the figure below.

Figure 4 The block diagram of the CP816-A

IntelLVDothan
600Mhz-1.8Ghz
2xUltra3
Hub
SCSI 400Mhz
InterfaceB
FSB
1066MB/s Single(Dual)DDR200(400)
DDRSDRAMChannel

PCI,64bit,66Mhzbus4 MCH
P64H
PCI-X,64bit,133Mhzbus5

Hub
2x 2x Interface A
Enet Enet 1066MB/s 33Mhz,32bit
PCIBus,bus1
PCI-PCI
ICH
Bridge
CPCI
(bus2)
2x1000Base-T 2x1000Base-T

DMX
FPGA

DN0480042 Flash,
8MB

The block diagram of the CP816-AC is presented in the figure below.

DN0423836 Issue: 1-7 © 2016 Nokia 13

Structure of CP816-AD/-AC/-A CP816-AD/-AC/-A

Figure 5 The block diagram of the CP816-AC

IntelLVDothan
600Mhz-1.8Ghz

Hub
400Mhz
InterfaceB
FSB
1066MB/s Single(Dual)DDR200(400)
DDRSDRAMChannel

PCI,64bit,66Mhz bus 4 MCH

P64H
PCI-X,64bit,133Mhz bus 5

Hub
2x 2x Interface A
Enet Enet 1066MB/s 33Mhz, 32bit
PCIBus,bus1
PCI-PCI
ICH
Bridge
CPCI
(bus2)
2x 1000Base-T 2x 1000Base-T

DMX
FPGA

DN70387498 Flash,
8MB

The block diagram of the CP816-AD is presented in the figure below.

Figure 6 The block diagram of the CP816-AD

IntelLVDothan
600Mhz-1.8Ghz

Hub
400Mhz
InterfaceB
FSB
1066MB/s Single(Dual)DDR200(400)
DDRSDRAMChannel

PCI,64bit,66Mhzbus4 MCH
P64H
PCI-X,64bit,133Mhzbus5

Hub
2x 2x Interface A
Enet Enet 1066MB/s 33Mhz,32bit
PCIBus,bus1
DMX
ICH FPGA

2x1000Base-T 2x1000Base-T
Flash,
8MB

DN0960284

14 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Structure of CP816-AD/-AC/-A

The CP816-AD/-AC/-A plug-in unit contains a Pentium M processor which uses the
Dothan technology with 90nm process. The processor has an internal speed of 600MHz
to 1.8GHz and a 400MHz front side bus and a 2MB L2 cache integrated on the same
die, running with full processor core frequency. The processor is connected to Intel
E7501 MCH north bridge (MCH). In addition to the front side bus, the MCH contains
three, hublink 2.0 and one hublink 1.5 ports.

3.2.1 SCSI interfaces

Two 16-bit SCSI interfaces are implemented in the CP816-A. A single SCSI controller
containing two SCSI interfaces is used.

3.2.2 Ethernet interfaces

The CP816-AD/-AC/-A has four Ethernet interfaces. The four 10Base-T/100Base-
Tx/1000Base-T ethernet with twisted pairs are implemented.

3.3 Interfaces
3.3.1 Front panel interfaces
The front panel has two shielded RJ45 type connectors for service terminals. The upper
connector (J7) connects to UART 0, the lower connector (J6) connects to UART 1 (for
details, see Connector maps of CP816-AD/-AC/-A).

3.3.2 Backplane interfaces

The following interfaces are implemented via the backplane: SCSI interfaces, Ethernet
interfaces, Compact PCI bus. There are no SCSI interfaces in the CP816-AC or CP816-
AD. There is no CPCI interface in the CP816-AD. In addition, a number of other
interfaces are implemented via the backplane (for details, see Connector maps of
CP816-AD/-AC/-A).
SCSI interfaces
Connectors P3 and P4 are used for implementing the SCSI interface via the back plane.
The CP816-A supports both Single Ended (SE) and Low Voltage Differential (LVD)
termination. In the LVD mode, the 16-bit Wide Ultra3 SCSI interface is supported. If all
the devices on the SCSI bus support LVD termination and are 16 bit wide, the maximum
transfer rate is 160 MB/s. Devices on the bus and different bus segments may have
limitations reducing the actual transfer rate. If all the devices support LVD termination,
the maximum cable length is 12 meters. In case of SE termination, the maximum cable
length is limited to 1.5 meters.
Ethernet interfaces
Connectors P5 and P4 are used for connecting the Ethernet interfaces via the back
plane. The pin assignment allows separate LAN cables to be used. The Ethernet is
designed for 10Base-T/100Base-TX/1000Base-T operation.
Compact PCI bus

DN0423836 Issue: 1-7 © 2016 Nokia 15

Structure of CP816-AD/-AC/-A CP816-AD/-AC/-A

The CP816-AC/-A is connected to the back plane CompactPCI bus via connector P1.
The back plane connector pin assignment supports 64 bit CompactPCI bus, but a 32-bit
PCI bus is used. Connector P2 is used, for example, for the 64 bit extension. 5V
signalling is used on CompactPCI. However, V(I/O) is connected to 3.3V on the
backplane.
The CP816-AD has no CPCI interface.
Backplane connector V(I/O) pins is used for 3.3V supply. These pins are not used as
specified in CompactPCI Specification. 3.3V signalling for the CPCI side is supported so
that the voltage level is selected by resistor option which voltage level is used. The
default mode is 5V signaling.

g Note: The CP816-AD/-AC/-A can also be operated without the CompactPCI bus
connection.

FPGA programming connector

There is a connector for reprogramming the DMX support FPGA.

16 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Operation of CP816-AD/-AC/-A

4 Operation of CP816-AD/-AC/-A
Front panel
The front panel is of the CP816-AD/-AC/-A is 2618 mm high (6U), 2.5mm thick and
50.4mm wide (10 TE). The front panel has two handles for the removal and attachment
of the unit. The lower handle has an ESD warning label on it.
The front panel has cooling fins and a heat pipe attached to the back of the panel. This is
to cool the processor and the E7501 MCH on the PWB.
The CP816-AD/-AC has two vendors that are slightly different in layout. The figures
below present the front panels of the plug-in unit.

Figure 7 The front panel of the Advantech CP816-AD/-AC

NO
SCSI

WO,RUN,P0,P1
TE,LF,P2,P3
DBG

RST

J7

J6

DN70406661

DN0423836 Issue: 1-7 © 2016 Nokia 17

Operation of CP816-AD/-AC/-A CP816-AD/-AC/-A

Figure 8 The front panel of the RadiSys CP816-AD/-AC

NO
SCSI

WO,RUN,P0,P1
TE,LF,P2,P3
DBG

RST

J7

J6

DN70406264

The CP816-A has three vendors that are slightly different in layout. The figures below
present the front panels of the plug-in unit.

18 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Operation of CP816-AD/-AC/-A

Figure 9 The front panel of the Advantech CP816-A

WO,RUN,P0,P1
TE,LF,P2,P3
DBG

RST

J7

J6

DN05160663

DN0423836 Issue: 1-7 © 2016 Nokia 19

Operation of CP816-AD/-AC/-A CP816-AD/-AC/-A

Figure 10 The front panel of the Force CP816-A

WO,RUN,P0,P1
TE,LF,P2,P3
DBG

RST

J7

J6

DN0480054

20 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Operation of CP816-AD/-AC/-A

Figure 11 The front panel of the RadiSys CP816-A

WO,RUN,P0,P1
TE,LF,P2,P3
DBG

RST

J7

J6

DN0486493
LED indicators
The unit has eight LED indicators on the front panel that are used with a light pipe. The
locations of the LEDs are presented in the figure above, and the meanings of the LEDs
are listed in the table below.

Table 2 LED descriptions.

LED No. Row Label Color Comment

1 1 WO Green Software Controlled LED. The

LED is illuminated when the
microcomputer unit is active.

2 1 RUN Green The LED is turned on when

NMI is activated. The LED is
turned off by software, and it
can be turned by software.

DN0423836 Issue: 1-7 © 2016 Nokia 21

Operation of CP816-AD/-AC/-A CP816-AD/-AC/-A

Table 2 LED descriptions. (Cont.)

LED No. Row Label Color Comment

3 1 P0 (Eth 0) Yellow LAN0 is active.

4 1 P1 (Eth 1) Yellow LAN1 is active.

5 2 TE Yellow Software Controlled LED. The

LED is illuminated when the
microcomputer is in test state
(TE).

6 2 LF Red Software Controlled LED

7 2 P2 (Eth 2) Yellow LAN2 is active.

8 2 P3 (Eth 3) Yellow LAN3 is active.

g Note: Note that LAN traffic must be indicated by MAC.

Switches
The CP816-AD/-AC/-A has two switches on the front panel: a Debug switch and a Reset
switch.The switches are spaced within a 10 mm distance between the center points of
the switches. The upper switch is the Debug switch and the lower switch is the Reset
switch. The status of the Debug switch is software-readable. The Debug switch forces
the software into the minidebugger mode. When pushed, the Reset switch resets the
unit.
Front panel connectors
The CP816-AD/-AC/A has two shielded RJ45 connectors (J7 and J6) for serial terminal
interfaces. The upper connector (J7) connects to UART 0, the lower connector (J6) to
UART 1. For pin numbering of the RJ45 connectors, see Connector maps of CP816-A.
Backplane connectors
The CP816-AD/-AC/-A connects to the backplane with five Hard Metric connectors and
implements the following interfaces in the backplane connectors:

• Two SCSI interfaces (SE and LVD) via connectors P3 and P4 (in CP816-A only)
• Four Ethernet interfaces for 10Base-T/100Base-TX/1000Base-T operation via
connectors P5 and P4
• +5V, +3.3V and -5V power feed via connectors P5 and P1
• A 32-bit CompactPCI bus via connector P1
• During power up, current inflow from preprocessor units to the CP816-AD/-AC/-A via
interconnecting signals (via connector P5), if pull up on the CP816-AD/-AC/-A
– the interrupt signals from the units on the cPCI auxiliary connector
(_INT0..._INT13)
– the switchover control signals (CS A, CS B, SOC A, SOC _B)
– the basic clock 8 kHz clock signal from clock system (8kA, 8kB)

22 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Operation of CP816-AD/-AC/-A

– the message bus load measurement signals (MBLOAD, MSGCOUNT)

– the alarm signals and alarm test signals (ALTST, _CLKAL).
– computer type and cartridge identification codes (CID8...CID15).

The general-purpose input and output signals (IN4, IN6, and IN7; OUT4...OUT7) are
connected via connector P4.
For connector maps, see Connector maps of CP816-AD/-AC/-A.

DN0423836 Issue: 1-7 © 2016 Nokia 23

Power consumption of CP816-AD/-AC/-A CP816-AD/-AC/-A

5 Power consumption of CP816-AD/-AC/-A

The maximum power consumption values are 32W for M98N (natural convection) and
50W for M98F (forced cooling) mechanics. An example of power consumption is
presented in the table below.

Table 3 Power consumption of the CP816-AD/-AC/-A (room temperature).

Memory configuration Processor speed (MHz) Power consumption (W)

4GB memory, dual channel 600 30

mode

1000 34

1200 37

1400 42

1600 47

g Note: The measurements were made with Banias-based CP816-AD/-AC/-A (maximum

frequency 1.6GHz).

Power consumption is distributed between 5V and 3.3V; -5V power consumption is

minimal. The new cabinet equipped with fans provides air speed of 0.6m/s between the
plug-in units. The temperature of air coming to the topmost shelf can be 20ºC higher
than the room temperature when a cabinet is fully equipped and its total consumption is
3000 W.

24 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A CP816-AD C112354

6 CP816-AD C112354
The CP816-AD has two vendors that differ in layout but are identical in function. They
can be distinguished from each other by the following:

• slight differences in the front panel (cooling fins)

• differences on the PWB.

6.1 Advantech CP816-AD

Figure 12 Connectors and switches of the CP816-AD

P5

SW1

P4

P2

P1
A1 B1 A2 B2

DN05209877
Interchangeability
SW1
OFFON
1 12
2 11
3 10
4 9
5 8
6 7

6.1.1 Equipping DIMM modules

Selecting Dual Channel Mode
When equipping DIMM modules for Dual Channel Mode, note that DIMM modules must
be equipped in pairs. Therefore, fill first A2 and B2 and A1 and B1 second.

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CP816-AD C112354 CP816-AD/-AC/-A

g Note: When using Dual Channel Mode, parallel DIMM slots (i.e. A2 and B2, for
example) must have identical DIMMs (an identical DIMM means an identical C-code).
DIMMs in series within a memory channel do not have to be identical (i.e. A1 and A2,
for example). For example, there can be 512MB DIMMs in slots A1 and B1 and 1GB
DIMMs in slots A2 and B2.

Selecting Single Channel Mode

When equipping DIMM modules for Single Channel Mode, fill first A2 and A1 second.

g Note: Dual Channel Mode is default. Single Channel Mode is used only if so specified
in delivery specific documentation.

6.1.2 DIP-switch settings

The following settings are made with micro switch see the table below:

• Interchangeability code
• MBIF status (in use / not in use).

Table 4 SW1 switch settings.

Switch 1 Setting Meaning

1-12 OFF*) Interchangeability code bit 3

2-11 OFF*) Interchangeability code bit 2

3-10 OFF*) Interchangeability code bit 1

4-9 OFF*) Interchangeability code bit 0

5-8 OFF Not in use

6-7 OFF Message Bus Interface (MBIF) status: OFF =

MBIF in use (bit D3 in register 104h reads 0).
In NE installations, when EMB is used, this setting
must be ON = MBIF not in use.

*) The first interchangeability code A corresponds to all switches OFF, after which the
settings start to roll for each interchangeability code change.
The table below presents the setting of the interchangeability code.

Table 5 Interchangeability code (ICC) settings (SW1).

ICC code Switch setting

Switch 1 (MSB) Switch 2 Switch 3 Switch 4 (LSB)

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Table 5 Interchangeability code (ICC) settings (SW1). (Cont.)

ICC code Switch setting

A OFF OFF OFF OFF

B OFF OFF OFF ON

C OFF OFF ON OFF

D OFF OFF ON ON

E OFF ON OFF OFF

F OFF ON OFF ON

G OFF ON ON OFF

H OFF ON ON ON

J ON OFF OFF OFF

K ON OFF OFF ON

L ON OFF ON OFF

M ON OFF ON ON

N ON ON OFF OFF

P ON ON OFF ON

R ON ON ON OFF

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CP816-AD C112354 CP816-AD/-AC/-A

6.2 RadiSys CP816-AD

Figure 13 Connectors and switches of the CP816-AD

ICH3-S

MCH

CPU
SW3
J11 J12 J13 J14

SW3
DN05209889
OFF ON
1 12
2 11
3 10
4 9
5 8
6 7

6.2.1 Equipping DIMM modules

Selecting Dual Channel Mode
When equipping DIMM modules for Dual Channel Mode, note that DIMM modules must
be equipped in pairs. Therefore, fill first J14 and J13 and J12 and J11 second.

g Note: When using Dual Channel Mode, parallel DIMM slots (i.e. J14 and J13, for
example) must have identical DIMMs (an identical DIMM means an identical C-code).
DIMMs in series within a memory channel do not have to be identical (i.e. J14 and J12,
for example). For example, there can be 512MB DIMMs in slots J14 and J13 and 1GB
DIMMs in slots J12 and J11.

Selecting Single Channel Mode

When equipping DIMM modules for Single Channel Mode, fill first J14 and J12 second.

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CP816-AD/-AC/-A CP816-AD C112354

g Note: Dual Channel Mode is default. Single Channel Mode is used only if so specified
in delivery specific documentation.

6.2.2 DIP-switch settings

The following settings are made with micro switch see the table below:

• Interchangeability code
• MBIF status (in use / not in use).

Table 6 SW3 switch settings.

Switch 1 Setting Meaning

1-12 OFF*) Interchangeability code bit 3

2-11 OFF*) Interchangeability code bit 2

3-10 OFF*) Interchangeability code bit 1

4-9 OFF*) Interchangeability code bit 0

5-8 OFF Not in use

6-7 OFF Message Bus Interface (MBIF) status: OFF =

MBIF in use (bit D3 in register 104h reads 0).
In NE installations, when EMB is used, this setting
must be ON = MBIF not in use.

*) The first interchangeability code A corresponds to all switches OFF, after which the
settings start to roll for each interchangeability code change.
The table below presents the setting of the interchangeability code.

Table 7 Interchangeability code (ICC) settings (SW3).

ICC code Switch setting

Switch 1 (MSB) Switch 2 Switch 3 Switch 4 (LSB)

A OFF OFF OFF OFF

B OFF OFF OFF ON

C OFF OFF ON OFF

D OFF OFF ON ON

E OFF ON OFF OFF

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CP816-AD C112354 CP816-AD/-AC/-A

Table 7 Interchangeability code (ICC) settings (SW3). (Cont.)

ICC code Switch setting

F OFF ON OFF ON

G OFF ON ON OFF

H OFF ON ON ON

J ON OFF OFF OFF

K ON OFF OFF ON

L ON OFF ON OFF

M ON OFF ON ON

N ON ON OFF OFF

P ON ON OFF ON

R ON ON ON OFF

30 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A CP816-AC C111134

7 CP816-AC C111134
The CP816-AC has two vendors that differ in layout but are identical in function. They
can be distinguished from each other by the following:

• slight differences in the front panel (cooling fins)

• differences on the PWB.

7.1 Advantech CP816-AC

Figure 14 Connectors and switches of the CP816-AC

P5

SW1

P4

P2

P1
A1 B1 A2 B2

DN70407181
Interchangeability
SW1
OFFON
1 12
2 11
3 10
4 9
5 8
6 7

7.1.1 Equipping DIMM modules

Selecting Dual Channel Mode
When equipping DIMM modules for Dual Channel Mode, note that DIMM modules must
be equipped in pairs. Therefore, fill first A2 and B2 and A1 and B1 second.

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CP816-AC C111134 CP816-AD/-AC/-A

g Note: When using Dual Channel Mode, parallel DIMM slots (i.e. A2 and B2, for
example) must have identical DIMMs (an identical DIMM means an identical Nokia C-
code). DIMMs in series within a memory channel do not have to be identical (i.e. A1
and A2, for example). For example, there can be 512MB DIMMs in slots A1 and B1 and
1GB DIMMs in slots A2 and B2.

Selecting Single Channel Mode

When equipping DIMM modules for Single Channel Mode, fill first A2 and A1 second.

g Note: Dual Channel Mode is default. Single Channel Mode is used only if so specified
in delivery specific documentation.

7.1.2 DIP-switch settings

The following settings are made with micro switch see the table below:

• Interchangeability code
• MBIF status (in use / not in use).

Table 8 SW1 switch settings.

Switch 1 Setting Meaning
1-12 OFF*) Interchangeability code bit 3

2-11 OFF*) Interchangeability code bit 2

3-10 OFF*) Interchangeability code bit 1

4-9 OFF*) Interchangeability code bit 0

5-8 OFF Not in use

6-7 OFF Message Bus Interface (MBIF) status: OFF =

MBIF in use (bit D3 in register 104h reads 0).
In NE installations, when EMB is used, this setting
must be ON = MBIF not in use.

*) The first interchangeability code A corresponds to all switches OFF, after which the
settings start to roll for each interchangeability code change.
The table below presents the setting of the interchangeability code.

Table 9 Interchangeability code (ICC) settings (SW1).

ICC code Switch setting
Switch 1 (MSB) Switch 2 Switch 3 Switch 4 (LSB)

A OFF OFF OFF OFF

B OFF OFF OFF ON

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CP816-AD/-AC/-A CP816-AC C111134

Table 9 Interchangeability code (ICC) settings (SW1). (Cont.)

ICC code Switch setting
C OFF OFF ON OFF

D OFF OFF ON ON

E OFF ON OFF OFF

F OFF ON OFF ON

G OFF ON ON OFF

H OFF ON ON ON

J ON OFF OFF OFF

K ON OFF OFF ON

L ON OFF ON OFF

M ON OFF ON ON

N ON ON OFF OFF

P ON ON OFF ON

R ON ON ON OFF

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CP816-AC C111134 CP816-AD/-AC/-A

7.2 RadiSys CP816-AC

Figure 15 Connectors and switches of the CP816-AC

ICH3-S

MCH

CPU
SW3
J11 J12 J13 J14

SW3
DN70407209
OFF ON
1 12
2 11
3 10
4 9
5 8
6 7

7.2.1 Equipping DIMM modules

Selecting Dual Channel Mode
When equipping DIMM modules for Dual Channel Mode, note that DIMM modules must
be equipped in pairs. Therefore, fill first J14 and J13 and J12 and J11 second.

g Note: When using Dual Channel Mode, parallel DIMM slots (i.e. J14 and J13, for
example) must have identical DIMMs (an identical DIMM means an identical Nokia C-
code). DIMMs in series within a memory channel do not have to be identical (i.e. J14
and J12, for example). For example, there can be 512MB DIMMs in slots J14 and J13
and 1GB DIMMs in slots J12 and J11.

Selecting Single Channel Mode

When equipping DIMM modules for Single Channel Mode, fill first J14 and J12 second.

34 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A CP816-AC C111134

g Note: Dual Channel Mode is default. Single Channel Mode is used only if so specified
in delivery specific documentation.

7.2.2 DIP-switch settings

The following settings are made with micro switch see the table below:

• Interchangeability code
• MBIF status (in use / not in use).

Table 10 SW3 switch settings.

Switch 1 Setting Meaning
1-12 OFF*) Interchangeability code bit 3

2-11 OFF*) Interchangeability code bit 2

3-10 OFF*) Interchangeability code bit 1

4-9 OFF*) Interchangeability code bit 0

5-8 OFF Not in use

6-7 OFF Message Bus Interface (MBIF) status: OFF =

MBIF in use (bit D3 in register 104h reads 0).
In NE installations, when EMB is used, this setting
must be ON = MBIF not in use.

*) The first interchangeability code A corresponds to all switches OFF, after which the
settings start to roll for each interchangeability code change.
The table below presents the setting of the interchangeability code.

Table 11 Interchangeability code (ICC) settings (SW3).

ICC code Switch setting
Switch 1 (MSB) Switch 2 Switch 3 Switch 4 (LSB)

A OFF OFF OFF OFF

B OFF OFF OFF ON

C OFF OFF ON OFF

D OFF OFF ON ON

E OFF ON OFF OFF

F OFF ON OFF ON

G OFF ON ON OFF

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CP816-AC C111134 CP816-AD/-AC/-A

Table 11 Interchangeability code (ICC) settings (SW3). (Cont.)

ICC code Switch setting
H OFF ON ON ON

J ON OFF OFF OFF

K ON OFF OFF ON

L ON OFF ON OFF

M ON OFF ON ON

N ON ON OFF OFF

P ON ON OFF ON

R ON ON ON OFF

36 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A CP816-A C108488

8 CP816-A C108488
The CP816-A has three vendors that differ in layout but are identical in function. They
can be distinguished from each other by the following:

• slight differences in the front panel (cooling fins)

• differences on the PWB.

8.1 Advantech CP816-A

Figure 16 Connectors and switches of the CP816-A

P5

SW1

P4

P3

P2

P1
A1 B1 A2 B2

DN05160554
Interchangeability
SW1
OFFON
1 12
2 11
3 10
4 9
5 8
6 7

8.1.1 Equipping DIMM modules

Selecting Dual Channel Mode
When equipping DIMM modules for Dual Channel Mode, note that DIMM modules must
be equipped in pairs. Therefore, fill first A2 and B2 and A1 and B1 second.

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CP816-A C108488 CP816-AD/-AC/-A

g Note: When using Dual Channel Mode, parallel DIMM slots (i.e. A2 and B2, for
example) must have identical DIMMs (an identical DIMM means an identical Nokia C-
code). DIMMs in series within a memory channel do not have to be identical (i.e. A1
and A2, for example). For example, there can be 512MB DIMMs in slots A1 and B1 and
1GB DIMMs in slots A2 and B2.

Selecting Single Channel Mode

When equipping DIMM modules for Single Channel Mode, fill first A2 and A1 second.

g Note: Dual Channel Mode is default. Single Channel Mode is used only if so specified
in delivery specific documentation.

8.1.2 DIP-switch settings

The following settings are made with micro switch see the table below:

• Interchangeability code
• MBIF status (in use / not in use).

Table 12 SW1 switch settings.

Switch 1 Setting Meaning

1-12 OFF*) Interchangeability code bit 3

2-11 OFF*) Interchangeability code bit 2

3-10 OFF*) Interchangeability code bit 1

4-9 OFF*) Interchangeability code bit 0

5-8 OFF Not in use

6-7 OFF Message Bus Interface (MBIF) status: OFF =

MBIF in use (bit D3 in register 104h reads 0).
In NE installations, when EMB is used, this setting
must be ON = MBIF not in use.

*) The first interchangeability code A corresponds to all switches OFF, after which the
settings start to roll for each interchangeability code change.
The table below presents the setting of the interchangeability code.

Table 13 Interchangeability code (ICC) settings (SW1).

ICC code Switch setting

Switch 1 (MSB) Switch 2 Switch 3 Switch 4 (LSB)

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CP816-AD/-AC/-A CP816-A C108488

Table 13 Interchangeability code (ICC) settings (SW1). (Cont.)

ICC code Switch setting

A OFF OFF OFF OFF

B OFF OFF OFF ON

C OFF OFF ON OFF

D OFF OFF ON ON

E OFF ON OFF OFF

F OFF ON OFF ON

G OFF ON ON OFF

H OFF ON ON ON

J ON OFF OFF OFF

K ON OFF OFF ON

L ON OFF ON OFF

M ON OFF ON ON

N ON ON OFF OFF

P ON ON OFF ON

R ON ON ON OFF

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CP816-A C108488 CP816-AD/-AC/-A

8.2 Force CP816-A

Figure 17 Connectors and switches of the CP816-A

SW1

MCH

ICH3-S

CPU

P10P12P11 P13

DN0480066 SW1
ON OFF
7 6
8 5
9 4
10 3
11 2
12 1

8.2.1 Equipping DIMM modules

Selecting Dual Channel Mode
When equipping DIMM modules for Dual Channel Mode, note that DIMM modules must
be equipped in pairs. Therefore, fill first P13 and P11 and P12 and P10 second.

g Note: When using Dual Channel Mode, parallel DIMM slots (i.e. P13 and P11, for
example) must have identical DIMMs (an identical DIMM means an identical Nokia C-
code). DIMMs in series within a memory channel do not have to be identical (i.e. P13
and P12, for example). For example, there can be 512MB DIMMs in slots P13 and P11
and 1GB DIMMs in slots P12 and P10.

Selecting Single Channel Mode

When equipping DIMM modules for Single Channel Mode, fill first P11 and P10 second

40 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A CP816-A C108488

g Note: Dual Channel Mode is default. The Single Channel Mode is used only if so
specified in delivery specific documentation.

8.2.2 DIP-switch settings

The following settings are made with micro switch see the table below:

• Interchangeability code
• MBIF status (in use / not in use).

Table 14 SW1 switch settings.

Switch 1 Setting Meaning

1-12 OFF*) Interchangeability code bit 3

2-11 OFF*) Interchangeability code bit 2

3-10 OFF*) Interchangeability code bit 1

4-9 OFF*) Interchangeability code bit 0

5-8 OFF Not in use

6-7 OFF Message Bus Interface (MBIF) status: OFF =

MBIF in use (bit D3 in register 104h reads 0).
In NE installations, when EMB is used, this setting
must be ON = MBIF not in use.

*) The first interchangeability code A corresponds to all switches OFF, after which the
settings start to roll for each interchangeability code change.
The table below presents the setting of the interchangeability code.

Table 15 Interchangeability code (ICC) settings (SW1).

ICC code Switch setting

Switch 1 (MSB) Switch 2 Switch 3 Switch 4 (LSB)

A OFF OFF OFF OFF

B OFF OFF OFF ON

C OFF OFF ON OFF

D OFF OFF ON ON

E OFF ON OFF OFF

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CP816-A C108488 CP816-AD/-AC/-A

Table 15 Interchangeability code (ICC) settings (SW1). (Cont.)

ICC code Switch setting

F OFF ON OFF ON

G OFF ON ON OFF

H OFF ON ON ON

J ON OFF OFF OFF

K ON OFF OFF ON

L ON OFF ON OFF

M ON OFF ON ON

N ON ON OFF OFF

P ON ON OFF ON

R ON ON ON OFF

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CP816-AD/-AC/-A CP816-A C108488

8.3 RadiSys CP816-A

Figure 18 Connectors and switches of the CP816-A

ICH3-S

Daughter
Board
MCH

CPU

SW3
J11 J12 J13 J14

SW3
DN0480078
OFF ON
1 12
2 11
3 10
4 9
5 8
6 7

8.3.1 Equipping DIMM modules

Selecting Dual Channel Mode
When equipping DIMM modules for Dual Channel Mode, note that DIMM modules must
be equipped in pairs. Therefore, fill first J14 and J13 and J12 and J11 second.

g Note: When using Dual Channel Mode, parallel DIMM slots (i.e. J14 and J13, for
example) must have identical DIMMs (an identical DIMM means an identical Nokia C-
code). DIMMs in series within a memory channel do not have to be identical (i.e. J14
and J12, for example). For example, there can be 512MB DIMMs in slots J14 and J13
and 1GB DIMMs in slots J12 and J11.

Selecting Single Channel Mode

When equipping DIMM modules for Single Channel Mode, fill first J14 and J12 second.

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CP816-A C108488 CP816-AD/-AC/-A

g Note: Dual Channel Mode is default. Single Channel Mode is used only if so specified
in delivery specific documentation.

8.3.2 DIP-switch settings

The following settings are made with micro switch see the table below:

• Interchangeability code
• MBIF status (in use / not in use).

Table 16 SW3 switch settings.

Switch 1 Setting Meaning

1-12 OFF*) Interchangeability code bit 3

2-11 OFF*) Interchangeability code bit 2

3-10 OFF*) Interchangeability code bit 1

4-9 OFF*) Interchangeability code bit 0

5-8 OFF Not in use

6-7 OFF Message Bus Interface (MBIF) status: OFF =

MBIF in use (bit D3 in register 104h reads 0).
In NE installations, when EMB is used, this setting
must be ON = MBIF not in use.

*) The first interchangeability code A corresponds to all switches OFF, after which the
settings start to roll for each interchangeability code change.
The table below presents the setting of the interchangeability code.

Table 17 Interchangeability code (ICC) settings (SW3).

ICC code Switch setting

Switch 1 (MSB) Switch 2 Switch 3 Switch 4 (LSB)

A OFF OFF OFF OFF

B OFF OFF OFF ON

C OFF OFF ON OFF

D OFF OFF ON ON

E OFF ON OFF OFF

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CP816-AD/-AC/-A CP816-A C108488

Table 17 Interchangeability code (ICC) settings (SW3). (Cont.)

ICC code Switch setting

F OFF ON OFF ON

G OFF ON ON OFF

H OFF ON ON ON

J ON OFF OFF OFF

K ON OFF OFF ON

L ON OFF ON OFF

M ON OFF ON ON

N ON ON OFF OFF

P ON ON OFF ON

R ON ON ON OFF

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Connector maps of CP816-AD/-AC/-A CP816-AD/-AC/-A

9 Connector maps of CP816-AD/-AC/-A

The CP816-AD/-AC/-A plug-in unit has both front panel and backplane connectors. The
connector maps of the CP816-AD/-AC/-A are presented below.
The front panel serial connectors
The front panel of the CP816-AD/-AC/-A has two shielded RJ45-type serial connectors
for service terminals. The upper connector (J7) connects to UART 0, the lower (J6)
connects to UART 1. The connector map for both J7 and J6 are presented in the table
below.

Table 18 Signals of the front panel connectors J7 and J6.

Pin Signal description Name In/Out

1 Data terminated Ready DTR Out

2 Transmitted data TxD Out

3 Signal ground

4 Signal ground

5 Received data RxD In

6 Data Set Ready DSR In

7 Clear To Send CTS In

8 Request To Send RTS Out

Backplane Hard Metric connectors

The CP816-AD/-AC/-A connects to the backplane with five Hard Metric backplane
connectors, that is, with P5, P4, P3, P2 and P1 (from top to bottom). The connector
maps for the backplane connectors are presented below.

Table 19 Signals of the backplane connector P5 - B(22) female.

C-pin F E D C B A Z
row

22 +5V +5V +5V +5V +5V 1

21 +5V +5V +5V +5V +5V 2

20 -5V -5V -5V -5V -5V 3

19 MSGCOUNT 8k B 8k A 4

46 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Connector maps of CP816-AD/-AC/-A

Table 19 Signals of the backplane connector P5 - B(22) female. (Cont.)

C-pin F E D C B A Z
row

18 CS B CS A MBLOAD SOC B SOC A 5

17 _INT 3 _INT 2 _INT 1 _INT 0 6

16 _INT 7 _INT 6 _CLKAL _INT 5 _INT 4 7

15 _INT 11 _INT 10 ALTST _INT 9 _INT 8 8

14 _INT 13 _INT 12 9

13 TR2 X3_N TR2 X3_P TR2 X2_N TR2 X2_P 10

12 TR2 TR2 TR2 TR2 11

X1_N/R- X1_P/R+ X0_N/T- X2_P/T+

11 TR0 X3_N TR0 X3_P TR0 X2_N TR0 X2_P 12

10 TR0 TR0 TR0 TR0 13

X1_N/R- X1_P/R+ X0_N/T- X0_P/T+

9 TR1 X3_N TR1 X3_P TR1 X2_N TR1 X2_P 14

8 TR1 TR1 TR1 TR1 15

X1_N/R- X1_P/R+ X0_N/T- X0_P/T+

7 GND GND GND GND GND 16

6 EMB addr EMB addr 1 EMB addr 2 EMB addr 3 EMB addr 4 17
0

5 EMB addr EMB addr 6 EMB addr 7 EMB addr 8 EMB addr 9 18
5

4 GND GND GND GND GND 19

3 GND GND GND GND GND 20

2 CID11 CID10 CID9 CID8 21

1 CID15 CID14 CID13 CID12 22

Ethernet signals:

• TR0 for Ethernet connection 0 and TR1 for Ethernet connection 1.

• TR0 X0 to TR0 X3 are the four pairs for a 1000Base-T connection 0 ( N for negative
and P for positive signal of a pair). They are connected to the corresponding pairs of
the Ethernet PHY device.

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Connector maps of CP816-AD/-AC/-A CP816-AD/-AC/-A

• R-, R+ and T- , T+ on rows 10 and 8 of J5 are used as receive and transmit pairs for
a 100Base-Tx, connections 0 and 1.

Table 20 Signals of the backplane connector P4 - A(25) female.

C-pin F E D C B A Z
row

25 GND GND GND GND GND GND GND 1

24 GND TR3 X3_N TR3 X3_P TR3 X2_N TR3 X2_P GND 2

23 GND TR3 TR3 TR3 TR3 GND 3

X1_N/R- X1_P/R+ X0_N/T- X0_P/T+

22 GND OUT5 OUT4 IN4 GND 4

21 GND OUT7 OUT6 IN7 IN6 GND 5

20 GND GND 6

19 GND S1 S1 -DB(12) GND S0 S0 -DB(12) GND 7

+DB(12) +DB(12)

18 GND S1 S1 -DB(13) GND S0 S0 -DB(13) GND 8

+DB(13) +DB(13)

17 GND S1 S1 -DB(14) GND S0 S0 -DB(14) GND 9

+DB(14) +DB(14)

16 GND S1 S1 -DB(15) GND S0 S0 -DB(15) GND 10

+DB(15) +DB(15)

15 GND S1 S1 GND S0 S0 GND 11

+DB(P1) -DB(P1) +DB(P1) -DB(P1)

14 GND Coding GND 12

13 GND - GND 13

12 GND Area GND 14

11 GND S1 +DB(0) S1 -DB(0) GND S0 S0 -DB(0) GND 15

+DB(0)

10 GND S1 +DB(1) S1 -DB(1) GND S0 S0 -DB(1) GND 16

+DB(1)

9 GND S1 +DB(2) S1 -DB(2) GND S0 S0 -DB(2) GND 17

+DB(2)

8 GND S1 +DB(3) S1 -DB(3) GND S0 S0 -DB(3) GND 18

+DB(3)

48 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Connector maps of CP816-AD/-AC/-A

Table 20 Signals of the backplane connector P4 - A(25) female. (Cont.)

C-pin F E D C B A Z
row

7 GND S1 +DB(4) S1 -DB(4) GND S0 S0 -DB(4) GND 19

+DB(4)

6 GND S1 +DB(5) S1 -DB(5) GND S0 S0 -DB(5) GND 20

+DB(5)

5 GND S1 +DB(6) S1 -DB(6) GND S0 S0 -DB(6) GND 21

+DB(6)

4 GND S1 +DB(7) S1 -DB(7) GND S0 S0 -DB(7) GND 22

+DB(7)

3 GND S1 +DB(P) S1 -DB(P) GND S0 S0 -DB(P) GND 23

+DB(P)

2 GND S1 S1 GRND0 GND S0 S0 GRND0 GND 24

GRND1 GRND1

1 GND S1 S1 GRND2 GND S0 S0 GRND2 GND 25

DIFFSNS DIFFSNS

F E D C B A Z

Table 21 Signals of the backplane connector P3 - B(19) female.

C-pin F E D C B A Z
row

19 GND S1 TRMP1 S1 TRMP0 GND S0 S0 TRMP0 GND 1

TRMP1

18 GND S1 TRMP3 S1 TRMP2 GND S0 S0 TRMP2 GND 2

TRMP3

17 GND S1 S1 GND S0 S0 GND 3

RSVED1 RSVED0 RSVED1 RSVED0

16 GND S1 S1 GRND4 GND S0 S0 GRND4 GND 4

GRND5 GRND5

15 GND S1 +ATN S1 -ATN GND S0 +ATN S0 -ATN GND 5

14 GND S1 S1 GRND6 GND S0 S0 GRND6 GND 6

GRND7 GRND7

13 GND S1 +BSY S1 -BSY GND S0 +BSY S0 -BSY GND 7

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Connector maps of CP816-AD/-AC/-A CP816-AD/-AC/-A

Table 21 Signals of the backplane connector P3 - B(19) female. (Cont.)

C-pin F E D C B A Z
row

12 GND S1 +ACK S1 -ACK GND S0 +ACK S0 -ACK GND 8

11 GND S1 +RST S1 -RST GND S0 +RST S0 -RST GND 9

10 GND S1 +MSG S1 -MSG GND S0 +MSG S0 -MSG GND 10

9 GND S1 +SEL S1 -SEL GND S0 +SEL S0 -SEL GND 11

8 GND S1 +C/D S1 -C/D GND S0 +C/D S0 -C/D GND 12

7 GND S1 +REQ S1 -REQ GND S0 +REQ S0 -REQ GND 13

6 GND S1 +I/O S1 -I/O GND S0 +I/O S0 -I/O GND 14

5 GND S1 +DB(8) S1 -DB(8) GND S0 S0 -DB(8) GND 15

+DB(8)

4 GND S1 +DB(9) S1 -DB(9) GND S0 S0 -DB(9) GND 16

+DB(9)

3 GND S1 S1 -DB(10) GND S0 S0 -DB(10) GND 17

+DB(10) +DB(10)

2 GND S1 S1 -DB(11) GND S0 S0 -DB(11) GND 18

+DB(11) +DB(11)

1 GND GND 19

F E D C B A Z

Table 22 Signals of the backplane connector P2 - B(22) female.

C-pin F E D C B A Z
row

22 GND RSV RSV RSV RSV RSV GND 1

21 GND RSV RSV RSV GND CLK6 GND 2

20 GND RSV GND RSV GND CLK5 GND 3

19 GND RSV RSV RSV GND GND GND 4

18 GND BRSV12 GND BRSV11 BRSV10 BRSV9 GND 5

17 GND _GNT6 _REQ6 _PRST GND BRSV8 GND 6

50 © 2016 Nokia DN0423836 Issue: 1-7

CP816-AD/-AC/-A Connector maps of CP816-AD/-AC/-A

Table 22 Signals of the backplane connector P2 - B(22) female. (Cont.)

C-pin F E D C B A Z
row

16 GND BRSV7 GND _DEG BRSV6 BRSV5 GND 7

15 GND _GNT5 _REQ5 _FAL GND BRSV4 GND 8

14 GND AD[32] GND AD[33] AD[34] AD[35] GND 9

13 GND AD[36] AD[37] V(I/O) GND AD[38] GND 10

12 GND AD[39] GND AD[40] AD[41] AD[42] GND 11

11 GND AD[43] AD[44] V(I/O) GND AD[45] GND 12

10 GND AD[46] GND AD[47] AD[48] AD[49] GND 13

9 GND AD[50] AD[51] V(I/O) GND AD[52] GND 14

8 GND AD[53] GND AD[54] AD[55] AD[56] GND 15

7 GND AD[57] AD[58] V(I/O) GND AD[59] GND 16

6 GND AD[60] GND AD[61] AD[62] AD[63] GND 17

5 GND PAR64 _C/BE[4] V(I/O) GND _C/BE[5] GND 18

4 GND _C/BE[6] GND _C/BE[7] BRSV3 V(I/O) GND 19

3 GND _GNT4 _REQ4 _GNT3 GND CLK4 GND 20

2 GND _REQ3 _GNT2 _SYSEN CLK3 CLK2 GND 21

1 GND _REQ2 _GNT1 _REQ1 GND CLK1 GND 22

F E D C B A Z

Table 23 Signals of the backplane connector P1 - A(25) female.

C-pin F E D C B A Z
row

25 GND 5V 3.3V _ENUM _REQ64 5V GND 1

24 GND _ACK64 AD[0] V(I/O) 5V AD[1] GND 2

23 GND AD[2] 5V AD[3] AD[4] 3.3V GND 3

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Connector maps of CP816-AD/-AC/-A CP816-AD/-AC/-A

Table 23 Signals of the backplane connector P1 - A(25) female. (Cont.)

C-pin F E D C B A Z
row

22 GND AD[5] AD[6] 3.3V GND AD[7] GND 4

21 GND _C/BE[0] M66EN AD[8] AD[9] 3.3V GND 5

20 GND AD[10] AD[11] V(I/O) GND AD[12] GND 6

19 GND AD[13] GND AD[14] AD[15] 3.3V GND 7

18 GND _C/BE[1] PAR 3.3V GND _SERR GND 8

17 GND _PERR GND _SBO SDONE 3.3V GND 9

16 GND _LOCK _STOP V(I/O) GND _DEVSEL GND 10

15 GND _TRDY GND _IRDY _FRAME 3.3V GND 11

14 GND Coding GND 12

13 GND - GND 13

12 GND Area GND 14

11 GND _C/BE[2] GND AD[16] AD[17] AD[18] GND 15

10 GND AD[19] AD[20] 3.3V GND AD[21] GND 16

9 GND AD[22] GND AD[23] IDSEL _C/BE[3] GND 17

8 GND AD[24] AD[25] V(I/O) GND AD[26] GND 18

7 GND AD[27] GND AD[28] AD[29] AD[30] GND 19

6 GND AD[31] CLK0 3.3V GND _REQ GND 20

5 GND _GNT GND _RST BRSV2 BRSV1 GND 21

4 GND INTS INTP V(I/O) GND BRSV0 GND 22

3 GND _INTD 5V _INTC _INTB _INTA GND 23

2 GND TDI TDO TMS 5V TCK GND 24

1 GND 5V +12V _TRST -12V 5V GND 25

F E D C B A Z

52 © 2016 Nokia DN0423836 Issue: 1-7