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WBDesign 42

This document provides a design summary for a buck converter using an LMR38020FDDAR controller chip to convert an input voltage of 24V-48V to an output of 12V delivering 2A of current. The bill of materials includes 11 components costing $2.60 to implement the design including capacitors, inductors, and resistors with specifications like values, footprints, manufacturers and part numbers. The design was created on March 10, 2024 and has some component selection notes.

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0% found this document useful (0 votes)
24 views

WBDesign 42

This document provides a design summary for a buck converter using an LMR38020FDDAR controller chip to convert an input voltage of 24V-48V to an output of 12V delivering 2A of current. The bill of materials includes 11 components costing $2.60 to implement the design including capacitors, inductors, and resistors with specifications like values, footprints, manufacturers and part numbers. The design was created on March 10, 2024 and has some component selection notes.

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VinMin = 24.

0V Device = LMR38020FDDAR
VinMax = 48.0V Topology = Buck
Vout = 12.0V Created = 2024-03-10 23:11:08.818
Iout = 2.0A BOM Cost = $2.60
® BOM Count = 11
WEBENCH Design Report Total Pd = 2.16W

Design : 42 LMR38020FDDAR
LMR38020FDDAR 24V-48V to 12.00V @ 2A

Vout = 12.0V
Cboot Iout = 2.0A
100.0 nF
LM R3 8 0 2 0 FD D A 1.0 m Ohm L1
U1 VIN BOOT 33.0 µH
53.3 m Ohm
EN SW Rpgood
100.0 kOhm
100.0 m W
RT_SYNC
PG
Vin Cff Rfbt
FB 5.1 pF
110.0 kOhm
1.0 m Ohm
63.0 m W
EP
Cin Cinx Iout
GND Cout
4.7 µF 100.0 nF
22.0 µF
5.89 m Ohm 49.59 m Ohm
2.0 m Ohm
Rt
64.9 kOhm Rfbb
100.0 m W
10.0 kOhm
63.0 m W

Design Alerts

Component Selection Information


This device can work in steady state at Vin = 4.2V. However, needs a minimum of 4.5V during start up. See datasheet for details.

Electrical BOM
Name Manufacturer Part Number Properties Qty Price Footprint

Cboot MuRata GRM155R71C104KA88D Cap= 100.0 nF 1 $0.01


Series= X7R ESR= 1.0 mOhm 0402 3 mm
2

VDC= 16.0 V
IRMS= 0.0 A
Cff MuRata GRM1555C1E5R1CA01D Cap= 5.1 pF 1 $0.01
Series= C0G/NP0 ESR= 1.0 mOhm 0402 3 mm
2

VDC= 25.0 V
IRMS= 0.0 A
Cin TDK C3225X7S2A475M200AB Cap= 4.7 uF 1 $0.45
Series= X7S ESR= 5.89 mOhm 1210 15 mm
2

VDC= 100.0 V
IRMS= 6.7739 A
Cinx TDK C1608X7S2A104K080AB Cap= 100.0 nF 1 $0.03
Series= X7S ESR= 49.59 mOhm 0603 5 mm
2

VDC= 100.0 V
IRMS= 751.62 mA
Cout MuRata GRM32ER61E226KE15L Cap= 22.0 uF 1 $0.23
Series= X5R ESR= 2.0 mOhm 1210 15 mm
2

VDC= 25.0 V
IRMS= 3.67 A
L1 Sumida CDRH127/LDNP-330MC L= 33.0 µH 1 $0.73
53.3 mOhm

2
CDRH127 196 mm
Rfbb Vishay-Dale CRCW040210K0FKED Res= 10.0 kOhm 1 $0.01
Series= CRCW..e3 Power= 63.0 mW 0402 3 mm
2

Tolerance= 1.0%
Rfbt Vishay-Dale CRCW0402110KFKED Res= 110.0 kOhm 1 $0.01
Series= CRCW..e3 Power= 63.0 mW 0402 3 mm
2

Tolerance= 1.0%

Copyright © 2024, Texas Instruments Incorporated 1 ti.com/webench

®
WEBENCH Design Report LMR38020FDDAR : LMR38020FDDAR 24V-48V to 12.00V @ 2A March 10, 2024 23:24:10 GMT-05:00
®
WEBENCH Design

Name Manufacturer Part Number Properties Qty Price Footprint

Rpgood Vishay-Dale CRCW0603100KFKEA Res= 100.0 kOhm 1 $0.01


Series= CRCW..e3 Power= 100.0 mW 0603 5 mm
2

Tolerance= 1.0%
Rt Vishay-Dale CRCW060364K9FKEA Res= 64.9 kOhm 1 $0.01
Series= CRCW..e3 Power= 100.0 mW 0603 5 mm
2

Tolerance= 1.0%
U1 Texas Instruments LMR38020FDDAR Switcher 1 $1.10

2
DDA0008E_N 55 mm

Copyright © 2024, Texas Instruments Incorporated 2 ti.com/webench

®
WEBENCH Design Report LMR38020FDDAR : LMR38020FDDAR 24V-48V to 12.00V @ 2A March 10, 2024 23:24:10 GMT-05:00
®
WEBENCH Design

Copyright © 2024, Texas Instruments Incorporated 3 ti.com/webench

®
WEBENCH Design Report LMR38020FDDAR : LMR38020FDDAR 24V-48V to 12.00V @ 2A March 10, 2024 23:24:10 GMT-05:00
®
WEBENCH Design

Operating Values
# Name Value Category Description
1. Cin IRMS 885.292 mA Capacitor Input capacitor RMS ripple current
2. Cin Pd 4.616 mW Capacitor Input capacitor power dissipation
3. Cout IRMS 198.208 mA Capacitor Output capacitor RMS ripple current
4. Cout Pd 78.572 µW Capacitor Output capacitor power dissipation
5. IC Ipk 2.343 A IC Peak switch current in IC
6. IC Pd 1.935 W IC IC power dissipation
7. IC Tj 86.103 degC IC IC junction temperature
8. IC Tolerance 5.0 mV IC IC Feedback Tolerance
9. ICThetaJA Effective 29.0 degC/W IC Effective IC Junction-to-Ambient Thermal Resistance
10. Iin Avg 544.91 mA IC Average input current

Copyright © 2024, Texas Instruments Incorporated 4 ti.com/webench

®
WEBENCH Design Report LMR38020FDDAR : LMR38020FDDAR 24V-48V to 12.00V @ 2A March 10, 2024 23:24:10 GMT-05:00
®
WEBENCH Design

# Name Value Category Description


11. Ipp percentage 34.331 % Inductor Inductor ripple current percentage (with respect to average inductor
current)
12. L Ipp 686.61 mA Inductor Peak-to-peak inductor ripple current
13. L Pd 215.29 mW Inductor Inductor power dissipation
14. Cin Pd 4.616 mW Power Input capacitor power dissipation
15. Cout Pd 78.572 µW Power Output capacitor power dissipation
16. IC Pd 1.935 W Power IC power dissipation
17. L Pd 215.29 mW Power Inductor power dissipation
18. Total Pd 2.156 W Power Total Power Dissipation
19. BOM Count 11 System Total Design BOM count
Information
20. Cross Freq 39.806 kHz System Bode plot crossover frequency
Information
21. Duty Cycle 26.201 % System Duty cycle
Information
22. Efficiency 91.758 % System Steady state efficiency
Information
23. FootPrint 307.0 mm
2
System Total Foot Print Area of BOM components
Information
24. Frequency 405.78 kHz System Switching frequency
Information
25. Gain Marg -10.623 dB System Bode Plot Gain Margin
Information
26. Inductor ripple current 40.0 % System Custom Inductor ripple current (% of average inductor current)
requirement used for Information requirement used for Inductor selection
Inductor selection
27. Iout 2.0 A System Iout operating point
Information
28. Iout transient step used 1.0 A System Custom Transient current step requirement that was used for Cout
for Cout calculations Information selection (A).
29. Low Freq Gain 45.315 dB System Gain at 1Hz
Information
30. Mode FCCM System Conduction Mode
Information
31. Overshoot Value 134.726 mV System Theoretical Vout Overshoot Value
Information
32. Phase Marg 43.998 deg System Bode Plot Phase Margin
Information
33. Pout 24.0 W System Total output power
Information
34. Total BOM $2.6 System Total BOM Cost
Information
35. Undershoot Value 226.008 mV System Theoretical Vout Undershoot Value
Information
36. Vin 48.0 V System Vin operating point
Information
37. Vin p-p 615.965 mV System Peak-to-peak input voltage
Information
38. Vout 12.0 V System Operational Output Voltage
Information
39. Vout Actual 12.0 V System Vout Actual calculated based on selected voltage divider resistors
Information
40. Vout Ripple 1.0 % System Custom maximum output ripple requirement that was used for Cout
requirement used for Information selection(% of Vout).
Cout calculations
41. Vout Tolerance 2.361 % System Vout Tolerance based on IC Tolerance (no load) and voltage divider
Information resistors if applicable
42. Vout p-p 20.754 mV System Peak-to-peak output ripple voltage
Information
43. Vout transient 3.0 % System Custom Transient voltage change requirement that was used for Cout
requirement used for Information selection (% of Vout).
Cout calculations

Design Inputs
Name Value Description
Iout 2.0 Maximum Output Current
VinMax 48.0 Maximum input voltage
VinMin 24.0 Minimum input voltage
Vout 12.0 Output Voltage
base_pn LMR38020F Base Product Number
source DC Input Source Type
Ta 30.0 Ambient temperature

Copyright © 2024, Texas Instruments Incorporated 5 ti.com/webench

®
WEBENCH Design Report LMR38020FDDAR : LMR38020FDDAR 24V-48V to 12.00V @ 2A March 10, 2024 23:24:10 GMT-05:00
®
WEBENCH Design

®
WEBENCH Assembly

Component Testing
Some published data on components in datasheets such as Capacitor ESR and Inductor DC resistance is based on conservative values that
will guarantee that the components always exceed the specification. For design purposes it is usually better to work with typical values. Since
this data is not always available it is a good practice to measure the Capacitance and ESR values of Cin and Cout, and the inductance and DC
resistance of L1 before assembly of the board. Any large discrepancies in values should be electrically simulated in WEBENCH to check for
instabilities and thermally simulated in WebTHERM to make sure critical temperatures are not exceeded.

Soldering Component to Board


If board assembly is done in house it is best to tack down one terminal of a component on the board then solder the other terminal. For surface
mount parts with large tabs, such as the DPAK, the tab on the back of the package should be pre-tinned with solder, then tacked into place
by one of the pins. To solder the tab town to the board place the iron down on the board while resting against the tab, heating both surfaces
simultaneously. Apply light pressure to the top of the plastic case until the solder flows around the part and the part is flush with the PCB. If the
solder is not flowing around the board you may need a higher wattage iron (generally 25W to 30W is enough).

Initial Startup of Circuit


It is best to initially power up the board by setting the input supply voltage to the lowest operating input voltage 24.0V and set the input supply's
current limit to zero. With the input supply off connect up the input supply to Vin and GND. Connect a digital volt meter and a load if needed
to set the minimum Iout of the design from Vout and GND. Turn on the input supply and slowly turn up the current limit on the input supply.
If the voltage starts to rise on the input supply continue increasing the input supply current limit while watching the output voltage. If the
current increases on the input supply, but the voltage remains near zero, then there may be a short or a component misplaced on the board.
Power down the board and visually inspect for solder bridges and recheck the diode and capacitor polarities. Once the power supply circuit is
operational then more extensive testing may include full load testing, transient load and line tests to compare with simulation results.

Load Testing
The setup is the same as the initial startup, except that an additional digital voltmeter is connected between Vin and GND, a load is connected
between Vout and GND and a current meter is connected in series between Vout and the load. The load must be able to handle at least rated
output power + 50% ( 7.5 watts for this design). Ideally the load is supplied in the form of a variable load test unit. It can also be done in the
form of suitably large power resistors. When using an oscilloscope to measure waveforms on the prototype board, the ground leads of the
oscilloscope probes should be as short as possible and the area of the loop formed by the ground lead should be kept to a minimum. This will
help reduce ground lead inductance and eliminate EMI noise that is not actually present in the circuit.

Design Assistance
1. Master key : 59827F0A9C1BB4383C6BFCE623175500[v1]
2. LMR38020F Product Folder : http://www.ti.com/product/LMR38020 : contains the data sheet and other resources.

Copyright © 2024, Texas Instruments Incorporated 6 ti.com/webench

®
WEBENCH Design Report LMR38020FDDAR : LMR38020FDDAR 24V-48V to 12.00V @ 2A March 10, 2024 23:24:10 GMT-05:00
®
WEBENCH Design

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or other requirements.

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Copyright © 2024, Texas Instruments Incorporated 7 ti.com/webench

®
WEBENCH Design Report LMR38020FDDAR : LMR38020FDDAR 24V-48V to 12.00V @ 2A March 10, 2024 23:24:10 GMT-05:00

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