DOI: http://dx.doi.org/10.26483/ijarcs.v8i7.

4406
ISSN No. 0976-5697
Volume 8, No. 7, July – August 2017
International Journal of Advanced Research in Computer Science
RESEARCH PAPER
Available Online at www.ijarcs.info
STUDY OF MEMORY ORGANIZATION AND MULTIPROCESSOR SYSTEM -
USING THE CONCEPT OF DISTRIBUTED SHARED MEMORY, MEMORY
CONSISTENCY MODEL AND SOFTWARE BASED DSM.
Dhara Kumari Dr. Rajni Sharma
Mphil Scholar Assistant Professor (Computer Science)
PT.J.L.N. Govt P.G College Himalayan University
Arunachal Pradesh (India) Faridabad (India)

Dr. Sarita Kaushik

HOD (Computer Science)
DAV College
Faridabad (India)

Abstract: In current trend, performance and efficiency is the big issue of the memory organization and multiprocessor system whereas, A
Memory Organization and Multiprocessor uses multiple modalities to capture different types of DSM (Software based, Hardware Based and it
may be combine both Software & Hardware etc) because IT technology is greatly advanced and lot's of information is shared via the internet. To
improve the performance and efficiency of that multiprocessor system and memory organization, we can use different type of techniques that is
based on the concept and implementation of Hardware, Software, and Hybrid DSM. This paper provides an almost exhaustive survey of the
existing problem and solutions in a uniform manner, presenting their memory organization, shared memory, distributed memory, distributed
shared memory, Memory Consistency Model and software based DSM mechanisms and issues of importance for various DSM systems and
approaches.

Keywords: Performance, Efficiency, Memory, DSM, Shared Memory, Software Based DSM, Multiprocessor System. Memory Consistency
Model

I INTRODUCTION onto a hard disk. Developments in technology and

economies of scale have made possible so-called Very
Traditionally, a major progress was recently made in the Large Memory (VLM) computers. [1] Every computer
research and development of systems with multiple comes with a certain amount of physical memory, used with
processors that are capable of delivering high computing reference to computers generally refers to Random Access
power satisfying the constantly increasing demands of Memory or RAM. You can think of main memory as
typical applications. It is more important to optimize the an array of boxes, each of which can hold a single byte of
distributed system features to obtain the maximum possible information. A computer that has 1 megabyte of memory,
performance and efficiency. Systems with multiple therefore, can hold about 1 million bytes (or characters) of
processors are usually classified into different groups, information. A typical memory hierarchy for optimal
according to their memory system organization, shared performance is implemented in different levels with each
memory, distributed memory, distributed shared memory, level having higher speed, smaller size and lower latency
Memory Consistency Model and software based DSM. closer to the processor than lower levels shown in figure
1.
A. Memory Organization
In recent years, power-efficiency has become a major design
factor in systems. This trend is fueled by the ever-growing
use of battery-powered hand-held devices on the one end,
and large-scale data centers on the other end. To ensure high
power-efficiency, all the resources in system (e.g.,
processor, caches, memory) must be used efficiently. So
memory is internal storage areas in the computer system.
The term memory identifies data storage that comes in the
form of chips, and the word storage is used for memory that
exists on tapes or disks. Moreover, the term memory is
usually used as shorthand for physical memory, which refers
to the actual chips capable of holding data. Some computers
also use virtual memory, which expands physical memory

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 Dhara Kumari et a,l International Journal of Advanced Research in Computer Science, 8 (7), July-August 2017,1069-1073

Figure 2: Bus-based shared memory

According to the bus-based shared memory approach
(Figure 2), the interconnect is a shared bus located between
the processor's cache hierarchies and the shared main
memory subsystem This approach has been widely used for
Figure 1: Memory Hierarchy small to medium-scale multiprocessors consisting of up to
20 or 30 processors. This system has advantages of ease of
This figure show the number of levels in the memory programming and portability. However, shared-memory
hierarchy differs for different architectures and how all multiprocessors typically suffer from increased contention
goals are achieved at a nominal cost by using multiple levels and longer latencies in accessing the shared memory, which
of memory. The fastest memories are more expensive per bit degrades peak performance and limits scalability compared
than the slower memories and thus are usually smaller. The to distributed systems. Memory system design also tends to
price difference arises because of the difference in the be complex. Thus, in 1986, Kai Li proposed a different
capacity among different implementations for the same scheme in his PhD dissertation entitled, “Shared Virtual
amount of silicon. But programs typically specified the Memory on loosely Coupled Microprocessors”, it opened up
location to write memory and what data to put there. This a new area of research that is known as Distributed Shared
location was a physical location on the actual memory Memory (DSM) systems [5] that support in multiple
hardware. The slow processing of such computers did not computer environments.
allow for the complex memory management systems used C. Distributed Shared Memory System
today. Also, as most such systems were single-task, A DSM system logically implements the shared memory
sophisticated systems were not required as much. This model on a physically distributed-memory system
approach has its pitfalls. If the location specified is (distributed memory refers to a multiprocessor computer
incorrect, this will cause the computer to write the data to system in which each processor has its own
some other part of the program. The results of an error like private memory). So we can say that DSM is a model of
this are unpredictable. In some cases, the incorrect data inter-process communications in distributed system.
might overwrite memory used by the operating system. Distributed shared memory (DSM) is also a form of memory
Computer crackers can take advantage of this to architecture where the (physically separate) memories can
create viruses and malware. So, to prevent this type of be addressed as one (logically shared) address space
situation we can use the concept of Shared Memory System. distributed shared memory (DSM) is a form of memory
B. Shared Memory architecture where the (physically separate) memories can
Shared Memory is an efficient that means passing data be addressed as one (logically shared) address space. Figure
between programs. One program will create a memory 3 shows the general structure of distributed shared memory
portion which other processes (if permitted) can access. To system.
realize a shared memory system, it is necessary to avoid
memory access contention, maintain cache coherency [2, 3],
and realize synchronization between computing nodes or
data to enable collaboration. In multiprocessor environment,
Shared memory systems cover a broad spectrum, from a
system that maintain consistency entirely in hardware to
those that do it entirely in software and makes a global
physical memory equally accessible to all processors. This
system also known as tightly coupled multiprocessor [4] that
enable simple data sharing through a uniform mechanism of
reading and writing shared structures in the common
memory. Figure 2 shows the general structures of Bus-based
shared memory system.

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 Dhara Kumari et a,l International Journal of Advanced Research in Computer Science, 8 (7), July-August 2017,1069-1073

Figure 3: distributed shared Memory System operations from multiple processors. According to the
system designer’s point of view, the model specifies
In this figure 3, distributed-memory, is not symmetric. A acceptable memory behaviors for the system. Thus, the
scalable interconnect is located between processing nodes or memory consistency model influences many aspects of
data, but each node or data has its own local portion of the system design, including the design of programming
global main memory to which it has faster access. During languages, compilers, and the underlying hardware.
this step, processes running on separate hosts can access a A memory model can be defined at any interface between
shared address space. The underlying DSM system provides the programmer and the system whereas the system consists
its clients with a shared, coherent memory address space. of the base hardware and programmers express their
Each client can access any memory location in the shared programs in machine-level instructions. There are two type
address space at any time and see the value last written by of interface:
any client. So the main advantage of DSM is the simpler  At the machine code interface, the memory model
abstraction it provides to the application programmer. specification affects the designer of the machine
hardware and the programmer who writes or reasons
about machine code.
IMPLEMENTATION OF DISTRIBUTED SHARED  At the high level language interface, the specification
MEMORY affects the programmers who use the high level
language and the designers of both the software that
DSM can be implemented in hardware DSM as well as converts high-level language code into machine code
software DSM. and the hardware that executes this code.
 According to Hardware implementation, it requires The computer researcher proposed different memory models
addition of special network interfaces and cache to enhance distributed shared memory systems (like
coherence circuits to the system to make remote sequential consistency model, processor consistency model,
memory access look like local memory access. So, weak consistency model, release consistency model etc.).
Hardware DSM is very expensive. These models, to increase the memory access latency, the
 According to Software implementation, a software layer bandwidth requirements, and simplify the programming. It
is added between the OS and application layers and also provides better performance, at the expense of a higher
kernel of OS may or may not be modified. Software involvement of the programmer in synchronizing the
DSM is more widely used as it is cheaper and easier to accesses to shared data.
implement than Hardware DSM. E. Software Based DSM
Design issues of DSM A distributed shared memory is a simple yet powerful
The distributed shared memory is to present the global view paradigm for structuring multiprocessor systems. It can be
of the entire address space to a program executing on any designed using hardware and/or software methodologies
machine [6]. A DSM manager on a particular machine based on various considerations of data being shared in
would capture all the remote data accesses made by any multiprocessor environments but it is better to design DSM
process running on that machine. An implementation of a in software because sharing data becomes a problem which
DSM would involve various choices. Some of them are as has to be easily tackled in software and not in hardware as in
below [7]. multiprocessor systems. The memory organization of a
 DSM Algorithm software DSM system determines the way shared virtual
 Implementation level of DSM Mechanism memory is organized on top of the isolated memory address
 Semantics for concurrent access space. There are various advantages of programming
 Semantics (Replication/Partial/ Full/R/W) distributed shared memory for multiprocessor environment
 Naming scheme has to be used to access remote data as stated below:
 Locations for replication (for optimization)  Sharing data becomes a problem which has to be
 System consistency model & Granularity of data tackled in the software and not in hardware as in
 Data is replicated or cached multiprocessor systems.
 Remote access by HW or SW  Shared memory programs are usually shorter and easier
 Caching/replication controlled by HW or SW to understand.
The value of distributed shared memory depends upon the  Large or complex data structures may easily be
performance of Memory Consistency Model. The communicated.
consistency model is responsible for managing the state of  Programming with shared memory is a well-understood
shared data for distributed shared memory systems. Lots of problem.
consistency model defined by a wide variety of source  Shared memory gives transparent process-to-process
including architecture system, application programmer etc. communication.
D. Memory Consistency Model  Compact design and easy implementation and
Although, shared-memory systems allow multiple expansion.
processors to simultaneously read and write the same Software based DSM provide many advantages in design of
memory locations and programmers require a conceptual multiprocessor systems. A distributed shared memory
model for the semantics of memory operations to allow mechanism allowing user’s multiple processors to access
them to correctly use the shared memory. This model is shared data efficiently. A DSM having no memory access
generally referred to as a memory consistency model or bottleneck and large virtual memory space can
memory model. So we can say that the memory consistency accommodate more no of processors. Its programs are
model for a shared-memory multiprocessor specifies the portable as they use common DSM programming interface,
behavior of memory with respect to read and write
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 Dhara Kumari et a,l International Journal of Advanced Research in Computer Science, 8 (7), July-August 2017,1069-1073

but still having some disadvantages like programmers need

to understand consistency models, to write correct programs.
So, this study is very useful to build new shared memory III LITERATURE SURVEY
system against designing constraints and other languages.
Software implementations of the DSM concept are usually Literature Survey is vital part of the any research area for
built as a separate layer on the top of message passing gathering a new type of information during the analysis that
model. According to the implementation level, several types produce new technology, application and other beneficial
of software-oriented DSM approaches can be recognized in information. In this paper, it includes a review of different
Figure 4. techniques and algorithms of Software Based Distributed
Shared Memory System.

Single Writer Protocol  Review of consistency models

A consistency model is used to express the semantics of
memory as observed by the programs sharing it.
Multiple Writer Protocol Traditionally, only computer architects designing
multiprocessor systems were interested in memory
DSM Approaches
consistency. However, the study of memory consistency
Diff Creation became increasingly popular in recent years and many
publications about theoretical aspects appear in the
literature. For example, Adve and Hill [8] and Sindhu et al.
Synchronization Primitives [9] introduce formal specifications of consistency models.
Also, Raynal and Schiper [10] propose a set of formal
definitions for several consistency models. The specification
Figure 4: software-oriented DSM approaches of a consistency model provides answers to such questions
as: (1) what behavior is expected by the system (i.e., what is
During the implementation of software based DSM, these the value returned by every read operation performed by a
approaches provide many advantages in design of user)? (2) How does the system adhere to the expected
multiprocessor systems. As DSM system increase the consistency of shared data? and (3) what are the constraints
bandwidth and performance are the important criteria for imposed on the ordering of shared data accesses performed
design. A DSM various implementation helps to design by two or more processors?
various kinds of system using hardware and/or software
approaches for multiprocessor environments as logically
shared, local physically distributed, paged-based, shared  Review of software implementations
variable based and object based architectures. During the past decade, several prototypes have been built
Problem of Software Based DSM that provide a DSM abstraction at the system level. System
During the analysis of Research paper, we found two types level implementations usually integrate the DSM as a region
of problem: of virtual address space in the participating programs using
1. Poor application programming interfaces for the virtual memory management system of the underlying
solving complicated synchronization problems. operating system. Li’s shared virtual memory [11] provides
2. Inefficiencies in multiple writer protocol. users with an interface similar to the memory address space
on a multiprocessor architecture. Later, he expanded this
II OBJECTIVE
idea to other architectures and developed a prototype called
The main objective of software DSM not only depends on Shiva on a hypercube [12].
performance, but also on Persistence, Interoperability, Munin [13] is a runtime system and a server mechanism to
Security, Resource Management, Scalability, and Fault allow programs written for shared memory multiprocessors
Tolerance” that are presented in our proposed work for to be executed efficiently in a distributed memory
improving access control application in design of environment. The runtime system handles faults, threads,
multiprocessor systems. During the review of paper, we and synchronization mechanisms and provides support for
identify two weaknesses of contemporary software multiple consistency protocols [14], while the server
distributed shared memory systems: poor application mechanism handles the correct mapping of shared segments
programming interfaces for programmers who need to solve into local memories.
complicated synchronization problems and inefficiencies in  Review of performance evaluation and analysis
the traditional multiple writer protocols. in future work, Performance evaluation of distributed shared memory
these two type of problem can be solve by using different systems (both hardware and software approaches) is not an
type of methodology and implementation that to provide a easy task. Keleher et al. [15] evaluate three implementations
strong guarantee of Performance, Persistence, of software-based release consistent protocols.. Levelt et al.
Interoperability, Security, Resource Management, [16] compare a language based DSM with a IVY–like
Scalability, and Fault Tolerance during the read and write system level implementation. Sun and Zhu [17] propose
operation onto memory organization and multiprocessor “generalized speedup” as a new performance metric. Also,
system. some work was done measuring the performance of parallel
applications that run on distributed shared memory systems
[18].
TreadMarks [19] provides a virtual shared address space
like IVY and Munin. TreadMarks implement lazy release

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 Dhara Kumari et a,l International Journal of Advanced Research in Computer Science, 8 (7), July-August 2017,1069-1073

consistency. A program with a data race condition might get [6] Song Li, Yu Lin, and Michael Walker, “Region-based
results which programmers do not expect. However, a Software Distributed Shared Memory,” CS 656 Operating
program without a data race condition runs as if in a Systems, May 5, 2000.
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variables. All of shared memory follows lazy release [8] S. V. Adve and M. D. Hill. A Unified Formalization of Four
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