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Fundamentals of Computer Organiza-

tion and Operations

WEEK 5 – PROCESSING, PERFORMANCE AND MULTI-CORE COMPUTING

For this week’s material, you will be introduced to multiprocessing and multi-core computing.

The following will be covered this week:

A. Multiprocessors

o Introduction

o Multicore organization

B. Processing and performance

o Hardware multithreading

o Vector (SIMD) processing

o Shared-memory multiprocessors (MIMD)

o Cache coherence

o Message-passing multicomputer

o Performance modelling and hardware/software performance issues

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MULTIPROCESSORS

INTRODUCTION

The limitations of the early computer processors, also known as 'uniprocessors' was that there was

only a single microprocessor dedicated for the execution of tasks. Due to program instructions that

can only be executed sequentially, one at a time. A multiprocessor machine solves the limitations of

machines with a single processors by the nature of parallelism. Multiprocessors can provide methods

of shared distribution of program execution tasks to smaller processors in order for the system to

achieve improved efficiency, speed and performance over single processor systems. A processor that

is designed in a manner that can efficiently carry out the execution of shared tasks is known to be

using 'parallel processing'.

Parallel processing requires that the method that each of the individual processors uses to execute

tasks should be designed with a characteristics of parallelism. In addition, communication between

each of the processors during their execute phase should have limited overhead (Abd-El-Barr & El-

Rewini, 2004). Although there are many advantages to in multicore systems, there are several soft-

ware and hardware performance issues that can occur as a result of parallelism.

MULTIPROCESSOR NETWORK COMMUNICATION STYLES

The two main communication styles that can be used in multiprocessors are the Communication

Model (CM) and the Physical Connection (PC). The CM style consists of either multiprocessors

with a single address space or multiprocessors with multiple address spaces. The PC style consists

of multiprocessors with a bus communication structure or multiprocessors with networking com-

munication structure. The structure of these network styles each have their benefits and drawbacks

that can affect the performance and efficiency of multiprocessing. The diagrams on the next page

illustrates the organization and arrangement for single-bus systems, multi-bus systems, a multi-stage

interconnection network and a crossbar system.

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(a) single-bus system, (b) multi-bus system, (c) multi-stage interconnection network, (d) crossbar system.

MULTIPROCESSOR COMPU TER ARCHITECTURE CLA SSIFICATION SCHEMES

There are a variety of microprocessor computer architecture schemes that exist including Flynn's

(1966), Kuck (1978), Hwang and Briggs, Erlangen, Gilio (1983), Skillicorn (1988) and Bell (1992).

This section will focus on describing Flynn’s classification which is a scheme that subsequent

schemes were modelled after. In Flynn's classification scheme, a computer consists of instruction

streams that are the order of instructions being executed and data streams which is the amount of data

being shared between the memory unit and the processing unit. These instruction and data streams

can be further classified into the following groups;

1. Single-instruction single-data streams (SISD)

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2. Single-instruction multiple-data streams (SIMD)

3. Multiple-instruction single-data streams (MISD)

4. Multiple-instruction multiple-data streams (MIMD)

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PROCESSING AND PERFORMANCE

HARDWARE MULTITHREADING

Multithreading is a method that a single core processor or a multicore processor system can use to

improve the efficiency of parallel computing. A standard process can consist of a single thread or

multiple threads, with a minimum of one thread that is used for execution purposes. In comparison to

the standard process, a thread shares the address space of its parent process and other processes that

have been created by it. These threads are small data structures that are able to run simultaneously to

execute a single or different process in parallel. The three types of hardware multithreading are coarse

grained multithreading, fine-grained multithreading and simultaneous multithreading.

VECTOR (SIMD) PROCES SING

SIMD schemes are particularly useful form of parallel processing for image processing, 3-dimen-

sional rendering and audio processing due to the layout and design of the processors matrix operations

that work with data-level parallelism (Bindal, 2019). In this scheme, a single instruction is executed

by multiple processors, resulting in the output of data. Each processer involved in this process has

local data memory but share a single source of instruction memory where instructions are fetched.

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SHARED-MEMORY MULTIPROCESSORS (MIMD)

MIMD schemes are different from SIMD in that each processor has their individual instructions that

are used on their individual data. Each processor is designed to execute code that consists of multiple

processes and each process shares program and address space. This form of processing is uniquely

suitable at the hardware-level due to the ‘independence’ of code (a process) that can run without

reliance on other code (processes). In this case, the MIMD presents increased benefits for both ‘high

performance’ dedicated multiprocessing and multitasking.

Types of shared memory architectures:

1. Centralised shared memory

 There is a single ‘centralized’ main memory that is shared by each central pro-

cessing unit

2. Distributed shared memory

 There is a distributed memory where each central processing unit has their own

memory

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The diagram below illustrates the typical layout of a centralised shared memory architecture.

The diagram below illustrates the typical layout of a distributed shared memory architecture.

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CACHE COHERENCE

Due to the inherent nature, design and organisation of a multiprocessor or multicore system, main-

taining a level of consistency of data stored in cache memory is a challenge. This unique challenge is

known as ‘cache coherency’ and can be due of the presence of inconsistencies in copies of objects

that the cache and the main memory possess, which may result in unpredictable read and write be-

haviour (Bindal, 2019). The following is diagram is an illustration of the cache coherence challenge

in a multiprocessor system in which one of the CPUs performs the wrong computation as a result of

memory and data inconsistencies.

Cache coherence cab be reduced or eliminated using a variety of methods including;

 Use of a directory-based system: shared data is stored in a common directory

 Snooping: a single cache can monitor address lines in order to access their cached memory

locations

 Snarfing: a ‘cache controller’ is used to ensure that the address and data are consistent in each

memory location

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MESSAGE-PASSING MULTICOMPUTER

Memory passing is a technique of communication used by multiprocessors for communication and

data exchange between each other. This technique differs from shared-memory in that local memory

is used in place of global memory for message communication between the microprocessors. This

communication method is commonly used in the network client-server model in which communica-

tion occurs over direct links.

PERFORMANCE MODELLING AND HARDWARE/SOFTWARE PERFORMANCE ISSUES

Please refer to the additional resources section of the VLE page

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REFERENCES

Abd-El-Barr, M., & El-Rewini, H. (2005). Fundamentals of Computer Organization and Architecture

(Wiley Series on Parallel and Distributed Computing) (1st ed.). Wiley-Interscience.

Bindal, A. (2019). Fundamentals of Computer Architecture and Design (2nd ed. 2019 ed.).

Springer.

Brookshear, J. G., & Brylow, D. (2015). Computer Science: An Overview (12th Edition). Pearson

Education.

Forouzan, B. A. (2017). Foundations of Computer Science. Cengage Learning.

Sarangi, S. R. (2015). Computer Organisation and Architecture. McGraw-Hill Education.

Stallings, W. (2019). Computer Organization and Architecture (11th ed.). Pearson.

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