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Exp.2 2nd Course

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64 views14 pages

Exp.2 2nd Course

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jasmhmyd205
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Experiment # 2 - A

Design a four-digit DAC

Aim: Design a scaling adder as a four – digit digital – to – analog converter (DAC)

Theory:

Summing Amplifier with Unity Gain


A summing amplifier has two or more inputs, and its output voltage is proportional
to the negative of the algebraic sum of its input voltages. A two-input summing
amplifier is shown in Figure 1, but any number of inputs can be used. The operation
of the circuit and derivation of the output expression are as follows. Two voltages,
VIN1 and VIN2, are applied to the inputs and produce currents I1 and I2, as shown.
Using the concepts of infinite input impedance and virtual ground, you can
determine that the inverting (-) input of the op-amp is approximately 0 V and has no
current through it. This means that both input currents I1 and I2 combine at a
summing point, A, and form the total current (IT), which goes through Rf, as
indicated in the figure.

Figure 1: Two – input inverting summing amplifier.

𝐼 = 𝐼 + 𝐼 (1)

Since 𝑉 = −𝐼 𝑅 the following steps apply:


𝑉 = −(𝐼 + 𝐼 )𝑅 = − + 𝑅 (2)

If all three of the resistors are equal 𝑅 = 𝑅 = 𝑅 = 𝑅 , then

𝑉 = − + 𝑅 = −(𝑉 + 𝑉 ) (3)

Equation 3 shows that the output voltage has the same magnitude as the sum of the
two input voltages but with a negative sign, indicating inversion.
A general expression is given in Eq. 4 for a unity-gain summing amplifier with n
inputs, as shown in Figure 2 where all resistors are equal in value.
𝑉 = −(𝑉 + 𝑉 + 𝑉 + ⋯ + 𝑉 ) (4)

Figure 2: Summing amplifier with n inputs. All resistors have the same values

Scaling Adder
A different weight can be assigned to each input of a summing amplifier by simply
adjusting the values of the input resistors. The output voltage can be expressed as:

𝑉 = − 𝑉 + 𝑉 + ⋯+ 𝑉 (5)

The weight of a particular input is set by the ratio of Rf to the resistance, Rx, for that
input (Rx = R1, R2, … Rn). For example, if an input voltage is to have a weight of 1,
then Rx = Rf. Or, if a weight of 0.5 is required, Rx = 2Rf. The smaller the value of
input resistance Rx, the greater the weight, and vice versa.

EXAMPLE

Determine the weight of each input voltage for the scaling adder in Fig. 3 and find
the output voltage.

Figure 3

Solution:

Weight of input 1: = = 0.213

Weight of input 2: = = 0.1

Weight of input 3: = = 1

The output voltage is:

𝑅 𝑅 𝑅
𝑉 = − 𝑉 + 𝑉 + 𝑉
𝑅 𝑅 𝑅

= − [0.213(3V) + 0.1(2V) + 1. (8V)]

= − (0.39 V + 0.2 V + 8 V) = - 8.84 V


Application:
D/A conversion is an important interface process for converting digital signals to
analog (linear) signals. An example is a voice signal that is digitized for storage,
processing, or transmission and must be changed back into an approximation of the
original audio signal in order to drive a speaker.
One method of D/A conversion uses a scaling adder with input resistor values
that represent the binary weights of the digital input code. Although this is not the
most widely used method, it serves to illustrate how a scaling adder can be applied.
A more common method for D/A conversion is known as the R/2R ladder method.
The R/2R ladder is introduced here for comparison although it does not use a scaling
adder.
Figure 4 shows a four-digit digital-to-analog converter (DAC) of this type (called a
binary-weighted resistor DAC). The switch symbols represent transistor switches
for applying each of the four binary digits to the inputs. The inverting (-) input is at
virtual ground, and so the output voltage is proportional to the current through the
feedback resistor Rf (sum of input currents). The lowest-value resistor R corresponds
to the highest weighted binary input (23). All of the other resistors are multiples of
R and correspond to the binary weights 22, 21, and 20.

Figure 4: A scaling adder as a four-digit digital-to-analog converter (DAC)


The project:
Design a four-digit DAC to convert the sequence of four-digit binary codes shown
in Fig. 5 to an analog signal A high level is a binary 1, and a low level is a binary 0.
The least significant binary digit is D0.

Figure 5
Design steps:
Use the circuit in Fig. 6 to convert the signals shown in Fig. 5 to an analog signal.

Figure 6

Theoretically:

1. determine the current for each of the weighted inputs. Since the inverting
input of the op-amp is at 0 V (virtual ground) and a binary 1 corresponds to a
high level (+5 V), the current through any of the input resistors equals 5 V
divided by the resistance value.
2. There is almost no current at the inverting op-amp input because of its
extremely high impedance. Therefore, assume that all of the input current is
through Rf. Since one end of Rf is at 0 V (virtual ground), the drop across Rf
equals the output voltage, which is negative with respect to virtual ground.
Determine all the output voltages due to applying the input signals shown in
Fig. 5.

Measurements:
After implement the circuit do the following measurements:

1. The current through all the input terminals.


2. The output voltages due to the input signals shown in Fig. 5.
3. Draw the input and output signals.
Experiment # 2 -B
Integrator Using Op-Amp

Aim
To design and set up an integrator circuit using op-amp.

Apparatus Required

Power supply, CRO, function generator, strip board, op-amp, capacitor and resistors.

Op-Amp Integrator Ideal

𝑄=𝐼 𝑡
𝑄 = 𝐶𝑉
𝑉 = ( )t
𝐼 = , 𝐼 =𝐼 ,
𝐼 = 𝑉 /𝑅

rate of change or slope of the integrator’s output voltage:


∆𝑽𝒐𝒖𝒕 𝑽𝒊𝒏
=
∆𝒕 𝑹𝒊 𝑪

General Notice Elec. General B, Lec#3 , Spring 2015


•The ideal integrator uses a capacitor in the feedback path, which is open to dc.
•The gain at dc is the open-loop gain of the op-amp.
•In a practical integrator, any dc error voltage due to offset error will cause the output to
produce a ramp that moves toward either positive or negative saturation (depending on the
offset), even when no signal is present.
•Practical integrators must overcome the effects of offset and bias current.
•Various solutions are available, such as chopper stabilized amplifiers.
•The simplest solution is to use a resistor in parallel with the capacitor in the feedback path.

Practical example

Refer to the figure 1. This circuit performs the integration of the input waveform. The
𝟏
output voltage 𝒗𝒐 , 𝒗𝒐 = − ∫ 𝑽𝒊 𝒅𝒕 + 𝒌 where k is the constant of integration which
𝑹𝑪

depends upon the value of 𝒗𝒐 at t=0 , The peak of the output waveform 𝑽𝑻 is given by the
𝑽𝑻
expression 𝑽𝑻 = where T is the time period of the input square wave. Integrators are
𝟒𝑹𝑪

commonly used in analog computers and wave shaping networks.

Let the input frequency be 1 kHz. The frequency at which the integrator gives unity
gain
output is given by
1
𝑓=
2𝜋𝑅1𝐶
Let C = 0.01μF. then R1 = 15.9 kΩ. Use 15 kΩ std.
The resistor R2 in the integrator is provided to attenuate low frequency signals,
particularly input dc offset voltage that may be present. Typically, the value of R2 is selected
as 10 times R1 or more. Select the value of R2 as 470 k.

Procedure
1. Set up the integrator circuit as shown in figure. Give a rectangular wave of ±5V (10V
pp) and 1 kHz frequency at the input and observe the input and output simultaneously
on CRO.
2. Vary the dc offset of the square wave input and observe the difference in the output
waveform.
3. Repeat the experiment by feeding triangular wave and sine wave at the input and
observe the output.
4. Plot all input signal and the output for all situations that be executed .
Experiment No. 2 C
PHASE SHIFT OSCILLATOR USING OP-AMP
AIM: To design and implementation of an RC Phase Shift oscillator using op-amp for a
given frequency.
THEORY
The oscillator is a circuit that produces a periodic waveform on its output with only the
dc supply voltage as a required input. A repetitive input signal is not required but is
sometimes used to synchronize oscillations. The output voltage can be either sinusoidal or
non-sinusoidal, depending on the type of oscillator. Two major classifications for
oscillators are feedback oscillator and relaxation oscillators.
1. Feedback Oscillators One type of oscillator is the feedback oscillator, which returns
a fraction of the output signal to the input with no net phase shift, resulting in a
reinforcement of the output signal. After oscillations are started, the loop gain is
maintained at 1.0 to maintain oscillations. A feedback oscillator consists of an
amplifier for gain (either a discrete transistor or an op-amp) and a positive feedback
circuit that produces phase shift and provides attenuation, as shown in Figure 1

Figure 1

2. Relaxation Oscillators A second type of oscillator is the relaxation oscillator.


Instead of feedback, a relaxation oscillator uses an RC timing circuit to generate a
waveform that is generally a square wave or other nonsinusoidal waveform.
1
Typically, a relaxation oscillator uses a Schmitt trigger or other device that changes
states to alternately charge and di s- charge a capacitor through a resistor. Relaxation
oscillators are not discussed in her.

Principle of Feedback Oscillators:


Feedback oscillator operation is based on the principle of a positive feedback. In this
section, we will examine this concept and look at the general conditions required for
oscillation to occur. Feedback oscillators are widely used to generate sinusoidal waveforms.

Positive Feedback
Positive feedback is characterized by the condition wherein a portion of the output voltage
of an amplifier is feedback to the input with no net phase shift, resulting in a reinforcement
of the output signal. This basic idea is illustrated in Figure 2(a). As you can see, the inphase
feedback voltage, Vf, is amplified to produce the output voltage, which in turn produces the
feedback voltage. That is, a loop is created in which the signal sustains itself and a
continuous sinusoidal output is produced. This phenomenon is called oscillation. In some
types of amplifiers, the feedback circuit shifts the phase 180° and an inverting amplifier is
required to provide another 180° phase shift so that there is no net phase shift. This is
illustrated in Figure 2(b).
In phase Out of phase

Vf Vf
Av Vout
Av Vout

Noninverting
Inverting
amplifier
amplifier

Feedback
circuit Feedback
circuit

(a) (b)

FIGURE 2 Positive feedback produces oscillation.

2
Conditions for Oscillation (Barkhausen Criteria)
Two conditions, illustrated in Figure 3, are required for a sustained state of oscillation:
1. The phase shift around the feedback loop must be effectively 0°.
2. The voltage gain, Acl, around the closed feedback loop (loop gain) must equal 1
(unity).

PHASE-SHIFT OSCILLATOR
The phase-shift oscillator is one of the simplest oscillators to design and construct in the
audio frequency range. The oscillator exemplifies the simple principles and conditions of
oscillation discussed in previous Section. A simple OpAmp based phase-shift oscillator is
shown in Figure 4.

Figure 4: OpAmp based phase-shift oscillator.

3
In this circuit, an inverting Op-Amp amplifier is followed by an RC “ladder” network
consisting of three cascaded arrangements of a resistor R and capacitor C. The three resistors
and three capacitors in the feedback network have identical values. The output of the
reactive phase shift ladder network is returned to the input of the inverting Op-Amp.
To find the design equations of this circuit:

. =1 Barkhausen Criteria

= =− → ∴ =−

In order to solve for the loop gain, mesh equations for Mesh 1, Mesh 2, and Mesh 3 are
formulated:

Solve for the current using Cramer’s Rule,

∴ =

∴ . = =1 (1)

For equality to occur, the denominator must be real and the imaginary part zero

The frequency of oscillation is found by solving for ,


= √6 → = (2)

4
The value of in equation 1

= 29 = 29 (3)

Example 1 Design of an Op-Amp phase-shift oscillator


Design an OpAmp phase-shift oscillator to produce a 1 ± 10% sinusoidal wave. Use a
741 Op-Amp and power supply voltages, ˙ ± 15 . Verify the design using NI Multisim.

Solution:
The circuit topology of the oscillator is identical to Figure 4.
1. choose a reasonable and common capacitor value to initiate the design. For this
design, a capacitor value of 0.01 is selected.
2. Using the chosen capacitor value, solve equation (2) for the resistor in the RC ladder
network:
√6 √6
= = = 6.497 Ω
2 2 (1000)(0.01 10 )
Select nearest value of 6.8 kΩ for R
3. The magnitude of the gain of the inverting Op-Amp amplifier at midband must be
greater than 29 by at least 5%. Then the feedback resistor Rf of the inverting amplifier
is then:
= 1.05 ∗ 29 ∗ = 1.05 ∗ 29 ∗ 6.8 Ω = 207.06 Ω
Select nearest value of 220 kΩ
Homework:
Design an Op-Amp phase-shift oscillator to produce a 5 ± 10% sinusoidal wave. Use a
741 Op-Amp and power supply voltages, ˙ ± 15 . Verify the design using NI Multisim.

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