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HND1 SWE
Date Reason Drafted by : Validated by :
09/02/2022 creation Engr. Ebunle Rene
Course title: Digital Electronics Code: SWE
Lecturing language: English Semester:
School year: 2021/2022 Hourly volume: 36
I- Course Description
Digital Electronics is the study of electronic circuits that are used to process and control digital
signals. In contrast to analog electronics, where information is represented by a continuously
varying voltage, digital signals are represented by two discreet voltages or logic levels.
II- Prerequisite
• Basic knowledge about circuits
• Basic knowledge of mathematics
III- Pedagogical objectives
They are declined in 3 sub objectives namely:
a) Knowledge transmitted
The major focus of the course is to expose students to the design process of number systems,
combinational and sequential logic design, teamwork, communication methods, engineering
standards, and technical documentation.
b) Know-how transmitted
On successful completion of this course students will be able to:.
• Design and construct simple digital electronic systems
• Understand and apply Boolean logic and algebra; a core competence in
Computer Science
• Understand and build registers and counters
c) Manners transmitted
Lecture displays and practical sessions
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IV- Pedagogical methods, evaluation modality, pedagogical tools used
Choose according to your desires the pedagogical methods you will use in the frame of your
course and indicate the bibliography recommended (at most 3 and at least an internet link).
a) Lecture modes
We are going to use the following modes in dispensing the lectures;
-Problem solving and analysis using, white board, computers and projectors
-lectures with examples and exercise
-Tutorials (text and video)
-Individual and Group projects
b) Evaluation modalities
2 continuous assessments and a final exam
c) Pedagogical tools used
Erasable board Slides (video Projector)
Photocopies Software: Proteus
Others (precise)
V- Course content
Lesson title Content Hourly volum
Introduction to Digital Electronics • Introduction 2hrs
and Number Systems • Decimal
• Binary
• Octal
• Hexadecimal
Converting Number Systems • Converting to decimal 4hrs
• Converting from decimal
• Binary fractions
• Binary and octal
• Binary and hexadecimal.
Binary Arithmetic • Binary Addition 5hrs
• Binary Subtraction
• Signed and unsigned Numbers
• One’s complement arithmetic.
• Two’s complement arithmetic
Binary Codes • BCD, gray, excess – 3, 8:4:2:1; 2:4:2:1 6hrs
• Alpha numeric code: ASCII
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Combinational Logic • Introduction to Digital Logic 7hrs
• Standard logic functions: AND, OR, NAND,
NOR, XOR, XNOR, NOT
• Truth tables for standard logic functions.
• Combining logic gates.
• Truth tables.
• Boolean expressions
Boolean Algebra • Simplifying Boolean equations. 4hrs
• Boolean laws and rules
• De Morgan’s theorem.
Karnaugh Maps • Constructing Karnaugh maps 3hrs
• Minimising Karnaugh maps
Application of Combinational • Half Adder 4hrs
• Full Adder.
Logic
• Half Substractor
• Full Substractor
Sequential logic Introduction to sequential systems 1hr
Flip Flops • SR - Flip flop 6hrs
• JK - flop flop
• D - Flip Flop
• T - Flop Flop
Counters • Asynchronous (Ripple) Counters 4hrs
• Synchronous Counters.
Registers • Parallel and serial loading 4hrs
• Shift Registers.
Bibliography :
1. D. M. Harris and S. L. Harris, ‘Digital Design and Computer Architecture,’ Morgan Kaufmann,
2. J. P. Hayes, ‘Introduction to Digital Logic Design,’ Addison-Wesley
3. http://www.learnabout-electronics.org//Digital/dig10.php
4. https://www.indiabix.com/digital-electronics/combinational-logic-analysis/
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Annex:
➢ List des TPE
Make a traffic light that changes in the sequence RED ➔RED + YELLOW ➔GREEN ➔YELLOW.
We can use a counter with two bits to switch between the four states, as shown in this truth table
Show the Boolean equations for the three outputs RED, YELLOW, GREEN as functions of X1 and X0.
Draw a diagram of these functions using gates and implement it using proteus software.
➢ List of questions
1. Show the values of Q and Q̅for a D-latch on this timing diagra
2. Design in a synchronous sequential circuit with inputs A and B and an Output Y. Initially and at
any time if both inputs are 0, the output Y is equal to 0. When A or B becomes 1, Y becomes 1.
When the other input also becomes 1, Y becomes 0. The output stays at 0 until the circuit goes
back to its initial state
