YERRAPOTHU GNANA SAI RAGHU
D.No:16/47,S.N.PURAM,GUDIVADA,KRISHNA DST,ANDHRA PRADESH
Pin Code: 521301, Mail ID:
[email protected] Cell No: +919886276852
Objective Seeking for challenging opportunity as a Vlsi Engineer in the areas of Circuit Design, EDA
Software Development.
Education
NIT Warangal, Andhra Pradesh ,India(2012 - 2014)
M.Tech VLSI system design CGPA:8.31/10(up to 2ndyear.1st sem)
Gudlavalleru Engineering college, JNTUK, A.P , India(2008 - 2012)
Electronics and Communication Engineering CGPA:8.23/10
Experience Internship – INTEL, Bangalore, India
Working with the EDA memory compiler IP team developing and testing back end collaterals
generated by the tools.
Developed Automated RTL2GDS Flow for the IP validation.
Tool used are DC and ICC.
Graduate Device Modeling Mixed signal designing
Courses Analog IC design Low power circuit designing
Digital IC design RF IC design
VLSI-DSP Architectures Physical design automation
Micro chip Fabrication Testing and Testability
Techniques(MCFT)
Academic CMOS Flash ADC
Projects High speed low power Folding ADC with two types of comparators are used.
Specifications: 8 bit, Maximum frequency =1.8Ghz,Pmax=590mW.
Tool: Cadence Virtuoso, 180nm Technology
CMOS Pipeline ADC
The converter is optimized for low-voltage low-power applications by applying an
optimum stage-scaling algorithm at the architectural level and an op-amp and comparator
sharing technique at the circuit level.
Specifications: 10bit, 12MS/s with SNR 68db and DNL .67LSB
Tool: Cadence Virtuoso, 180nm Technology
Low voltage Low power comparator
By using positive feedback technique and by making quiescent current zero power
Consumption is reduced
Specifications : Sampling frequency=1.4Ghz, Resolving capability=.1uv, Supply
voltage range: (0.8 to 1.2) v, Pmax=5.8mW.
Tool: Cadence Virtuoso, 180nm Technology
Fully compensated OP-AMP with biasing technique independent of temperature
Specifications: Gain = 100db, UGB = 10MHz, Phase Margin = 87°
Tool: Cadence Virtuoso, 180nm Technology
Design of high gain comparator
Specifications: Sampling frequency=100Mhz,Resolving capability=0.1mv
Tool: Tanner 2µm
Implementation of Recursive Least square algorithm for adaptive filter
The Recursive least squares (RLS) adaptive filter is an algorithm which
recursively finds the filter coefficients that minimize a weighted linear least
squares cost function relating to the input signals.
AUTONOMOUS ROVING ROBOT FOR GREENHOUSE CONTROLLING
Because of the different materials in the greenhouse the temperature and light
distribution is not uniform. In order to maintain the temperature and light
uniformly this robot is used.This consists of temperature & light monitoring and
controlling. This unit is installed on a Robot which moves through the
greenhouse on a predefined track.
Software Programming Languages: C, PERL , TCL
Skills
Application Software: Tanner, cadence (virtuoso), Design Compiler, IC compiler,
Xilinx
HDL: Verilog, VHDL.
Academic Got Intel Goodie drawer level-II award 4 times during internship.
Achievements
Secured GATE rank of 559
One among the University Toppers in B.Tech.
Winner of the Merit Cash Award in B. Tech. for subsequent years 2008-2010.
Member of the elite IEEE in B.Tech.
