Product Brief

Intel® 82574L and 82574IT Gigabit Ethernet Controllers

Network Connectivity

Intel® 82574L and 82574IT

Gigabit Ethernet Controllers
Low-Power, Small-Footprint, Single-Port Gigabit Network
Connectivity with Advanced Performance Features

• High-performance, low-cost, PCI Express*

10/100/1000 Ethernet Connection

• Compact 9mm x 9mm QFN Package for small-

footprint embedded designs

• Fast Ethernet or Gigabit Ethernet network

connectivity for single-core and multi-core
CPU designs

• Low power: <710mW in GbE mode and

<300mW in 10/100 mode

• Support for hardware-based time stamping of Simple 10/100/1000 PCI-Express*

IEEE 1588 and 802.1as packets enabling high- (PCIe) x1 Connectivity
precision time synchronization over Ethernet The Intel® 82574L/IT Gigabit Ethernet Controllers provide a
• Supports 9018 Byte Jumbo Frames pathway from legacy PCI/PCIx designs to higher performing
PCIe-based designs. These single-port Controllers use a PCIe one
• Available in Industrial Temperature: -40˚-85˚ C
lane (x1) interface operating at 2.5 GHz. The Intel 82574L/IT Gigabit
• Extended lifecycle support protects system
Ethernet Controllers provide fully integrated Gigabit Ethernet Media
investment by providing 7-year manufacturing
availability for customers Access Control (MAC) and Physical-Layer (PHY) capabilities that
can be configured for either 1000 Mb/s or 10/100 Mb/s modes of
• Ideal for Embedded applications in Tele-
communications Infrastructure, Industrial, operation. Some optional PCIe extensions are also supported in
Medical, Military, Interactive Client, Infotain- the Controllers to enhance platform capabilities for specific usage
ment, and Print Imaging modes. Each Controller provides MDI (Copper) standard IEEE 802.3
Ethernet interface for 1000BASE-T, 100BASE-TX, and 10BASE-T
applications (802.3, 802.3u, and 802.3ab). The Intel 82574L/IT also
enables a quick migration from custom interconnects to Ethernet.
Architected for Small-Footprint, interrupts simultaneously, combined with intelligent filtering,
Low-Power Designs ordering and directing of packets to specific queues and
The Intel 82574L/IT Gigabit Ethernet Controllers are ideal for cores, enables load-balancing the network traffic flows to
GbE implementations on small form-factor Embedded designs improve throughput in multi-core platforms. Other performance-
as well as Client and Server LAN on Motherboard (LOM) config- enhancing features include IPv4 and IPv6 checksum offload,
urations. This very small 9mm x 9mm, 64-pin, QFN (Quad Flatpack TCP/UDP checksum offload, extended Tx descriptors for more
No-lead) silicon package provides a 40% reduction in total offload capabilities, up to 256 KB TCP segmentation (TSO v2),
footprint over the previous generation. The Intel 82574L/IT header splitting, 40 KB packet buffer size, and 9018 Byte
Gigabit Ethernet Controllers consume less than 710mW in GbE Jumbo Frame support.
mode and less than 300mW in 10/100 mode. The robust design
also incorporates optional internal voltage regulation which Containing On-Board Side-Band
can reduce the number of voltage supplies required from the Interfaces for Manageability
platform to power core and I/O functions. Support of D0 and D3 The Intel 82574L/IT Gigabit Ethernet Controllers contain an
power states is provided as well as Smart power-down at S0 no SMBus and DMTF-defined Network Controller Sideband Interface
link and Sx no link. Support of PCIe power management wake up (NC-SI) for manageability. Ethernet traffic is forwarded from the
and Advanced power management (APM) wake up using special network to the baseboard management controller (BMC) and
packets is provided as well as LAN disable function. vice versa using the selected sideband interface implementation.
SMBus provides a legacy low-speed (100 KHz-400 KHz) serial
Filled with Performance bus to pass network traffic and also enables the BMC to configure
Optimization Capabilities the Controller’s filters and management-related capabilities. NC-SI
The Intel 82574L/IT Gigabit Ethernet Controllers contain is an Ethernet manageability protocol which is easy to implement
two transmit and two receive queues for the single port. The and offers a very fast data rate (100 Mb/s, full-duplex) interface
controller efficiently manages packets with minimum latency suitable for all types of management traffic.
by combining parallel and pipelined logic architectures optimized
for these independent transmit and receive queues. These Packaged in an Environmentally
queues, combined with Receive Side Scaling (RSS) and Message Friendly Design
Signal Interrupt Extension (MSI-X) support, provide a toolset The Intel 82574L/IT Gigabit Ethernet Controllers are completely
for optimizing the performance on multi-core CPU designs. lead-free and halogen-free in their silicon and package design to
Advanced interrupt-handling features to manage multiple reduce the potential for environmental impact.

Features Benefits
PCI Express* Features
PCIe* x1 interface • High-bandwidth density per pin
• Less-congested board routing
PCIe v.1.1 (2.5 GT/s) • PCI-SIG conformance and standards interoperability
• Supports GbE at wire speed
PCIe* advanced extensions • Extended error reporting and serial number for desired usage modes

Low Power
<750mW S0-Typ (state) 1000Base-T Active 90˚ C (mode) and • Low power consumption
<300mW S0-Typ (state) 100Base-T Active (mode)
Smart power down at S0 no link/Sx no link • Power management
LAN disable function • Power management
Full wake-up support: APM (formerly Wake on LAN), ACPI, and • Power management
Magic Packet* wake-up enable with unique MAC address
ACPI register set and power down functionality supporting • Power management
D0 and D3 states
Features Benefits
Gigabit MAC/PHY Performance Features
Integrated PHY for 10/100/1000 Mb/s for multi-speed, full, and • Smaller footprint and lower power dissipation compared to multiple discreet
half-duplex operation MAC and PHY solutions
Two optimized transmit (Tx) and receive (Rx) queues for • Efficient packet prioritization
the Controller’s single port • Network packet handling without waiting or buffer overflow
Descriptor ring management hardware for Transmit and Receive • Optimized descriptor fetch and write-back mechanisms for efficient system
memory and PCIe bandwidth usage
Legacy and Message Signal Interrupt (MSI) Modes • Interrupt mapping
Message Signal Interrupt Extension (MSI-X) • Advanced interrupt mapping for load balancing across multiple cores
• More vectors per function
• Software-controlled aliasing when fewer vectors are allocated than requested,
and ability for each vector to use independent address and data value
Receive Side Scaling (RSS) for Windows* environment and • Two receive queues to enable traffic streams to be distributed into queues and
Scalable I/O for Linux* environments (IPv4, IPv6, TCP/UDP) directed to specific CPU cores
64-bit address master support for systems using more • Efficient use of PCIe bus and system memory
than 4 GB of physical memory
Programmable host memory receive buffer per queue • Efficient use of PCIe bus and system memory
(256 Bytes to 16 KBytes) and cache line size (64 Bytes
to 128 Bytes)
40 KB Packet buffer size; Configurable Rx and Tx data FIFO • FIFO size adjustable to the application
programmable in 1 KB increments
Support for transmission and reception of packets up to • Enables higher and better throughput of data
9018 Bytes (Jumbo Frames)
Compliant with 1 Gb/s Ethernet IEEE 802.3, 802.3u, 802.3ab PHY specifications • Robust operation over installed base of Category-5 twisted-pair cabling
IEEE 802.3x and 802.3z compliant flow control support with software- • Local control of network congestion levels
controllable Rx thresholds and Tx pause frames • Reduce receive buffer overflows
• Frame loss reduced from receive overruns

Host Offloading Features

TCP/UDP, IPv4, and IPv6 checksum offloads; Extended Tx descriptors • Improved CPU utilization
for more offload capabilities
TCP Segmentation/Transmit Segmentation Offloading (TSO) • Improved CPU utilization
IEEE 802.1q Virtual Local Area Network (VLAN) support with VLAN tag • Adding (for transmits) and ping (for receives) of VLAN tags
insertion, stripping and packet filtering for up to 4096 VLAN tags • Filtering packets belonging to certain VLANs
IEEE 802.1q advanced packet filtering • 16 exact-matched packets (unicast or multicast)
• 4096-bit hash filter for multicast frames
• Lower processor utilization
• Promiscuous (unicast and multicast) transfer mode support
• Optional filtering of invalid frames
Header/packet data split in receive • Helps the driver to focus on the relevant part of the packet without the
need to parse it

Manageability Features
DMTF Network Controller Sideband Interface (NC-SI) • Supports pass-through traffic between BMC and Controller’s LAN functions
• Supports configuration traffic between the BMC and the Controller’s internal units
• Allows fast data rate (up to 100 Mb/s full duplex)
• Allows for advanced BMC capabilities such as video redirection
SMBus pass through • Enables system-level component connections for manageability purposes
• Enables BMC to configure the Controller’s filters and management-related capabilities
• Data rates up to 400 KHz
Preboot eXecution Environment (PXE) flash interface support • Enables system boot up via the EFI (32-bit and 64-bit)
• Flash interface for PXE 2.1 option ROM
iSCSI boot • Enables system boot up via iSCSI
• Provides additional network management capability
Management Data Input/Output (MDIO) – internal management interface • Enables the MAC and software to monitor and control the state of the PHY
MAC/PHY Control and Status • Enhanced control capabilities through PHY reset, PHY link status, PHY duplex
indication, and MAC Dx power state indication
Watchdog timer • Defined by the FLASHT register to minimize Flash updates
 Features Benefits
Additional Device Features
IEEE 1588 protocol and 802.1as implementation • Time-stamping enabling precision synchronization of time-sensitive applications
• Distributes common time to networked media and industrial automation devices
Three output drivers on the single port to drive external LED circuits • Allows event, state, or activity indication for the port
• Configurable for output polarity as well as blinking indicator

Characteristics
Electrical
Typical targeted power dissipation • 702mW at 1000Base-T active
• 296mW at 100Base-T active
Environmental
Operating Temperature • 0˚ C to 85˚ C (82574L)
• -40˚ C to 85˚ C (82574IT)
Storage Temperature • -40˚ C to 125˚ C
Physical
Implemented in 90nm LP (low power) complementary metal-oxide • Minimizes power and size while maintaining quality and reliability
semiconductor (CMOS) process
Package • 9mm x 9mm silicon package typically provides better thermal characteristics and
electrical performance

Network Operating Systems

(NOS) Software Support Order Codes
Windows* 2000 WG82574L T&R: MM – 898552 0–85˚ C Commercial
Tray: MM – 898553 Temperature
Windows Server* 2003
Windows Server* 2008 WG82574IT T&R: MM – 898555 -40–85˚ C Industrial
Tray: MM – 898556 Temperature
Windows XP* (Service Pack 2) [Service Pack 3 available post-production]
Windows Vista*
RHEL* 4.6
RHEL* 5.1
Linux* Kernel version 2.6.24 or higher
Linux* Kernel version 2.4.36.2 or higher
SLES* 9 SP4
SLES* 10 SP1
DOS-NDIS2*
FreeBSD* 7.0
SCO OpenServer 6/Unixware* 7.1.x
Novell Netware* 6.5
Windows* CE (sample driver)
Windows XP Embedded (sample driver available post-production)
KITL (sample driver available post-production)
Supports PXE and iSCSI Boot

To see the full line of Intel Ethernet Controllers, visit http://www.intel.com/go/ethernet.

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