1. [NAT] [GATE-2023 : 2M] + and ⋅ swapped. F is said to be self-dual if F = FD.

For the circuit shown below, the propagation delay The number of self-dual functions with n Boolean
of each NAND gate is 1 ns. The critical path delay, variables is
in ns, is __________ (rounded off to the nearest (a) 2n (b) 2n-1
𝑛 𝑛−1
integer). (c) 22 (d) 22

5. [MCQ] [GATE-2022: 1M]

Let, x ⊕ x ⊕ x ⊕ x = 0 where x , x , x , x are
1 2 3 4 1 2 3 4
Boolean variables, and ⊕ is the XOR operator.
Which one of the following must always be TRUE?
(a) x x x x = 0
1 2 3 4

(b) x x +x = 0
1 3 2
2. [MSQ] [GATE-2022 : 1M] ̅̅̅
(c) 𝑥1 ⨁ ̅̅̅
𝑥3 = ̅̅̅
𝑥2 ⨁ ̅̅̅
𝑥4
Select the Boolean function(s) equivalent to (d) x +x + x + x = 0
1 2 3 4
x + yz, where x, y and z are Boolean variables,
and ‘+’ denotes logical OR operation.
(a) x + z + xy (b) (x + y) (x + z) 6. [MCQ] [GATE-2022: 1M]
(c) x + xy + yz (d) x + xz + xy Consider the Boolean operator # with the following
properties:
x # 0 = x, x #1 = 𝑥̅ , x # x = 0 and x # 𝑥̅ = 1
3. [MSQ] [GATE-2022 : 2M]
Then x # y is equivalent to
Consider a Boolean gate (D) where the output Y is
(a) x𝑦̅ + 𝑥̅ y (b) x𝑦̅ + 𝑥̅ 𝑦̅
related to the inputs A and B as, Y = A + B , where + (c) 𝑥̅ y + xy (d) xy + 𝑥̅ 𝑦̅
denotes logical OR operation. The Boolean inputs
‘0’ and ‘1’ are also available separately. Using
7. [NAT] [GATE-2022: 1M]
instances of only D gates and inputs ‘0’ and ‘1’,
_______ (Select the correct option(s)). The total number of prime implicants of the function
(a) NAND logic can be implemented f (w, x, y, z) = Σ (0, 2, 4, 5, 6, 10) is ______.
(b) OR logic cannot be implemented
(c) NOR logic can be implemented 8. [MCQ] [GATE-2020: 2M]
(d) AND logic cannot be implemented Consider the Boolean function z(a,b,c).
Which one of the following minterm lists represents
4. [MCQ] [GATE-2022: 1M] the circuit given above?

The dual of a Boolean function F(x1, x2, ..., x, +, ⋅, ‘),

written as FD, is the same expression as that of F with

Digital Logic By Chandan Jha sir 9882551509 4.1

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
(d) Σ (0, 2, 3, 5, 6, 7, 8, 11, 14, 15)

12. [MCQ] [GATE-2018 : 1M]

A function F(A,B,C) defined by three Boolean
(a) Z = Σ (0, 1, 3, 7) variables A, B and C when expressed as sum of
(b) Z = Σ (2, 4, 5, 6, 7) products is given by F = A.B.C + A.B.C + A.B.C
(c) Z = Σ (1, 4, 5, 6, 7) Where, A, B, and C are the complements of the
(d) Z = Σ (2, 3, 5) respective variables. The product of sums (POS)
form of the function F is
9. [MCQ] [GATE-2019: 1M] (a) F = ( A + B + C)  ( A + B + C)  ( A + B + C)
Which one of the following is NOT a valid identity? (b) F = (A + B + C)  (A + B + C)  (A + B + C)
(a) (x + y) ⊕ z = x ⊕ (y + z)
(c) F = ( A + B + C )  ( A + B + C ).( A + B + C ).
(b) (x ⊕ y) ⊕ z = x ⊕ (y ⊕ z)
( A + B + C)  ( A + B + C)
(c) x ⊕ y = x + y, if xy = 0
(d) x ⊕ y = (xy + x'y')' (d) F = ( A + B + C )  ( A + B + C )  ( A + B + C ).
( A + B + C)  ( A + B + C)
10. [MCQ] [GATE-2019: 2M]
What is the minimum number of 2-input NOR gates 13. [NAT] [GATE-2018 : 2M]
required to implement a 4-variable function The logic gates shown in the digital circuit below use
expressed in sum-of-minterms form as f = Σ(0, 2, 5, strong pull-down nMOS transistors for LOW logic
7, 8, 10, 13, 15)? Assume that all the inputs and their level at the outputs. When the pull-downs are off,
complements are available._______
high-value resistors set the output logic levels to
HIGH (i.e. the pull-ups are weak). Note that some
11. [MCQ] [GATE-2019: 2M] nodes are intentionally shorted to implement “wired
Consider three 4-variable functions f1, f2 and f3,
logic”. Such shorted nodes will be HIGH only if the
which are expressed in sum-of-minterms as
outputs of all the gates whose outputs are shorted are
f1 = Σ(0, 2, 5, 8, 14),
HIGH
f2 = Σ(2, 3, 6, 8, 14, 15),
f3 = Σ(2, 7, 11, 14) X0
For the following circuit with one AND gate and one
XOR gate, the output function f can be expressed as:
X1
X2
X3 Y

The number of distinct values of X 3 X 2 X1 X 0

(a) Σ (2, 14) (out of the 16 possible values) that give Y = 1 is
(b) Σ (7, 8, 11)
(c) Σ (2, 7, 8, 11, 14)

Digital Logic By Chandan Jha sir 9882551509 4.2

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
Which one of the following gives the simplified sum
14. [MCQ] [GATE-2018 : 2M] of products expression for the Boolean function
F = m0 + m2 + m3 + m5 , where m0, m2, m3 and m5 are
Digital input signals A, B, C with A as the MSB and
C as the LSB are used to realize the Boolean function min-terms corresponding to the inputs A, B and C
F = m0 + m2 + m3 + m5 + m7 with A as the MSB and C as the LSB?
Where mi denotes the ith minterm. In addition, F has (a) AB + ABC + ABC
a don’t care for m1. The simplified expression for F (b) AC + AB + ABC
is given by (c) AC + AB + ABC
(a) AC + BC + AC (b) A+C ABC + AC + ABC
(d)
(c) C+A (d) AC + BC + AC
19. [MCQ] [GATE-2017 : 2M]
15. [MCQ] [GATE-2018 : 1M]
The output expression for the Karnaugh map shown
In the logic circuit shown in the figure, Y is given by below is.

(a) Y = ABCD (b) Y = (A+B) (C+D)

(c) Y = A + B + C + D (d) Y = AB + CD

16. [MCQ] [GATE-2018: 1M]

Let ⊕ and ⊙ denote the Exclusive OR and (a) BD + BCD (b) BD + AB
Exclusive NOR operations, respectively. Which one (c) BD + ABC (d) BD + ABC
of the following is NOT CORRECT?
(a) P  Q=P Q 20. [MCQ] [GATE-2017 : 1M]
(b) P  Q=P Q The Boolean expression, AB + AC + BC simplifies to
(c) P  Q=P  Q (a) BC + AC (b) AB + AC + B

(P  P)  Q = (P P) Q (c) AB + AC (d) AB + BC
(d)

17. [NAT] [GATE-2018: 2M] 21. [MCQ] [GATE-2017 : 1M]

Consider the minterm list form of a Boolean function For a 3-input logic circuit shown below, the output Z
F given below. can be expressed as
F (P, Q, R, S) = Σm (0, 2, 5, 7, 9, 11) + d (3, 8, 10,
12, 14)
Here, m denotes a minterm and d denotes a don’t
care term. The number of essential prime implicants
of the function F is _______ .

18. [MCQ] [GATE-2017 : 2M] (a) Q+R (b) PQ + R

Digital Logic By Chandan Jha sir 9882551509 4.3

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
(c) Q+R (d) P+Q+R 25. [MCQ] [GATE-2016 : 2M]
Following is the K-map of a Boolean function of five
variables P, Q, R, S and X. The minimum sum-of-
22. [MCQ] [GATE-2017: 1M]
product (SOP) expression for the function is
If w, x, y, z are Boolean variables, then which one of
the following is INCORRECT?
(a) wx + w(x + y) + x(x + y) = x + wy
(b) ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
wx̅(y + z̅)+w ̅x = w
̅ + x + y̅z
(c) (wx̅ (y + xz̅) + w
̅ x̅)y = xy̅
(d) (w + y)(wxy + wyz) = wxy + wyz
(a) PQSX + PQSX + QRSX + QRSX
23. [NAT] [GATE-2017: 1M] (b) QSX + QSX
Consider the Karnaugh map given below, where X
(c) QSX + QSX
represents “don’t care” and blank represents 0.
(d) QS + QS

26. [MCQ] [GATE-2016 : 1M]

The output of the combinational circuit given below
is

Assume for all inputs(a, b, c, d) , the respective

complements (𝑎̅, 𝑏̅, 𝑐̅, 𝑑̅) are also available. The
above logic is implemented using 2-input NOR gates
(a) A+B+C (b) A (B + C)
only. The minimum number of gates required is
(c) B (C + A) (d) C (A + B)
_________.

27. [MCQ] [GATE-2016 : 1M]

24. [MCQ] [GATE-2017: 1M]
The minimum number of 2-input NAND gates
Given f (w, x, y, z) = Σm (0, 1, 2, 3, 7, 8, 10)
+ Σd (5, 6, 11, 15), where d represents the don’t-care required to implement a 2-input XOR gate is
condition in Karnaugh maps. Which of the following (a) 4 (b) 5
is a minimum product-of-sums (POS) form of (c) 6 (d) 7
f (w, x, y, z)?
(a) 𝑓 = (𝑤 ̅ + 𝑧̅)(𝑥̅ + 𝑧)
(b) 𝑓 = (𝑤 ̅ + 𝑧)(𝑥 + 𝑧) 28. [MCQ] [GATE-2016 : 2M]
(c) 𝑓 = (𝑤 + 𝑧)(𝑥̅ + 𝑧) The boolean expression:
(d) 𝑓 = (𝑤 + 𝑧̅)(𝑥̅ + 𝑧) ( a + b + c + d ) + ( b + c ) simplifies to

Digital Logic By Chandan Jha sir 9882551509 4.4

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
(a) 1 (b) a.b ( X +Y + Z )( X +Y + Z )
( X +Y + Z )( X +Y + Z )( X +Y + Z )
(c) A.b (d) 0
(d)

29. [MCQ] [GATE-2016 : 1M] ( X +Y + Z )( X +Y + Z )

The output expression for the Karnaugh map shown
below is 32. [MCQ] [GATE-2015 : 2M]
The Boolean expression
F ( X , Y , Z ) = XYZ + XY Z + XYZ + XYZ converted
into canonical product of sum (POS) form is
( X + Y + Z )( X + Y + Z )
(a)
(a) A+ B (b) A+C
( X + Y + Z )( X + Y + Z )
(c) A+C (d) A+C
( X + Y + Z )( X + Y + Z )
(b)
30. [MCQ] [GATE-2016 : 1M]
( X + Y + Z )( X + Y + Z )
In the circuit shown below, X and Y are digital ( X + Y + Z )( X + Y + Z )
(c)
inputs, and Z is a digital output. The equivalent ( X + Y + Z )( X + Y + Z )
circuit is a
( X + Y + Z )( X + Y + Z )
(d)
( X + Y + Z )( X + Y + Z )

33. [MCQ] [GATE-2015 : 1M]

In the circuit shown, diodes D1, D2 and D3 are ideal,
and the inputs E1, E2 and E3 are ‘0 V’ for logic ‘0’
(a) NAND gate (b) NOR gate
and ’10 V; for logic ‘1’ What logic gate does the
(c) XOR gate (d) XNOR gate circuit represent?

31. [MCQ] [GATE-2015 : 2M]

A function of Boolean variables, X, Y and Z is
expressed in terms of the min-terms as
F (X, Y, Z) = Ʃ (1, 2, 5, 6, 7)
Which one of the product of sums given below is
equal to the function F (X, Y, Z)?
(a) (X + Y + Z ) (X + Y + Z) (X + Y + Z )
(a) 3 input OR gate
(b) (X + Y + Z) (X + Y + Z ) (X + Y + Z)
(b) 3 input NOR gate
(c) ( X + Y + Z ))  ( X + Y + Z )  ( X + Y + Z )  (c) 3 input AND gate

Digital Logic By Chandan Jha sir 9882551509 4.5

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
(d) 3 input XOR gate (a) Gate 1 is a universal gate.
(b) Gate 2 is a universal gate.
34. [MCQ] [GATE-2015 : 1M] (c) Gate 3 is a universal gate.
In the figure shown, the output Y is required to be (d) None of the gates shown is a universal gate.
Y = AB + CD. The gates G1 and G2 must be,
37. [NAT] [GATE-2015 : 2M]
All the logic gates shown in the figure have a
propagation delay of 20 ns, Let A = C = 0 and B = 1
until time t = 0. At t = 0, all the inputs flip
(i.e. A = C = 1 and B = 0) and remain in that state.
(a) NOR, OR For t > 0, output Z = 1 for a duration (in ns) of
(b) OR, NAND ________.
(c) NAND, OR
(d) AND, NAND

35. [MCQ] [GATE-2015 : 2M]

A 3-input majority gate is defined by the logic 38. [MCQ] [GATE-2015 : 1M]
function M(a, b, c) = ab + bc + ca. Which one of the Consider the following Sum of Products expression
following gates is represented by the function F.
M ( M (a, b, c), M (a, b, c ), c) ? F = ABC + ABC + ABC + ABC + ABC
The equivalent Product of Sums expression is
(a) 3-input NAND gate
(a) F = ( A + B + C )( A + B + C )( A + B + C )
(b) 3-input XOR gate
(b) F = ( A + B + C )( A + B + C )( A + B + C )
(c) 3-input NOR gate
(c) F = ( A + B + C )( A + B + C )( A + B + C )
(d) 3-input XNOR gate
(d) F = ( A + B + C )( A + B + C )( A + B + C )

36. [MCQ] [GATE-2015 : 2M] 39. [MCQ] [GATE-2015 : 2M]

A universal logic gate can implement any
If (A, B, C, D) = M (0,1,3,4,5,7,9,11,12,13,14,15)
Boolean function by connecting sufficient number of is a maxterm representation of Boolean function f
them appropriately. Three gates are shown. (A, B, C, D) where A is the MSB and D is the LSB.
Which one of the following statements is TRUE? The equivalent minimized representation of this
function is
(a) ( A + C + D )( A + B + D )

(b) ACD + ABD

(c) ACD + ABCD + A B C D

(d) ( B + C + D )( A + B + C + D )( A + B + C + D )

Digital Logic By Chandan Jha sir 9882551509 4.6

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
(b) (S1) – True, (S2) – False, (S3) – False, (S4) -
True
40. [MCQ] [GATE-2015: 1M]
(c) (S1) – False, (S2) – False, (S3) – True, (S4) -
The binary operator ≠ is defined by the following
True
truth table (d) (S1) – True, (S2) – True, (S3) – False, (S4) -
P Q p≠q False
0 0 0
0 1 1 43. [MCQ] [GATE-2014 : 1M]
1 0 1 For an n-variable Boolean function, the maximum
number of prime implicants is
1 1 0
(a) 2(n – 1) (b) n/2
Which one of the following is true about the binary
(c) 2 n
(d) 2(n – 1)
operator ≠?
(a) Both commutative and associative 44. [MCQ] [GATE-2014 : 2M]
(b) Commutative but not associative Consider the Boolean function,
(c) Not commutative but associative F ( w, x, y, z ) = wy + xy + wxyz + w xy + xz + x y z
(d) Neither commutative nor associative Which one of the following is the complete set of
essential prime implicants?
(a) w, y, xz , x z
41. [MCQ] [GATE-2015: 1M]
The number of min-terms after minimizing the (b) w, y, xz
(c) y, x y z
following Boolean expression is ______ .
(d) y , xz , x z
[D' + AB' + A'C + AC'D + A'C'D] '
(a) 1
45. [MCQ] [GATE-2014 : 1M]
(b) 2
The Boolean expression
(c) 3
(d) 4 ( X + Y ) ( X + Y ) + ( XY + X ) simplifies to
(a) X (b) Y
(c) XY (d) X+Y
42. [MCQ] [GATE-2015: 2M]
Given the function F = P’ + QR, wehre F is a function
46. [MCQ] [GATE-2014 : 1M]
in three Boolean variables P,Q and R and P’ = !P,
consider the following statements. In the circuit shown in the figure, if C = 0, the
expression for Y is
(S1) F = (4, 5, 6)
(S2) F = (0,1,2,3,7)
(S3) F = (4, 5, 6)
(S4) F = (0,1,2,3,7)
Which of the following is true?
(a) (S1) – False, (S2) – True, (S3) – True, (S4) -
False
(a) Y = AB + AB

Digital Logic By Chandan Jha sir 9882551509 4.7

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
(b) Y= A + B
(c) Y = A+B
(d) Y = AB (a)

47. [MCQ] [GATE-2014 : 2M]

The output F in the digital logic circuit shown in the
figure is
(b)

(c)

(a) F = XYZ + XYZ (b)

F = XYZ + XY Z
(c) F = XYZ + XYZ (d) F = XYZ + XYZ (d)

48. [MCQ] [GATE-2014 : 2M]

The SOP (sum of products) form of a Boolean 50. [MCQ] [GATE-2014: 1M]
function is ∑(0, 1, 3, 7, 11) , where inputs are A, B,
Let ⨁ denote the Exclusive OR (XOR) operation. Let
C, D (A is MSB, and D is LSB). The equivalent
‘1’ and ‘0’ denote the binary constants. Consider the
minimized expression of the function is
following Boolean expression for F over two
(a) ( B + C )( A + C )( A + B )(C + D ) variables P and Q:
(b) ( B + C )( A + C )( A + C )(C + D ) F(P, Q) = ((1⨁𝑃)⨁(𝑃⨁𝑄))⨁((𝑃⨁𝑄)⨁(𝑄⨁0))
(c) ( B + C )( A + C )( A + C )(C + D ) The equivalent expression for F is
(d) ( B + C )( A + B )( A + C )(C + D ) (a) P+Q (b) (P + Q)
(c) P⨁Q (d) (P ⨁ Q)
49. [MCQ] [GATE-2014 : 2M]
Which of the following logic circuits is a realization 51. [MCQ] [GATE-2014: 1M]
of the function F whose Karnaugh map is shown in Consider the following Boolean expression for F:
figure? F(P, Q, R, S) = PQ + P'QR + P'QR'S
The minimal sum-of-products form of F is
(a) PQ +QR + QSz (b) P+Q+R+S
(c) ̅
P+Q̅+R̅ + S̅ (d) ̅
PR + ̅
PR̅S + P

52. [MCQ] [GATE-2014: 1M]

Digital Logic By Chandan Jha sir 9882551509 4.8

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
Consider the following minterm expression for F: (c) an XOR gate
F (P,Q,R,S) = ∑ 0, 2, 5, 7, 8,10,13,15 (d) a NAND gate
The minterms 2, 7, 8 and 13 are 'do not care’ terms.
The minimal sum-of-products form for F is 54. [MCQ] [GATE-2013 : 1M]
(a) QS + QS A bulb in a staircase has two switches, one switch
being at the ground floor and the other one at the first
(b) QS + QS
floor. The bulb can be turned ON and also can be
(c) QRS + QRS + QRS + QRS
turned OFF by any one of the switches irrespective
(d) PQS + PQS + PQS + PQS of the state of the other switch. The logic of
switching of the bulb resembles.
53. [MCQ] [GATE-2013 : 2M] (a) an AND gate
In the circuit shown below, Q1 has negligible (b) an OR gate
collector-to-emitter saturation voltage and the diode (c) an XOR gate
drops negligible voltage across it under forward (d) a NAND gate
bias. If VCC is + 5 V, X and Y are digital signals
with 0V as logic 0 and VCC as logic 1, the Boolean 56. [MCQ] [GATE-2013: 1M]
expression for Z is Which one of the following expressions does NOT
represent exclusive NOR of x and y?
(a) xy + x'y' (b) x  y'
(c) x'  y (d) x'  y'

57. [MCQ] [GATE-2012 : 1M]

In the sum of products function f (X, Y, Z) = Ʃ (2, 3,
4, 5) , the prime implicates are
(a) XY , XY
(b) XY , XY Z , XYZ
(c) XYZ , XYZ , XY
(a) XY (b) XY
(d) XYZ , XYZ , XY Z , XYX
(c) XY (d) XY

58. [MCQ] [GATE-2012 : 1M]

54. [MCQ] [GATE-2013 : 1M]
In the sum of products function
A bulb in a staircase has two switches, one switch
f(X, Y, Z) =  (2, 3, 4, 5) the prime implicants are
being at the ground floor and the other one at the first
floor. The bulb can be turned ON and also can be (a) XY + XY
turned OFF by any one of the switches irrespective (b) XY + XY Z + XYZ
of the state of the other switch. The logic of (c) XYZ + XYZ + XY
switching of the bulb resembles. (d) XYZ + XYZ + XY Z + XYZ
(a) an AND gate
(b) an OR gate 59. [MCQ] [GATE-2012: 1M]

Digital Logic By Chandan Jha sir 9882551509 4.9

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
The truth table (a) two or more of the inputs P, Q, R are ‘0’
X Y F(X,Y) (b) two or more of the inputs P, Q, R are ‘1’
0 0 0 (c) any odd number of the inputs P, Q, R is ‘0’
0 1 0
(d) any odd number of the inputs P, Q, R is ‘1’
1 0 1
1 1 1
63. [MCQ] [GATE-2011 : 1M]
represents the Boolean function
(a) x (b) x + y The output Y of the logic circuit given below is
(c) xy (d) y

(a) 1 (b) 0
60. [MCQ] [GATE-2012: 1M]
(c) x (d) x
The amount of ROM needed to implement a 4 bit
multiplier is
(a) 64 bits (b) 128 bits 64. [MCQ] [GATE-2011: 1M]
(c) 1 Kbits (d) 2 Kbits The simplified SOP (sum of product) form of the
Boolean expression
61. [MCQ] [GATE-2012: 1M] (𝑃 + 𝑄̅ + 𝑅̅ ) ∙ (𝑃 + 𝑄̅ + 𝑅) ∙ (𝑃 + 𝑄 + 𝑅̅ )
What is the minimal form of the karnaugh map shown (a) ( P.Q + R ) (b) ( P + Q '.R ')
below? Assume that X denotes a don't care term
ab (c) ( P '.Q + R ) (d) ( P. Q + R )
cd 00 01 11 10
00 1 × × 1 65. [MCQ] [GATE-2011: 1M]
01 × 1 ̅+
The min-term expansion of f(P, Q, R) = PQ + QR
11 ̅ is
PR
10 1 × (a) m2 + m4 + m6 + m7
(b) m0 + m1 + m3 + m5
(a) bd (b) bd + bc (c) m0 + m1 + m6 + m7
(c) bd + abcd (d) bd + bc + cd (d) m2 + m3 + m4 + m5

62. [MCQ] [GATE-2011 : 1M] 66. [MCQ] [GATE-2011: 1M]

The output Y in the circuit below is always ‘1’ when Which one of the following circuits is NOT equivalent
to a 2-input X-NOR (exclusive NOR) gate?

(a)

(b)

(c)

Digital Logic By Chandan Jha sir 9882551509 4.10

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
The following Karnaugh map represents a function
(d) F.

67. [MCQ] [GATE-2010 : 1M]

For the output F to be 1 is the logic circuit shown,
the input combination should be Which of the following circuits is a realization of the
above function F?

(a)

(b)

(a) A = 1, B = 1, C = 0
(b) A = 1, B = 0, C = 0
(c)
(c) A = 0, B = 1, C = 0
(d) A = 0, B = 0, C = 1

(d)
68. [MCQ] [GATE-2010 : 1M]
Match of the logic gates in Column A with their
equivalents in Column B.
70. [MCQ] [GATE-2010 : 2M]
The following Karnaugh map represents a function
F.

A minimized form of the function F is

(a) P-2, Q-4, R-1, S-3 (a) F = XY + YZ

(b) P-4, Q-2, R-1, S-3 (b) F = XY + YZ

(c) P-2, Q-4, R-3, S-1 (c) F = XY + YZ
(d) P-4, Q-2, R-3, S-1 (d) F = XY + YZ

69. [MCQ] [GATE-2010 : 2M] 71. [MCQ] [GATE-2010: 1M]

Digital Logic By Chandan Jha sir 9882551509 4.11

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
What is the Boolean expression for the output f of
the combinational logic circuit of NOR gates given 75. [MCQ] [GATE-2008 : 2M]
below? Which of the following Boolean Expressions
correctly represents the relation between P, Q, R and
M1?

(a) M1 = (P OR Q)XOR R
(b) M1 = (P AND Q)XOR R
(c) M1 = (P NOR Q)XOR R
(a) Q+R (b) P+Q
(d) M1 = (P XOR Q)XOR R
(c) P+R (d) P+Q + R

76. [MCQ] [GATE-2008: 1M]

72. [MCQ] [GATE-2009 : 2M]
If X = 1 in the logic equation If P, Q, R are Boolean variables, then (P + Q) (P.Q +

 
P.R) (P.R + Q) Simplifies to
 X + Z Y + ( Z + XY )   X + Z ( X + Y ) = 1
 
(a) P. Q (b) P. R
(a) Y=Z (b) Y =Z
(c) P. Q + R (d) P.R + Q
(c) Z=1 (d) Z=0

73. [MCQ] [GATE-2009 : 1M] 77. [MCQ] [GATE-2008: 1M]

The complete set of only those Logic Gates A set of Boolean connectives is functionally complete
designated as Universal Gates are if all Boolean functions can be synthesized using
those. Which of the following sets of connectives is
(a) NOT, OR and AND Gates
NOT functionally complete?
(b) XNOR, NOR and NAND Gates (a) EX-NOR
(c) NOR and NAND Gates (b) implication, negation
(d) XOR, NOR and NAND Gates (c) OR, negation
(d) NAND

74. [MCQ] [GATE-2009: 1M]

78. [MCQ] [GATE-2008: 1M]
What is the minimum number of gates required to
Given f1, f3 and f in canonical sum of products from
implement the Boolean function (AB + C) if we have
(in decimal) for the circuit.
to use only 2-input NOR gates?
(a) 2 (b) 3
(c) 4 (d) 5

Digital Logic By Chandan Jha sir 9882551509 4.12

 BASIC LOGIC GATES, MINIMIZATION & K-MAP
ab
cd 00 01 11 10
00 1 1 1
01 ×
11 ×
f1 = m (4,5,6,7,8)
f3 = m (1, 6, 15) 10 1 1 ×
f = m (1, 6, 8, 15) b. d + a. d
(a) (b) a. b + b. d + a.b.d
Then f2 is
b. d + a.b. d a. b + b. d + a. d
(a) m (4, 6) (b) m (4, 8) (c) (d)
(c) m (6, 8) (d) m (4, 6, 8)
79. [MCQ] [GATE-2008: 1M] 80. [MCQ] [GATE-2008: 1M]
In the Karnaugh map shown below, X denotes a don’t Consider the following Boolean function of four
care term. What is the minimal form of the function variables f(A, B, C, D) = Σ(2, 3, 6, 7, 8, 9, 10, 11, 12,
represented by the Karnaugh map? 13) The function is
(a) independent of one variable
(b) independent of two variables
(c) independent of three variables
(d) dependent on all the variables

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Digital Logic By Chandan Jha sir 9882551509 4.13

 BASIC LOGIC GATES, MINIMIZATION & K-MAP

1. (2 to 2) 21. (c) 41. (a) 61. (b)

2. (b, c) 22. (c) 42. (a) 62. (b)
3. (a, c) 23. (1) 43. (d) 63. (a)
4. (d) 24. (a) 44. (d) 64. (b)
5. (c) 25. (b) 45. (a) 65. (a)
6. (a) 26. (c) 46. (a) 66. (d)
7. (3) 27. (a) 47. (a) 67. (d)
8. (c) 28. (d) 48. (a) 68. (d)
9. (a) 29. (b) 49. (c) 69. (d)
10. (3) 30. (c) 50. (d) 70. (b)
11. (b) 31. (b) 51. (a) 71. (a)
12. (c) 32. (a) 52. (b) 72. (d)
13. (8 to 8) 33. (c) 53. (b) 73. (c)
14. (b) 34. (a) 54. (c) 74. (b)
15. (d) 35. (c) 55. (c) 75. (d)
16. (d) 36. (c) 56. (d) 76. (a)
17. (3) 37. (40 to 40) 57. (a) 77. (a)
18. (a) 38. (a) 58. (a) 78. (c)
19. (d) 39. (c) 59. (a) 79. (a)
20. (a) 40. (b) 60. (d) 80. (a)



Digital Logic By Chandan Jha sir 9882551509 4.14