0% found this document useful (0 votes)
6 views1 page

About This Guide: Preface

Uploaded by

Thiện Khiêm
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
6 views1 page

About This Guide: Preface

Uploaded by

Thiện Khiêm
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

R

Preface

About This Guide


This user guide provides guidance on how customers can use the architectural features of
each platform in the Spartan®-3 generation: the Extended Spartan-3A family, which
includes the Spartan-3A, Spartan-3AN, and Spartan-3A DSP platforms, and the Spartan-3
and Spartan-3E families. By combining documentation for these families, similarities and
differences are easier to learn, and less material needs to be duplicated in multiple sources.
For an overview of how these platforms compare, see “Section 1: Designing with Spartan-
3 Generation FPGAs”.
This user guide includes much of the information previously included in Module 2
(Functional Description) of the Spartan FPGA data sheets and in device application notes.
The data sheets should still be referenced for the platform-specific DC and Switching
Characteristics (located in Module 3) and the pinout information (located in Module 4). All
features of the Spartan-3E and Extended Spartan-3A family are described in this user
guide, but some differences in the Spartan-3 family, such as DCI or the clocking structure,
are discussed in Module 2 of the Spartan-3 FPGA data sheet or in the device application
notes.
Information on the configuration features of the Spartan-3 generation FPGAs is located in
UG332, the Spartan-3 Generation Configuration User Guide. Information on using the internal
SPI flash of the Spartan-3AN FPGAs is located in UG333, Spartan-3AN FPGA In-System
Flash User Guide. Together with the device specifications in the data sheets, these user
guides provide complete documentation on the Spartan-3 generation architecture.
Check for updates on xilinx.com at:
http://www.xilinx.com/support/documentation/spartan-3a.htm. To get an automatic
notification of any updates to this document, click the “Subscribe to Alerts” link on the top
of the page.

Guide Contents
This user guide contains the following chapters:
• “Section 1: Designing with Spartan-3 Generation FPGAs”
• Chapter 1, “Overview”
• Chapter 2, “Using Global Clock Resources”
• Chapter 3, “Using Digital Clock Managers (DCMs)”
• Chapter 4, “Using Block RAM”
• Chapter 5, “Using Configurable Logic Blocks (CLBs)”
• Chapter 6, “Using Look-Up Tables as Distributed RAM”
• Chapter 7, “Using Look-Up Tables as Shift Registers (SRL16)”
• Chapter 8, “Using Dedicated Multiplexers”

Spartan-3 Generation FPGA User Guide www.xilinx.com 23


UG331 (v1.8) June 13, 2011

You might also like