X10OBi Platform Instruction Manual
X10OBi Platform Instruction Manual
with
X10OBi-CPU Board
AOM-X10OBi-PCH Card
AOM-X10OBi-PCIE Card
AOM-X10OBi-HDD Card
BPN-X10OBi Midplane
USER’S MANUAL
Revision 1.0b
The information in this user’s manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
and makes no commitment to update or to keep current the information in this manual, or to notify
any person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu-
mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.
IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between the manufacturer and the customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in industrial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at
your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
The products sold by Supermicro are not intended for and will not be used in life support systems,
medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency com-
munication devices or other critical systems whose failure to perform be reasonably expected to
result in significant injury or loss of life or catastrophic property damage. Accordingly, Supermicro dis-
claims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous
applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend
and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Preface
Manual Organization
Chapter 1 describes the features, specifications and performance of the X10OBi
system, and provides detailed information on the Intel 602J chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when
installing the X10OBi-CPU board, the AOM-X10OBi-PCH card, the AOM-X10OBi-
PCIE card, the AOM-X10OBi-HDD card and the BNP-X10OBi midplane into the
system. See Chapter 3, which describes troubleshooting procedures for video,
memory and system setup stored in the CMOS.
Chapter 4 includes an introduction to BIOS and provides detailed information on
CMOS setup configuration.
Appendix A provides a list of BIOS error beep codes.
Appendix B details software installation instructions.
Appendix C provides UEFI BIOS recovery instructions.
iii
Super X10OBi Platform User’s Manual
iv
Preface
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: [email protected] (General Information)
[email protected] (Technical Support)
Website: www.supermicro.com
Europe
Address: Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
Email: [email protected] (General Information)
[email protected] (Technical Support)
[email protected] (Customer Support)
Website: www.supermicro.nl
Asia-Pacific
Address: Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
Taiwan (R.O.C)
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3992
Email: [email protected]
Website: www.supermicro.com.tw
v
Super X10OBi Platform User’s Manual
Table of Contents
Preface
Chapter 1 Overview
1-1 Overview .................................................................................................... 1-11-2
X10OBi-CPU Board .................................................................................................... 1-2
Major Components on the X10OBi-CPU Board ............................................. 1-4
Processor and Memory Support on the X10OBi-CPU ................................... 1-5
1-3 AOM-X10OBi-PCH Card ............................................................................... 1-12
Major Components on the AOM-X10OBi-PCH Card .................................... 1-13
Explanation of Jumpers ............................................................................ 1-15
CMOS Clear ............................................................................................. 1-15
VGA Enable (On the I/O Module) ............................................................ 1-15
Manufacturer Mode Select ....................................................................... 1-16
TPM Support Enable ................................................................................ 1-16
Watch Dog Enable/Disable ...................................................................... 1-16
SATA Connectors ..................................................................................... 1-17
I-SATA 0/1 & M.2 Connectors ................................................................. 1-17
Unit Identifier Switch/LED ........................................................................ 1-17
IPMI LAN .................................................................................................. 1-18
IPMI LAN LED Indicators ......................................................................... 1-18
DOM Power Connectors .......................................................................... 1-19
TPM/Port 80 Header ................................................................................ 1-19
1-4 AOM-X10OBi-PCIE Card .............................................................................. 1-20
Major Components on the AOM-X10OBi-PCI-E ........................................... 1-20
1-5 AOM-X10OBi-HDD Card ............................................................................... 1-21
Major Components on the AOM-X10OBi-HDD Card .................................... 1-21
HDD Power Connectors .......................................................................... 1-22
I-SATA4/I-SATA5 2.0 Ports ....................................................................... 1-22
1-6 BPN-X10OBi Midplane .................................................................................. 1-23
Major Components on the BPN-X10OBi Midplane ....................................... 1-25
Universal Serial Bus (USB) ..................................................................... 1-28
1-7 X10OBi System Platform Features ............................................................... 1-29
System Platform Feature .............................................................................. 1-29
1-8 Processor/PCH Platform Overview ............................................................... 1-34
Main Features of the Intel E7-8800 (v3/v4) Processor................................. 1-34
1-9 Special Features ........................................................................................... 1-35
vi
Table of Contents
vii
Super X10OBi Platform User’s Manual
viii
Chapter 1: Overview
Chapter 1
Overview
1-1 Overview
Checklist
Congratulations on purchasing your computer system from an acknowledged leader
in the industry. Supermicro's systems are designed with the utmost attention to detail
to provide you with the highest standards in quality and performance.
For more information regarding this product, please visit our website at www.
supermicro.com.
Note 1: The X10OBi-CPU board is intended to be used in conjunction
with the AOM-X10OBi-PCH card, the AOM-X10OBi-PCIE card, the AOM-
X10OBi-HDD card, and the BPN-X10OBi midplane as an integrated server
platform. These components are not to be used as stand-alone products
and will not be shipped independently in a retail box.
Note 2: For your system to work properly, please follow the links below
to download all necessary drivers/utilities and the user's manual for your
system.
1-1
Super X10OBi Platform User’s Manual
Your system can support up to eight X10OBi-CPU boards on the front side of the
BPN-X10OBi midplane; these CPU boards are identical. The following section
provides detailed information on the X10OBi-CPU board.
Note: All graphics shown in this manual were based upon the latest PCB
revision available at the time of publishing this manual. The components
installed in your system may or may not look exactly the same as the
graphics shown in this manual.
1-2
Chapter 1: Overview
DIMMH1
DIMMH2
DIMMH3
DIMMG1
DIMMG2
DIMMG3
1
JC2
JC2
CPU
X10OBi-CPU
DIMMA3
DIMMA2
DIMMA1
DIMMB3
DIMMB2
DIMMB1
Rev. 1.01
DIMMF1
DIMMF2
DIMMF3
DIMME1
DIMME2
DIMME3
BAR CODE
JC2 J11
NVME 1
NVME 0
CPU SLOT1 PCI-E 3.0 X16
J1
JLED
JC2
DIMMD1
DIMMD2
DIMMD3
DIMMC1
DIMMC2
DIMMC3
Notes:
• Components not indicated are for internal use or for testing only.
1-3
Super X10OBi Platform User’s Manual
DIMMH1
DIMMH2
DIMMH3
DIMMG1
DIMMG2
DIMMG3
1
JC2
JC2
CPU
X10OBi-CPU
DIMMA3
DIMMA2
DIMMA1
DIMMB3
DIMMB2
DIMMB1
Rev. 1.01
DIMMF1
DIMMF2
DIMMF3
DIMME1
DIMME2
DIMME3
GPU PWR
JP2
2
2
BAR CODE
JC2 J11
NVME 1
3
NVME 0
3
4
4
JLED
JC2
DIMMD1
DIMMD2
DIMMD3
DIMMC1
DIMMC2
DIMMC3
1 Midplane I/O Connectors I/O connectors located on the midplane for rear access
(See the image below.)
3 J11 NVME Connector Non-Volatile Memory Express (NVME) connector for NVME0/
NVME1 ports
Midplane IO Connectors
1-4
Chapter 1: Overview
DIMMH1
DIMMH2
DIMMH3
DIMMG1
DIMMG2
DIMMG3
E B B
E 1
A JC2
A JC2
CPU
X10OBi-CPU
DIMMA3
DIMMA2
DIMMA1
DIMMB3
DIMMB2
DIMMB1
Rev. 1.01
DIMMF1
DIMMF2
DIMMF3
DIMME1
DIMME2
DIMME3
GPU PWR
JP2
D D BAR CODE
JC2 J11
NVME 1
NVME 0
C
JLED C
JC2
DIMMD1
DIMMD2
DIMMD3
DIMMC1
DIMMC2
DIMMC3
B DIMM Slots • Each CPU board supports up to 3 TB of DDR4 3DS Load Reduced
(DIMMA1/A2/A3, (3DS LRDIMM), Load Reduced (LRDIMM), or Registered (RDIMM)
DIMMB1/B2/B3) ECC 1866/1600/1333 MHz memory in 24 slots
• With eight CPU boards installed, your system will support up to 24 TB
C DIMM Slots of DDR4 3DS LRDIMM, LRDIMM, or RDIMM ECC memory in 192 slots
(DIMMC1/C2/C3,
DIMMD1/D2/D3) Notes: 1. Memory speed support is depend-
D DIMM Slots ing on the CPUs used in the motherboard. For
(DIMME1/E2/E3,
DIMMF1/F2/F3)
the latest CPU/memory updates, please refer
E DIMM Slots
to our website at http://www.supermicro.com/
(DIMMG1/G2/G3, products/motherboard. 2. Please refer to the
DIMMH1/H2/H3)
memory configuration & population tables to
maximize memory performance.
1-5
Super X10OBi Platform User’s Manual
Notes:
• Always connect the power cord last, and always remove it before adding,
removing, or changing any hardware components. Make sure that you install
the processor into the CPU socket before you install the CPU heatsink.
• If you buy a CPU separately, make sure that you use an Intel-certified multi-
directional heatsink only.
• Make sure to install the processor and memory into the X10OBi-CPU card
before you install the CPU card into the CPU card slot on the reverse side
of the BPN-X10OBi midplane.
To Install the processor onto the CPU board, please follow the instructions below.
Warning! Electrostatic Discharge (ESD) can damage electronic components. To avoid
damaging your system, it is crucial to follow the instructions given in the Static-Senstive
Devices section in Chapter 2 to protect your equipment from ESD.
1. There are two load levers on the E7-8800 (v3/v4) socket. To open the socket
cover, first press and release the load lever labeled 'Open 1st'.
1 2
OP
OP EN
EN 1st
1st
Press down
on Load Lever
labeled 'Open 1st'.
1-6
Chapter 1: Overview
2. Press the second load lever labeled 'Close 1st' to release the load plate that
covers the CPU socket from its locking position.
OP
OP EN
EN 1st
1st
3. With the lever labeled 'Close 1st' fully retracted, gently push down on the
lever labeled 'Open 1st' to open the load plate. Lift the load plate to open it
completely.
Gently push
1 2
down to pop the
load plate open.
OP
EN
1st
Note: All graphics shown in this manual were based upon the latest PCB
revision available at the time of publishing this manual. The components
installed in your system may or may not look exactly the same as the
graphics shown in this manual.
1-7
Super X10OBi Platform User’s Manual
4. Use your thumb and the index finger to loosen the lever and open the load
plate.
5. Using your thumb and index finger, hold the CPU on its edges. Align the CPU
keys, which are semi-circle cutouts, against the socket keys.
Socket Keys
CPU Keys
6. Once they are aligned, carefully lower the CPU straight down into the socket.
(Do not drop the CPU on the socket. Do not move the CPU horizontally or
vertically. Do not rub the CPU against the surface or against any pins of the
socket to avoid damaging the CPU or the socket.)
1-8
Chapter 1: Overview
7. With the CPU inside the socket, inspect the four corners of the CPU to make
sure that the CPU is properly installed.
8. Close the load plate with the CPU inside the socket. Lock the lever labeled
'Close 1st' first, then lock the lever labeled 'Open 1st' second. Using your
thumb gently push the load levers down to the lever locks.
1 Gently close
the load plate.
2 Push down and lock the
lever labeled 'Close 1st'.
OP
EN
1st
3 4
Lever Lock Push down
and lock the
lever labeled
'Open 1st'.
OP
EN
1st
OP
EN
1st
Lever Lock
1-9
Super X10OBi Platform User’s Manual
1-10
Chapter 1: Overview
CAUTION
Exercise extreme care when installing or removing DIMM
modules to prevent any possible damage. Check Supermicro's
website for recommended memory modules.
1. Install the desired number of DIMM modules on the CPU board; each board
supports up to 24 DIMMs. When installing memory, be sure to always popu-
late the blue slots first, starting with DIMMA1, DIMMB1, DIMMC1, DIMMD1,
DIMME1, DIMMF1, DIMMG1, and DIMMH1. For best performance, please
use the memory modules of the same type and same speed in the same
bank. For DIMM module locations, please refer to the layout below.
1 A A DIMMA1/A2/A3, DIMMB1/B2/B3
D
JC2
JC2
B DIMMC1/C2/C3, DIMMD1/D2/D3
1
CPU
C DIMME1/E2/E3, DIMMF1/F2/F3
X10OBi-CPU
DIMMA3
DIMMA2
DIMMA1
DIMMB3
DIMMB2
DIMMB1
Rev. 1.01
D DIMMG1/G2/G3, DIMMH1/H2/H3
DIMMF1
DIMMF2
DIMMF3
DIMME1
DIMME2
DIMME3
GPU PWR
JP2
C
BAR CODE
JC2 J11
NVME 1
NVME 0
CPU SLOT1 PCI-E 3.0 X16
J1
B
JLED
JC2
DIMMD1
DIMMD2
DIMMD3
DIMMC1
DIMMC2
DIMMC3
1-11
Super X10OBi Platform User’s Manual
AOM-X10OBi-PCH Image
AOM-X10OBi-PCH Layout
JUIDB1
UID
LED2
LED1
J1 IPMI LAN
BT1
JTPM1
JPT1
BIOS
BIOS
I-SATA0
LICENSE
JPG1 JWD1
BMC
JBT1
JSD1
I-SATA1
JSD2
MAC CODE
PCH
JPME2
BAR CODE
AOM-X10OBi-PCH
REV:1.00
J7 J8
1-12
Chapter 1: Overview
DB1
UID
LED2
18 9
LED1
17 J1 IPMI LAN
BT1
14
4
16
JTPM1
JPT1
BIOS
BIOS
I-SATA0
LICENSE
7
1
2
JPG1 JWD1
BMC
JBT1
JSD1
5 12
I-SATA1
8
JSD2
13
MAC CODE
PCH
JPME2
BAR CODE
AOM-X10OBi-PCH
REV:1.00
J7 J8
10 11
1-13
Super X10OBi Platform User’s Manual
Note 1: Please see the Jumpers section on the next page for more in-
formation.
1-14
Chapter 1: Overview
Jumper Settings
CMOS Clear
JBT1 is used to clear the CMOS. Instead of pins, this "jumper" consists of contact
pads to prevent the accidental clearing of the CMOS. To clear the CMOS, use a
metal object such as a small screwdriver to touch both pads at the same time to
short the connection. Always remove the AC power cord from the system before
clearing the CMOS.
Note 1. For an ATX power supply, you must completely shut down the sys-
tem, remove the AC power cord, and then short JBT1 to clear the CMOS.
Note 2. Be sure to remove the onboard CMOS Battery before you short
JBT1 to clear the CMOS. Clearing the CMOS will also clear any pass-
words.
1-15
Super X10OBi Platform User’s Manual
1-16
Chapter 1: Overview
SATA Connectors
supported by the Intel PCH chip and are used with 1 Ground
1-17
Super X10OBi Platform User’s Manual
IPMI LAN
An IPMI_dedicated LAN, located on the
AOM-X10OBi-PCH, provides KVM sup-
port for IPMI 2.0. This port accepts an
RJ45_type cable. Refer to the table on
the right for more information.
IPMI LAN
IPMI LAN LED Indicators Link LED Activity LED
1-18
Chapter 1: Overview
1-19
Super X10OBi Platform User’s Manual
J1
AOM-X10OBi-PCIE
BAR CODE REV:1.00
1
J2
2
SW1
3 D1
1-20
Chapter 1: Overview
AOM-X10OBi-HDD Layout
AOM-X10OBi-HDD
JPWR1 JPWR2 JPWR3 REV:1.00
1 2 3
1-21
Super X10OBi Platform User’s Manual
(Required)
6 RX_P
7 Ground
1-22
Chapter 1: Overview
1-23
Super X10OBi Platform User’s Manual
CUT CUT
OFF CUT OFF CUT OFF CUT OFF CUT OFF CUT OFF CUT OFF
OFF
HPSXB1:
CPU1 SLOT1
BPN-X10OBi
REV:1.00 HPSXB7:CPU4 SLOT7 PCI-E 3.0 X8
PCI-E 3.0 X8
J77 J96
J80 J95
J79 J97
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CPU BOARD SLOT5
CUT
CUT OFF
OFF
BAR CODE
J66
CUT CUT
CUT CUT CUT CUT CUT CUT CUT CUT OFF
OFF OFF OFF OFF OFF OFF OFF OFF OFF
JP4 J90
USB PWR
J88
USB2
J84 J92 J93 J94
HPSXB3:CPU5 SLOT3 PCI-E 3.0 X8 HPSXB5:CPU7 SLOT1 PCI-E 3.0 X8
PCH BOARD SLOT
FAN2_1 FAN8
CUT CUT
CUT CUT CUT CUT CUT CUT CUT CUT
OFF OFF
OFF OFF OFF OFF OFF OFF OFF OFF
1-24
Chapter 1: Overview
CUT CUT
OFF CUT OFF CUT OFF CUT OFF CUT OFF CUT OFF CUT OFF
9 OFF 10
HPSXB1:
CPU1 SLOT1
BPN-X10OBi
REV:1.00 HPSXB7:CPU4 SLOT7 PCI-E 3.0 X8
PCI-E 3.0 X8
J77 J96
J95
J80
1 2 3 4 5 6 7 8
J79 J97
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CUT OFF
CPU BOARD SLOT5
CUT
CUT OFF
OFF
BAR CODE
J66
CUT CUT
CUT CUT CUT CUT CUT CUT CUT CUT OFF
OFF OFF OFF OFF OFF OFF OFF OFF OFF
1-25
Super X10OBi Platform User’s Manual
Note: Refer to Chapter 2 for installation of CPU boards and PCI-E cards.
1-26
Chapter 1: Overview
JP4 J90
1 J88 3
USB PWR
6
J92 J93 J94
HPSXB3:CPU5 SLOT3 PCI-E 3.0 X8 5 USB2
HPSXB5:CPU7 SLOT1 PCI-E 3.0 X8
J84
PCH BOARD SLOT
8 8a
CUT
CUT CUT
10 CUT
10a CUT CUT 12 CUT
12a
CUT
14 CUT
14a CUT
OFF OFF
OFF OFF OFF OFF OFF OFF OFF OFF
20 19 18 17 16
1-27
Super X10OBi Platform User’s Manual
1-28
Chapter 1: Overview
1-29
Super X10OBi Platform User’s Manual
PCI-E 3.0 • One (1) PCI-E 3.0x16 slot (CPU Slot1) on each
Slots X10OBi-CPU board; (w/8 CPU boards max. in the
system),
• One (1) PCI-E 3.0x8 in x16 slot on the AOM-X10OBi-
PCI card (w/five PCI-cards max. in the system),
• One (1) PCI-E 3.0x8 in x16 slot on the AOM-X10OBi-
HDD card, (w/two HDD-cards max. in the system),
• Two (2) PCI-E 3.0x8 slots on the front side of the
BPN-X10OBi midplane supporting two PCI-E-cards
in the front; five (5) PCI-E 3.0x8 slots on the reverse
side of midplane supporting five PCI-E cards in the
back
I/O Module • One SIOM PCI-E 3.0x8 slot on the AOM-X10OBi-
Slot PCH card for Supermico proprietary I/O riser card
support
Graphics • AST2400 BMC video controller via the BMC on the
AOM-X10OBi-PCH card
Network • One IPMI LAN 2.0 port supported by the BMC on
the AOM-X10OBi-PCH card
I/O Devices SATA Connections
• SATA • Two (2) SATA 3.0 w/
power-pin built in (Su-
perDOM) (I-SATA0/1)
on the AOM-X10OBi-
PCH card
1-30
Chapter 1: Overview
1-31
Super X10OBi Platform User’s Manual
Note:
1-32
Chapter 1: Overview
DDR4 * 3 DDR4 CH.A SMI2 SMI2 DDR4 CH.A DDR4 * 3 DDR4 * 3 DDR4 CH.A SMI2 SMI2 JC0 DDR4 CH.A DDR4 * 3
DDR4 * 3 DDR4 CH.B JC0 JC0 DDR4 CH.B DDR4 * 3 DDR4 * 3 DDR4 CH.B JC0 DDR4 CH.B DDR4 * 3
DDR4 * 3 DDR4 CH.C SMI2 CPU8 SMI2 DDR4 CH.C DDR4 * 3 DDR4 * 3 DDR4 CH.C SMI2 QPI 9.6GT/s SMI2 JC1 DDR4 CH.C DDR4 * 3
DDR4 * 3 DDR4 CH.D JC1 CPU6 JC1 DDR4 CH.D DDR4 * 3 DDR4 * 3 DDR4 CH.D JC1
CPU4
DDR4 CH.D DDR4 * 3
CPU3
DDR4 * 3 DDR4 CH.E SMI2 SMI2 DDR4 CH.E DDR4 * 3 DDR4 * 3 DDR4 CH.E SMI2 SMI2 JC2 DDR4 CH.E DDR4 * 3
DDR4 * 3 DDR4 CH.F JC2 JC2 DDR4 CH.F DDR4 * 3 DDR4 * 3 DDR4 CH.F JC2 DDR4 CH.F DDR4 * 3
DDR4 * 3 DDR4 CH.G SMI2 SMI2 DDR4 CH.G DDR4 * 3 DDR4 * 3 DDR4 CH.G SMI2 SMI2 JC3 DDR4 CH.G DDR4 * 3
DDR4 * 3 DDR4 CH.H JC3 JC3 DDR4 CH.H DDR4 * 3 DDR4 * 3 DDR4 CH.H JC3 DDR4 CH.H DDR4 * 3
QPI 9.6GT/s
QPI 9.6GT/s
QPI 9.6GT/s
QPI 9.6GT/s
QPI 9.6GT/s QPI 9.6GT/s
QPI 9.6GT/s QPI 9.6GT/s
DDR4 * 3 DDR4 CH.A SMI2 SMI2 DDR4 CH.A DDR4 * 3 DDR4 * 3 DDR4 CH.A SMI2 SMI2 JC0 DDR4 CH.A
DDR4 * 3 DDR4 CH.B JC0 JC0 DDR4 CH.B
DDR4 * 3 DDR4 * 3 DDR4 CH.B JC0 DDR4 CH.B DDR4 *3
DDR4 * 3
DDR4 CH.C SMI2 DDR4 CH.C DDR4 CH.C SMI2 DDR4 CH.C
DDR4 * 3
DDR4 CH.D JC1 SMI2 CPU5 CPU7 JC1 DDR4 CH.D DDR4 * 3 DDR4 * 3
DDR4 CH.D JC1 CPU2 QPI 9.6GT/s CPU1 SMI2 JC1 DDR4 CH.D DDR4 * 3
DDR4 * 3 DDR4 * 3 DDR4 * 3 DDR4 * 3
DDR4 * 3 DDR4 CH.E SMI2 SMI2 DDR4 CH.E DDR4 * 3 DDR4 * 3 DDR4 CH.E SMI2 SMI2 JC2 DDR4 CH.E
DDR4 * 3 DDR4 CH.F JC2 JC2 DDR4 CH.F
DDR4 * 3 DDR4 * 3 DDR4 CH.F JC2 DDR4 CH.F DDR4 *3
DDR4 * 3
DDR4 * 3 DDR4 CH.G SMI2 SMI2 DDR4 CH.G DDR4 * 3 DDR4 * 3 DDR4 CH.G SMI2 SMI2 JC3 DDR4 CH.G
DDR4 * 3 DDR4 CH.H JC3 JC3 DDR4 CH.H
DDR4 * 3 DDR4 * 3 DDR4 CH.H JC3 DDR4 CH.H DDR4 *3
DDR4 * 3
CPU7 PCIE X16, X8, X4 *2 CPU2 PCIE X16, X8, X4 *2
CPU5 PCIE X16, X8, X4 *2 CPU1 PCIE X16, X8, X4 *2
QPI 9.6GT/s
CPU8 PCIE SLOTPCI-e 3.0 x16 CPU8 PCIE X16 CPU4 PCIE X8SIOM SLOT CPU2 PCIE X8 DMI2 (X4)
HDD10 SLOT PCI-e 3.0 x16 (X8) PCI-e 3.0 x16 (X8)
CPU8 NVME NVME x4 *2 CPU8 PCIE X4 *2
CPU8 PCIE X8
CPU7 PCIE SLOTPCI-e 3.0 x16 CPU7 PCIE X16 PCIE SLOT5 PCI-e 3.0 x16 (X8)
1 * USB in 2 PORTS
CPU7 NVME NVME x4 *2 CPU7 PCIE X4 *2 CPU7 PCIE X8 100/1000 PHY USB 2.0 X1 USB 2.0 X1 INTERNAL HEADER
PCIE SLOT4 PCI-e 3.0 x16 (X8) BMC
CPU6 PCIE SLOTPCI-e 3.0 x16 CPU6 PCIE X16 PCIE 1.0 X1
CPU6 PCIE X8 ASPEED2400 SATA 3.0 2 * SATA DOM
CPU6 NVME NVME x4 *2 CPU6 PCIE X4 *2 PCIE SLOT3 PCI-e 3.0 x16 (X8) 100/1000 RJ45
VGA LPC
PCH SPI
CPU5 PCIE SLOTPCI-e 3.0 x16 CPU5 PCIE X16 CPU5 PCIE X8 COM SPI BIOS
PCIE SLOT2 PCI-e 3.0 x16 (X8)
CPU5 NVME NVME x4 *2 CPU5 PCIE X4 *2 SATA 2.0 X2 SATA 2.0 Connector X2
CPU3 PCIE X8 8 * FAN USB 2.0 X2
CPU4 PCIE SLOTPCI-e 3.0 x16 CPU4 PCIE X16 PCIE SLOT1 PCI-e 3.0 x16 (X8)
CPU4 NVME NVME x4 *2 CPU4 PCIE X4 *2 CPU1 PCIE X8
HDD1 SLOT PCI-e 3.0 x16 (X8) TPM
CPU3 PCIE SLOTPCI-e 3.0 x16 CPU3 PCIE X16 SLB9660
CPU3 NVME NVME x4 *2 CPU3 PCIE X4 *2 KVM CONNECTOR (VGA,
COM, USB2.0 X2) TPM
CPU2 PCIE SLOTPCI-e 3.0 x16 CPU2 PCIE X16 INTERNAL
HEADER
CPU2 NVME NVME x4 *2 CPU2 PCIE X4 *2
CPU1 PCIE SLOTPCI-e 3.0 x16 CPU1 PCIE X16
CPU1 NVME NVME x4 *2 CPU1 PCIE X4 *2
Note: This is a general block diagram and may not exactly represent the
features on your system. See the "System Platform Features "pages for
the actual specifications of the system.
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Super X10OBi Platform User’s Manual
With the Intel QuickPath interconnect (QPI) controller built in, the E7-8800 v3/
v4 series processor offers a point-to-point system interconnect interface, greatly
enhancing system performance by utilizing serial link interconnections, which al-
lows for increased bandwidth and scalability.
The 602J PCH provides an Interface between the QPI-based processor and
PCI-Express components. Each processor supports full-width, bidirectional inter-
connects at the speeds of up to 9.6 GT/s. Each QPI link consists of 20 pairs of
unidirectional differential lanes for data transmission in addition to a differential
forwarding clock. The x16 PCI Express Gen 3 connections can also be config-
ured as x8, x4, and x2 links to comply with the PCI-E Base Specification, Rev.
2.0. These PCI-E Gen 3 lanes support peer-to-peer read-and-write transactions.
The 602J PCH also offers a wide range of ESI, Intel® I/OAT Gen 3, Intel VT-d, and
RAS (Reliability, Availability and Serviceability) support. The features supported
include memory interface ECC, x4/x8 Single Device Data Correction (SDDC),
Flow-through CRC (Cyclic Redundancy Check), parity protection, out-of-band
register access via the SMBus, and memory mirroring for data integrity.
• Virtualization Technology
1-34
Chapter 1: Overview
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Super X10OBi Platform User’s Manual
1-36
Chapter 1: Overview
• One (1) 4-pin USB power connector is located on the reverse side of the BPN-
X10OBi card to provide power supply to the USB device accessible from the
rear side of the chassis.
Please connect these power connectors to the power supply to provide adequate
power to the components and the system.
Warning! To avoid damaging the power supply or the system, be sure to connect all
the power connectors mentioned above to the power supply. Failure to do so will void
the manufacturer warranties on both your power supply and your system.
It is strongly recommended that you use high-quality power supplies that meet ATX
Power Supply Specification 2.02 or above. It must also be SSI compliant. (For more
information, please refer to the website at http://www.ssiforum.org/.) Additionally, in
areas where noisy power transmission is present, you may choose to install a line
filter to shield the computer from noise. It is recommended that you also install a
power surge protector to help avoid problems caused by power surges.
1-37
Chapter 2: Installation
Chapter 2
Installation
Battery Handling
Warning!
電池の取り扱い
電池交換が正しく行われなかった場合、破裂の危険性があります。交換する電池はメー
カーが推奨する型、または同等のものを使用下さい。使用済電池は製造元の指示に従
って処分して下さい。
警告
电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更
换原有电池。请按制造商的说明处理废旧电池。
警告
電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有
電池。請按照製造商的說明指示處理廢棄舊電池。
Warnung
Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die
Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.
Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.
2-1
Super X10OBi Platform User’s Manual
Attention
Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer
que par une pile de type semblable ou équivalent, recommandée par le fabricant.
Jeter les piles usagées conformément aux instructions du fabricant.
¡Advertencia!
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-
emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen-
dado por el fabricante. Desechar las baterías gastadas según las instrucciones
del fabricante.
!אזהרה
יש להחליף.קיימת סכנת פיצוץ של הסוללה במידה והוחלפה בדרך לא תקינה
.את הסוללה בסוג התואם מחברת יצרן מומלצת
.סילוק הסוללות המשומשות יש לבצע לפי הוראות היצרן
ھﻨﺎك ﺧﻄﺮ ﻣﻦ اﻧﻔﺠﺎر ﻓﻲ ﺣﺎﻟﺔ اﺳﺘﺒﺪال اﻟﺒﻄﺎرﯾﺔ ﺑﻄﺮﯾﻘﺔ ﻏﯿﺮ ﺻﺤﯿﺤﺔ ﻓﻌﻠﯿﻚ
اﺳﺘﺒﺪال اﻟﺒﻄﺎرﯾﺔ
ﻓﻘﻂ ﺑﻨﻔﺲ اﻟﻨﻮع أو ﻣﺎ ﯾﻌﺎدﻟﮭﺎ ﻛﻤﺎ أوﺻﺖ ﺑﮫ اﻟﺸﺮﻛﺔ اﻟﻤﺼﻨﻌﺔ
ﺗﺨﻠﺺ ﻣﻦ اﻟﺒﻄﺎرﯾﺎت اﻟﻤﺴﺘﻌﻤﻠﺔ وﻓﻘﺎ ﻟﺘﻌﻠﯿﻤﺎت اﻟﺸﺮﻛﺔ اﻟﺼﺎﻧﻌﺔ
경고!
Waarschuwing
Er is ontploffingsgevaar indien de batterij verkeerd vervangen wordt. Vervang de
batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan-
bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften
afgevoerd te worden.
2-2
Chapter 2: Installation
Product Disposal
Warning!
Ultimate disposal of this product should be handled according to all national laws
and regulations.
製品の廃棄
この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が
あります。
警告
本产品的废弃处理应根据所有国家的法律和规章进行。
警告
本產品的廢棄處理應根據所有國家的法律和規章進行。
Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen
des Landes erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes y regla-
mentos nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis à des
lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de
l'organisme compétent.
סילוק המוצר
!אזהרה
.סילוק סופי של מוצר זה חייב להיות בהתאם להנחיות וחוקי המדינה
2-3
Super X10OBi Platform User’s Manual
ﻋﻨﺪ اﻟﺘﺨﻠﺺ اﻟﻨﮭﺎﺋﻲ ﻣﻦ ھﺬا اﻟﻤﻨﺘﺞ ﯾﻨﺒﻐﻲ اﻟﺘﻌﺎﻣﻞ ﻣﻌﮫ وﻓﻘﺎ ﻟﺠﻤﯿﻊ اﻟﻘﻮاﻧﯿﻦ واﻟﻠﻮاﺋﺢ اﻟﻮطﻨﯿﺔ
경고!
Waarschuwing
De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming
met alle nationale wetten en reglementen.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic
bag.
• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules, or gold contacts.
• Put the system motherboard and peripherals back into their antistatic bags
when not in use.
• For grounding purposes, make sure that your system chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners, and
the system motherboard.
• Use only the correct type of onboard CMOS battery as specified by the manu-
facturer. To avoid possible explosion, do not install the onboard battery upside
down.
Unpacking
The system board is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static-protected.
2-4
Chapter 2: Installation
Notes:
• Always connect the power cord last, and always remove it before adding,
removing, or changing any hardware components.
• Always make that your area is clear of any trip hazards when carrying the
system.
• Make certain that the correct mounting hardware is used. The entire server
unit weighs more than 200lbs. A minimum of two able-handed persons are
required to carry the system. Failure to do so may result in personal injury
and/or damage to the system.
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Super X10OBi Platform User’s Manual
4 3 4 3 4 3 4 3 4 3 4 3 4 3 4 3 6 9
9 HDD1 CPU1 CPU2 CPU8 HDD2
CPU3 CPU4 CPU5 CPU6 CPU7
7 7 7 7
5
8 8
7 7 7 7
10 10 10 10 10 10 10 10 5
10 10 10 10 10 10 10 5
8 10
5 8
7 7 7 7
8
8
1 1 1 1 1 1 1 1
2 2
HDD1 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7 CPU8 HDD2
8 4 3 4 3 4 3 4 3 4 3 4 3 4 3 4 3 6
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Chapter 2: Installation
5 6
HDD1 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7 CPU8 HDD2
HDD1 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7 CPU8 HDD2
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Super X10OBi Platform User’s Manual
6 12
6 6 6
16 16
6 6 6 6
2 2 2 2
6 6 6 6
6 6 6 6
2 2 2
2
1 1 1 1 1
5 11 5 11 5 11 5 11 5 11
9 10 4 15
16
8
3
7
Back Panel Components
12 13 14
2-8
Chapter 2: Installation
Storage Module
CPU Module
1. Inside the server chassis, locate the proper slot which you want to insert the
module into. Align the module you want to install with the slot of your choice.
2. Insert the module into the slot and gently push it into the slot until it is se-
curely seated inside the slot.
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Super X10OBi Platform User’s Manual
1. Please note that each storage or CPU module has a red handle on the lock
lever. Turn the red handle counter-clockwise to lock the lever as shown below.
2. Locate a black thumb screw that also came with the module.
2-10
Chapter 2: Installation
Server Chassis
PCI-E Module
Power Supply
Module
2. When finished, attach the rail mounts to the server chassis and mount it onto
a server rack (if required). (Note: a fully populated server chassis may weigh
more than 200lbs, and a minimum of two able-bodied persons are needed to
carry the chassis.)
3. Attach the power cord, network, and KVM cables to the server. Then, power
on the system.
4. Follow the instructions in Chapter 4 (BIOS) and properly configure IPMI for
remote access.
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Super X10OBi Platform User’s Manual
1. Use a Philips screw driver to remove the top screws. Once the cover is loose,
remove the cover.
2. Once the cover is off, you may now install the needed components such as
additional hard drives, PCI-E add-on cards or additional memory modules
into the chassis. Please follow standard ESD procedures on Section 2-2 to
prevent damage caused by static electricity to the server components.
2-12
Chapter 2: Installation
PCI-E Module
PCI-E Card
2-13
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
Before Power On
1. Make sure that there are no short circuits between all add-on cards, system
boards, I/O modules, and chassis.
2. Disconnect all ribbon/wire cables from the system board, I/O module, and
memory cards, including those for internet and USB connections.
No Power
1. Make sure that no short circuits between the system board, add-on cards,
and chassis.
2. Make sure that the ATX power connectors are properly connected.
3. Check that the 115V/230V switch on the power supply, if available, is properly
set.
4. Turn the power switch on and off to test the system, if applicable.
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Super X10OBi Platform User’s Manual
5. The battery on your system board may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on, but you have no video, remove the I/O module, all the add-
on cards and cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A
for details on beep codes.
• If there is no error beep, try to turn on the system without DIMM modules installed
on the CPU card. If there is still no error beep, try to turn on the system again
with only one CPU board on the CPU card Slot1 on the BPN-X10OBi midplane.
If there is still no error beep, replace the system board.
• If there are error beeps, clear the CMOS settings by unplugging the power cord
and contracting both pads on the CMOS Clear Jumper (JBT1) on the X10OBi-
PCH card. (Refer to the PCH card section in Chapter 1.)
2. Remove all components from the system board, and add-on cards, especially
the DIMM modules. Make sure that the system power is on and that memory
error beeps are activated.
3. Turn on the system with only one DIMM module on a X10OBi CPU board,
and with only one CPU board installed in the entire system. If the system
boots, check for bad DIMM modules or slots by following the Memory Errors
Troubleshooting procedure in this chapter.
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Chapter 3: Troubleshooting
2. The battery on your system board may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fix the setup configuration problem, contact your
vendor for repairs.
Memory Errors
When a No_Memory_Beep_Code is issued by the system, check the following:
1. Make sure that the memory modules are compatible with the system and that
the DIMM modules are properly and fully installed. (For memory compatibility,
refer to the Memory Compatibility chart posted on our website at http://www.
supermicro.com.)
3. Make sure that you are using the correct type of memory modules as recom-
mended by Supermicro. Please refer to the memory support section on the CPU
board section in Chapter.
4. Check for bad DIMM modules or slots by swapping a single module among all
memory slots and check the results.
5. Make sure that all memory modules are fully seated in their slots. Follow the
instructions given in the Memory Tables in the CPU card section in Chapter 1.
1. CPU/BIOS support: Check whether your CPU is supported and whether you
have the latest BIOS installed.
2. Memory support: Make sure that the memory modules are supported by test-
ing the modules using memtest86 or a similar utility.
3. HDD support: Check whether all hard disk drives (HDDs) work properly. Replace
the bad HDDs with good ones. (HDDs are installed on the X10OBi-HDD card.)
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Super X10OBi Platform User’s Manual
4. System cooling: Check system cooling to make sure that all heatsink fans, and
CPU/system fans, etc., work properly. Check Hardware Monitoring settings in
the BIOS to make sure that the CPU and system temperatures are within the
normal range. Also, check the front-panel Overheat LED to make sure that the
Overheat LED is not on.
5. Adequate power supply: Make sure that the power supply provides adequate
power to the system and that all power connectors are connected. Please refer
to our website for more information on the minimum power requirement.
6. Proper software support: Make sure that the correct drivers are used.
1. Source of installation: Make sure that the devices used for installation are work-
ing properly, including boot devices such as CDs/DVDs.
2. Cable connection: Check to make sure that all cables are connected and work-
ing properly.
5. Check and change one component at a time instead of changing several items
at the same time. This will help isolate and identify the problem.
6. To find out if a component is good, swap it with a new one to see if the system
works properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the com-
ponent is good and the old system has problems.
3-4
Chapter 3: Troubleshooting
3. If you still cannot resolve the problem, include the following information when
contacting Supermicro for technical support:
• BIOS release date/version (This can be seen on the initial display when your
system first boots up.)
• System configuration
• Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached by
e-mail at [email protected].
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Super X10OBi Platform User’s Manual
3. Using a tool such as a pen or a small screwdriver, push the battery lock out-
wards to unlock it. Once unlocked, the battery will pop out from the holder.
Battery Installation
To install an onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
3. Identify the battery's polarity. The positive (+) side should be facing up.
4. Insert the battery into the battery holder and push it down until you hear a
click to ensure that the battery is securely locked.
Note: When replacing a battery, be sure to only replace it with the same
type.
3-6
Chapter 3: Troubleshooting
Answer: The X10OBi supports 3DS Load Reduced (3DS LRDIMM)/Load Reduced
(LRDIMM)/Registered (RDIMM) ECC DDR4 of up to 1866 MHz. It is strongly recom-
mended that you do not mix memory modules of different types, speeds and sizes.
Please follow all memory installation instructions given in the memory section in
the X10OBi-CPU board section in Chapter 1.
Question: What's on the CD that came with my system motherboard?
Answer: The supplied compact disc has drivers and programs that will greatly
enhance your system performance. We recommend that you review the CD and
install the applications you need. Applications on the CD include chipset drivers
for the Windows OS, security, and audio drivers.
Question: How do I handle the used battery (on the X10OBi-PCH card)?
Answer: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment.
Do not discard a used battery in the garbage or a public landfill. Please comply
with the regulations set up by your local hazardous waste management agency to
dispose of your used battery properly.
Question: How do I update my BIOS (on the X10OBi-PCH card)? under DOS?
It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS files are located on our website
at http://www.supermicro.com. Please check our BIOS warning message and the
information on how to update your BIOS on our website. Select your motherboard
model and download the BIOS file to your computer. Also, check the current BIOS
revision to make sure that it is newer than your BIOS before downloading. You
can choose from the zip file or the .exe file. If you choose the zip BIOS file, please
unzip the BIOS file onto a bootable USB device. Run the batch file using the format
AMI.bat filename.rom from your bootable USB device to flash the BIOS. Then, your
system will automatically reboot.
Warning: Do not shut down or reset the system while updating BIOS to prevent pos-
sible system boot failure.)
Note: The SPI BIOS chip used in this system board cannot be removed.
Send your system board back to our RMA Department at Supermicro
for repair. For BIOS Recovery instructions, please refer to the AMI BIOS
Recovery Instructions posted at http://www.supermicro.com.
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Super X10OBi Platform User’s Manual
Note: We do not recommend that you update your BIOS if you are not
experiencing a BIOS-related problem. If you need to update your BIOS,
please follow the steps below to properly update your BIOS under UEFI
Shell.
2. Extract the files from the UEFI folder of the BIOS package to a USB stick.
3. Insert the USB stick into a USB port, boot to the UEFI Built-In Shell, and type
the following commands to start the BIOS update:
Shell> fs0:
fs0:\> cd UEFI
fs0:\UEFI> flash.nsh BIOSname#.###
4. The FLASH.NSH script will compare the Flash Descriptor Table (FDT) code in
the new BIOS with the existing one in the motherboard:
• You can also press <Y> to force an immediate system reboot to shorten the
process. During system reboot, press the <F11> key to invoke the boot menu
and boot into the build-in UEFI Shell. Your BIOS will be updated automatically.
Warning: Do not shut down or reset the system while updating the BIOS to prevent
possible system boot failure!)
5. Perform an A/C power cycle after the message indicating the BIOS update
has completed.
3-8
Chapter 3: Troubleshooting
3-9
Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS setup utility for the X10OBi Platform. It also
provides the instructions on how to navigate the AMI BIOS setup utility screens.
The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated.
Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be configured. Grayed-out options cannot be configured. Options in blue can be
configured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for informational text. When an option is selected in
the left frame, it is highlighted in white. Often informational text will accompany it.
Note: The AMI BIOS has default informational messages built in. The
manufacturer retains the option to include, omit, or change any of these
informational messages.
The AMI BIOS setup utility uses a key-based navigation system called "hot keys."
Most of the AMI BIOS setup utility "hot keys" can be used at any time during setup
navigation. These keys include <F3>, <F4>, <Enter>, <ESC>, arrow keys, etc.
Note 1: Options printed in Bold are default settings.
Note 2: <F3> is used to load optimal default settings. <F4> is used to save
the settings and exit the setup utility.
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Super X10OBi Platform User’s Manual
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event
shall the manufacturer be liable for direct, indirect, special, incidental, or consequential
damage arising from a BIOS update. If you have to update the BIOS, do not shut down
or reset the system, while the BIOS is being updated to avoid possible boot failure.
4-2
Chapter 4: AMI BIOS
Supermicro X10OBi
BIOS Version: This item displays the version of the BIOS ROM used in the
system.
Build Date: This item displays the date when the version of the BIOS ROM used
in the system was built.
CPLD Version: This item displays the version of CPLD (Complex Programmable
Logic Device) firmware used in the system.
Memory Information
Total Memory: This item displays the total size of memory available in the system.
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Super X10OBi Platform User’s Manual
Boot Features
Boot Configuration
Quiet Boot
Use this item to select bootup screen display between POST messages and the
OEM logo. Select Disabled to display the POST messages. Select Enabled to
display the OEM logo instead of the normal POST messages. The options are
Disabled and Enabled.
Bootup Num-Lock
Use this item to set the power-on state for the Numlock key. The options are On
and Off.
4-4
Chapter 4: AMI BIOS
Re-try Boot
If this item is set to Enabled, the system BIOS will continuously try to boot from
the selected boot drive. The options are Disabled, Legacy Boot, and EFI Boot.
Power Configuration
CPU Configuration
This submenu displays the following CPU information as detected by the BIOS. It
also allows the user to configure CPU settings.
Processor 1 - Processor 8
This submenu displays the following information of the CPU specified by you.
• Processor Socket
• Processor ID
• Processor Frequency
• Microcode Revision
• L1 Cache RAM
• L2 Cache RAM
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Super X10OBi Platform User’s Manual
• L3 Cache RAM
Hyper-Threading
Select Enable to support Intel's Hyper-threading Technology to enhance CPU per-
formance. The options are Disable and Enable.
Cores Enabled
Use this item to set the number of CPU cores to be enabled in your system. Enter
"0" to enable all cores. There are 10 cores available in the system. The default
setting is 0.
Performance/Watt
Select Power Optimized to enable Intel® Turbo Boost Technology support when
the Power Performance State P0 has lasted more than two seconds. The options
are Traditional and Power Optimized.
Execute-Disable Bit (Available if supported by the OS & the CPU)
Select Enable for Execute Disable Bit Technology support, which will allow the
processor to designate areas in the system memory where an application code
can execute and where it cannot, thus preventing a worm or a virus from flooding
illegal codes to overwhelm the processor or damage the system during an attack.
The options are Disable and Enable. (Refer to Intel and Microsoft websites for
more information.)
DCU IP Prefetcher
If set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch IP
addresses to improve network connectivity and system performance. The options
are Enable and Disable.
DCU Mode
Use this item to set the data-prefecting mode for the DCU (Data Cache Unit). The
options are 32KB 8Way Without ECC and 16KB 4Way With ECC.
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AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-
tions (NI) to ensure data security. The options are Enable and Disable.
Power Technology
Select Energy Efficient to support power-saving mode. Select Custom to cus-
tomize system power settings. Select Max Performance to optimize system
performance. Select Disabled to disable power-saving settings. The options
are Disable, Energy Efficient, and Custom. If the option is set to Custom, the
following items will display:
Turbo Mode
Select Enable to use the Turbo Mode to boost system performance. The options
are Disable and Enable.
P-state Coordination
Use this item to change the P-state (Power-Performance State) coordination
type. P-state is also known as "SpeedStep" for Intel processors. Select HW_ALL
to change the P-state coordination type for hardware components only. Select
SW_ALL to change the P-state coordination type for all software installed in the
system. Select SW_ANY to change the P-state coordination type for a software
program in the system. The options are HW_All, SW_ALL, and SW_ANY.
PL2_SAFETY_NET_ENABLE
Select Enable to enable PL2_SAFETY_NET-ENABLE support to boost system
performance. The options are Disable and Enable.
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Chapter 4: AMI BIOS
CPU C3 Report
Select Enable to allow the BIOS to report the CPU C3 state (ACPI C2) to the
operating system. During the CPU C3 state, the CPU clock generator is turned
off. The options are Disable and Enable.
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Workload Configuration
Use this item to set the power management setting optimized for regular work-
load condition. The options are Balanced [recommended] and I/O sensitive.
Chipset Configuration
North Bridge
This feature is used to configure Intel North Bridge settings.
Integrated IO Configuration
EV DFX (Device Function On-Hide) Features
When this item is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are Dis-
able and Enable.
Use the items below to configure the PCI-E settings for a PCI-E port specified
by the user.
The following items will display:
• PCI-E Port Link Status
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Chapter 4: AMI BIOS
Link Speed
Use this item to select the PCI-E link speed for the PCI-E port specified by the
user. The options for CPU-PCH DMI port are Auto, GEN1 (2.5 GT/s), and GEN2
(5 GT/s). The options for Onboard LAN are Auto, GEN1 (2.5 GT/s), GEN2 (5
GT/s), and GEN3 (8 GT/s). The options for CPU1 Slot1 X8 are Auto, GEN1
(2.5 GT/s), GEN2 (5 GT/s), and GEN3 (8 GT/s). CPU1 Slot2 X16 port are Auto,
GEN1 (2.5 GT/s), GEN2 (5 GT/s), .and GEN3 (8 GT/s). (Note: the option of
GEN3 (8 GT/s) is available on the IIO4 Configuration/IIO5 Configuration/IIO6
Configuration /IIO7 Configuration only.)
Use the items below to configure the PCI-E settings for a PCI-E port specified
by the user.
The following items will display:
• PCI-E Port Link Status
Link Speed
Use this item to select the PCI-E link speed for the PCI-E port specified by the
user. The options for CPU-PCH DMI port are Auto, GEN1 (2.5 GT/s), and GEN2
(5 GT/s). The options for Onboard LAN are Auto, GEN1 (2.5 GT/s), GEN2 (5
GT/s), and GEN3 (8 GT/s). The options for CPU1 Slot1 X8 are Auto, GEN1
(2.5 GT/s), GEN2 (5 GT/s), and GEN3 (8 GT/s). CPU1 Slot2 X16 port are Auto,
GEN1 (2.5 GT/s), GEN2 (5 GT/s), and GEN3 (8 GT/s).
IOAT Configuration
Enable IOAT
Select Enable to enable Intel I/OAT (I/O Acceleration Technology), which will
significantly reduce CPU overhead by leveraging CPU architectural features to
free the system resource up for other tasks. The options are Disable and Enable.
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No Snoop
Select Enable to support no-snoop mode for each CB device. The options are
Disable and Enable.
Disable TPH
Select Enable to de-activate TLP Processing Hint support. The options are En-
able and Disable.
Interrupt Remapping
Select Enable to support Interrupt Remapping to enhance system performance.
The options are Enable and Disable.
QPI Status
The following information will display:
• Number of CPU
• Number of IIO
• Link Speed
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Chapter 4: AMI BIOS
Link L1 Enable
Select Enable for Link L1 support. The options are Disable and Enable.
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Super X10OBi Platform User’s Manual
Memory Configuration
This section displays the following Integrated Memory Controller (IMC) informa-
tion.
DDR Speed
Use this feature to force a DDR3/DDR4 memory module to run at a frequency
other than what is specified in the specification. The default setting is Auto.
Data Scrambling
Select Enabled to enable data scrambling to enhance system performance and
data integrity. The options are Disabled and Enabled.
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Chapter 4: AMI BIOS
Memory Topology
This item displays the status of each DIMM module as detected by the BIOS.
• Memory Buffer Controller
• Memory Channel
• DIMM Frequency
• Mirroring
• Sparing
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Super X10OBi Platform User’s Manual
Memory Interleaving
Use this item to set the DIMM memory interleaving mood. The options are NUMA
(1-way) Node Interleave; 2-way Node Interleave; 4-way Node Interleave; 8 Way
Interleaving, inter-socket; and Auto.
Channel Interleaving
Use this item to set the DIMM channel interleaving mood. The options are Auto,
1-way Interleave, 2-way Interleave, 3-way Interleave, and 4-way Interleave.
Rank Interleaving
Use this item to select a rank memory interleaving method. Auto, 1-way Interleave,
2-way Interleave, 4-way Interleave, and 8-way Interleave.
Demand Scrub
Demand Scrubbing is a process that allows the CPU to correct correctable memory
errors found on a memory module. When the CPU or I/O issues a demand-read
command, and the read data from memory turns out to be a correctable error, the
error is corrected and sent to the requestor (the original source). Memory is updated
as well. Select Enable to use Demand Scrubbing for ECC memory correction. The
options are Enable and Disable.
Device Tagging
Select Enable to support device tagging. The options are Disable and Enable.
A7 Mode
Select Enabled to support A7 (Addressing) Mode to improve memory performance.
The options are Disable and Enable.
DDDC Support
Select Enable to enable Double-Device Data Correction (DDDC) support which
will allow the error-correction codes to correct memory errors caused by two failed
DRAM devices. The options are Disable and Enable.
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Chapter 4: AMI BIOS
South Bridge
This feature is used to configure Intel South Bridge settings.
USB Configuration
The following USB items will display.
• USB Module Version
• USB Devices
EHCI Hand-Off
This item is for operating systems that do not support Enhanced Host Controller
Interface (EHCI) hand-off. When this item is enabled, EHCI ownership change will
be claimed by the EHCI driver. The settings are Disabled and Enabled.
SATA Configuration
When this submenu is selected, the AMI BIOS automatically detects the presence
of SATA devices and displays the following items:
SATA Controller
This item enables or disables the built-in SATA controllers on the motherboard. The
options are Disabled and Enabled.
Configure SATA as
Use this item to configure the SATA mode for a devices installed in the SATA port
specified by the user. The options are IDE, AHCI, and RAID.
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SATA Port 0/SATA Port 1/SATA Port 2/SATA Port 3/SATA Port 4/SATA Port 5
This section allows the user to configure the following settings for the SATA port
specified by the user.
SATA RAID Option ROM/UEFI Driver (Available when "Configure SATA as"
is set to RAID)
Use this item to define the RAID settings for the system. The options are Legacy,
EFI, and Disabled.
SATA Port 0/SATA Port 1/SATA Port 2/SATA Port 3/SATA Port 4/ SATA
Port 5
Select Enabled to enable the SATA port specified by the user. The options are
Enabled and Disabled.
Software Preserve
Hot Plug (Available when "Configure SATA as" is set to RAID or AHCI)
Select Enabled to support Hot-plugging for the selected SATA port which will al-
low the user to replace a device without shutting down the system. The options
are Disabled and Enabled.
PCIe/PCI/PnP Configuration
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Chapter 4: AMI BIOS
Maximum Payload
Select Auto to allow the system BIOS to automatically set the maximum payload
value for a PCI-E device to enhance system performance. The options are Auto,
128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes
ASPM Support
Use this item to set the Active State Power Management (ASPM) level for a PCI-E
device. Select Force L0s to force all PCI-E links to operate at L0s state. Select Auto
to allow the system BIOS to automatically set the ASPM level for the system. Select
Disabled to disable ASPM support. The options are Disabled and Auto.
Warning: Enabling ASPM support may cause some PCI-E devices to fail!
MMIOHBase
Use this item to select the base memory size according to memory-address map-
ping for the PCH. The base memory size must be between 4032G to 4078G. The
options are 56T, 40T, 24T, 3584G, 2T, 512G, and 256G.
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VGA Priority
Use this item to select the graphics adapter to be used as the primary boot device.
The options are Auto, Onboard, and Offboard.
Network Stack
Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Uni-
fied Extensible Firmware Interface) for network stack support. The options are
Enabled and Disabled.
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Chapter 4: AMI BIOS
ACPI Settings
WHEA Support
Select Enabled to support the Windows Hardware Error Architecture (WHEA) plat-
form and provide a common infrastructure for the system to handle hardware errors
within the Windows OS environment to reduce system crashes and to enhance
system recovery and health monitoring. The options are Enabled and Disabled.
Configuration
Pending Operation
Use this item to schedule an operation for the security device. The options are None,
Enable Take Ownership, Disable Take Ownership, and TPM Clear.
Note: The computer will reboot in order to execute the pending commands
and change the state of the security device.
Current Status Information: This item displays the information regarding the
current TPM status.
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TXT Support
Select Enabled for Intel TXT technology support to improve network security. The
options are Enabled and Disabled.
• General ME Configuration
• ME Firmware Features
• ME Firmware Status #1
• ME Firmware Status #2
• Current State
• Error Code
Super IO Configuration
Super IO Chip: This item displays the Super IO chip used in the motherboard.
Serial Port
Select Enabled to enable a serial port specified by the user. The options are En-
abled and Disabled.
Device Settings
This item displays the settings of Serial Port 1 (COM).
Change Settings
This option specifies the base I/O port address and the Interrupt Request address
of Serial Port 1 (COM). Select Disabled to prevent the serial port from accessing
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Chapter 4: AMI BIOS
any system resources. When this option is set to Disabled, the serial port becomes
unavailable. The options are Auto, IO=3F8h; IRQ=4; IO=3F8h; IRQ=3, 4, 5, 6, 7,
10, 11, 12; IO=2F8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 10,
11, 12; IO=2E8h; IRQ=IRQ=3, 4, 5, 6, 7, 10, 11, 12.
Serial Port
Select Enabled to enable a serial port specified by the user. The options are En-
abled and Disabled.
Device Settings
This item displays the settings of Serial Port 2.
Change Settings
This option specifies the base I/O port address and the Interrupt Request address
of Serial Port 2 (SOL). Select Disabled to prevent the serial port from accessing
any system resources. When this option is set to Disabled, the serial port becomes
unavailable. The options are Auto, O=2F8h; IRQ=3; IO=3F8h; IRQ=3, 4, 5, 6, 7,
10, 11, 12; IO=2F8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 10,
11, 12; IO=2E8h; IRQ=IRQ=3, 4, 5, 6, 7, 10, 11, 12.
Console Redirection
Select Enabled for Console Redirection support. The options are Enabled and
Disabled.
*If the item above set to Enabled, the following items will become available for
configuration:
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Super X10OBi Platform User’s Manual
Data Bits
Use this item to set the data transmission size for Console Redirection. The
options are 7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission
errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits
is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits
is odd. Select None if you do not want to send a parity bit with your data bits
in transmission. Select Mark to add a mark as a parity bit to be sent along with
the data bits. Select Space to add a Space as a parity bit to be sent with your
data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard
serial data communication. Select 2 Stop Bits if slower devices are used. The
options are 1 and 2.
Flow Control
Use this item to set the flow control for Console Redirection to prevent data
loss caused by buffer overflow. Send a "Stop" signal to stop sending data when
the receiving buffer is full. Send a "Start" signal to start sending data when the
receiving buffer is empty. The options are None and Hardware RTS/CTS.
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Chapter 4: AMI BIOS
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text
messages to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Dis-
abled and Enabled.
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a
terminal emulator designed for the Windows OS. The options are VT100, LINUX,
XTERMR6, SCO, ESCN, and VT400.
Console Redirection
Select Enabled to use the SOL Port for Console Redirection. The options are
Enabled and Disabled.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirec-
tion. Select VT100 to use the ASCII Character set. Select VT100+ to add color
and function key support. Select ANSI to use the Extended ASCII Character Set.
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Super X10OBi Platform User’s Manual
Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or
more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.
Data Bits
Use this item to set the data transmission size for Console Redirection. The
options are 7 Bits and 8 Bits.
Parity
A parity bit can be sent along with regular data bits to detect data transmission
errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits
is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits
is odd. Select None if you do not want to send a parity bit with your data bits
in transmission. Select Mark to add a mark as a parity bit to be sent along with
the data bits. Select Space to add a Space as a parity bit to be sent with your
data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard
serial data communication. Select 2 Stop Bits if slower devices are used. The
options are 1 and 2.
Flow Control
Use this item to set the flow control for Console Redirection to prevent data loss
caused by buffer overflowing. Send a "Stop" signal to stop sending data when
the receiving buffer is full. Send a "Start" signal to start sending data when the
receiving buffer is empty. The options are None and Hardware RTS/CTS.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text
messages to a remote server. The options are Disabled and Enabled.
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Chapter 4: AMI BIOS
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Dis-
abled and Enabled.
Putty KeyPad
Use this item to select Function Keys and KeyPad settings for Putty, which is a
terminal emulator designed for the Windows OS. The options are VT100, LINUX,
XTERMR6, SCO, ESCN, and VT400.
Terminal Type
Use this item to select the target terminal emulation type for Console Redirec-
tion. Select VT100 to use the ASCII character set. Select VT100+ to add color
and function key support. Select ANSI to use the extended ASCII character set.
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Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or
more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.
Flow Control
Use this item to set the flow control for Console Redirection to prevent data
loss caused by buffer overflowing. Send a "Stop" signal to stop sending data
when the receiving buffer is full. Send a "Start" signal to start sending data when
the receiving buffer is empty. The options are None, Hardware RTS/CTS, and
Software Xon/Xoff.
The setting for each these features is displayed:
Data Bits, Parity, Stop Bits
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Chapter 4: AMI BIOS
Enabling/Disabling Options
Erasing Settings
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Chapter 4: AMI BIOS
4-5 IPMI
Select the IPMI (Intelligent Platform Management Interface) tab to access the fol-
lowing submenu items.
These items indicates your system IPMI firmware revision number and status.
• IPMI Firmware Revision
• Status of IPMI
Enabling/Disabling Options
SEL Components
Select Enabled to enable all system event logging support at bootup. The options
are Enabled and Disabled.
Erasing Settings
Erase SEL
Select Yes, On next reset to erase all system event logs upon next system reboot.
Select Yes, On every reset to erase all system event logs upon every system reboot.
Select No to keep all system event logs after each system reboot. The options are
No, Yes, On next reset, and Yes, On every reset.
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Station IP Address
This item displays the Station IP address for this computer. This should be in decimal
and in dotted quad form (i.e., 192.168.10.253).
Subnet Mask
This item displays the sub-network that this computer belongs to. The value of each
three-digit number separated by dots should not exceed 255.
Router IP Address
This item displays the router IP address for this computer. This should be in decimal
and in dotted quad form (i.e., 192.168.10.253).
VLAN
Select Enable for VLAN support. The default setting is Disable.
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4-6 Security
This menu allows the user to configure the following security settings for the
system.
Administrator Password
Use this item to set the administrator password which is required to enter the
BIOS setup utility. The length of the password should be from 3 characters to 20
characters long.
User Password
Use this item to set a user password which is required to log into the system
and to enter the BIOS setup utility. The length of the password should be from 3
characters to 20 characters long.
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4-7 Boot
This submenu allows the user to configure the following boot settings for the
system.
Use this item to select a boot device to delete from the boot priority list.
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Chapter 4: AMI BIOS
Use this item to select a bootable drive to delete from the boot priority list.
• Boot Order #1
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Save Changes
Select this option and press <Enter> to save all changes you've made so far and
return to the AMI BIOS utility. When the dialog box appears, asking you if you want
to save configuration, select Yes to save the changes, or select No to return to the
BIOS without making changes.
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Chapter 4: AMI BIOS
Discard Changes
Select this feature and press <Enter> to discard all the changes and return to the
BIOS setup. When the dialog box appears, asking you if you want to load previ-
ous values, select Yes to load the values previous saved, or select No to keep the
changes you've made so far.
Default Options
Restore Defaults
Select this feature and press <Enter> to load the optimized default settings that
help optimize system performance. When the dialog box appears, asking you if you
want to load optimized defaults, select Yes to load the optimized default settings,
or select No to abandon optimized defaults.
Boot Override
This feature allows the user to override the Boot Option Priority sequence set in
the Boot menu, and boot the system with one of the listed devices instead. This is
a one-time override.
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Appendix A: BIOS POST Error Codes
Appendix A
During the POST (Power-On Self-Test) routines, which are performed each time
the system is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to continue
the bootup process. The error messages normally appear on the screen.
Fatal errors will not allow the system to continue to bootup. If a fatal error oc-
curs, you should consult with your system manufacturer for possible repairs.
These fatal errors are usually communicated through a series of audible beeps.
The numbers on the fatal error list correspond to the number of beeps for the
corresponding error.
5 short beeps + 1 long beep Memory error No memory detected in the system
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Appendix B: Software Installation Instructions
Appendix B
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Super X10OBi Platform User’s Manual
Note 2: When making a storage driver diskette by booting into a driver CD,
please set the SATA configuration to Compatible Mode, and configure the
SATA as IDE in the BIOS setup. After making the driver diskette, be sure
to change the SATA settings back to your original settings.
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Appendix B: Software Installation Instructions
B-3
Appendix C: UEFI BIOS Recovery
Appendix C
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall
Supermicro be liable for direct, indirect, special, incidental, or consequential damages
arising from a BIOS update. If you need to update the BIOS, do not shut down or reset
the system while the BIOS is updating to avoid possible boot failure.
Note: Follow the BIOS recovery instructions below for BIOS recovery
when the main BIOS boot crashes. However, when the BIOS boot block
crashes, you will need to follow the procedures below for BIOS recovery.
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The file system supported by UEFI is FAT (including FAT12, FAT16, and FAT32)
installed on a bootable or non-bootable USB-attached device. However, the BIOS
might need several minutes to locate the SUPER.ROM file if the media size be-
comes too large because it contains too many folders and files.
To perform UEFI BIOS recovery using a USB-attached device, follow the instruc-
tions below.
1. Using a different machine, copy the "Super.ROM" binary image file into the
disc Root "\" Directory of a USB device or a writeable CD/DVD.
Note: If you cannot locate the "Super.ROM" file in your driver disk, visit
our website at www.supermicro.com to download the BIOS image into
a USB flash device and rename it "Super.ROM" for BIOS recovery use.
2. Insert the USB device that contains the new BIOS image ("Super.ROM") into
your USB drive and power on the system
3. While powering on the system, please keep pressing <Ctrl> and <Home> si-
multaneously on your keyboard until the following screen (or a screen similar
to the one below) displays.
Warning!! Please stop pressing the <Ctrl> and <Home> keys immediately when you
see the screen (or a similar screen) below; otherwise, it will trigger a system reboot.
Note: On the other hand, if the following screen displays, please load the
"Super.ROM" file to the root folder and connect this folder to the system.
(You can do so by inserting a USB device that contains the new "Super.
ROM" image to your machine for BIOS recovery.)
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Appendix C: UEFI BIOS Recovery
4. After locating the new BIOS binary image, the system will enter the BIOS
Recovery menu as shown below.
Note: At this point, you may decide if you want to start with BIOS recovery.
If you decide to proceed with BIOS recovery, follow the procedures below.
5. When the screen as shown above displays, using the arrow key, select the
item "Proceed with flash update" and press the <Enter> key. You will see the
progress of BIOS recovery as shown in the screen below.
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6. After the process of BIOS recovery is completed, press any key to reboot the
system.
7. Using a different system, extract the BIOS package into a bootable USB flash
drive.
9. After seeing the message that BIOS update is completed, unplug the AC
power cable from the power supply to clear the CMOS, and then plug the AC
power cable in the power supply again to power on the system.
12. After loading default settings, press <F4> to save the settings and exit the
BIOS Setup utility.
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