AZ2115-05C

Transient Voltage Suppressing Array

For ESD/Transient Protection

Features immunity requirements of IEC 61000-4-2, Level 4

(±15kV air, ±8kV contact discharge).

ESD Protect for 5 Lines with Unidirectional.

Provide Transient protection for each line
directly to Circuit Diagram
IEC 61000-4-2 (ESD) ±16kV (air), ±10kV (contact)
IEC 61000-4-4 (EFT) 35A (5/50ns)
IEC 61000-4-5 (Lightning) 3.5~6A (8/20µs)
1 3 4 5 6

For low operating voltage applications: 5V,
4.2V, 3.3V, and 2.5V etc.

Fast turn-on and Low clamping voltage

Array of surge rated equivalent TVS diodes

Small package saves board space

Solid-state silicon-avalanche and active circuit
triggering technology

Green part available

Applications

Cellular Handsets and Accessories 2

Small Panel Modules

PDA’s

Portable Devices

Digital Cameras

Touch Panels
Pin Configuration

Notebooks and Handhelds

MP3 Players

Peripherals
6 5 4
Description
AZ2115-05C is a design which includes surge
rated clamping cell arrays to protect the power
lines or data/control lines in an electronic
systems. The AZ2115-05C has been specifically
designed to protect sensitive components which
are connected to power and control lines from
over-voltage caused by Electrostatic Discharging
(ESD), Electrical Fast Transients (EFT), and 1 2 3
Lightning.
AZ2115-05C is a unique design which includes
proprietary clamping cells in a single package.
SC70-6L (Top View)
During transient conditions, the proprietary
clamping cells prevent over-voltage on the power (SOT363)
lines or control lines, protecting any downstream
components.
AZ2115-05C may be used to meet the ESD

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 AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

PARAMETER PARAMETER RATING UNITS
Peak Pulse Current (tp =8/20us) IPP 6 (pin-1, 3,4,6) A
3.5 (pin-5)
Operating Supply Voltage (pin-1,-3, -4, -5, -6 to pin-2) VDC 6 V
pin-1,-3, -4, -5, -6 to pin-2 ESD per IEC 61000-4-2 (Air) VESD-1 16 kV
pin-1,-3, -4, -5, -6 to pin-2 ESD per IEC 61000-4-2 (Contact) 10
o
Lead Soldering Temperature TSOL 260 (10 sec.) C
o
Operating Temperature TOP -55 to +85 C
o
Storage Temperature TSTO -55 to +150 C

ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS MINI TYP MAX UNITS
Reverse Stand-Off
VRWM pin-1,-3, -4, -5, -6 to pin-2, T=25 oC. 5 V
Voltage
Reverse Leakage VRWM = 5V, T=25 oC, pin-1,-3, -4, -5, -6 to
ILeak 2.5 µA
Current pin-2.
Reverse IBV = 1mA, T=25 oC, pin-1,-3, -4, -5, -6 to
VBV 6 9 V
Breakdown Voltage pin-2
IF = 15mA, T=25 oC, pin-2 to pin-1,-3, -4, -5,
Forward Voltage VF 0.6 0.85 1 V
-6
IPP=5A, tp=8/20us, T=25 oC, pin-1, -3, -4, -6
6.8
Surge Clamping to pin-2.
VCL-surge V
Voltage IPP=3.5A, tp=8/20us, T=25 oC, pin-5 to
6.2
pin-2.
ESD Clamping IEC 61000-4-2 +6kV, T=25 oC,
Vclamp 7.8 V
Voltage Contact mode, pin-1,-3, -4, -5, -6 to pin-2.
ESD Dynamic
IEC 61000-4-2 0~+6kV, T=25 oC,
Turn-on Rdynamic 0.15 Ω
Contact mode, pin-1,-3, -4, -5, -6 to pin-2.
Resistance
VR= 0V, f = 1MHz, T=25 oC, pin-1,-3, -4, -6
Channel Input 13 15
CIN to pin-2. pF
Capacitance
VR= 0V, f = 1MHz, T=25 oC, pin-5 to pin-2. 15 17

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 AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection

Typical Characteristics
Typical Variation of CIN vs. VIN
16
15
14
13

Input Capacitance (pF)

12
11 pin-5
10
9
8
7 pin-1, -3, -4, -6
6
5
4
3 f = 1MHz, T=25 oC,
2
1
0
0 1 2 3 4 5
Input Voltage (V)

Transmission Line Pulsing (TLP) Measurement Clamping Voltage vs. Peak Pulse Current
Transmission Line Pulsing (TLP) Current (A)

18 12
16 11
10
14
Clamping Voltage (V)

V_pulse 9
12 Pulse from a
transmission line
8
TLP_I 7
10 100ns +

TLP_V DUT 6
8 -
5
6 4
Waveform
3 Parameters:
4 I/O pin to GND pin
I/O to GND 2 µs
tr=8µ
2 td=20µµs
1
0 0
0 2 4 6 8 3.0 3.5 4.0 4.5 5.0 5.5 6.0

Transmission Line Pulsing (TLP) Voltage (V) Peak pulse Current (A)

Forward Clamping Voltage vs. Peak Pulse Current

5
Forward Clamping Voltage (V)

Waveform
I/O pin to GND pin Parameters:
1
µs
tr=8µ
td=20µµs

0
4.5 5.0 5.5 6.0 6.5 7.0
Peak pulse Current (A)

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 AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection

Applications Information In order to obtain enough suppression of ESD

induced transient, good circuit board is critical.
The AZ2115-05C is designed to protect five lines Thus, the following guidelines are recommended:
against System ESD/EFT/Lightning pulses by
Minimize the path length between the
clamping them to an acceptable reference. protected lines and the AZ2115-05C.

Place the AZ2115-05C near the input
The usage of the AZ2115-05C is shown in Fig. 1. terminals or connectors to restrict transient
Protected lines, such as data lines, control lines, coupling.
or power lines, are connected at pin 1, 3, 4, 5 and
The ESD current return path to ground
6. The pin 2 should be connected directly to a should be kept as short as possible.
ground plane on the board. All path lengths
Use ground planes whenever possible.
connected to the pins of AZ2115-05C should be
NEVER route critical signals near board
kept as short as possible to minimize parasitic edges and near the lines which the ESD
inductance in the board traces. transient easily injects to.
Fig. 2 shows an example of PCB layout with the
AZ2115-05C.
I/O 1

IC to be protected
I/O 2
Connector

I/O 3

I/O 4

I/O 5

GND
6 5 4

1 2 3

Fig. 1
To the protected IC

6 5 4
To Connector

1 2 3

Fig. 2

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 AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection

Mechanical Details

SC70-6L
PACKAGE DIAGRAMS PACKAGE DIMENSIONS
TOP VIEW Millimeters Inches
Symbol
min max min max
A 0.90 1.10 0.036 0.044
A1 0.00 0.10 0.000 0.004
A2 0.875 1.00 0.035 0.040
b 0.15 0.40 0.006 0.016
C 0.08 0.15 0.003 0.006
D 1.90 2.20 0.076 0.087
E 1.15 1.35 0.046 0.054
E1 2.00 2.45 0.080 0.096
e 0.65 BSC 0.026 BSC
e1 1.30 BSC 0.052 BSC
L 0.475 REF 0.019 REF
L1 0.300 REF 0.012 REF
SIDE VIEW
L2 0.200 REF 0.007 REF
θ 0∘ 8∘ 0∘ 8∘

Note:
1. All dimensions are in millimeters, and the
dimensions in inches are for reference only.
2. 1mm = 40 mils = 0.04 inches.

END VIEW

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 AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection

LAND LAYOUT

Dimensions
Index Millimeter Inches
A 0.40 0.016
B 0.85 0.033
C 0.65 0.026
D 1.85 0.073
E 1.00 0.039
F 2.70 0.106

Notes:
This LAND LAYOUT is for reference
purposes only. Please consult your
manufacturing partners to ensure your
company’s PCB design guidelines are met.

MARKING CODE
6 5 4
Part Number Marking Code

214XY AZ2115-05C 214XY

AZ2115-05C
1 2 3
(Green part)
224XY

214 = Device Code

X = Date Code
Y = Control Code

Ordering Information
PN# Material Type Reel size MOQ/interal box MOQ/carton
AZ2115-05C.R7G Green T/R 7 inch 4 reel=12,000/box 6 box=72,000/carton

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 AZ2115-05C
Transient Voltage Suppressing Array
For ESD/Transient Protection

Revision History

Revision Modification Description

Revision 2008/03/28 Original Formal Release.
Revision 2008/09/29 Add the marking code for Green part.
Revision 2008/12/26 Update the PACKAGE DIMENSIONS.
Revision 2011/03/02 Update the package drawing of END VIEW.
1. Update the Company Logo.
Revision 2011/06/18
2. Add the Ordering Information.

Revision 2011/06/18 ©2011 Amazing Micro. 7 www.amazingIC.com