INTEGRATED CIRCUITS

DATA SHEET

74HC4066; 74HCT4066
Quad bilateral switches
Product specification 2004 Nov 11
Supersedes data of 2003 Jun 17
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

FEATURES GENERAL DESCRIPTION

• Very low ON-resistance: The 74HC4066 and 74HCT4066 are high-speed Si-gate
– 50 Ω (typical) at VCC = 4.5 V CMOS devices and are pin compatible with the
HEF4066B. They are specified in compliance with JEDEC
– 45 Ω (typical) at VCC = 6.0 V standard no. 7A.
– 35 Ω (typical) at VCC = 9.0 V.
The 74HC4066 and 74HCT4066 have four independent
• Complies with JEDEC standard no. 7A analog switches. Each switch has two input/output pins
• ESD protection: (pins nY or nZ) and an active HIGH enable input pin
HBM EIA/JESD22-A114-B exceeds 2000 V (pin nE). When pin nE = LOW the belonging analog switch
is turned off.
MM EIA/JESD22-A115-A exceeds 200 V.
The 74HC4066 and 74HCT4066 are pin compatible with
• Specified from −40 °C to +85 °C and −40 °C to +125 °C.
the 74HC4016 and 74HCT4016 but exhibit a much lower
on-resistance. In addition, the on-resistance is relatively
constant over the full input signal range.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.

TYPICAL
SYMBOL PARAMETER CONDITIONS UNIT
74HC4066 74HCT4066
tPZH/tPZL turn-on time nE to Vos CL = 15 pF; RL = 1 kΩ; VCC = 5 V 11 12 ns
tPHZ/tPLZ turn-off time nE to Vos CL = 15 pF; RL = 1 kΩ; VCC = 5 V 13 16 ns
CI input capacitance 3.5 3.5 pF
CPD power dissipation notes 1 and 2 11 12 pF
capacitance per switch
CS maximum switch 8 8 pF
capacitance

Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ[(CL + CS) × VCC2 × fo] where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL + CS) × VCC2 × fo] = sum of the outputs.
2. For 74HC4066 the condition is VI = GND to VCC.
For 74HCT4066 the condition is VI = GND to VCC − 1.5 V.

2004 Nov 11 2
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

FUNCTION TABLE
See note 1.
INPUT nE SWITCH
L off
H on

Note
1. H = HIGH voltage level.
L = LOW voltage level.

ORDERING INFORMATION

PACKAGE
TYPE NUMBER
TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE
74HC4066N −40 °C to 125 °C 14 DIP14 plastic SOT27-1
74HCT4066N −40 °C to 125 °C 14 DIP14 plastic SOT27-1
74HC4066D −40 °C to 125 °C 14 SO14 plastic SOT108-1
74HCT4066D −40 °C to 125 °C 14 SO14 plastic SOT108-1
74HC4066DB −40 °C to 125 °C 14 SSOP14 plastic SOT337-1
74HCT4066DB −40 °C to 125 °C 14 SSOP14 plastic SOT337-1
74HC4066PW −40 °C to 125 °C 14 TSSOP14 plastic SOT402-1
74HCT4066PW −40 °C to 125 °C 14 TSSOP14 plastic SOT402-1
74HC4066BQ −40 °C to 125 °C 14 DHVQFN14 plastic SOT762-1
74HCT4066BQ −40 °C to 125 °C 14 DHVQFN14 plastic SOT762-1

PINNING

PIN SYMBOL DESCRIPTION

1 1Y independent input/output
handbook, halfpage
2 1Z independent input/output 1Y 1 14 VCC
3 2Z independent input/output 1Z 2 13 1E
4 2Y independent input/output
2Z 3 12 4E
5 2E enable input (active HIGH)
2Y 4 4066 11 4Y
6 3E enable input (active HIGH)
2E 5 10 4Z
7 GND ground (0 V)
8 3Y independent input/output 3E 6 9 3Z

9 3Z independent input/output GND 7 8 3Y

10 4Z independent input/output MGR253

11 4Y independent input/output
12 4E enable input (active HIGH)
Fig.1 Pin configuration DIP14, SO14 and
13 1E enable input (active HIGH)
(T)SSOP14.
14 VCC supply voltage

2004 Nov 11 3
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

14 VCC

terminal 1
1Y

index area
handbook, halfpage
1

1Z 2 13 1E 1Y 1
13 1E
1Z 2
2Z 3 12 4E

2Y 4 4066 11 4Y 2Y 4
5 2E
2Z 3
2E 5 VCC(1) 10 4Z
3Y 8
3E 6 9 3Z 6 3E
3Z 9
7

8
GND

3Y

4Y 11
001aac116 12 4E
4Z 10
Transparent top view
MGR254

(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.

Fig.2 Pin configuration DHVQFN14. Fig.3 Logic symbol.

handbook, halfpage 1 2
1 1
handbook, halfpage 1 2
13 #
X1
13 #
4 3
4 3 1 1
5 #
5 # X1

8 9
8 9
1 1
6 #
6 #
X1
11 10
11 10
12 # 1 1
12 #
MGR255 X1
MGR256

Fig.4 IEEEC logic symbol.

2004 Nov 11 4
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, halfpage nY

handbook, halfpage13 1 5 4 6 8 12 11
1E 1Y 2E 2Y 3E 3Y 4E 4Y nE

1Z 2Z 3Z 4Z VCC VCC
2 3 9 10
MGR257

GND nZ MGR258

Fig.5 Functional diagram. Fig.6 Schematic diagram (one switch).

2004 Nov 11 5
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

RECOMMENDED OPERATING CONDITIONS

74HC4066 74HCT4066
SYMBOL PARAMETER CONDITIONS UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
VCC supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 V
VI input voltage GND − VCC GND − VCC V
VS switch voltage GND − VCC GND − VCC V
Tamb ambient temperature see DC and AC −40 +25 +85 −40 +25 +85 °C
characteristics −40 − +125 −40 − +125 °C
per device
tr, tf input rise and fall times VCC = 2.0 V − 6.0 1000 − 6.0 500 ns
VCC = 4.5 V − − 500 − − − ns
VCC = 6.0 V − − 400 − − − ns
VCC = 10.0 V − − 250 − − − ns

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +11.0 V
IIK input diode current VI < −0.5 V or VI > VCC + 0.5 V − ±20 mA
ISK switch diode current VS < −0.5 V or VS > VCC + 0.5 V − ±20 mA
IS switch current −0.5 V < VO < VCC + 0.5 V; note 1 − ±25 mA
ICC, IGND VCC or GND current − ±50 mA
Tstg storage temperature −65 +150 °C
Ptot power dissipation Tamb = −40 °C to +125 °C; note 2 − 500 mW
PS power dissipation per switch − 100 mW

Notes
1. To avoid drawing VCC current out of pin nZ, when switch current flows in pin nY, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin nZ, no VCC current will flow out of
pin nY. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nY and nZ may
not exceed VCC or GND.
2. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.
For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.

2004 Nov 11 6
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

DC CHARACTERISTICS
Family 74HC4066
Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an
input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.

TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb = −40 °C to +85 °C; note 1
VIH HIGH-level input 2.0 1.5 1.2 − V
voltage 4.5 3.15 2.4 − V
6.0 4.2 3.2 − V
9.0 6.3 4.7 − V
VIL LOW-level input voltage 2.0 − 0.8 0.50 V
4.5 − 2.1 1.35 V
6.0 − 2.8 1.80 V
9.0 − 4.3 2.70 V
ILI input leakage current VI = VCC or GND 6.0 − − ±1.0 µA
10.0 − − ±2.0 µA
IS(OFF) analog switch current per channel; VI = VIH or VIL; 10.0 − − ±1.0 µA
OFF-state VS = VCC − GND; see Fig.7
IS(ON) analog switch current VI = VIH or VIL; VS = VCC − GND; 10.0 − − ±1.0 µA
ON-state see Fig.8
ICC quiescent supply VI = VCC or GND; Vis = GND or VCC; 6.0 − − 20.0 µA
current Vos = VCC or GND 10.0 − − 40.0 µA

2004 Nov 11 7
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb = −40 °C to +125 °C
VIH HIGH-level input 2.0 1.5 − − V
voltage 4.5 3.15 − − V
6.0 4.2 − − V
9.0 6.3 − − V
VIL LOW-level input voltage 2.0 − − 0.50 V
4.5 − − 1.35 V
6.0 − − 1.80 V
9.0 − − 2.70 V
ILI input leakage current VI = VCC or GND 6.0 − − ±1.0 µA
10.0 − − ±2.0 µA
IS(OFF) analog switch current per channel; VI = VIH or VIL; 10.0 − − ±1.0 µA
OFF-state VS = VCC − GND; see Fig.7
IS(ON) analog switch current VI = VIH or VIL; VS = VCC − GND; see 10.0 − − ±1.0 µA
ON-state Fig.8
ICC quiescent supply VI = VCC or GND; Vis = GND or VCC; 6.0 − − 40.0 µA
current Vos = VCC or GND 10.0 − − 80.0 µA
Note
1. All typical values are measured at Tamb = 25 °C.

2004 Nov 11 8
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

Family 74HCT4066
Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an
input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.

TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb = −40 °C to +85 °C; note 1
VIH HIGH-level input 4.5 to 5.5 2.0 1.6 − V
voltage
VIL LOW-level input voltage 4.5 to 5.5 − 1.2 0.8 V
ILI input leakage current VI = VCC or GND 5.5 − − ±1.0 µA
IS(OFF) analog switch current per channel; VI = VIH or VIL; 5.5 − − ±1.0 µA
OFF-state VS = VCC − GND; see Fig.7
IS(ON) analog switch current VI = VIH or VIL; VS = VCC − GND; see 5.5 − − ±1.0 µA
ON-state Fig.8
ICC quiescent supply VI = VCC or GND; Vis = GND or VCC; 4.5 to 5.5 − − 20.0 µA
current Vos = VCC or GND
∆ICC additional quiescent VI = VCC − 2.1 V; other inputs at VCC 4.5 to 5.5 − 100 450 µA
supply current per input or GND
Tamb = −40 °C to +125 °C
VIH HIGH-level input 4.5 to 5.5 2.0 − − V
voltage
VIL LOW-level input voltage 4.5 to 5.5 − − 0.8 V
ILI input leakage current VI = VCC or GND 5.5 − − ±1.0 µA
IS(OFF) analog switch current per channel; VI = VIH or VIL; 10.0 − − ±1.0 µA
OFF-state VS = VCC − GND; see Fig.7
IS(ON) analog switch current VI = VIH or VIL; VS = VCC − GND; see 10.0 − − ±1.0 µA
ON-state Fig.8
ICC quiescent supply VI = VCC or GND; Vis = GND or VCC; 4.5 to 5.5 − − 40.0 µA
current Vos = VCC or GND
∆ICC additional quiescent VI = VCC − 2.1 V; other inputs at VCC 4.5 to 5.5 − − 490 µA
supply current per input or GND

Note
1. All typical values are measured at Tamb = 25 °C.

2004 Nov 11 9
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, full pagewidth LOW

(from enable inputs)

nY nZ
VI = VCC or GND A A VO = GND or VCC

GND
MGR260

Fig.7 Test circuit for measuring OFF-state current.

handbook, full pagewidth HIGH

(from enable inputs)

nY nZ
VI = VCC or GND A A VO (open circuit)

GND
MGR261

Fig.8 Test circuit for measuring ON-state current.

2004 Nov 11 10
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

Resistance RON for 74HC4066 and 74HCT4066

For 74HC4066: VCC = 2.0, 4.5, 6.0 and 9.0 V; for 74HCT4066: VCC = 4.5 V; note 1; Vis is the input voltage at pins nY
or nZ, whichever is assigned as an input; see Fig.9.
TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
OTHER IS (µA) VCC (V)
Tamb = −40 °C to +85 °C; note 2
RON(peak) ON-resistance VI = VIH or VIL; Vis = VCC to GND 100 2.0 − − − Ω
(peak) 1000 4.5 − 54 118 Ω
6.0 − 42 105 Ω
9.0 − 32 88 Ω
RON(rail) ON-resistance VI = VIH or VIL; Vis = GND 100 2.0 − 80 − Ω
(rail) 1000 4.5 − 35 95 Ω
6.0 − 27 82 Ω
9.0 − 20 70 Ω
VI = VIH or VIL; Vis = VCC 100 2.0 − 100 − Ω
1000 4.5 − 42 106 Ω
6.0 − 35 94 Ω
9.0 − 27 78 Ω
∆RON maximum VI = VIH or VIL; Vis = VCC to GND − 2.0 − − − Ω
variation of 4.5 − 5 − Ω
ON-resistance
6.0 − 4 − Ω
between any two
channels 9.0 − 3 − Ω

Tamb = −40 °C to +125 °C

RON(peak) ON-resistance VI = VIH or VIL; Vis = VCC to GND 100 2.0 − − − Ω
(peak) 1000 4.5 − − 142 Ω
6.0 − − 126 Ω
9.0 − − 105 Ω
RON(rail) ON-resistance VI = VIH or VIL; Vis = GND 100 2.0 − − − Ω
(rail) 1000 4.5 − − 115 Ω
6.0 − − 100 Ω
9.0 − − 85 Ω
VI = VIH or VIL; Vis = VCC 100 2.0 − − − Ω
1000 4.5 − − 128 Ω
6.0 − − 113 Ω
9.0 − − 95 Ω

Notes
1. At supply voltages approaching 2 V, the analog ON-resistance switch becomes extremely non-linear. Therefore, it is
recommended that these devices are being used to transmit digital signals only, when using these supply voltages.
2. All typical values are measured at Tamb = 25 °C.

2004 Nov 11 11
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, full pagewidth

HIGH
(from enable inputs)
V

nY
nZ

Vis = 0 to VCC − GND Is

GND
MGR259

Fig.9 Test circuit for measuring ON-resistance (RON).

MGR262
60
handbook, halfpage
RON
(Ω) VCC = 4.5 V
50

6V
40
9V

30

20

10
0 1.8 3.6 5.4 7.2 9
Vis (V)

Vis = 0 V to VCC.

Fig.10 Typical ON-resistance (RON) as a function of input voltage (Vis).

2004 Nov 11 12
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

AC CHARACTERISTICS
Type 74HC4066
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is
the output voltage at pins nY or nZ, whichever is assigned as an output.
TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb = −40 °C to +85 °C; note 1
tPHL/tPLH propagation delay RL = ∞; see Fig.19 2.0 − 8 75 ns
Vis to Vos 4.5 − 3 15 ns
6.0 − 2 13 ns
9.0 − 2 10 ns
tPZH/tPZL turn-on time nE to Vos RL = 1 kΩ; see Figs 20 and 21 2.0 − 36 125 ns
4.5 − 13 25 ns
6.0 − 10 21 ns
9.0 − 8 16 ns
tPHZ/tPLZ turn-off time nE to Vos RL = 1 kΩ; see Figs 20 and 21 2.0 − 44 190 ns
4.5 − 16 38 ns
6.0 − 13 33 ns
9.0 − 16 26 ns
Tamb = −40 °C to +125 °C
tPHL/tPLH propagation delay RL = ∞; see Fig.19 2.0 − − 90 ns
Vis to Vos 4.5 − − 18 ns
6.0 − − 15 ns
9.0 − − 12 ns
tPZH/tPZL turn-on time nE to Vos RL = 1 kΩ; see Figs 20 and 21 2.0 − − 150 ns
4.5 − − 30 ns
6.0 − − 26 ns
9.0 − − 20 ns
tPHZ/tPLZ turn-off time nE to Vos RL = 1 kΩ; see Figs 20 and 21 2.0 − − 225 ns
4.5 − − 45 ns
6.0 − − 38 ns
9.0 − − 30 ns

Note
1. All typical values are measured at Tamb = 25 °C.

2004 Nov 11 13
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

Type 74HCT4066
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is
the output voltage at pins nY or nZ, whichever is assigned as an output.
TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb = −40 °C to +85 °C; note 1
tPHL/tPLH propagation delay RL = ∞; see Fig.19 4.5 − 3 15 ns
Vis to Vos
tPZH/tPZL turn-on time nE to Vos RL = 1 kΩ; see Figs 20 and 21 4.5 − 12 30 ns
tPHZ/tPLZ turn-off time nE to Vos RL = 1 kΩ; see Figs 20 and 21 4.5 − 20 44 ns
Tamb = −40 °C to +125 °C
tPHL/tPLH propagation delay RL = ∞; see Fig.19 4.5 − − 18 ns
Vis to Vos
tPZH/tPZL turn-on time nE to Vos RL = 1 kΩ; see Figs 20 and 21 4.5 − − 36 ns
tPHZ/tPLZ turn-off time nE to Vos RL = 1 kΩ; see Figs 20 and 21 4.5 − − 53 ns

Note
1. All typical values are measured at Tamb = 25 °C.

74HC4066 and 74HCT4066

At recommended conditions and typical values; GND = 0 V; tr = tf = 6 ns; Vis is the input voltage at pins nY or nZ,
whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.

CONDITIONS
SYMBOL PARAMETER TYP. UNIT
OTHER Vis(p-p) (V) VCC (V)
dsin sine wave distortion f = 1 kHz; RL = 10 kΩ; CL = 50 pF; 4.0 4.5 0.04 %
see Fig.17 8.0 9.0 0.02 %
f = 10 kHz; RL = 10 kΩ; CL = 50 pF; 4.0 4.5 0.12 %
see Fig.17 8.0 9.0 0.06 %
αOFF(feedthr) switch OFF signal RL = 600 Ω; CL = 50 pF; f = 1 MHz; note 1 4.5 −50 dB
feed-through see Figs 11 and 18 9.0 −50 dB
αct(s) crosstalk between any two RL = 600 Ω; CL = 50 pF; f = 1 MHz; note 1 4.5 −60 dB
switches see Fig.13 9.0 −60 dB
Vct(p-p) crosstalk voltage between RL = 600 Ω; CL = 50 pF; f = 1 MHz; − 4.5 110 mV
any input to any switch see Fig.15 (nE, square wave 9.0 220 mV
(peak-to-peak value) between VCC and GND,
tr = tf = 6 ns)
fmax minimum frequency RL = 50 Ω; CL = 10 pF; see Figs 12 note 2 4.5 180 MHz
response (−3 dB) and 16 9.0 200 MHz
CS maximum switch − − 8 pF
capacitance

Notes
1. Adjust input voltage Vis is 0 dBM level (0 dBM = 1 mW into 600 Ω).
2. Adjust input voltage Vis is 0 dBM level at Vos for 1 MHz (0 dBM = 1 mW into 50 Ω).

2004 Nov 11 14
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

MGR263
0
handbook, full pagewidth

(dB)

−20

−40

−60

−80

−100
10 102 103 104 105 106
f (kHz)

Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; Rsource = 1 kΩ.

Fig.11 Typical switch OFF signal feed-through as a function of frequency.

MGR264
5
handbook, full pagewidth

(dB)

−5
10 102 103 104 105 106
f (kHz)

Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; Rsource = 1 kΩ.

Fig.12 Typical frequency response.

2004 Nov 11 15
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, full pagewidth VCC

2RL
0.1 µF
nY/nZ nZ/nY
VI
RL
2RL CL
channel
GND
ON
MGR265

Fig.13 Test circuit for measuring crosstalk between any two switches; channels ON condition.

handbook, full pagewidth VCC VCC

2RL 2RL
nY/nZ nZ/nY
Vos

2RL 2RL CL dB
channel
OFF
GND
MGR266

Fig.14 Test circuit for measuring crosstalk between any two switches; channels OFF condition.

2004 Nov 11 16
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

The crosstalk is defined as follows

handbook, full pagewidth VCC nE VCC
(oscilloscope output).
VCC
2RL GND 2RL
fpage
nY/nZ nZ/nY
Vct(p-p) D.U.T. Vos

2RL 2RL CL oscilloscope

MGR267

GND
MGR268

Fig.15 Test circuit for measuring crosstalk between control and any switch.

handbook, full pagewidth VCC

2RL
0.1 µF
nY/nZ nZ/nY
Vis Vos
sine-wave
2RL CL dB
channel
GND
ON
MGR269

Adjust input voltage to obtain 0 dB at Vos when fi = 1 MHz. After set-up, the frequency of fi is increased to obtain a reading of -3 dB at Vos.

Fig.16 Test circuit for measuring minimum frequency response.

2004 Nov 11 17
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

handbook, full pagewidth VCC

2RL
10 µF
nY/nZ nZ/nY
fi = 1 kHz Vis Vos
sine-wave
DISTORTION
2RL CL
METER
channel
ON GND

MGR270

Fig.17 Test circuit for measuring sine wave distortion.

handbook, full pagewidth VCC

2RL
0.1 µF
nY/nZ nZ/nY
Vis Vos

2RL CL dB
channel
GND
OFF
MGR271

Fig.18 Test circuit for measuring switch OFF signal feed-through.

2004 Nov 11 18
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

AC WAVEFORMS

handbook, full pagewidth tr tf

VCC
90%
Vis 50%
10%
GND

Vos 50%

tPLH tPHL
MGR272

Fig.19 Waveforms showing the input (Vis) to output (Vos) propagation delays.

tf tr

90 %
nE input VM
10 %
t PLZ t PZL

output
LOW - to - OFF 50 %
OFF - to - LOW
10 %
t PHZ t PZH
90 %
output
HIGH - to - OFF 50 %
OFF - to - HIGH

outputs outputs outputs

MGA846 enabled disabled enabled

74HC4066: VM = 50 %; VI = GND to VCC.

74HCT4066: VM = 1.3 V; VI = GND to 3 V.

Fig.20 Waveforms showing the turn-on and turn-off times.

2004 Nov 11 19
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

TEST CIRCUIT AND WAVEFORMS

handbook, full pagewidth VCC Vis VCC

VI VO RL switch
PULSE
D.U.T. open
GENERATOR

RT CL

GND
MGR273

TEST SWITCH Vis

tPZH GND VCC
tPZL VCC GND
tPHZ GND VCC
tPLZ VCC GND
other open pulse

Definitions for test circuit: tf = 6 ns; when measuring fmax, there is no

RL = Load resistance. constraint to tr and tf with 50 % duty factor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance ZO of the pulse generator.

Fig.21 Test circuit for measuring AC performance.

handbook, full pagewidth tW

amplitude
90%
negative
VM
input pulse
10%
0V
tTHL (tf) tTLH (tr)
tTLH (tr) tTHL (tf)
amplitude
90%
positive
VM
input pulse
10%
0V
tW
MGR274

tr and tf
FAMILY AMPLITUDE VM fmax; PULSE
OTHER
WIDTH
74HC4066 VCC 50 % <2 ns 6 ns
74HCT4066 3.0 V 1.3 V <2 ns 6 ns

Fig.22 Input pulse definitions.

2004 Nov 11 20
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

PACKAGE OUTLINES

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

D ME
seating plane

A2 A

L A1

c
Z e w M
b1
(e 1)
b
14 8 MH

pin 1 index
E

1 7

0 5 10 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT
A A1 A2
b b1 c D (1) E (1) e e1 L ME MH w Z (1)
max. min. max. max.
1.73 0.53 0.36 19.50 6.48 3.60 8.25 10.0
mm 4.2 0.51 3.2 2.54 7.62 0.254 2.2
1.13 0.38 0.23 18.55 6.20 3.05 7.80 8.3
0.068 0.021 0.014 0.77 0.26 0.14 0.32 0.39
inches 0.17 0.02 0.13 0.1 0.3 0.01 0.087
0.044 0.015 0.009 0.73 0.24 0.12 0.31 0.33

Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT27-1 050G04 MO-001 SC-501-14
03-02-13

2004 Nov 11 21
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

D E A
X

y HE v M A

14 8

Q
A2
(A 3) A
A1
pin 1 index
θ
Lp

1 7 L

e w M detail X
bp

0 2.5 5 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ
max.
0.25 1.45 0.49 0.25 8.75 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1 o
0.10 1.25 0.36 0.19 8.55 3.8 5.8 0.4 0.6 0.3 8
o
0.010 0.057 0.019 0.0100 0.35 0.16 0.244 0.039 0.028 0.028 0
inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.34 0.15 0.228 0.016 0.024 0.012

Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT108-1 076E06 MS-012
03-02-19

2004 Nov 11 22
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1

D E A
X

c
y HE v M A

14 8

Q
A2 A
A1 (A 3)

pin 1 index
θ
Lp
L

1 7 detail X

w M
e bp

0 2.5 5 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ
max.
o
0.21 1.80 0.38 0.20 6.4 5.4 7.9 1.03 0.9 1.4 8
mm 2 0.25 0.65 1.25 0.2 0.13 0.1 o
0.05 1.65 0.25 0.09 6.0 5.2 7.6 0.63 0.7 0.9 0

Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT337-1 MO-150
03-02-19

2004 Nov 11 23
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

D E A
X

y HE v M A

14 8

Q
A2 (A 3)
A
A1
pin 1 index

θ
Lp
L
1 7
detail X
w M
e bp

0 2.5 5 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
max.
o
0.15 0.95 0.30 0.2 5.1 4.5 6.6 0.75 0.4 0.72 8
mm 1.1 0.25 0.65 1 0.2 0.13 0.1 o
0.05 0.80 0.19 0.1 4.9 4.3 6.2 0.50 0.3 0.38 0

Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT402-1 MO-153
03-02-18

2004 Nov 11 24
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm SOT762-1

D B A

A
A1
E c

terminal 1 detail X
index area

terminal 1 e1 C
index area
e b v M C A B y1 C y
w M C
2 6

1 7

Eh e

14 8

13 9
Dh
X

0 2.5 5 mm

scale
DIMENSIONS (mm are the original dimensions)
A(1)
UNIT
max.
A1 b c D (1) Dh E (1) Eh e e1 L v w y y1

mm 0.05 0.30 3.1 1.65 2.6 1.15 0.5

1 0.2 0.5 2 0.1 0.05 0.05 0.1
0.00 0.18 2.9 1.35 2.4 0.85 0.3
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

SOT762-1 --- MO-241 --- 02-10-17

03-01-27

2004 Nov 11 25
Philips Semiconductors Product specification

Quad bilateral switches 74HC4066; 74HCT4066

DATA SHEET STATUS

DATA SHEET PRODUCT

LEVEL DEFINITION
STATUS(1) STATUS(2)(3)
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).

Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

DEFINITIONS DISCLAIMERS
Short-form specification  The data in a short-form Life support applications  These products are not
specification is extracted from a full data sheet with the designed for use in life support appliances, devices, or
same type number and title. For detailed information see systems where malfunction of these products can
the relevant data sheet or data handbook. reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
Limiting values definition  Limiting values given are in
for use in such applications do so at their own risk and
accordance with the Absolute Maximum Rating System
agree to fully indemnify Philips Semiconductors for any
(IEC 60134). Stress above one or more of the limiting
damages resulting from such application.
values may cause permanent damage to the device.
These are stress ratings only and operation of the device Right to make changes  Philips Semiconductors
at these or at any other conditions above those given in the reserves the right to make changes in the products -
Characteristics sections of the specification is not implied. including circuits, standard cells, and/or software -
Exposure to limiting values for extended periods may described or contained herein in order to improve design
affect device reliability. and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information  Applications that are
communicated via a Customer Product/Process Change
described herein for any of these products are for
Notification (CPCN). Philips Semiconductors assumes no
illustrative purposes only. Philips Semiconductors make
responsibility or liability for the use of any of these
no representation or warranty that such applications will be
products, conveys no licence or title under any patent,
suitable for the specified use without further testing or
copyright, or mask work right to these products, and
modification.
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.

2004 Nov 11 26
Philips Semiconductors – a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825

For sales offices addresses send e-mail to: [email protected].

© Koninklijke Philips Electronics N.V. 2004 SCA76

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands R44/05/pp27 Date of release: 2004 Nov 11 Document order number: 9397 750 14188