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Computer Organization Exam Paper

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0% found this document useful (0 votes)
242 views2 pages

Computer Organization Exam Paper

Uploaded by

sethuvinod449
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

QP CODE: 20101288 Reg No : .....................

20101288
Name : .....................

[Link]./BCA DEGREE (CBCS) EXAMINATION, NOVEMBER 2020


Second Semester
Core Course - CS2CRT05 - COMPUTER ORGANIZATION AND ARCHITECTURE
(Common for [Link] Computer Science Model III,[Link] Information Technology Model III,Bachelor of
Computer Application)
2017 ADMISSION ONWARDS
5F91E0C8
Time: 3 Hours Max. Marks : 80
Part A
Answer any ten questions.
Each question carries 2 marks.

1. What is an instruction register?

2. Which are the different fields in Instruction Formats?

3. What is byte addressability?

4. What is a bus?

5. What is the purpose of using status registers?

6. Write the classification of computer instructions.

7. What is the use of condition code bits?

8. Differentiate between RAM and ROM

9. Compare Static and dynamic RAM

10. What are the features of PROM?

11. What are multiprocessor systems?

12. How the efficiency of a pipeline can be measured?


(10×2=20)
Part B
Answer any six questions.
Each question carries 5 marks.

13. Explain the basic operational concept between processor and memory.

Page 1/2 Turn Over


14. How micro processor differentiates between data and instruction?Explain.

15. Explain the use of timing and control signals. Give example.

16. Explain register addressing mode with example

17. Explain memory hierarchy.

18. Distinguish between associative memory and cache memory.

19. What is virtual memory? How is it useful?

20. What is parallel processing?

21. List and explain some techniques to prevent pipeline conflicts.


(6×5=30)
Part C
Answer any two questions.
Each question carries 15 marks.

22. Explain stack organization in detail.

23. Explain and distinguish magnetic storage devices and optical storage devices.

24. Explain Flynn’s architectural classification scheme.

25. What is an array processor? Explain with the help of neat diagrams.
(2×15=30)

Page 2/2

Common questions

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Memory hierarchy in computer architecture refers to the structured arrangement of storage systems with varying speeds and sizes, such as registers, cache, main memory, and secondary storage. It is crucial for optimizing performance as it balances speed, cost, and capacity, ensuring the most frequently accessed data resides in the fastest storage layers. This arrangement minimizes the time required to access data and thereby maximizes overall system performance by accessing from slower storage tiers less often .

Multiprocessor systems distribute workloads across multiple processors, enhancing computational power and speed by allowing parallel processing. They improve system throughput and can lead to more reliable execution due to redundancy. However, challenges include increased complexity in communication and data sharing between processors, potential for resource contention, and the necessity of sophisticated software to manage parallel operations effectively .

Static RAM (SRAM) uses flip-flops to store each bit and does not require refreshing, resulting in faster access times. It's typically used for cache memory where speed is critical. Dynamic RAM (DRAM), on the other hand, stores bits in capacitors and requires periodic refreshing, making it slower but more dense and cheaper per bit. DRAM is commonly used for main memory where larger quantities are needed without the speed requirement of caches .

Byte addressability allows each byte in memory to have a unique address, facilitating access to single-byte operations. This is important for optimizing memory usage since it allows specific bytes to be addressed and modified without affecting others, leading to efficient memory operations. Byte addressability is crucial for applications requiring fine-granularity data processing, thereby enabling complex data structures and operations involving varied data types .

Condition code bits are used to indicate the outcome of various operations, such as zero, negative, or carry results of computations. These bits assist decision-making by enabling program control structures like conditional branches to make decisions based on the status of previous operations. The result of logic or arithmetic operations stored in these bits informs subsequent instructions, guiding the program's flow and allowing for efficient branching and decision-making .

Status registers, also known as flags, store information about the state of a processor after arithmetic and logical operations are performed. They can indicate conditions such as carry, zero, overflow, and sign, which are then used by subsequent instructions to alter the control flow of programs effectively. This enables more efficient branch operations and better management of processor activities, enhancing the CPU's performance and reliability .

To prevent pipeline conflicts, strategies such as instruction reordering, operand forwarding to reduce data hazards, use of hazard detection units, and implementing stalls or pipeline bubbles can be used to manage control dependencies. These approaches ensure that instructions are executed correctly without affecting subsequent instructions, thus optimizing pipeline throughput and efficiency while minimizing conflicts .

Instruction formats typically consist of fields such as the operation code (opcode), address field(s), and sometimes additional fields like the mode field. The opcode specifies the operation to be performed, address fields typically determine the location of the operand(s) in memory, and the mode field may specify the addressing mode being used. These fields together define how the processor interprets and executes a given instruction by determining which operation to perform and on what data .

PROM is a type of read-only memory that can be programmed after manufacturing using a PROM programmer. After programming, it cannot be modified, similar to ROM, but it allows for custom programming post-manufacture, unlike traditional ROM. This flexibility is advantageous for customizing device operation post-production, catering to specific needs while maintaining non-volatility and stability .

RAM (Random Access Memory) is volatile memory used for temporary data storage and provides fast read and write access. In contrast, ROM (Read-Only Memory) is non-volatile and is used for permanent storage, primarily to store firmware or software that doesn’t change frequently. RAM is essential for processing tasks and running applications, while ROM ensures that the system can start up by storing the necessary instructions for booting the system .

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