Mixture 2
Mixture 2
Abstract: Differential implementation is becoming highly favoured in RFIC (radio frequency integrated circuit) design,
notably its high immunity to common-mode noises, acceptable rejection of parasitic coupling, and increased dynamic
range. One specific RF front-end building block that is usually designed as a differential circuit is the mixer. This
technical paper presents a study of a differential mixer, notably the double-balanced mixer implemented on a
direct-conversion architecture in a standard 90nm CMOS (complementary metal-oxide semiconductor) process.
Operating frequency is set at 5GHz, which is a typical frequency for RF (radio frequency) receiver. Impedance
matching was essential to fully optimize the mixer design. The direct-conversion double-balance mixer design
eventually achieved conversion gain of 11.463dB and noise figure of 16.529dB, comparable to mixer designs from past
research and studies.
Keywords: Double-Balanced Mixer; Direct Conversion; Conversion Gain; Noise Figure; RF Front-End
1. Introduction
The front-end of a RF (radio frequency) wireless receiver is of particular interest to many RFIC (radio frequency
integrated circuit) designers and researchers as it attests to be the most critical part in many communication systems and
wireless applications like the Bluetooth, WiFi (wireless fidelity), and WiMAX (worldwide interoperability for
microwave access). The block diagram of a typical receiver is shown in Figure 1.
View metadata, citation and similar papers at core.ac.uk brought to you by CORE
at frequency zero. This means that the LO frequency is equal to the input RF frequency. With zero-IF, image signal is
avoided and the analog filtering problem can be easily handled. Moreover, the desired signal is translated directly to
the baseband, allowing analog-to-digital converter (ADC) and digital signal processing (DSP) circuits to perform
modulation and other supplementary functions[1,2]. This eliminates the need for highly complex filters since channel
selection only requires a low-pass filter (LPF) as shown in Figure 2. Smaller and cheaper receivers with low power
consumption could be realized for various wireless applications such as Bluetooth, WiFi, and WiMAX. Many of the
implemented receivers in WiMAX[3-5] use the zero-IF architecture since the LPFs make sure that the closely-spaced
carrier signals do not cause interference with each other.
Eq. (1)
Eq. (2)
VIF and VRF are the root mean square (RMS) voltages of the IF and RF signals, respectively, while PIF and PRF are
the equivalent power of the IF and RF signals, respectively. Conversion gain is preferred over conversion loss because
amplification along with frequency translation. Nevertheless, it should be noted that conversion gain directly affects the
noise figure and linearity of the overall receiver. Hence, design tradeoffs concerning these parameters are inevitable.
Noise figure (NF) is another important parameter of the mixer. It is a measure of the amount of
signal-to-noise-ratio (SNR) degradation introduced by the mixer as seen at the output. Eq. (3) shows the
relation between the SNR at the input port and the SNR at the output port of the mixer.
Eq. (3)
Noise figures of mixers tend to be higher than amplifiers (i.e. low-noise amplifiers, power amplifiers) because of
the contribution of noise from other frequencies (apart from input RF signal) that can mix down to the IF. This
considerable noise in mixers is the main reason why low-noise amplifiers (LNA) are used in the front-end, before the
mixer[6].
A popular solution for the mixer is based on the double-balanced topology, with the schematic shown in Figure 3.
Double-balanced mixer is also commonly known as Gilbert cell mixer. It operates with differential LO and RF inputs.
In this topology, LO products are prevented from getting to the output by combining two single-balanced mixers. As
illustrated in Figure 3, the two single-balanced mixers are connected in anti-parallel as far as the LO is concerned, but in
parallel for the RF signal. Thus, the LO terms sum to zero in the output, whereas the converted RF signal is doubled in
the output[6]. This is most desirable for high port-to-port isolation and spurious output rejection applications.
L and C Value
L1 12.7nH
C1 1.116087pF
L2 1.328515nH
C2 267.127fF
Inductors
Parameters
L1 L2
Desired L 12.7nH 1.328515nH
No. of sides 4 8
Length, D 300µm 190µm
Metal width, W 11.2µm 10µm
Spacing, S 1 1
No. of turns, N 6 2
Inductance, L:
Modified Wheeler 12.885µm 1.326µm
Current Sheet 12.739µm 1.326µm
Monomial Fit 12.624µm 1.394µm
Table 4. Inductor design using SpiralCalc.
In ASITIC, the spiral inductors are designed such that desired inductances are achieved and the Q-factors are
optimized with eddy-current option enabled to include the effects of substrate induced eddy current losses. L1 have
smaller Q-factor than L2 because of its high inductance value. For the inductor design using SpiralCalc, same parameter
values from the ASITIC parameters are used except for the metal width and the number of turns of the spiral inductor.
These parameters are tweaked such that the desired inductances are achieved for the inductors.
The n2port from the analogLib library is used as a model block for all the ASITIC inductors. Touchstone format of
S-parameter file is used as file input of the n2port component since the actual S-parameters using ASITIC are given in
touchstone format. The figures of merit such as conversion gain and noise figure are determined using SpectreRF in the
Analog Design Environment.
A mixer’s frequency converting action is characterized by conversion gain or loss. Voltage conversion gain is the
ratio of the RMS voltages of the IF and RF signals, earlier given in Eq. (1) and (2). The variations of conversion gain
with the power of LO signal (PLO) can be measured using swept PSS (Periodic Steady-State) analysis with PAC
(Periodic AC) analysis. The PAC analysis will then compute the voltage conversion gain in dB20 of the whole circuit
with PORT3 as the output port (with output harmonic of 0, which is 5GHz) and PORT1 as the input port (with input
harmonic of -1, which is 0GHz). Setting the input port to RF+ port, which is located after the balun circuit, will
compute the voltage conversion gain of the mixer only. Simulation plots of the conversion gain swept from PLO =
-10dBm to PLO = 30dBm are shown in Figure 5-7.
4. Discussion of Results
Based on the conversion gain simulation results as shown in Figure 5-7 and in Table 5, input and output
impedance matching contribute to better performance. Furthermore, using ideal inductors for impedance matching
produced better performance as compared to using non-ideal ASITIC inductors through the n2port. It can be observed
from the simulation plots that the conversion gain of the mixer only is higher than the conversion gain of the whole
circuit consisting of the mixer and the balun. This is because the balun in the circuit, which is a passive balun, has
insertion loss and thus incapable of producing gain and degrading the overall gain of the cascaded network.
Acknowledgment
The author would like to thank Prof. Maria Theresa De Leon, Ph.D. and Prof. John Richard E. Hizon, Ph.D. of
Microelectronics and Microprocessors Laboratory at University of the Philippines for the technical support during the
course of the study, and to the STMicroelectronics Calamba NPI Team and the Management Team.
References
1. B. Razavi, “RF microelectronics,” Upper Saddle River, NJ, USA: Prentice Hall Press, 1998.
2. W. Namgoong and T. Meng, “Direct-conversion RF receiver design,” IEEE Transactions on Communications, vol.
49, no. 3, March 2001.
3. Y. Zhou, C.P. Yoong, L.S. Weng, Y.J. Khoi, M.C.Y. Wah, K.A C. Moy, and D.W.T. Fatt, “A 5 GHz dual-mode
WiMAX/WLAN direct-conversion receiver,” in Proc. IEEE International Symposium on Circuits and Systems,
May 2006.
4. J.G. Atallah, S. Rodriguez, L.R. Zeng, and M. Ismail, “A direct conversion WiMAX RF receiver front-end in
CMOS technology,” in Proc. International Symposium on Signals, Circuits and Systems, vol. 1, July 2007.
5. J. Y. Lyu and Z.M. Lin, “A 2~11 GHz direct-conversion mixer for WiMAX applications,” TENCON 2007 – IEEE
Region 10 Conference, pp. 1-4, October 2007.
6. T. Lee, “The design of CMOS radio-frequency integrated circuits,” Cambridge: Cambridge University Press,
1998.
7. M. Voltti, T. Koivisto, and E. Tiiliharju, “Comparison of active and passive mixers,” 18th European Conference on
Circuit Theory and Design, pp. 890-893. August 2007.
8. F.R. Gomez, M.T. de Leon, and C.R. Roque, “Active balun circuits for WiMAX receiver front-end,” TENCON
2010 – IEEE Region 10 Conference, pp. 1156-1161, November 2010.
9. T. Tikka, J. Ryynanen, M. Hotti, and K. Halonen, “Design of a high linearity mixer for
direct-conversion base-station receiver,” in Proc. IEEE International Symposium on Circuits and Systems, May
2006.
10. K.W. Hamed, A.P. Freundorfer, and Y.M.M. Antar, “A monolithic double-balanced direct conversion mixer with an
integrated wideband passive balun,” IEEE Journal of Solid-State Circuits, vol. 40, no. 3, pp. 622-629, March 2005.
11. J. Park, C.H. Lee, B.S. Kim, and J. Laskar, “Design and analysis of low flicker-noise CMOS mixers for
direct-conversion receivers,” IEEE Transactions on Microwave Theory and Techniques, vol. 54, no. 12, December
2006.
12. F.R. Gomez, “Design of impedance matching networks for RF applications,” Asian Journal of Engineering and
Technology, vol. 6, no. 4, September 2018.
13. A.M. Niknejad and R.G. Meyer, “Analysis and optimization of monolithic inductors and transformers for RF ICs,”
in Proc. IEEE Custom Integrated Circuits Conference, Santa Clara, CA, pp. 375-378, May 1997.
14. R.G. Meyer and A.M. Niknejad, “ASITIC for Windows NT/2000,” Research in RFIC Design,