TYPE Review

PUBLISHED 08 August 2023

DOI 10.3389/fenrg.2023.1240755

Review of the calculation of

OPEN ACCESS DC-link capacitor current
EDITED BY
Farhad Ilahi Bakhsh,
National Institute of Technology, Cheng Guo, Ziyue Xin, Jing Han*, Liangdeng Hu and Bin Lu
Srinagar, India
National Key Laboratory for Electromagnetic Energy, Naval University of Engineering, Wuhan, China
REVIEWED BY
Andrea Toscani,
University of Parma, Italy
Qinglei Bu,
Xi’an Jiaotong-Liverpool University, In the voltage source power electronic converter, DC-link capacitors usually work as
China buffering elements between the DC and AC sides. The high failure rate and large
*CORRESPONDENCE space occupied by the DC-link capacitors directly affect the reliability and power
Jing Han,
density of the converters. The analysis and calculation of the DC-link capacitor current
[email protected]
is crucial to achieve the refined design of converters. In this work, the analysis and
RECEIVED 15 June 2023
calculation methods of DC-link capacitor current are divided into three categories,
ACCEPTED 24 July 2023
PUBLISHED 08 August 2023 according to the calculation principle, namely, simulation method, RMS analysis
CITATION
method, and spectral analysis method, and their calculation methods are
Guo C, Xin Z, Han J, Hu L and Lu B (2023), summarized. First, the types of capacitors and their characteristics are briefly
Review of the calculation of DC-link introduced. Second, the three-phase two-level converter is taken as an example
capacitor current.
Front. Energy Res. 11:1240755.
to introduce the basic principles, calculation steps, application scope, advantages, and
doi: 10.3389/fenrg.2023.1240755 disadvantages of the latter two methods in detail, as well as the influence of non-ideal
COPYRIGHT
factors, such as the output ripple on the calculation results. This work also discusses
© 2023 Guo, Xin, Han, Hu and Lu. This is the calculation of the multi-level converter’s DC-link capacitor current spectrum and
an open-access article distributed under the current characteristics of multi-phase converters, which are rarely reported. Third,
the terms of the Creative Commons
Attribution License (CC BY). The use,
the problem of resonance between the DC-link capacitors and the DC bus inductor is
distribution or reproduction in other introduced. For the distributed arrangement of multiple DC-link capacitors on DC bus
forums is permitted, provided the original converters, this study proposes a method based on a constant current source
author(s) and the copyright owner(s) are
credited and that the original publication
equivalent circuit, which can accurately calculate the DC-link capacitor current
in this journal is cited, in accordance with spectrum that is affected by loop current and resonance. Finally, the current
accepted academic practice. No use, problems and future directions of the DC-link capacitor design are pointed out.
distribution or reproduction is permitted
which does not comply with these terms.
KEYWORDS

DC-link capacitors, current calculation, sizing design, resonance, multi-level converter,

multi-phase converter

1 Introduction
With the continuous development of power electronics, the voltage source converter
(VSC) is widely used in photovoltaic systems, wind power generation, motor drives, DC
microgrids, and so on (Rixin et al., 2008; Yang et al., 2010; Colak et al., 2011; Kumar and Jain,
2014; Watanabe et al., 2016). Since pulse-width modulation (PWM) is usually used on the
converter side of the VSC, high frequency harmonics are introduced on the DC side (Dahono
et al., 1996; Cross et al., 1999; Kolar and Round, 2006). The DC side usually uses DC-link
capacitors as a buffer and voltage regulator, and several typical configurations are shown in
Figure 1 (Wang and Blaabjerg, 2014). The main roles of DC-link capacitors include 1)
compensating the power pulsation on the AC side and buffering the energy exchange
between the AC and DC sides; 2) stabilizing the DC-side voltage and suppressing the voltage
harmonics on the DC side; 3) absorbing the current ripple on the DC bus; 4) providing
transient power peaks to the load; and 5) absorbing the demagnetization energy of the drive
motor in case of an emergency shutdown of the converter (Kolar and Round, 2006; Wang
and Blaabjerg, 2014). It can be said that the DC-link capacitors are the most important
component observed on the DC side but also one of the components with the highest failure

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FIGURE 1
Typical configurations of power electronic conversion systems with DC-link capacitors; (A) AC-DC-AC converter, (B) DC-DC-AC converter, and (C)
DC-AC converter for the DC power supply.

rate in the power electronic systems (Yang et al., 2011; Wang et al.,
2013; Wang and Blaabjerg, 2014). The operating conditions of DC-
link capacitors (temperature, humidity, ripple current, and voltage)
significantly affect their reliability, and their lifetime estimation has
been a hot topic of research (Gasperi, 1996; Gasperi, 2005; Yang
et al., 2018; Torki et al., 2023). The literature (Kolar and Round,
2006) states that the operating voltage and especially the operating
temperature have a significant effect on the operating life of
electrolytic capacitors: the failure rate of an aluminum electrolytic
capacitor is reduced to 60% if it operates at 0.9 times of its rated
voltage compared to when it operates at the rated voltage; if the
FIGURE 2
operating temperature is reduced, the expected life doubles for every Simplified lumped model of capacitors.
10°C reduction relative to the rated temperature. The literature
(Wang et al., 2018) considers the non-linear process of
equivalent series resistance (ESR) growth and capacitance
reduction during degradation, and then a non-linear accumulated side pulsation and heating of the capacitors, such as the optimization
damage model is proposed to achieve the long-term evaluation of of the structure layout and application of new modulation methods
the capacitor life under variable loading conditions. The literature to extend the life of DC-link capacitors (Kieferndorf et al., 2004; Su
(Delmonte et al., 2020) proposes a procedure based on finite element and Tang, 2012; Basler et al., 2015; Diana et al., 2015; Diana et al.,
simulations to compute a thermal model of capacitors, coupling 2018; Nie and Schofield, 2019; Yan et al., 2019). In addition,
with electrical SPICE simulations to evaluate the maximum considering that the DC-link capacitors are components that
operative temperature of capacitors. This method can reduce the occupy the largest space in a converter system (Huiqing et al.,
damage caused by the overheating of capacitors and increase their 2012; Ko et al., 2018), in order to improve the converter power
service life in practical applications. Therefore, many methods have density and prevent an increase in system cost, volume, and weight
been proposed by domestic and foreign scholars to reduce the DC- due to overdesigning, the design margin of the DC-link capacitors

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FIGURE 3
Variation of capacitor equivalent circuit parameters with frequency and temperature for 47 μF and 350 V electrolytic capacitor, respectively
(Williams, 1986). (A) Variation of capacitor equivalent circuit parameters with temperature, (B) Variation of capacitor equivalent circuit parameters with
frequency.

only solve a set of parameters. Besides, it is difficult to figure out

the influence that each parameter has on the capacitor current,
and it is impossible to establish the functional relationship
between the operating point of the converter (determined by
the modulation index, amplitude, and phase of the output voltage
and current) and capacitor current. The guidance for a practical
engineering design is limited.

FIGURE 4
Main circuit of three-phase two-level converter. 1.2 Root mean square analysis method

The analytical method generally calculates the RMS of the DC-

should be as small as possible while ensuring reliability, which link capacitor current in the time domain. This method calculates
requires a more accurate estimation of the thermal stress of the the RMS value of the converter input current by analyzing the mean
DC-link capacitors. value and RMS value of the carrier wave period of the converter
The heating of DC-link capacitors is mainly caused by the input current and using the integral in the time domain. When the
current flowing through the capacitors and their own ESR output ripple on the rectifier side is not considered, the RMS value of
(McGrath and Holmes, 2009; Wang and Blaabjerg, 2014). The the DC-link capacitor current becomes equal to the RMS value of the
ESR is an inherent property of the capacitor, so the analysis and input current of the converter minus its average value. This method
calculation of the DC-link capacitor current is the basis of the usually ignores the converter output current ripple but still
capacitor design and life prediction, which is an important design to maintains high accuracy and is the most used analysis method
ensure the reliability of the converter. Therefore, the analysis and nowadays.
calculation of the DC-link capacitor current is worthy of an in-depth
study in order to meet the minimum fault interval requirement of
the converter and also realize the refined design of the system and 1.3 Spectral resolution method
improve the power density. The existing DC-link capacitor current
analysis methods can be divided into three main types as shown in The ESR of capacitors is sensitive to frequency and
the following sections. temperature, and failure to consider the effects of temperature,
voltage, and frequency on the ESR will result in prediction errors
(Wang and Blaabjerg, 2014); in order to calculate the heating of
1.1 Simulation method DC-link capacitors more accurately, it is sometimes necessary to
calculate the spectrum of the capacitor current. The double Fourier
Simulation can accurately obtain the current waveform analysis is the basis for calculating the DC-link capacitor current
flowing through the DC-link capacitors, but in addition to the spectrum. This method is more complex than that of calculating
time required to build the simulation model, each simulation can current RMS values, but after obtaining the capacitor current

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FIGURE 6
Unit cell of Sa1 switching function.

FIGURE 7
Equivalent circuit of converter load.

method, and the effects of the output current ripple and diode
reverse recovery on the DC-link capacitor current will be
introduced. The harmonic analysis method is then introduced,
and the rarely reported calculation method of the DC-link
FIGURE 5
Effect of each parameter on DC-link capacitor current (Kolar and capacitor current for multi-level converters and the
Round, 2006). (A) Effect of M on DC-link capacitor current; (B) effect characteristics of capacitor current for multi-phase converters are
of φ on DC-link capacitor current; and (C) three-dimensional
further discussed. Meanwhile, considering the rapid development of
representation.
new energy industries and wide application of advanced motor drive
systems, converters with a distributed arrangement of multi-phase
or multiple DC-link capacitors have been gradually adopted. In this
spectrum (harmonic resolution), the frequency and temperature arrangement, multiple DC-link capacitors may resonate with the DC
can be taken into account in the temperature calculations of the bus spurious parameters, which greatly affect the accurate
capacitors according to the ESR model of the capacitors and calculation results of the DC-link capacitor current. In this work,
thermal stress can be estimated more accurately. a method to analyze the resonance characteristics of distributed
This article will first introduce the types and characteristics of multi-capacitor systems is proposed, and a method to analyze and
DC-link capacitors, and then introduce the RMS analysis method calculate the spectrum of distributed DC-link capacitor current,
and the spectral analysis method in detail. The common considering the effect of resonance, is proposed. Finally, an outlook
characteristics of the DC-side DC-link capacitor current with on the method of DC-link capacitor current analysis and calculation
each parameter will be analyzed by using the RMS analysis is given.

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FIGURE 8
Multi-level converter phase-leg topologies; (A) 3L-NPC, (B) 3L-FC, and (C) 5L-CHB.

FIGURE 9
Relative error in RMS method of DC-link capacitor current (Mantzanas et al., 2019).

2 DC-link capacitors wide frequency range, and operating temperatures up to 200°C but
are relatively expensive and suitable for high current ripple
Capacitors that are used as DC-link capacitors are usually of applications (Huiqing et al., 2012). Ceramic capacitors are
three types, namely, aluminum electrolytic capacitors, metallic suitable in high-power and high-frequency switching power
polypropylene film capacitors, and ceramic capacitors (Williams, supplies with small size, low cost, and more balanced
1986; Wang and Blaabjerg, 2014). Each one of these three types of performance. In general engineering applications, converter
capacitors has its own characteristics and is suitable for different systems for driving motors mostly use aluminum electrolytic
applications. Aluminum electrolytic capacitors have the highest capacitors (Huiqing et al., 2012).
energy density and lowest energy loss but have relatively large The equivalent circuit model of the capacitor is shown in
ESR and wear problems due to electrolyte evaporation (Gasperi, Figure 2, where CR is the capacitance; RS is the series equivalent
2005). Metallic polypropylene film capacitors use plastic films as resistance ESR determined by the lead and junction resistance; LS is
dielectric material and have good AC characteristics with small size, the series equivalent series inductance (ESL) caused by the structure

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FIGURE 10
Main circuit of multi-phase converter motor system based on 4L-NNPC H-bridge topology.

FIGURE 11
Main circuit of distributed capacitors of five-phase converter based on 4L-NNPC H-bridge topology.

and supply line, which can be neglected at lower frequencies. Ri is the 2.1 Calculating RMS value of DC-link
insulation resistance, which is usually large; Rd is the dielectric loss capacitor current
equivalent resistance caused by dielectric absorption and molecular
polarization; and Cd is the inherent dielectric absorption Calculating the capacitor current RMS value is a relatively
capacitance, both of which usually need to be considered only in quick and intuitive method, in which the calculation process is
electrolytic capacitors operating at high frequencies. easy to understand, the physical meaning is clearer, and it
The equivalent circuit parameters of the capacitor vary with the is widely used in applications that do not require high accuracy
operating temperature, voltage stress, and frequency, as shown in in estimating capacitor heating (Kolar and Round, 2006; Kai
Figure 3 (Williams, 1986). Failure to consider these variations will et al., 2016). The following is an example of the most common
lead to incorrect calculations of electrical and thermal stresses in the three-phase two-level converter to introduce its calculation
capacitor and affect the accuracy of reliability estimation. Therefore, process.
the accuracy of life estimation based on the harmonic spectrum of The main circuit of the three-phase two-level converter is
the current flowing through DC-link capacitors is higher during the shown in Figure 4. The converter side uses space vector
refinement of the DC-link capacitor design. modulation (SVM) with two levels per phase bridge arm and

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FIGURE 12
Equal circuit of common DC bus five-phase H-bridge converter, with the first phase ripple alone.

FIGURE 13
Equal circuit of common DC bus five-phase H-bridge converter.

√
23 = 8 states in total for the three phases. The reference voltage 3T s V ref



→ t V2  sin θ. (4)
vector Vref can be expressed as V dc



→
V ref  V ref e jωt , (1) The upper and lower switching signals of the bridge arm on the
converter side are complementary. From the circuit in Figure 4, it
where Vref is the reference voltage amplitude, ω is the rotational can be seen that the input current id on the converter side is
angular velocity, and the modulated carrier wave period is Ts. determined by the AC load current together with the switching
When the reference vector is in sector 1, in order to minimize the state of the three-phase switching tubes. Using the switching
number of switch actions, the vector synthesis in one carrier wave function to express the state of the switching tube, the switching
period is function is 1 or 0, where 1 means the switching tube is turned on and

→
→
→
→
→ 0 means it is turned off, and at this time, the expression of the
V 0 [000] →V 1 [100] →V 2 [110] →V 0 [111] →V 0 [111] converter side DC bus input current id is

→
→
→
→V 2 [110] →V 1 [100] →V 0 [000], (2)

→ id  Sa1 ia + Sb1 ib + Sc1 ic , (5)
where V 0 [000] means that the switching functions Sa, Sb, and Sc of

→
the voltage vector V 0 are all equal to zero, and the action times of the where Sx1 (x = a, b, c) are the switching functions of the tubes on the

→
→
vectors V1 and V2 are three-phase bridge arm; ix is the AC output current of the three-
√ phase converter bridge.
3T s V ref π Since converters usually carry inductive loads such as motors,
t V1  sin − θ, (3)
V dc 3 their output current ripple is relatively small, and the ripple can

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TABLE 1 Parameters of the five-phase H-bridge. where M = 2Vref/Vdc. For a three-phase balanced load, the average
value of the input current on the converter side of its converter is a
Circuit parameter Amplitude
constant over half a carrier wave period, which is only related to the
DC voltage Vdc 10 kV modulation index and load and is independent of the carrier wave
Output current amplitude Io 100 A
frequency. From the harmonics point of view, id contains no lower
harmonic component except for the DC component and the carrier
Modulation ratio M 0.8
harmonic component.
Base wave frequency fo 50 Hz The RMS value of i d within half a carrier wave period
satisfies
Carrier ratio N 50
t V1 i2a − t V2 i2c 
1T
2 s
Power factor cosΦ 0.85 i2d,rms  i2d dt  . (11)
0 Ts
DC-link capacitors C 1200 μF
Due to the symmetry of the three-phase converter, the RMS
Line resistance on the DC bus Rl 4 mΩ
value of the id over the fundamental period is obtained by integrating
Line inductance on the DC bus Ll 1 mH over a sector (π/3):
Series equivalent resistance of DC-link capacitors Rc 1.4 mΩ 3 π
i2d,rms dφ,
I 2d,rms  3
(12)
Series equivalent inductance of DC-link capacitors Lc 60 nH
π 0

and solving to get

DC power supply internal resistance Rdc 10 mΩ

√ 
DC power supply internal inductance Ldc 100 μH 2 3 1
I d,rms  Io M  + cos 2 φ. (13)
π 4

usually be neglected and treated as a standard sinusoidal waveform. According to the circuit shown in Figure 4, the converter-side
The literature (Kolar and Round, 2006) explored the effects of input current id, the DC-link capacitor current ic, and the rectifier-
ignoring/not ignoring the output current ripple on the solution side output current iL are satisfied with the following:
results and pointed out that the difference between the calculated
ic  id − iL . (14)
results of the DC-link capacitor current does not exceed 8%. For a
three-phase balanced load, in neglecting the load current ripple, the When the ripple of the rectifier output current is not considered,
load current satisfies Eq. 6: iL contains only the DC component, whose magnitude is the same as
√ the DC component Id,avg of the input current on the converter side.
⎪ ia  2 I o sinωt + φ
⎪
⎧
⎪
⎪
⎪ According to Parseval’s theorem, the RMS value of the DC-link
⎨ i  √2 I sinωt − 2 π + φ
⎪
capacitor current at this time satisfies the following:
⎪
b o
3 , (6)
⎪
⎪
⎪
⎪ √  I 2c,rms  I 2d,rms − I 2d,avg .
⎪ 4
⎩ ic  2 I o sinωt − π + φ (15)
3
ia + ib + ic ≡ 0, (7) By substituting Eqs 10, 13 into Eq. 15 we obtain

√ √ 
where Io is the RMS value of the load current. According to the 3 3 9
I c,rms  I o 2M  + cos 2 φ − M . (16)
aforementioned analysis, the average value of the input current on π π 16
the converter side over half a carrier wave period is
When considering the current ripple obtained by the rectifier
1T
2 s
side, the input current id on the converter side and output current iL
id,avg  id dt  (t V1 ia − t V2 ic ) T s . (8)
0 on the rectifier side can be expressed as follows:
In Eqs 3, 4, θ represents the angle between the reference vector id  I d,avg + id,ac , (17)
and the a-axis, and θ  ωt − 12 π (Kolar and Round, 2006). Therefore, iL  I L,avg + iL,ac , (18)
we substitute Eqs 3, 4, 6 into Eq. 8 to obtain
√ π where id,ac is the AC component of the input current on the
6I o T s V ref cos(ωt ) cos + φ + ωt 
6 converter side, IL,avg is the DC component of the output current
√ π
+ 6I o T s V ref sinφ + ωt  sin + ωt  on the rectifier side, and iL,ac is its AC component. Equation 14 can
id,avg  6 . (9) be simplified as follows:
V dc T s
ic  id,ac − iL,ac . (19)
Further simplifying it to
√ √ The relationship between the frequency and phase of each
6I o T s V ref cosφ − π6 + 6I o T s V ref cosπ6 + ωt 
id,avg  I d,avg  harmonic of id,ac and iL,ac will affect the RMS value of ic.
2V dc
√ According to the Cauchy–Schwarz inequality, the RMS value of
3 2
 I o M cos φ, the aforementioned equation satisfies the relationship.
4
(10) I c,rms ≤ I d,ac,rms + I L,ac,rms . (20)

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FIGURE 14
Comparison of simulation and theoretical result of harmonic spectra of DC-link capacitor current ic1–ic5. (A) Comparison of harmonic spectra of ic1,
(B) Comparison of harmonic spectra of ic2, (C) Comparison of harmonic spectra of ic3, (D) Comparison of harmonic spectra of ic4, (E) Comparison of
harmonic spectra of ic5.

√
Equation 20 represents the worst-case maximum RMS value of 16 3
M ≈ 0.98, (22)
the DC-link capacitor current. 9π
cosφ in Eq. 16 is approximately dropped, and the value of Ic,rms is
2.1.1 Analysis of calculation results
largely independent of φ.
According to Eq. 16, the RMS value of the DC-link capacitor
Figure 5 shows the relationship between the ratio of the RMS
current can be considered a function related to the load current and
values of the DC-link capacitor current and load current (Ic,rms/Io)
modulation index. When cosφ is close to 1, Ic,rms is maximum when
with each parameter. As can be seen in Figure 5A, Ic,rms/Io
√ approaches its peak (extreme value) when M is close to 0.6; and
8 3 1
M Ic, max  1 +  ≈ 0.61. (21) when cosφ = 0, Ic,rms/Io no longer exhibits the extreme value
9π 4cos 2 φ
characteristic but increases monotonically with M, and it is
√
According to Eq. 10, id has no DC component when cosφ is close approximately proportional to M. As can be seen in Figure 5B,
to 0. The DC-link capacitor current Ic,rms in Eq. 16 increases with the when M is close to 0.98, the value of Ic,rms/Io has a weak relationship
modulation index M. The ratio of its effective value to the load with φ, and its amplitude fluctuates very little with changes in φ.
√
current (Ic,rms/Io) is approximately proportional to M. The aforementioned analysis of the relationship between the
When the modulation index M is close to DC-link capacitor current and variables is for the three-phase two-

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TABLE 2 Comparison of the simulation and theoretical results of the RMS value of the DC-link capacitor current.

Capacitor current RMS Phase 1 Ic1_rms (A) Phase 2 Ic2_rms (A) Phase 3 Ic3_rms (A) Phase 4 Ic4_rms (A) Phase 5 Ic5_rms (A)
Simulation result 43.53 34.39 44.29 34.84 46.35

Theoretical calculation 43.89 34.39 44.57 34.98 46.70

capacitor current is not available. This will seriously affect the

accuracy of the results when calculating the capacitor heating,
and the error will exceed the impact of the output current ripple,
diode reverse recovery time, and other factors on the heating
calculation.

2.2 Calculation of DC-link capacitor current

spectrum

Considering that the equivalent circuit parameters of capacitors

are related to the operating temperature, voltage stress, and
frequency, in order to estimate and calculate electrical and
thermal stresses of capacitors more accurately, the current
harmonic spectrum flowing through the DC-link capacitors has
FIGURE 15 to be calculated for a more accurate estimation of heat generation in
RMS value of first phase DC-link capacitor current with different engineering. The current ripple on the DC side of the converter is
capacitance C and DC bus inductance Ll (Rc = 1.4 mΩ and Rl = 4 mΩ). observed as being caused by the PWM modulation strategy, and the
current analysis of the PWM strategy mainly uses the double-
Fourier analysis (Holmes, 1998; Moynihan et al., 1998; McGrath
level converter topology, but the laws and trends of this relationship and Holmes, 2002).
are also applicable to other conventional multi-phase and multi-
level converter structures, where only the ratio and amplitude of the 2.2.1 Double-Fourier analysis
parameters between the corresponding variables are different. The By continuing to use the three-phase two-level converter shown
correctness of the calculation results can initially be judged in Figure 4 as an example, the process of calculating the harmonic
according to the corresponding trends in practical engineering. expression for the DC-link capacitor current using the double-
Fourier analysis is described. Assuming a SPWM strategy at the
2.1.2 Development of current RMS calculation converter side, we set the time variable as follows:
On the basis of the aforementioned calculation methods, domestic x(t )  ωc t + θc
, (23)
and foreign scholars have also optimized many of these and expanded y(t )  ωo t + θo
new application areas. The literature (Pei et al., 2015; Li and Jiang, 2018)
provides a more accurate analytical solution for the RMS value of the where ωc and ωo are the carrier wave angular frequency and
DC-link capacitor current, considering the ripple of the load current, modulating wave angular frequency, respectively. θc and θo are
and showing the calculation result that the load current ripple will the initial phase angles of the carrier and modulating waves,
increase the peak DC current, but its expression involves several AC side respectively. The switching function Sx1 of the upper switching
parameters and the result is more complicated. In the literature tube of a bridge arm on the converter side can be expanded into
(Welchko, 2007), the RMS value of the DC-link capacitor current of a double-Fourier series form as
a three-phase two-level converter after eliminating the common-mode
A00 ∞
voltage is calculated by analyzing the vector synthesis method, and the Sa1 x, y  + A0n cosny + B0n sinny
2 n1
results show that the elimination of the common-mode voltage leads to
∞
an increase in the DC-link capacitor current to 1.3–2 times that of the +  [Am0 cos(mx) + Bm0 sin(mx)]
original one. In the literature (Guo et al., 2018), the converter shunt m1
diode reverse recovery problem was considered and the method for ∞ ∞

solving the RMS value of the DC-link capacitor current was optimized +   Amn cosmx + ny + Bmn sinmx + ny,
m1 n−∞
by considering more factors that affect the calculation results, such as (n ≠ 0)

the switching frequency of the converter, reverse recovery time, and (24)
current of the inverse shunt diode.
where
It should be noted that no matter how accurately the RMS value
π π
of the DC-link capacitor current is calculated, the method has its 1
Amn + jBmn  Sa1 x, yej(mx+ny) dxdy. (25)
unavoidable limitation that the amplitude of each harmonic of the 2π 2 −π −π

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TABLE 3 Comparison of DC-link capacitance current analysis methods.

DC-link capacitor current Advantage Disadvantage Range of application

analysis method
Simulation method High accuracy Difficulty in modeling Less used

RMS analysis method Small calculation volume; relatively Cannot show the effect of current spectrum Most used
high accuracy

Spectral resolution method High accuracy; shows the effect of More complex Less used
current spectrum

Method based on a constant current High accuracy; considers the High computational effort; difficulty in Newly proposed; distributed DC-link
source equivalent circuit resonance obtaining resonance parameters capacitor current calculation

∞
To simplify the expression, the modulated signal is expressed in ^00 + A
id (t )  A ^0n cos(2nωo t ) + B^0n sin(2nωo t )
the cosine form: n1
∞ ∞
^mn cos(mωc t + 2nωo t ) + B
+  A ^mn sin(mωc t + 2nωo t ),
vx  M cos(ωo t + θox ), (26)
m1n−∞

where θox denotes the initial phase of the phase x (x = a, b, c) (31)

modulated wave. According to the relationship between the carrier where
and modulating wave, the unit element of the switching function Sx1
^00  1 I o A01 cos φ  M I o cos φ,
A
can be obtained as shown in Figure 6. 2 4
The boundary of the unit cell shown in Figure 6 specifies the 1
A^mn  I o Am,n−1 + Am,n+1  cos φ, (32)
range of integration defined in Eq. 25, and it is only in this range that 2
the switching function Sa1 = 1 and Eq. 25 are rewritten as
^mn  − 1 I o Am,n−1 − Am,n+1  sin φ.
B
π π
(1+M cos y) 2
1
ej(mx+ny) dxdy.
2
Amn + jBmn  (27)
2π 2 −π − π2 (1+M cos y) The purpose of using the cosine form to express the modulating
signal and output current on the converter side of the converter is to
We solve the equation simplify the double-Fourier integral equation; except for the initial
1 M phase difference of π/2 of the modulating waveform, the
Sx1  + cos(ωo t + θox ) connotations of using the sine and cosine forms are exactly
2 ∞2
2 1 π π equivalent. When using the sine form expression in Eq. 6, the
+  J 0 m M  sin m cos(m[ωc t + θc ])
π m1 m 2 2 solution results will not be any different, except that Eqs 24, 31
2 ∞ ∞ 1 π π will be slightly more complicated.
+   J n m M  sin[m + n] 
π m1 n−∞ m 2 2 According to Eq. 1, the DC-link capacitor current ic is equal to
(n ≠ 0)
the DC-side input current id minus the rectifier-side output current
× cos(m[ωc t + θc ] + n[ωo t + θox ]). (28) iL. When the rectifier-side current ripple is not considered, ic is equal
to id, excluding its DC component.
and since the carrier phase angle is the same for all three half-bridge
arms at any moment, for the convenience of calculation, the carrier ic  id − I d dc . (33)
phase angle θc is set to zero in the above equation, and the initial
phase angles of the three modulated waves differ from each other The spectrum of the DC-link capacitor current is obtained by
by 120°: Eq. 33.
With Id_h,rms(k) denoting the RMS value of the k-th harmonic of
θax  0, θbx  −2/3π, θcx  −4/3π. (29) the input current on the converter side, the RMS value of the current
flowing through the DC-link capacitors according to Parseval’s
Assuming that the converter output current is a three-phase
theorem is
symmetric sine wave, for the convenience of calculation, Eq. 6 is

expressed in the cosine form, and Eqs 6, 28 are taken into Eq. 5 to 
+∞
obtain the harmonic expression for the input current id on the I c,rms   I 2d h,rms (k ). (34)
converter side as follows: k1

2
id (t )  Sa1 (t ) × I o cosωo t + φ+Sb1 (t ) × I o cosωo t − π + φ
3 2.2.2 Considering AC output ripple
4
+Sc1 (t ) × I o cosωo t − π + φ. (30) When considering the converter output current ripple, a
3
correction to Eq. 30 is required. Usually, the corresponding
The aforementioned equation can be reduced to a harmonic component is superimposed on the fundamental
convolution integral in the frequency domain (McGrath and component of the output current. According to the literature
Holmes, 2009) or solved directly by using the (Renken, 2005), the current ripple can be considered to be a
prosthaphaeresis, and the result is result of the action of the converter output voltage on the filter

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circuit, and the output port load is equated to the circuit shown in For the 3L-FC converter of Figure 8B, the relationship between
Figure 7, where ix,f is the fundamental component of the output the input current and flying capacitor is
current and the remaining components of each ripple are equal to
id1  S1 × io , (39)
the output voltage harmonics divided by the corresponding filter
ic2  (S2 − S1 ) × io . (40)
circuit impedance. Assuming that the converter output voltage
harmonics resolution is vxo (ω), the converter output current For the 5L-CHB converter shown in Figure 8C, its input current
expression at this time is then expression is

v xo (ω) jφz (ω) id1  (S1 − S2 ) × io , (41)

ixo  ix,f + e , (35)
|Z (ω)| id2  (S3 − S4 ) × io . (42)
where |Z(ω)| is the filter circuit impedance, which is determined by These results show that for all these converter topologies, the DC
the filter resistor, inductor, and filter capacitor parameters and input current or suspended capacitor current of a single bridge arm
φz (ω) is the corresponding phase shift angle; both parameters is defined by the product of two time-varying signals. When the
are functions of the harmonic frequency. multi-phase bridge arms are combined into a complete converter
After the output current expression is corrected, it can then be system, the DC-side current is the superposition of the input
substituted into Eqs 30–34 to calculate the DC-link capacitor current currents of each phase bridge arm.
spectrum. In general, the output current ripple causes the DC-link For the calculation of the spectrum of the switching function, the
capacitor current to become large when the output power is small. same double-Fourier transform approach can be used for multi-level
However, when the output power increases, the DC-link capacitor converters: first, the unit cell of the switching function is calculated
current caused by the fundamental component of the output current according to the modulation strategy, then the integration range is
dominates, and the effect produced by the output ripple is very small determined according to the unit cell, and finally the spectral
and can basically be ignored. expression of the switching function is calculated (McGrath and
Holmes, 2002; Bierhoff and Fuchs, 2008; Orfanoudakis et al., 2013;
Sun et al., 2014).
3 Calculation of the multi-level, multi-
phase converter structure DC-link
capacitor current 3.2 Multi-phase converter
3.1 Multi-level converter In recent years, multi-phase motors have been widely used in
various fields because of their small size, light weight, and high
In medium and high voltage and high-power applications, with torque density (Levi et al., 2007); the accompanying multi-phase
the increase in DC-side voltage, the conventional two-level converter technology is developing rapidly and is widely used.
converters can no longer meet the requirements of the device Generally speaking, the converter side of a multi-phase converter
withstand voltage levels. Multi-level converters are widely used in is one containing a multi-phase converter bridge arm; its DC side
medium voltage and high-power applications because of the only has a set of DC-link capacitors, which are arranged between the
advantage of withstanding high voltage levels, no requirement for rectifier side and multi-phase converter side.
series connection of power devices, low harmonic distortion, and The input current of the multi-phase converter side can simply
low switching losses. The conventional multi-level topologies mainly be regarded as the superposition of the input currents of the bridge
include neutral point clamped (NPC) (Nabae et al., 1981; Jayakumar arms of each phase. Regardless of the number of phases on the
et al., 2021; Xin et al., 2022), flying capacitor (FC) (Defay et al., 2010; converter side, the input current is obtained by a simple calculation
Barth et al., 2019; Ye et al., 2021), and cascaded H-bridge (CHB) of the superposition theorem. Taking the literature as an example,
converters (Hammond, 1997; Lezana et al., 2008; Mhiesan et al., which first calculates the analytic expressions of the input current
2020; Maheswari et al., 2021), whose topologies are shown in spectrum of a single-phase two-level H-bridge converter, and then
Figure 8, where Figure 8A shows the topology of the three-level gives the expressions of the input current spectrum of a 3-phase and
neutral point clamped (3L-NPC), Figure 8B shows the topology of 12-phase H-bridge converter by linear superposition of the output
three-level flying-capacitor (3L-FC), and Figure 8C shows the currents of each phase H-bridge converter unit.
topology of the five-level cascaded H-bridge (5L-CHB). It is shown that the RMS of the DC-side current will become
The behavior of the switching device in the form of a switching significantly smaller as the number of converter phases increases
function is continuously described, assuming that the dead time of (Parsa, 2005; Levi, 2008), and the multi-phase converter structure
the switch is not considered, and while treating the phase output can reduce the DC-link capacitor requirements. This is because
current as a sinusoidal wave, the expression for the input current of some of the harmonics of the input currents of each phase at the
the single bridge arm of the 3L-NPC converter is obtained according multi-phase converter side cancel each other on the DC bus, and as
to Figure 8A. the number of phases increases, only the harmonics of the n*phase
times will remain, and the rest of the harmonics all cancel each other
id1  S1 × io , (36)
to zero.
id2  (1 − S2 ) × io , (37) Many modulation strategy optimization methods have also been
in  (S1 − S2 ) × io . (38) proposed by domestic and foreign scholars to reduce the DC-side

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current stress in multi-phase converter structures. The literature When Fres < 1, the inherent resonant frequency of the circuit is
(Kim and Sul, 1993; Kieferndorf et al., 2004; Su and Tang, 2012; higher than the carrier wave frequency, if there is no large enough
Rouhana et al., 2014; Umesh and Sivakumar, 2017) investigated the damping in the resonant circuit composed of the DC-link capacitors
method of reducing DC-link capacitor current in-depth by carrier and DC-side inductor (the quality factor Q is very high), then the
phase shifting; based on this, the literature (Diana et al., 2019) resonance will be very strong and will seriously affect the size of the
studied the RMS value of the input current of a five-phase two-level DC-link capacitor current. At this time, the calculation method in
converter and explored the effect of the interleaved phase shifting Sections 3, 4 will have a huge error.
strategy on the DC-link capacitor current. It was found that a correct Figure 9 shows the relationship between the error of the RMS
phase-shifting strategy can reduce the DC capacitor current by value calculation method of the DC-link capacitor current and each
approximately 40%. Multi-phase converter systems bring more resonance parameter mentioned in Section 3. When Fres is very
freedom to the modulation strategy (Su and Tang, 2012; Diana small (Fres < 0.1) or Fres is large (Fres > 3), the error of the
et al., 2015), and converters with a large number of phases can conventional RMS calculation results is small. The larger the
significantly reduce the magnitude of the DC-link capacitor current quality factor Q, the larger the error caused in the calculation of
by a reasonable modulation strategy (e.g., carrier phase-shift the RMS value. This is because as Q gets larger, the resistance of the
modulation). resonant circuit will be smaller and its resonance will become
stronger, resulting in a significantly larger DC-link capacitor
current, making the traditional RMS calculation results small and
4 DC-link capacitor resonance problem providing a negative relative error.
This work argues that this is essentially because when Fres is
4.1 Resonance between DC-link capacitors large, the carrier wave frequency of the converter is greater than the
and bus inductor inherent resonant frequency of the circuit, and the resonant
frequency is close to the fundamentals of the converter input
Generally speaking, the resonance of DC-link capacitors and current spectrum, and the amplitude of the harmonic
bus inductor is relatively weak, and this resonance problem is components in the vicinity is close to zero, and the resonance
usually ignored. In actual engineering, when the DC-side cable is does not have a large impact on the input current spectrum.
very long and the line inductance is large, the line inductance When Fres is very small, the inherent resonant frequency of the
will resonate with the DC-link capacitors and affect the current resonant loop is high and falls outside the high carrier side band of
flow through the DC-link capacitors due to the presence of the the converter input current, and since the amplitude of these high
input current ripple on the converter side. Foreign scholars have harmonics is very small, they do not have a large impact on the input
studied the resonance of DC-link capacitors of the three-phase current spectrum. When 0.1 < Fres < 1, the resonant frequency falls
two-level converter, and the literature (Mantzanas et al., 2019) within the low carrier side band of the converter input current, and
points out that the resonance degree of the DC-link capacitors is the low carrier harmonic amplitude is large, which will significantly
affected by the PWM carrier wave frequency and the magnitude be amplified by the resonance, causing a significant increase in the
of the inherent resonance frequency of the circuit. When the DC-link capacitor current.
ratio of the PWM carrier wave frequency to resonant frequency
is denoted by Fres, and the ratio of the PWM carrier wave
frequency toward the modulating wave frequency is denoted 4.2 Resonance problem of multi-phase and
by F ac. multiple DC-link capacitors distributed
fs √ arrangement structure
F res   2πf s LC , (43)
f LC
With the rapid development of new energy industry and the
fs
F ac  . (44) wide application of advanced transmission systems, some converter
fo
systems dealing in wind power generation, industrial transmission,
The quality factor Q of the DC-side circuit is equal to vessel propulsion, and other fields gradually adopt the structure of
 the distributed arrangement of multi-phase DC-link capacitors
L 1
Q , (45) based on the idea of a modular design. With this arrangement,
C Rdc + Rc
multiple DC-link capacitors may generate more complex resonance
where C is the DC-link capacitor, L is the DC bus inductor, Rdc is the with DC bus spurious parameters, forming a loop on the DC bus,
DC supply resistance, Rc is the series resistance of the DC-link which greatly affects the DC-link capacitor current.
capacitors, fs is the carrier wave frequency, and fo is the modulating In the field of vessel propulsion, new multi-phase open-winding
wave frequency. propulsion motors are matched with multi-phase multi-level
The literature (Mantzanas et al., 2019) shows that when Fres > H-bridge converters. According to the DC 10 kV/tens of MW
max (10, 10/Q) and Fac ≫ 10, the inherent resonant frequency of the propulsion power demand, the converter side of the matched
circuit is very low, the carrier wave ratio is very high, and the propulsion converter can adopt a five-phase H-bridge structure
resonance has very little effect on the DC-link capacitor current at scheme based on four-level nested neutral point clamped (4L-
this time, and the method introduced in Sections 3, 4 can accurately NNPC) topology (Narimani et al., 2014; Tian et al., 2016; Tan
solve the current flowing through the DC-link capacitors. et al., 2017), as shown in Figure 10.

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This four-level five-phase H-bridge converter has a distributed arrangement and the DC bus resistance and the series resistance of
arrangement of multiple DC-link capacitors, with independent DC- the capacitor are very small. If the frequency of a certain ripple of the
link capacitors on the DC side of each phase of the H-bridge power bus current is close to the system resonance point, it will cause a
unit. Considering the effects of bus spurious parameters and DC- sharp increase of this ripple on the DC-link capacitors and
link capacitor series equivalent parameters, the topology of this type significantly affect the current component of the DC-link
of multi-level five-phase H-bridge converter is shown in Figure 11. capacitors. When the frequency of the system resonance point is
Here, Invi denotes the phase i converter H-bridge power unit, ici close to the main spectrum of the H-bridge input current, it will
denotes the current of the phase i DC-link capacitors; Rci and Lci are cause a sharp increase in the harmonic amplitude of the DC-link
the phase i DC-link capacitor series equivalent resistance ESR and capacitor current, which will lead to a sharp increase in the heating
inductance ESL. Rli and Lli are the line resistance and inductance on of the capacitor or even burn up in severe cases. Therefore, for the
the DC bus of section i, respectively. For the phase 1 power unit, its converter with the capacitor distributed arrangement, the possible
DC bus spurious parameters are combined into the DC power resonance must be considered when the DC-link capacitors are
supply series impedance and are not listed separately. The five-phase selected and designed.
power units in the actual converter have the same structure, the
same length as the DC bus for each segment, and the same value for
each phase parameter: Cdci = C, Rci = Rc, Lci = Lc, Rli = Rl, and Lli = Ll. 4.3 Distributed DC-link capacitor current
In order to simplify the resonant characteristics of the system, calculation
only the ripple introduced by the first phase H-bridge is considered
first. The first phase H-bridge introduces the ripple current at both Based on the topology of the converter side of the converter, the
ends of the DC-link capacitor Cdc1 branch and equates it to a input current of the single-phase H-bridge can be calculated using
“constant current source” id1_ac, with the corresponding ripple the double-Fourier analysis method introduced in Section 4. Taking
output. The resonant equivalent circuit of the frequency the 4L-NNPC topology shown in Figure 11 as an example, we
conversion system is shown in Figure 12. assume that the harmonic expression of the input current of the
According to Kirchhoff laws, the magnitude of the current ic1 in H-bridge unit is calculated at this point as idi, where i  1, 2, .., 5.
the branch of the capacitor Cdc1 is According to the superposition theorem, the equivalent circuit
Z eq response when each phase of the H-bridge input current acts
ic1  id1 ac , (46) separately is obtained and superimposed to obtain the current
Z eq + Z c
magnitude of each phase DC-link capacitor during normal
where Zeq is the equivalent line impedance after series–parallel operation.
connection of the rear four-phase DC-link capacitance and The input source of each phase H-bridge converter unit as a
busbar spurious parameters. harmonic is equated to the constant current source idi_ac, and its
output current is the input current of the H-bridge idi minus the DC
Z eq  {[(Z c + Z l )  Z c + Z l ]  Z c + Z l }  Z c + Z l v, (47)
component.
where Zc  jωC1
+ jωLc + Rc and Zl  jωLl + Rl denote the DC-link idi ac  idi − I d dc . (52)
capacitor branch and inter-cell DC bus impedance, respectively.
When the resistance Rc and Rl are very small, the denominator of The resonant equivalent circuit of the five-phase converter
Zeq/(Zeq + Zc) tends to be 0 at certain angular frequencies, the circuit system is obtained as shown in Figure 13.
resonates, and there is a sharp increase in the amplitude of the When the phase 1 constant current source i d1_ac acts alone,
current ic1 phenomenon. Formula (46) is more complex to develop for the k-th harmonic i d1h (k) in i d1_ac , its angular frequency is
and directly provides the results of the resonance point; when Rc and ω = 2πkf 0 , where f 0 is the fundamental frequency; similar to Eq.
Rl tend to be 0, the resonance point can be expressed as 16, when analyzing the resonance characteristics, the current

√  component i ci_d1h (k) of the k-th harmonic i d1h (k) on the phase
2Lc + 3 + 5 Ll i DC-link capacitors can be found according to the
ω1  , (48)
2C L2c + 3Lc Ll + L2l  series–parallel relationship of the circuit. Solving the current

√  response of each phase DC-link capacitors under the action of
2Lc + 3 − 5 Ll
ω2  , (49) each harmonic in i d1_ac and linearly superimposing it, we can
2C L2c + 3Lc Ll + L2l 

√  obtain the analytical formula of each phase DC-link capacitor
10Lc + 5 + 5 Ll current harmonic when the phase 1 constant current source
ω3  , (50)
2C 5L2c + 5Lc Ll + L2l  acts alone as follows:

√  +∞
10Lc + 5 − 5 Ll
ω4  . (51) ici d1   ici d1h (k ), (53)
2C 5L2c + 5Lc Ll + L2l  k1

The resonant characteristics of the system equivalent circuit where i  1, 2, .., 5.

when the five-phase equivalent constant current sources act The harmonic resolution of each DC-link capacitor current
separately are similar to those mentioned above. The analysis when the five constant current sources act individually is solved
shows that the DC-link capacitors may resonate with the DC bus separately, and the results of each constant current source are
inductor when the DC-link capacitors are arranged in a distributed linearly superimposed to obtain the harmonic resolution of each

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phase DC-link capacitor current when the system works normally, capacitor current considering the effects of resonance and
where the phase i DC-link capacitor current is circulating current, and quantitatively solve the magnitude of the
ici  ici d1 + ici d2 + ici d3 + ici d4 + ici d5 , (54) DC-link capacitor current of each phase at resonance. According to
this method, the main resonance points of the system can be avoided
where i  1, 2, . . . , 5. and the resonance of the DC-link capacitors and busbar inductor
According to Parseval’s theorem, the effective value of the can be attenuated during the design, which can effectively guide the
current ripple of each phase DC-link capacitor can be calculated selection design of the DC-link capacitors and busbar parameters of
by Eq. 55: the converter with the distributed arrangement of the DC-link

 capacitors.
+∞
I ci rms   I 2cih rms (k ), (55)
k1

5 Conclusion and outlook

where i  1, 2, . . . , 5 and Icih_rms(k) denotes the k-th harmonic RMS
value of the DC-link capacitor current in phase i. According to the principle of DC-link capacitor current analysis
A five-phase 4L-NNPC topology H-bridge simulation circuit methods in converter systems, this work divides the DC-link
with multiple DC-link capacitor distributed arrangement structures capacitor current analysis methods into three categories, namely,
is built using the MATLAB/Simulink simulation software, and the simulation method, RMS analysis method, and spectral analysis
parameters are shown in Table 1. method. The research status, advantages, and disadvantages of the
The resonance points of the phase 1 DC-link capacitors at this latter two analytical calculation methods are reviewed and
parameter are located near the 54th, 103rd, and 140th harmonic summarized one by one, and their detailed calculation process is
frequencies, which fall near the three carrier side bands of the input introduced with the example of a three-phase two-level converter.
current id. The phase 1 DC-link capacitor current ic1 harmonic Then, the general solution of the input current spectrum of the
spectrum is obtained by using the fast Fourier transform of the phase multi-level converter and the characteristics of the multi-phase
1 DC-link capacitor current ic1 time domain simulation waveform converter DC-link capacitor current are introduced. To address
on a fundamental period. The results are shown in Figure 14A when the problem of resonance with the DC bus when the converter has a
compared with the theoretical calculation results of Eq. 54. The distributed arrangement of multiple DC-link capacitors, this work
results of equation calculation and simulation for the remaining four investigates the effect of resonance on the DC-link capacitor current,
phases of the DC-link capacitor current are shown in Figures 14B–E. equates each phase converter unit as a “constant current source” of
The simulation results of the RMS value of the DC-link capacitor the input current ripple, and establishes a resonant equivalent circuit
current for each phase are compared with the theoretical results of the common DC bus with multiple constant current sources. The
calculated according to Eq. 55 as shown in Table 2. resonant characteristics of the system are investigated, and the
It can be seen that the difference between the formula calculation harmonic analytic formula of the DC-link capacitor current of
and simulation results of the DC-link capacitor current spectrum is each phase under resonance is derived, which can be used to
very small, which verifies the correctness of the equivalent circuit of guide the selection and design of the DC-link capacitors of
multiple constant-current sources with the distributed arrangement converters of related structures. Details of the advantages and
of DC-link capacitors and the analytical formula of the DC-link disadvantages of the aforementioned strategies and the applicable
capacitor current spectrum derived in the previous section. working conditions are shown in Table 3.
The distributed arrangement of DC-link capacitors in common In the calculation of the DC-link capacitor current, the new
DC bus brings the problem of circulating current and resonance. energy field has complex working conditions. In photovoltaic power
The DC-link capacitors and DC bus parameters determine the generation and wind power generation, the constant changes in
resonance characteristics, such as the inherent frequency of the sunlight and wind speed have a great impact on the current ripple
system, resulting in the DC-link capacitor current being directly stress of the DC-side DC-link capacitors, which must be considered
influenced by several parameters, such as capacitor capacitance size in the actual calculation. Second, distributed multiple DC-link
and bus inductance resistance. capacitor common DC bus structure converter devices are widely
Here, we take the first phase DC-link capacitor current RMS used, so the analysis and calculation of their capacitive resonance
value Ic1_rms as an example. According to Eq. 55, when the series problems require the accurate acquisition of DC bus inductance.
equivalent resistance of the DC-link capacitors is 1.4 mΩ and line However, there is no good estimation method for measurement. In
resistance on the DC bus is 4 mΩ, the surface of the first-phase DC- addition, the degradation of DC, DC-link capacitors, and other
link capacitor current RMS at different support capacitance C and components (such as switching devices) in the converter system will
line inductance on the DC bus Ll is shown in Figure 15. As can be in turn affect the DC-link capacitor current.
seen from the figure, there are several resonant peak points of the With the continuous development of power electronics
capacitor current RMS, and these resonant peak points should be technology, the selection and design of DC-link capacitors will
avoided as much as possible to prevent the DC-link capacitor face the following challenges in the future: 1) fierce competition
current from increasing when designing the actual multiphase in the global market. DC-link capacitors have to reduce the
inverter system. redundancy design to compress the cost under the premise of
This multi-constant current source equivalent circuit method ensuring the system reliability. 2) The power density of converter
can accurately calculate the resonance points of a multi-phase devices is increasing, and the design of DC-link capacitors is subject
system, obtain the harmonic analytic formula of the DC-link to more and more severe volume and heat dissipation constraints. 3)

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Guo et al. 10.3389/fenrg.2023.1240755

With the wide application of new energy fields and the development Defense Strengthening Foundation Plan of China (grant no.
of advanced propulsion fields, the future working environment of 2022-JCJQ-JJ-0537).
DC-link capacitors may involve high temperature, sunlight
(photovoltaic power generation), high salt and high humidity
(vessel propulsion), and other harsh conditions, which puts Acknowledgments
forward further requirements on its reliability design.
Future research work can be targeted to explore these issues to The authors would like to thank Xin and Associate Researcher
achieve a more accurate analysis and calculation of the DC-link Hu for their helpful discussions on topics related to this article.
capacitor current and better guide its selection and design.

Conflict of interest
Author contributions
The authors declare that the research was conducted in the
CG and BL were responsible for the main writing of the absence of any commercial or financial relationships that could be
manuscript, while ZX was responsible for the revision of the construed as a potential conflict of interest.
manuscript. LH provided the ideas and revised the manuscript
based on his extensive knowledge and experience in power
electronics. All authors have contributed to the article and Publisher’s note
approved the submitted version.
All claims expressed in this article are solely those of the authors
and do not necessarily represent those of their affiliated
Funding organizations, or those of the publisher, editors, and reviewers.
Any product that may be evaluated in this article, or claim that
This work was supported by the National Natural Science may be made by its manufacturer, is not guaranteed or endorsed by
Foundation of China (grant no. 51907200) and the National the publisher.

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