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12 Digital Devices

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0% found this document useful (0 votes)
56 views32 pages

12 Digital Devices

Uploaded by

Maxi Brad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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COMPUTER SCIENCE

S E D G E W I C K / W A Y N E

SEDGEWICK

ntist WAYNE
Computer Science

ary
A N I N T E R D I S C I P L I N A RY A P P R O A C H

or

d
gs,
of

omputer
C cience 12 Digital Devices
hem

h.

S
nce
d
wick

ysis
orics;
ver

An Interdisciplinary Approach

ROBERT SEDGEWICK
ANADA
K E V I N WAY N E
Sections 7.5
http://introcs.cs.princeton.edu
COMPUTER SCIENCE
S E D G E W I C K / W A Y N E

12 Digital Devices
• TOY 8
• Bits, registers, and memory
• Program counter
• Components and connections
A smaller computing machine: TOY-8

TOY instruction-set architecture. Type 1 instruction


• 256 16-bit words of memory. opcode Rd Rs Rt

• 16 16-bit registers. 4 bits to specify


• 1 8-bit program counter. Type 2 instruction one of 16 registers
opcode Rd addr
• 2 instruction types.
• 16 instructions. 8 bits to specify one of
256 memory words

TOY-8 instruction-set architecture.


• 16 8-bit words of memory. TOY-8 instruction
opcode addr
• 1 8-bit register. 0

• 1 4-bit program counter. 3 bits to specify 4 bits to specify one of


one of 8 instructions 16 memory words
• 1 instruction type. always 0
• 8 instructions. (future expansion of memory or instruction set)

Purpose of TOY-8. Illustrate CPU circuit design for a "typical" computer.


3
TOY-8 reference card

opcode addr
0
Add two numbers from memory and
opcode operation pseudo-code A TOY-8 program put sum in memory

0 halt halt
Memory
PC
2 add R = R + M[addr]
1 1 A 5 R = M[5]
4 bitwise and R = R & M[addr]
2 2 2 6 R = R + M[6]
6 bitwise xor R = R ^ M[addr]
M[7] = R
3 3 C 7
8 load addr R = addr 4 halt
4 0 0
A load R = M[addr]
5 0 5
C store M[addr] = R
6 0 8
E branch zero if (R == 0) PC = addr 7 0 D
...
ZERO M[0] is always 0.

STANDARD INPUT Load from M[F].


R 0 D
5
STANDARD OUTPUT Store to M[F].
Challenge for the bored:
Write Fibonacci seq, add numbers on stdin, ...
4
CPU circuit components for TOY-8

TOY-8 CPU
• ALU (adder, AND, XOR)
• Memory ALU
CLOCK

• Register (R)
MEMORY
• PC CONTROL

• IR
• Control PC

• Clock

IR

Goal. Complete CPU circuit for TOY-8 (same design extends to TOY and to your computer).
5
Review: Components, busses, and control lines

Basic design of our circuits


• Organized as components (functional units of TOY: ALU, memory, register, PC, and IR).
• Connected by busses (groups of wires that propagate information between components).
• Controlled by control lines (single wires that control circuit behavior).

Conventions input
• Bus inputs are at the top, busses

input connections are at the left.


• Bus outputs are at the bottom, control
lines
output connections are at the right.
• Control lines are blue.
output
bus
These conventions make circuits easy to understand.
(Like style conventions in coding.)
6
Perspective

Q. Why TOY-8?

A. TOY circuit width would be about 25 times TOY-8 circuit width.

TOY

TOY-8

Sobering fact. The circuit for your computer is thousands to millions of times wider.

Reassuring fact. Design of all three is based on the same fundamental ideas.
7
COMPUTER SCIENCE
S E D G E W I C K / W A Y N E

12 Digital Devices
• TOY 8
• Bits, registers, and memory
• Program counter
• Components and connections
Memory bit application: Register

Register
• w memory bits.
input
0101 = 5

• w-bit input bus. bus


on
WRITE
• values available on output bus.
• input loaded on WRITE pulse.
output
bus
Implementation 0101 = 5

• Connect memory bits to busses.


• Use WRITE pulse for all of them.

Applications for TOY-8


• PC holds 4-bit address.
• IR holds 8-bit instruction.
• R holds 8-bit data value.
9
Memory bit application: Memory bank

Memory bank
• 2n words, each w bits. Example: 4-words, each 6 bits
• n-bit address input. input
bus
• w-bit input bus.
• value of selected word WRITE

available on output bus.


• input loaded to selected
word on WRITE pulse.

addr

output
bus
10
Memory bit application: Memory bank

Memory bank
• 2n words, each w bits. Example: 4-words, each 6 bits
• n-bit address input. input
bus
• w-bit input bus.
BIT BIT BIT BIT BIT BIT
• value of selected word WRITE

available on output bus.


• input loaded to selected BIT BIT BIT BIT BIT BIT

DECODER/DEMUX
word on WRITE pulse.

BIT BIT BIT BIT BIT BIT


Implementation
• Decoder/demux selects word.
addr
• Muliplexers take selected word BIT BIT BIT BIT BIT BIT

to output bus.

Application for TOY-8 output


bus
• Main memory.
11
TOY-8 main memory bank

Interface
input
• Input bus (for store) bus MEMORY

• Output bus (for load)


• Address to select a word MEMORY
WRITE
16 8-bit words
• Write control signal

Connections
• Input bus from registers
• Output bus to IR and R
• Address bits from PC and IR

words bits/word addr bits


addr
TOY-8 16 8 4

TOY 256 16 8

your computer 1 billion 64 32 output


bus
12
COMPUTER SCIENCE
S E D G E W I C K / W A Y N E

12 Digital Devices
• TOY 8
• Bits, registers, and memory
• Program counter
• Components and connections
Designing a digital circuit: overview

Steps to design a digital (sequential) circuit


• Design interface: input busses, output busses, control signals.
• Determine components.
• Determine connections.
• Establish control sequence.

Warmup. Design TOY-8 program counter (PC).

First challenge. Need an incrementer circuit.

Second challenge. Multiple bus connections.

14
Pop quiz on combinational circuit design

Q. Design a circuit to compute x + 1.

15
Pop quiz on combinational circuit design
J Q B0
Q. Design a circuit to compute x + 1. C
Count
K
Enable
A. Use a 4-bit synchronous counter
J Q B1
(see Sequential Circuits slides)
C
K

J Q B2
C
K

J Q B3
C
K
Output
Carry
Clock
16
Multiple bus connections

If component outputs go to multiple other components ALU

• No problem, just use T connections. R

• Values on both busses are the same.


• Example: Register connects to ALU and memory.
MEMORY

ALU
If component inputs come from multiple other components
• Problem.
?
• Values on the busses are different. MEMORY
R
• Example: ALU, memory, and IR connect to register.
• Solution: Need a selector switch (bus multiplexer).
IR

17
Program counter (PC)

The PC holds an address and supports 3 control wires:


• INCREMENT. Add 1 to value when WRITE becomes 1.
PC
• LOAD. Set value from input bus when WRITE becomes 1.
• WRITE. Enable PC address to change as specified.
The current address is always available on the output bus.

Components
• PC register (4-bit).
input
• Incrementer (add 1). bus
INCREMENT
LOAD

Connections
need 2-way
• Input bus to PC register. bus multiplexer
• Incrementer to PC register.
WRITE
• PC register to incrementer.
• PC register to output bus.

output
18
bus
Program counter (PC)

The PC holds an address and supports 3 control wires:


• INCREMENT. Add 1 to value when WRITE becomes 1.
PC
• LOAD. Set value from input bus when WRITE becomes 1.
• WRITE. Enable PC address to change as specified.
The current address is always available on the output bus.
incrementer

Components
• PC register (4-bit).
input
• Incrementer (add 1). bus
• 2-way bus mux. increment
INCREMENT
2-way bus mux
load
LOAD

Connections
• Input bus to bus mux.
• Incrementer to bus mux.
write
WRITE
• Bus mux to PC register.
PC register
• PC register to incrementer. output
• PC register to output bus. bus
output
19
bus
Summary of TOY-8 PC circuit

The PC supports two control-signal sequences:


• Load, then write. Set address from input bus (example: branch instruction).
• Increment, then write. Add one to value.
Address is written to the PC register in both cases and always available on the output bus.

PC PC

incrementer incrementer

input input
bus bus
increment 2-way bus mux increment
2-way bus mux
INCREMENT
increment Next. CPU circuit.
LOAD
load
load load

write
write
WRITE write
WRITE
write
PC register PC register
output output
bus bus

Important note: write pulse must be very short because of the cycle in this circuit. 20
COMPUTER SCIENCE
S E D G E W I C K / W A Y N E

12 Digital Devices
• TOY 8
• Bits, registers, and memory
• Program counter
• Components and connections
TOY-8: Interface
CPU is a circuit inside the machine

RUN

Interface to outside world


• Switches and lights
• ON/OFF
• RUN

Connections to outside (omitted)


• ADDR to PC TOY-8
A computing machine
• DATA to memory bank input bus
• Buttons to control lines that activate
memory load/store 22
Review: CPU circuit components for TOY-8

TOY-8 CPU
• ALU (adder, AND, XOR)
• Memory
CLOCK
ALU
• Register (R)
MEMORY
• PC

CONTROL
IR

PC
• Control
• Clock
R mux

addr mux
R

IR

Also needed (see next slide): Bus muxes for R and memory addr. "mux" is short for multiplexer

23
Connections for TOY-8 CPU

instructions bus connections

PC to memory addr
fetch (all)
memory to IR
need 2-way
CLOCK bus mux
ALU halt none
MEMORY
IR addr to memory addr
CONTROL
memory to ALU 1
add, and, xor
R to ALU 0
`
PC

ALU to R
R mux `

`
load address IR addr to R
need 3-way
addr mux bus mux
R IR addr to memory addr
load
IR memory to R

IR addr to memory addr


store
R to memory

branch if zero IR addr to PC

24
Control wires for TOY-8 CPU

component control wires


RUN
CLOCK
HALT
FETCH
FETCH WRITE
CLOCK CONTROL
ALU EXECUTE
MEMORY EXECUTE WRITE
ADD
CONTROL
ALU XOR
AND
`
PC R MUX ALU
R mux R MUX MEM
R mux
`

R MUX IR
`

R R WRITE
R IR IR WRITE
addr mux
memory MEMORY WRITE
IR
PC INCREMENT
PC
PC LOAD
PC WRITE
ADDR MUX PC
addr mux
ADDR MUX IR

25
One final combinational circuit: Control
FETCH
FETCH WRITE EXECUTE EXECUTE
WRITE
Control. Circuit for control wire sequencing.

opcode
Inputs
HALT
• Four control wires from clock.
ALU ADD
• opcode from IR. ALU XOR

• contents of R. ALU AND

Outputs
• 15 control wires for CPU components.
MEMORY WRITE

R PC INCREMENT
PC LOAD
R MUX ALU

R MUX MEMORY PC WRITE


R MUX IR
ADDR MUX PC
R WRITE
ADDR MUX IR
Key feature. A simple combinational circuit.
IR WRITE
26
Sample program
control signal result
1 A5 FETCH ADDR MUX PC
FETCH IR WRITE IR = A5
2 26
WRITE
PC INCREMENT
3 C7
EXECUTE ADDR MUX IR
4 00 R MUX MEMORY
CLOCK
5 05 ALU EXECUTE R WRITE R = 05
WRITE PC WRITE PC = 2
6 08 MEMORY
FETCH ADDR MUX PC
FETCH IR WRITE IR = 26
CONTROL
WRITE
12 7 0D PC INCREMENT
34 EXECUTE ALU ADD
`
PC R MUX ALU
EXECUTE R WRITE R = 0D
R mux
WRITE PC WRITE PC = 3
`

FETCH ADDR MUX PC


`

FETCH IR WRITE IR = C7
05
0D R WRITE
PC INCREMENT
EXECUTE
ADDR MUX IR
A5
26
C7
00 EXECUTE MEMORY WRITE M[7] = 0D
WRITE PC WRITE PC = 4
FETCH ADDR MUX PC
FETCH IR WRITE IR = 00
WRITE
PC INCREMENT
And THAT . . . is how your computer works! EXECUTE
HALT
27
TOY-8 CPU
RUN

MEMORY
CLOCK
CLOCK

ALU ALU FETCH


FETCH WRITE
EXECUTE
EXECUTE WRITE
MEMORY
MEMORY WRITE

CONTROL

ALU ADD
CONTROL
HALT PC

ALU XOR

ALU AND PC

PC LOAD
PC INCREMENT

R MUX R MUX ALU


PC WRITE
3-way R MUX MEM
R MUX IR

ADDR MUX PC
R WRITE ADDR MUX IR
addr MUX
R
R 2-way

IR WRITE
IR
IR

28
TOY-8 CPU
RUN

MEMORY
CLOCK

ALU FETCH
FETCH WRITE
EXECUTE
EXECUTE WRITE

MEMORY WRITE

CONTROL

ALU ADD

HALT PC

ALU XOR

ALU AND

PC LOAD
PC INCREMENT

R MUX ALU
PC WRITE
R MUX MEM
R MUX IR

ADDR MUX PC
R WRITE ADDR MUX IR

IR WRITE
IR

29
Scanning electron microscope image of a real microprocessor

Memory bits per square cm

modern
25 billion
microprocessor

TOY-8 1

30
How does your computer work?

A not-so-short answer, in case someone asks... RUN

MEMORY
CLOCK

• A circuit known as the CPU is built from ALU FETCH


FETCH WRITE
EXECUTE
EXECUTE WRITE

MEMORY WRITE

CONTROL

switches connected by wires. ALU ADD

HALT PC

ALU XOR

• The CPU performs operations on information


ALU AND

PC LOAD
PC INCREMENT

R MUX ALU
PC WRITE

encoded in binary, including its own instructions.


R MUX MEM
R MUX IR

ADDR MUX PC


R WRITE ADDR MUX IR

Circuits with feedback implement memories. IR


IR WRITE

• Instructions move information among memories,


specify the next operation, or implement
mathematical functions based on Boolean logic.
• Clock pulses activate sequences of control signals, which
cause state changes that implement machine instructions.
• Virtually everything else is implemented as layers of software,
each layer adding additional power and scope.
31
Reading and References

Required Reading
• Course textbook chapter 7.5
Suggested learning activities:
• Take more CS courses!

32

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