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LC420WUE SBR1 LGL

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0% found this document useful (0 votes)
40 views35 pages

LC420WUE SBR1 LGL

Bueno este archivo espero que les sirva a más de uno quizás le pueda servir hay que prestar mucha atención en los textos
Copyright
© © All Rights Reserved
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LC420WUE

Product Specification

SPECIFICATION
FOR
APPROVAL

( ) Preliminary Specification
( ̻ ) Final Specification

Title 42.0” WUXGA TFT LCD

BUYER General SUPPLIER RAKEN

MODEL *MODEL LC420WUE


SUFFIX SBR1(ROHS Verified)
*When you obtain standard approval,
please use the above model name without suffix

SIGNATURE SIGNATURE
APPROVED BY APPROVED BY
DATE DATE

/ / Team Leader

REVIEWED BY

/ / PM

PREPARED BY
/ / Engineer

Please return 1 copy for your confirmation with LCM R&D Dept.
your signature and comments. RAKEN Technology Co., Ltd

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Product Specification

CONTENTS
Number ITEM Page
COVER 1

CONTENTS 2
RECORD OF REVISIONS 3

1 GENERAL DESCRIPTION 4

2 ABSOLUTE MAXIMUM RATINGS 5

3 ELECTRICAL SPECIFICATIONS 6

3-1 ELECTRICAL CHARACTERISTICS 6

3-2 INTERFACE CONNECTIONS 10

3-3 SIGNAL TIMING SPECIFICATIONS 12


3-4 DATA MAPPING AND TIMING 13

3-5 PANEL PIXEL STRUCTURE 14

3-6 POWER SEQUENCE 15

4 OPTICAL SPECIFICATIONS 16

5 MECHANICAL CHARACTERISTICS 20

6 RELIABILITY 23

7 INTERNATIONAL STANDARDS 24

7-1 SAFETY 24

7-2 EMC 24

8 PACKING 25

8-1 DESIGNATION OF LOT MARK 25

8-2 PACKING FORM 25


9 PRECAUTIONS 26
9-1 MOUTING PRECAUTIONS 26

9-2 OPERATING PRECAUTIONS 26

9-3 ELECTROSTATIC DISCHARGE CONTROL 27

9-4 PRECAUTION FOR STRONG LIGHT EXPOSURE 27

9-5 STORAGE 27
9-6 HANDING PRECAUTION FOR PROTECTION FILM 27

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Product Specification

RECORD OF REVISIONS

Revision No. Revision Date Page Description


1.0 Aug, 25, 2009 Final CAS V1.0 Release

Final Specification

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Product Specification

1. General Description
The LC420WUE is a Color Active Matrix Liquid Crystal Display with an integral External Electrode Fluorescent
Lamp (EEFL) backlight system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive display type which is operating in the normally black mode. It has a 42.02 inch diagonally
measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes.
Gray scale or the luminance of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.
Therefore, it can present a palette of more than 1.06B colors.
It has been designed to apply the 10-bit 2-port LVDS interface.
It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut,
high color depth and fast response time are important.

Mini-LVDS(RGB)
EEPROM
Source Driver Circuit
SCL SDA S1 S1920
+12.0V
G1
Gate Driver Circuit

LVDS
Timing Controller
2Port
CN1 [LVDS Rx + OPC + ODC
Reverse (51pin)
integrated]
LVDS Select TFT - LCD Panel
Bit Select (1920 Ý RGB Ý 1080 pixels)
OPC Enable
ExtVBR-B Power Circuit G1080

VBR-B out Block

High Input CN2, 3pin, 18 Lamps/@135 mA


Back light Assembly
High Input CN3, 3pin, 18 Lamps/@135mA

General Features
Active Screen Size 42.02 inches(1067.31mm) diagonal
Outline Dimension 983.0(H) x 576.0 (V) x 50.5 mm(D) (Typ.)
Pixel Pitch 0.4845 mm x 0.4845 mm
Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement
Color Depth 10-bit(D), 1.06B colors
Luminance, White 500 cd/m2 (Center 1point ,Typ.)
Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.))
Power Consumption Total (166.7) W (Typ.) (Logic=6.7 W, Back Light=160W @ with Inverter )
Weight 11.0 Kg (Typ.)
Display Mode Transmissive mode, Normally black
Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 10%)

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Product Specification

2. Absolute Maximum Ratings


The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.

Table 1. ABSOLUTE MAXIMUM RATINGS

Value
Parameter Symbol Unit Remark
Min Max
Power Input
LCD circuit VLCD -0.3 +14.0 V [DC] ˆ›GY\Gr YG¶j
Voltage
Operating ˆ›GY\Gr YG¶j
B/L Input voltage Voltage (one VOP 700 1100 V[ RMS] Burst Dimming Duty
side) 100%
Operating Temperature TOP 0 +50 ¶C
Storage Temperature TST -20 +60 ¶C
Note 1
Operating Ambient Humidity HOP 10 90 %RH
Storage Humidity HST 10 90 %RH

Notes : 1. Temperature and relative humidity range are shown in the figure below.
Wet bulb temperature should be 39 ¶C Max. and no condensation of water.
2. Gravity mura can be guaranteed under 40୅ condition.

90%

60
60%

50 Storage
Humidity [(%)RH]

Wet Bulb
Temperature [¶C]
40
40%
Operation
30

20
10
0
10%

-20 0 10 20 30 40 50 60 70 80

Dry Bulb Temperature [¶C]

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Product Specification

3. Electrical Specifications
It requires two kind of power inputs.
One is employed to power for the LCD circuit. The other Is used for the EEFL backlight circuit.

3-1. Electrical Characteristics

Table 2. ELECTRICAL CHARACTERISTICS

Value
Parameter Symbol Unit Note
Min Typ Max
Circuit :

Power Input Voltage VLCD 10.8 12.0 13.2 VDC


- ࣱ࣮࣬ ࣱࣵࣴ mA 1
Power Input Current ILCD
- ࣱ࣯ࣳ ࣲࣲࣴ mA 2

Power Consumption PLCD - ࣰࣲ࣮࣪ ࣭ࣳ࣪ࣴ Watt 1

Rush current IRUSH - - 3.0 A 3

Notes : 1. The specified current and power consumption are under the VLCD=12.0V, 25 r 2¶C, fV=60Hz
condition whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency.
2. The current is specified at the maximum current pattern.
3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.).

White : 1023Gray
Black : 0Gray

Mosaic Pattern(8 x 6)

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Product Specification

Table 3. ELECTRICAL CHARACTERISTICS for IPB& Lamp (Continue)


Values
Parameter Symbol Unit Notes
Min Typ Max
Backlight Assembly :
Operating Voltage
VBL 800 950 1100 VRMS 1, 2
(one side,fBL=45KHz, IBL= 135mArms))

Operating Current (one side) IBL 126 135 144 mARMS 1

Established Starting 0୅ - - 1225


VS VRMS 1, 3
Voltage (one side) 25୅ - - 1020
Operating Frequency fBL 43 45 47 kHz 4
Striking Time S TIME - - 2.0 sec 3
Power Consumption PBL 160 Watt 6
Burst Dimming Duty PWM duty 20 100 % 9
Burst Dimming Frequency 1/T 95 - 182 Hz 9

Values
Parameter Symbol Unit Notes
Min Typ Max
Lamp : APPENDIX
Lamp Voltage (one side) VLAMP 820 1035 1075 VRMS 2
Lamp Current (one side) ILAMP 3 7.5 8 mARMS
Discharge Stabilization Time TS - - 3 Min 5
Lamp Frequency f LAMP 40 45 80 KHz
Lamp Temperature TLAMP 130 ¶C
Established Starting 0୅ VS 1225
VRMS 3
Voltage (one side) 25୅ VS 1020
Life Time 50,000 Hrs 7
Notes : The design of the inverter must have specifications for the lamp in LCD Assembly.
The electrical characteristics of inverter are based on High-High Driving type.
The performance of the lamps in LCM, for example life time or brightness, is extremely influenced by
the characteristics of the DC-AC inverter. So, all the parameters of an inverter should be carefully
designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) has never been occurred. When you confirm it,
the LCD– Assembly should be operated in the same condition as installed in your instrument.
୔ Do not attach a conductive tape to lamp connecting wire.
If you attach conductive tape to the lamp wire, not only luminance level can be lower than typical one
but also inverter operate abnormally on account of leakage current which is generated between lamp wire
and conductive tape.
1. Specified values are defined for a Backlight Assembly.( IBL : 18 lamp, 7.5mA/Lamp)
2. Operating voltage is measured at 25 r 2¶C(after 2hr.aging). The variance range for operating voltage is r 10%.
3. The established starting voltage [ VS ] should be applied to the lamps for more than Striking time (S TIME)
for start-up. Inverter open voltage must be more than established starting voltage. Otherwise, the lamps may
not be turned on. The used lamp current is typical value.
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Product Specification

}—’T—’

S TIME

Vs = (Vpk-pk) / [ 2*root(2)]

4. Lamp frequency may produce interference with horizontal synchronous frequency. As a result, the may
cause beat on the display. Therefore, lamp frequency shall be away as much as possible from the horizontal
synchronous frequency and its harmonics range in order to prevent interference.
5. The brightness of the lamp after lighted for 5minutes is defined as 100%.
TS is the time required for the brightness of the center of the lamp to be not less than 95% at typical current.
The screen of LCD module may be partially dark by the time the brightness of lamp is stable after turn on.
6. Maximum level of power consumption is measured at initial turn on.
Typical level of power consumption is measured after 2hrs aging at 25 r 2¶C.
7. The life time is determined as the time at which brightness of the lamp is 50% compared to that of initial
value at the typical lamp current on condition of continuous operating at 25 r 2¶C, based on duty 100%.
8.The output of the inverter must have symmetrical(negative and positive) voltage and current waveform
(Unsymmetrical ratio is less than 10%). Please do not use the inverter which has not only unsymmetrical
voltage and current but also spike wave.
Requirements for a system inverter design, which is intended to achieve better display performance,
power efficiency and more reliable lamp characteristics.
It can help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should be within ˲2 ·10%.
* Inverter output waveform had better be more similar to ideal sine wave.

* Asymmetry rate:
Ip
| I p – I –p | / Iop x 100%

* Distortion rate
I -p
I p (or I –p) / Iop

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Product Specification

9. The reference method of burst dimming duty ratio.


It is recommended to use synchronous V-sync frequency to prevent waterfall
(Vsync x 2 =Burst Frequency)

{
A
PWM
+3.3V TTL

I-out
Output of Inverter to Lamp
90%

PWM duty={ A/T } * 100 Point A


a Point B

Point A : rising time 90% of Iout point .


Point B : falling starting point .
I out duty = { a/T } * 100
PWM Frequency = 1/T

୔ We recommend not to be much different between PWM duty and Iout duty .
୔ Dimming current output rising and falling time may produce humming and inverter trans’ sound noise.
୔ Burst dimming duty should be 100% for more than 1second after turn on.
୔ Equipment
Oscilloscope :TDS3054B(Tektronix)
Current Probe : P6022 AC (Tektronix)
High Voltage Probe: P5100(Tektronix)

10. The Cable between the backlight connector and its inverter power supply should be connected directly
with a minimized length. The longer cable between the backlight and the inverter may cause the lower
luminance of lamp and may require more higher starting voltage ( Vs ).

11. The operating current must be measured as near as backlight assembly input.

12. The operating current unbalance between left and right must be under 10% of Typical current
́Left(Master) current – Right(Slave) Current́ ର 10% of typical current

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Product Specification

3-2. Interface Connections


This LCD module employs two kinds of interface connection, a 51-pin connector is used for the module
electronics and two 3-pin Balance PCB connectors are used for the integral backlight system.
3-2-1. LCD Module
- LCD Connector(CN1): FI-R51S-HF(manufactured by JAE) or KN25-51P-0.5SH(manufactured by Hirose)
- Mating Connector : FI-R51HL(JAE) or compatible
Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION
No Symbol Description No Symbol Description
1 GND Ground 27 Bit Select ‘H’ or NC= 10bit(D) , ‘L’ = 8bit
2 NC No Connection 28 R2AN SECOND LVDS Receiver Signal (A-)
3 NC No Connection 29 R2AP SECOND LVDS Receiver Signal (A+)
4 NC No Connection 30 R2BN SECOND LVDS Receiver Signal (B-)
5 NC No Connection 31 R2BP SECOND LVDS Receiver Signal (B+)
6 NC No Connection 32 R2CN SECOND LVDS Receiver Signal (C-)
7 LVDS Select ‘H’ =JEIDA , ‘L’ or NC = VESA 33 R2CP SECOND LVDS Receiver Signal (C+)
8 VBR_EXT Vbr Input (For OPC) 34 GND Ground
9 OPC_OUT Vbr Output (For OPC) 35 R2CLKN SECOND LVDS Receiver Clock Signal(-)
SECOND LVDS Receiver Clock
10 OPC Enable H : OPC Enable / L : OPC Disable 36 R2CLKP
Signal(+)
11 GND Ground 37 GND Ground
12 R1AN FIRST LVDS Receiver Signal (A-) 38 R2DN SECOND LVDS Receiver Signal (D-)
13 R1AP FIRST LVDS Receiver Signal (A+) 39 R2DP SECOND LVDS Receiver Signal (D+)
14 R1BN FIRST LVDS Receiver Signal (B-) 40 R2EN SECOND LVDS Receiver Signal (E-)
15 R1BP FIRST LVDS Receiver Signal (B+) 41 R2EP SECOND LVDS Receiver Signal (E+)
16 R1CN FIRST LVDS Receiver Signal (C-) 42 Reserved No connection or GND
17 R1CP FIRST LVDS Receiver Signal (C+) 43 Reserved No connection or GND
18 GND Ground 44 GND Ground
19 R1CLKN FIRST LVDS Receiver Clock Signal(-) 45 GND Ground
20 R1CLKP FIRST LVDS Receiver Clock Signal(+) 46 GND Ground
21 GND Ground 47 NC No connection
22 R1DN FIRST LVDS Receiver Signal (D-) 48 VLCD Power Supply +12.0V
23 R1DP FIRST LVDS Receiver Signal (D+) 49 VLCD Power Supply +12.0V
24 R1EN FIRST LVDS Receiver Signal (E-) 50 VLCD Power Supply +12.0V
25 R1EP FIRST LVDS Receiver Signal (E+) 51 VLCD Power Supply +12.0V
26 Reserved No connection or GND - - -

Notes : 1. All GND(ground) pins should be connected together to the LCD module’s metal frame.
2. All VLCD (power input) pins should be connected together.
3. All Input levels of LVDS signals are based on the EIA 644 Standard.
4. Specific pins(pin No. #2~#6) are used for internal data process of the LCD module.
If not used, these pins are no connection.
5. LVDS pin (pin No. #24,25,40,41) are used for 10Bit(D) of the LCD module.
If used for 8Bit(R), these pins are no connection.
6. Specific pin No. #44 is used for “No signal detection” of system signal interface.
It should be GND for NSB(No Signal Black) during the system interface signal is not.
If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern).

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3-2-2. Backlight Module

[ Master ] [ Slave ]
1) Balance Connector 1) Balance Connector
: 65002WS-03 (manufactured by YEONHO)or equivalent : 65002WS-03 (manufactured by YEONHO)or equivalent
2) Mating Connector 2) Mating Connector
: 65002HS-03 (manufactured by YEONHO) or equivalent. : 65002HS-03 (manufactured by YEONHO) or equivalent.

Table 5. BACKLIGHT CONNECTOR PIN CONFIGURATION(CN2,CN3)


No Symbol Master Slave Note
1 H_Input High_Input High_Input
2 H_Input High_Input High_Input
3 FB NC NC

ଝ Rear view of LCM

3 2 1

1 2 3

Master Slave

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3-3. Signal Timing Specifications


Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timing
should be satisfied with the following specification for normal operation.

Table 6. TIMING TABLE for NTSC (DE Only Mode)


ITEM Symbol Min Typ Max Unit Note
Display Period tHV - 960 - tclk
Horizontal Blank tHB 100 140 240 tclk
Total tHP 1060 1100 1200 tclk 2200/2
Display Period tVV - 1080 - Lines
Vertical Blank tVB 11 45 69 Lines
Total tVP 1091 1125 1149 Lines

ITEM Symbol Min Typ Max Unit Note


DCLK fCLK 70 74.25 77 MHz 148.5/2
Frequency Horizontal fH 65 67.5 70 KHz
Vertical fV 57 60 63 Hz

Table 7 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timing
should be satisfied with the following specification for normal operation.

Table 7. TIMING TABLE for PAL (DE Only Mode)


ITEM Symbol Min Typ Max Unit Note
Display Period tHV - 960 - tclk
Horizontal Blank tHB 100 140 240 tclk
Total tHP 1060 1100 1200 tclk 2200/2
Display Period tVV - 1080 - Lines
Vertical Blank tVB 228 270 300 Lines
Total tVP 1308 1350 1380 Lines

ITEM Symbol Min Typ Max Unit Note


DCLK fCLK 70 74.25 77 MHz 148.5/2
Frequency Horizontal fH 65 67.5 70 KHz
Vertical fV 47 50 53 Hz

Note : The Input of HSYNC & VSYNC signal does not have an effect on normal operation(DE Only Mode).
The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate.

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3-4. Signal Timing Waveforms

0.7VDD
DE, Data
0.3VDD

tCLK
DCLK 0.5 VDD

Valid data

First data Invalid data Pixel 0,0 Pixel 2,0 Invalid data

Valid data

Second data Invalid data Pixel 1,0 Pixel 3,0 Invalid data

DE(Data Enable)

* tHB = tHFP + tWH +tHBP


* Reference : Sync. Relation
* tVB = tVFP + tWV +tVBP
tHP
HSync tWH

tHBP tHV tHFP

DE(Data Enable)

tVP
tWV

VSync
tVBP tVV tVFP

DE(Data Enable)

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3-5. Color Data Reference


The brightness of each primary color(red,green,blue) is based on the 10-bit gray scale data input for the color.
The higher binary input, the brighter the color. Table 8 provides a reference for color versus data input.

Table 8. COLOR DATA REFERENCE


अपबऱरࣜࣿफनफमࣜऀझरझ

ऎँऀ ःऎँँऊ ࣾईऑँ


ࣿफनफम
उएࣾࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜईएࣾ उएࣾࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜईएࣾ उएࣾࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜईएࣾ
ऎࣵࣜऎࣴࣜऎࣳࣜऎࣲࣜऎࣱࣜऎࣰࣜऎ࣯ࣜऎ࣮ࣜऎ࣭ࣜऎ࣬ ःࣵࣜःࣴࣜःࣳࣜःࣲࣜःࣱࣜःࣰࣜः࣯ࣜः࣮ࣜः࣭ࣜः࣬ ࣰࣱࣲ࣯࣮࣭ࣾࣵࣜࣾࣴࣜࣾࣳࣜࣾࣜࣾࣜࣾࣜࣾࣜࣾࣜࣾࣜࣾ࣬

ࣾनझटध ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ऎडठ࣭࣮࣯ࣜࣤ࣬ࣥ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ःमडडपࣜ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣮࣯ࣤ࣬ࣥ
ࣾझयथट ࣾनऱड࣭࣮࣯ࣜࣤ࣬ࣥ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ
ࣿफनफम
ࣿवझप ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ

उझणडपरझ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ

कडननफळ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ओतथरड ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ

ऎँऀࣜࣤ࣬࣬࣬ࣥࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ऎँऀ࣭ࣜࣤ࣬࣬ࣥ ࣭࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ऎँऀ ࣪࣪࣪ ࣪࣪࣪ ࣪࣪࣪ ࣪࣪࣪

ऎँऀ࣭࣮࣮ࣜࣤ࣬ࣥ ࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ऎँऀ࣭࣮࣯ࣜࣤ࣬ࣥ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ःऎँँऊࣜࣤ࣬࣬࣬ࣥࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ःऎँँऊ࣭ࣜࣤ࣬࣬ࣥ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

࣪࣪࣪ ࣪࣪࣪ ࣪࣪࣪ ࣪࣪࣪


ःऎँँऊ
ःऎँँऊࣜ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣮࣮ࣤ࣬ࣥ
ःऎँँऊࣜ
࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬
࣭࣮࣯ࣤ࣬ࣥ
ࣾईऑँࣜࣤ࣬࣬࣬ࣥࣜ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬

ࣾईऑँ࣭ࣜࣤ࣬࣬ࣥ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ

ࣾईऑँ ࣪࣪࣪ ࣪࣪࣪ ࣪࣪࣪ ࣪࣪࣪

ࣾईऑँ࣭࣮࣮ࣜࣤ࣬ࣥ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ࣬

ࣾईऑँ࣭࣮࣯ࣜࣤ࣬ࣥ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ࣜࣜ࣬ ࣭࣭࣭࣭࣭࣭࣭࣭࣭࣭ࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜࣜ

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3-6. Power Sequence


3-6-1. LCD Driving circuit

90% 90%
Power Supply For LCD
VLCD 10% 10%
0V

T1 T6
Valid Data
T2 T5
30% Invalid Invalid
Interface Signal (Tx) 0V Data Data

T3 T4

Option Signal T7 T8
(LVDS_select, BIT_select)

T9 Lamp ON
Power for Lamp

Table 9. POWER SEQUENCE


Value
Parameter Unit Notes
Min Typ Max
T1 0.5 - 20 ms
T2 0.5 - - ms 4, 5
T3 200 - - ms 3
T4 200 - - ms 3
T5 0 - - ms
T6 2.0 - - s 6
T7 0.5 - T2 ms 4
T8 0 - - ms 4
T9 T2 + T 3 - 5 s
Note : 1. Please avoid floating state of interface signal at invalid period.
2. When the interface signal is invalid, be sure to pull down the power supply VLCD to 0V.
3. The T3/T4 is recommended value, the case when failed to meet a minimum specification,
abnormal display would be shown. There is no reliability problem.
4. If the on time of signals(Interface signal and Option signals) precedes the on time of Power(VLCD),
it will be happened abnormal display.
5. T6 should be measured after the Module has been fully discharged between power off and on
period.

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4. Optical Specification

Optical characteristics are determined after the unit has been ‘ON’ and stable in a dark environment at 25·2¶C.
The values specified are at an approximate distance 50cm from the LCD surface at a viewing angle of ) and T
equal to 0 ¶.
FIG. 10 shows additional information concerning the measurement equipment and method.

LCD Module Pritchard 880 or


Optical Stage(x,y)
equivalent

50cm
FIG. 10 Optical Characteristic Measurement Equipment and Method

Ta= 25·2¶C, VDD,VGH,VGL=Typ., fV=60Hz,


Table 10. OPTICAL CHARACTERISTICS Dclk=148.5MHz, IBL=135mArms
Value
Parameter Symbol Unit Note
Min Typ Max
Contrast Ratio CR 1400 - 1
Surface Luminance, white LWH 400 500 - cd/m2 2
Luminance Variation G WHITE 5P - - 1.3
Gray-to-Gray G to G - 5 8 ms 4
Response Time
Rising / Falling Tr / Tf - 5 8 ms 4
Rx 0.638
RED
Ry 0.334
Gx 0.290
Color GREEN
Gy Typ 0.606 Typ
Coordinates
BLUE Bx -0.03 0.144 +0.03
[CIE1931]
By 0.064
WHITE Wx 0.279
Wy 0.292
Viewing Angle (CR>10)
x axis, right(I=0¶) Tr 89 - -
x axis, left (I=180¶) Tl 89 - -
degree 5
y axis, up (I=90¶) Tu 89 - -
y axis, down (I=270¶) Td 89 - -
Gray Scale - - - 6

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Notes :1. Contrast Ratio(CR) is defined mathematically as :


Surface Luminance at all white pixels
CR =
Surface Luminance at all black pixels
It is measured at center 1-point.

2. Surface luminance is determined after the unit has been ‘ON’ and 1Hour after lighting the
backlight in a dark environment at 25·2¶C. Surface luminance is the luminance value at center
1-point across the LCD surface 50cm from the surface with all pixels displaying white.
For more information see the FIG. 10.

3. The variation in surface luminance , G WHITE is defined as :


G WHITE(5P) = Maximum(Lon1,Lon2, Lon3, Lon4, Lon5) / Minimum(Lon1,Lon2, Lon3, Lon4, Lon5)
Where Lon1 to Lon5 are the luminance with all pixels displaying white at 5 locations .
For more information, see the FIG. 11.

4. Response time is the time required for the display to transit from G(255) to G(0) (Rise Time, TrR)
and from G(0) to G(255) (Decay Time, TrD).
And the G to G is the average response time when the overdriving function adapted.

5. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are
determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which
is normal to the LCD module surface. For more information, see the FIG. 13.

6. Gray scale specification


Gamma Value is approximately 2.2. For more information, see the Table 11.

Table 11. GRAY SCALE SPECIFICATION

Gray Level Luminance [%] (Typ.)


L0 0.07
L63 0.27
L127 1.04
L191 2.49
L255 4.68
L319 7.66
L383 11.5
L447 16.1
L511 21.6
L575 28.1
L639 35.4
L703 43.7
L767 53.0
L831 63.2
L895 74.5
L959 86.7
L1023 100

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Measuring point for surface luminance & measuring point for luminance variation.

H
A

ྚ ྛ


V
B

A : H / 4 mm
ྜ ྜྷ B : V / 4 mm
@ H,V : Active Area

FIG. 11 5 Points for Luminance Measure

Response time is defined as the following figure and shall be measured by switching the input signal for
“Gray(N)” and “Gray(M)”.

TrR TrD
100
90

Optical
Response

10
Gray(N) Gray(M) Gray(N)
0
N,M = Black~White, N<M

FIG.3 Response Time

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Dimension of viewing angle range

Normal
E Y
I = 90 q, Up

I = 180 q, Left
T

I = 0 q, Right

I = 270 q, Down

FIG. 13 Viewing Angle

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5. Mechanical Characteristics

Table 9 provides general mechanical characteristics.

Table 9. MECHANICAL CHARACTERISTICS


Item Value

Horizontal 983.0 mm

Outline Dimension Vertical 576.0 mm

Depth 50.5 mm

Horizontal 939.0 mm
Bezel Area
Vertical 531.0 mm

Horizontal 930.24 mm
Active Display Area
Vertical 523.0 mm

Weight 11.0 Kg (Typ.) , 12.0Kg (Max.)

Note : Please refer to a mechanic drawing in terms of tolerance at the next page.

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<FRONT VIEW>

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<REAR VIEW>

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6. Reliability

Table 13. ENVIRONMENT TEST CONDITION

No. Test Item Condition

1 High temperature storage test Ta= 60¶C 240h

2 Low temperature storage test Ta= -20¶C 240h

3 High temperature operation test Ta= 50¶C 50%RH 240h

4 Low temperature operation test Ta= 0¶C 240h

Wave form : random


Vibration level : 1.0Grms
Vibration test
5 Bandwidth : 10-300Hz
(non-operating)
Duration : X,Y,Z, 10 min
One time each direction

Shock level : 50G


Shock test Waveform : half sine wave, 11ms
6
(non-operating) Direction : ᇹX, ᇹY, ᇹZ
One time each direction

7 Humidity condition Operation Ta= 40 ¶C ,90%RH

Altitude operating 0 - 15,000 ft


8
storage / shipment 0 - 40,000 ft

Note : Before and after Reliability test, LCM should be operated with normal function.

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7. International Standards

7-1. Safety
a) UL 60065, 7th Edition, dated June 30, 2003, Underwriters Laboratories, Inc.,
Standard for Audio, Video and Similar Electronic Apparatus.
b) CAN/CSA C22.2, No. 60065:03, Canadian Standards Association,
Standard for Audio, Video and Similar Electronic Apparatus.
c) IEC60065:2001, 7th Edition CB-scheme and EN 60065:2002,
Safety requirements for Audio, Video and Similar Electronic Apparatus..

7-2. EMC
a) ANSI C63.4 “Methods of Measurement of Radio-Noise Emissions from Low-Voltage Electrical and
Electrical Equipment in the Range of 9kHZ to 40GHz. “American National Standards Institute(ANSI),
1992
b) CISPR13 "Limits and Methods of Measurement of Radio interference characteristics of Sound
and Television broadcast receivers and associated equipment"
CISPR22 "Limits and Methods of Measurement of Radio interference characteristics of Information
Technology Equipment" International Special Committee on Radio Interference.
c) EN55013 "Limits and Methods of Measurement of Radio interference characteristics of Sound and
Television broadcast receivers and associated equipment"
EN55022 "Limits and Methods of Measurement of Radio interference characteristics of Information
Technology Equipment" European Committee for Electro Technical Standardization. (CENELEC),
1988(Including A1:2000)

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8. Packing

8-1. Designation of Lot Mark


a) Lot Mark

A B C D E F G H I J K L M

A,B,C : SIZE(INCH)
D : YEAR E : MONTH
F : PANEL CODE G : FACTORY CODE
H : ASSEMBLY CODE I,J,K,L,M : SERIAL NO.
Note
1. YEAR
Year 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010

Mark 1 2 3 4 5 6 7 8 9 0

2. MONTH

Month Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec

Mark 1 2 4 4 5 6 7 8 9 A B C

b) Location of Lot Mark


Serial NO. is printed on the label. The label is attached to the backside of the LCD module.
This is subject to change without prior notice.

8-2. Packing Form


a) Package quantity in one Pallet : 13 pcs

b) Pallet Size : 1140 mm X 990 mm X 810 mm.

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9. Precautions
Please pay attention to the followings when you use this TFT LCD module.
9-1. Mounting Precautions
(1) You must mount a module using specified mounting holes (Details refer to the drawings).
(2) You should consider the mounting structure so that uneven force (ex. Twisted stress) is not applied to the
module. And the case on which a module is mounted should have sufficient strength so that external
force is not transmitted directly to the module.
(3) Please attach the surface transparent protective plate to the surface in order to protect the polarizer.
Transparent protective plate should have sufficient strength in order to the resist external force.
(4) You should adopt radiation structure to satisfy the temperature specification.
(5) Acetic acid type and chlorine type materials for the cover case are not desirable because the former
generates corrosive gas of attacking the polarizer at high temperature and the latter causes circuit break
by electro-chemical reaction.
(6) Do not touch, push or rub the exposed polarizers with glass, tweezers or anything harder than HB
pencil lead. And please do not rub with dust clothes with chemical treatment.
Do not touch the surface of polarizer for bare hand or greasy cloth.(Some cosmetics are detrimental
to the polarizer.)
(7) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft materials like
chamois soaks with petroleum benzine. Normal-hexane is recommended for cleaning the adhesives
used to attach front / rear polarizers. Do not use acetone, toluene and alcohol because they cause
chemical damage to the polarizer.
(8) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes
deformations and color fading.
(9) Do not open the case because inside circuits do not have sufficient strength.

9-2. Operating Precautions


(1) The spike noise causes the mis-operation of circuits. It should be lower than following voltage :
V=·200mV(Over and under shoot voltage)
(2) Response time depends on the temperature.(In lower temperature, it becomes longer.)
(3) Brightness depends on the temperature. (In lower temperature, it becomes lower.)
And in lower temperature, response time(required time that brightness is stable after turned on)
becomes longer
(4) Be careful for condensation at sudden temperature change.Condensation makes damage to polarizer or
electrical contacted parts. And after fading condensation, smear or spot will occur.
(5) When fixed patterns are displayed for a long time, remnant image is likely to occur.
(6) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be
done by system manufacturers. Grounding and shielding methods may be important to minimized the
interference.
(7) Please do not give any mechanical and/or acoustical impact to LCM. Otherwise, LCM can’t be operated
its full characteristics perfectly.
(8) A screw which is fastened up the steels should be a machine screw.
(if not, it can causes conductive particles and deal LCM a fatal blow)
(9) Please do not set LCD on its edge.
(10) Partial darkness may happen during 3~5 minutes when LCM is operated initially in condition that
luminance is under 40% at low temperature (under 5୅). This phenomenon which disappears naturally
after 3~5 minutes is not a problem about reliability but LCD characteristic

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9-3. Electrostatic Discharge Control


Since a module is composed of electronic circuits, it is not strong to electrostatic discharge. Make certain that
treatment persons are connected to ground through wrist band etc. And don’t touch interface pin directly.

9-4. Precautions for Strong Light Exposure


Strong light exposure causes degradation of polarizer and color filter.

9-5. Storage
When storing modules as spares for a long time, the following precautions are necessary.

(1) Store them in a dark place. Do not expose the module to sunlight or fluorescent light. Keep the temperature
between 5¶C and 35¶C at normal humidity.
(2) The polarizer surface should not come in contact with any other object.
It is recommended that they be stored in the container in which they were shipped.

9-6. Handling Precautions for Protection Film


(1) The protection film is attached to the bezel with a small masking tape.
When the protection film is peeled off, static electricity is generated between the film and polarizer.
This should be peeled off slowly and carefully by people who are electrically grounded and with well ion-
blown equipment or in such a condition, etc.
(2) When the module with protection film attached is stored for a long time, sometimes there remains a very
small amount of glue still on the bezel after the protection film is peeled off.
(3) You can remove the glue easily. When the glue remains on the bezel surface or its vestige is recognized,
please wipe them off with absorbent cotton waste or other soft material like chamois soaked with normal-
hexane.

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# APPENDIX- I-1
̰ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter (Pin7=“L or NC”)

Host System THC63LVD103


30 Bit or Compatible Timing
RED0 33 Controller
RED1 34 FI-RE51S-HF
RED2 35
RED3 36
31
RED4 37 TA- 12 RA1N
30 100ȳ
RED5 38 TA+ 13 RA1P
RED6 59
RED7 61 29
TB- 14 RB1N
RED8 4 28 100ȳ
RED9 5 TB+ 15 RB1P
GREEN0 40
25
GREEN1 41 TC- 16 RC1N
GREEN2 42 24 100ȳ
TC+ 17 RC1P
GREEN3 44
GREEN4 45 23
TCLK- 19 RCLK1N
GREEN5 46 22
TCLK+ 20 100ȳ RCLK1P
GREEN6 62
GREEN7 63
21
GREEN8 6 TD- 22 RD1N
GREEN9 8 20 100ȳ
TD+ 23 RD1P
BLUE0 48
BLUE1 49 19
TE- 24 RE1N
BLUE2 50 18
TE+ 25 100ȳ RE1P
BLUE3 52
BLUE4 53
BLUE5 54 7 VESA / JEIDA
BLUE6 64 1Kȳ
BLUE7 1
BLUE8 9
BLUE9 11
Hsync 55
LCM Module
GND

Vsync 57
Data Enable 58
CLOCK 12

Notes:
1. The LCD module uses a 100 Ohm(ᆅ) resistor between positive and negative lines
of each receiver input.
2. Refer to LVDS transmitter data sheet for detail descriptions. (THC63LVD103 or Compatible)
3. ‘9’ means MSB and ‘0’ means LSB at R,G,B pixel data.

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# APPENDIX- I-2
̰ Required signal assignment for Flat Link (Thine : THC63LVD103) Transmitter (Pin7=“H”)

Host System THC63LVD103


30 Bit or Compatible Timing
RED0 4 Controller
RED1 5 FI-RE51S-HF
RED2 59
RED3 61
31
RED4 33 TA- 12 RA1N
30 100ȳ
RED5 34 TA+ 13 RA1P
RED6 35
RED7 36 29
TB- 14 RB1N
RED8 37 28 100ȳ
RED9 TB+ 15 RB1P
38
GREEN0 6
25
GREEN1 8 TC- 16 RC1N
GREEN2 62 24 100ȳ
TC+ 17 RC1P
GREEN3 63
GREEN4 40 23
TCLK- 19 RCLK1N
GREEN5 41 22
TCLK+ 20 100ȳ RCLK1P
GREEN6 42
GREEN7 44
21
GREEN8 45 TD- 22 RD1N
GREEN9 46 20 100ȳ
TD+ 23 RD1P
BLUE0 9
BLUE1 11 19
TE- 24 RE1N
BLUE2 64 18
TE+ 25 100ȳ RE1P
BLUE3 1
BLUE4 48
BLUE5 49 7 VESA / JEIDA
BLUE6 50 1Kȳ
BLUE7 52
BLUE8 53
BLUE9 54
Hsync 55
LCM Module
VCC

Vsync 57
Data Enable 58
CLOCK 12

Notes:
1. The LCD module uses a 100 Ohm(ᆅ) resistor between positive and negative lines
of each receiver input.
2. Refer to LVDS transmitter data sheet for detail descriptions. (THC63LVD103 or Compatible)
3. ‘9’ means MSB and ‘0’ means LSB at R,G,B pixel data.

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# APPENDIX- II
̰ Pallet Ass’y

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# APPENDIX 2 Product Specification


# APPENDIX- III-1
‫ غ‬LCM Label

Model

Serial No.

UL MARK

US PATENT No. Origin

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# APPENDIX- III-2

̰ Pallet Label

LC420WUE

SBR1

13PCS 001/01-01

MADE IN CHINA RoHS Verified

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# APPENDIX 2 Product Specification


# APPENDIX- IV

Option Pin Circuit Block Diagram


Circuit Block Diagram of LVDS Format Selection pin

1K˟
Selector (Pin 7) Selector

50K˟

ASIC
(TCON)

System Side LCM Side

Circuit Block Diagram of Interlace Free Selection pin

1K˟
Selector (Pin 27) Selector

50K˟

ASIC
(TCON)

System Side LCM Side

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# APPENDIX- V-1

LVDS Data-Mapping info. (10bit)

̰ LVDS Select : “H” Data-Mapping (JEIDA format)

RCLKP

RCLKM

RAP R15’ R14’ G14 R19 R18 R17 R16 R15 R14 G14”

RBP G16’ G15’ B15 B14 G19 G18 G17 G16 G15 B15”

RCP B17’ B16’ DE VSYNC HSYNC B19 B18 B17 B16 DE”

RDP R13’ R12’ X B13 B12 G13 G12 R13 R12 X”

REP R11’ R10’ X B11 B10 G11 G10 R11 R10 X”

̰ LVDS Select : “L” Data-Mapping (VESA format)

RCLKP

RCLKM

RAP R11’ R10’ G10 R15 R14 R13 R12 R11 R10 G10”

RBP G12’ G11’ B11 B10 G15 G14 G13 G12 G11 B15”

RCP B13’ B12’ DE VSYNC HSYNC B15 B14 B13 B12 DE”

RDP R17’ R16’ X B17 B16 G17 G16 R17 R16 X”

REP R19’ R18’ X B19 B18 G19 G18 R19 R18 X”

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# APPENDIX- VI

LVDS Input characteristics


1. DC Specification

Description Symbol Min Max Unit Notes


LVDS Single end Voltage |VID| 200 600 mV -
LVDS Common mode Voltage VCM 1.1 1.5 V -
LVDS Input Voltage Range VIN 0.7 1.8 V -
Change in common mode Voltage ȟVCM 150 mV -

2. AC Specification
Tclk

LVDS Clock

LVDS Data

( F clk = 1 /T clk )
tSKEW tSKEW
A
Tclk
LVDS 1’st Clock 80%

LVDS 2nd / 3rd / 4th Clock


20%
tRF
Tskew_min Tskew_max

Description Symbol Min Max Unit Notes


LVDS Clock to Data Skew Margin tSKEW 480 ps 78MHz > Fclk ˻ 70MHz
LVDS Clock/DATA Rising/Falling time tRF 260 (0.3*Tclk)/7 ps -
LVDS Clock to Clock Skew Margin (Even to Odd) tSKEW_EO 1/7* Tclk Tclk -

Note. All Input levels of LVDS signals are based on the EIA 644 Standard.

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